mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).
Fork of mbed-src by
The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h
targets/hal/TARGET_Freescale/TARGET_KL05Z/serial_api.c@30:7ca55132b805, 2013-10-26 (annotated)
- Committer:
- icenyne
- Date:
- Sat Oct 26 13:59:14 2013 +0000
- Revision:
- 30:7ca55132b805
- Parent:
- 20:4263a77256ae
mbed library source for KL25Z updated to operate using internal oscillator at 48MHz as the default.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 20:4263a77256ae | 1 | /* mbed Microcontroller Library |
bogdanm | 20:4263a77256ae | 2 | * Copyright (c) 2006-2013 ARM Limited |
bogdanm | 20:4263a77256ae | 3 | * |
bogdanm | 20:4263a77256ae | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
bogdanm | 20:4263a77256ae | 5 | * you may not use this file except in compliance with the License. |
bogdanm | 20:4263a77256ae | 6 | * You may obtain a copy of the License at |
bogdanm | 20:4263a77256ae | 7 | * |
bogdanm | 20:4263a77256ae | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
bogdanm | 20:4263a77256ae | 9 | * |
bogdanm | 20:4263a77256ae | 10 | * Unless required by applicable law or agreed to in writing, software |
bogdanm | 20:4263a77256ae | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
bogdanm | 20:4263a77256ae | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
bogdanm | 20:4263a77256ae | 13 | * See the License for the specific language governing permissions and |
bogdanm | 20:4263a77256ae | 14 | * limitations under the License. |
bogdanm | 20:4263a77256ae | 15 | */ |
bogdanm | 20:4263a77256ae | 16 | #include "serial_api.h" |
bogdanm | 20:4263a77256ae | 17 | |
bogdanm | 20:4263a77256ae | 18 | // math.h required for floating point operations for baud rate calculation |
bogdanm | 20:4263a77256ae | 19 | #include <math.h> |
bogdanm | 20:4263a77256ae | 20 | |
bogdanm | 20:4263a77256ae | 21 | #include <string.h> |
bogdanm | 20:4263a77256ae | 22 | |
bogdanm | 20:4263a77256ae | 23 | #include "cmsis.h" |
bogdanm | 20:4263a77256ae | 24 | #include "pinmap.h" |
bogdanm | 20:4263a77256ae | 25 | #include "error.h" |
bogdanm | 20:4263a77256ae | 26 | |
bogdanm | 20:4263a77256ae | 27 | #define UART_CLOCK_HZ 47972352u |
bogdanm | 20:4263a77256ae | 28 | #define UART_NUM 1 |
bogdanm | 20:4263a77256ae | 29 | |
bogdanm | 20:4263a77256ae | 30 | static const PinMap PinMap_UART_TX[] = { |
bogdanm | 20:4263a77256ae | 31 | {PTB1, UART_0, 2}, |
bogdanm | 20:4263a77256ae | 32 | {NC , NC , 0} |
bogdanm | 20:4263a77256ae | 33 | }; |
bogdanm | 20:4263a77256ae | 34 | |
bogdanm | 20:4263a77256ae | 35 | static const PinMap PinMap_UART_RX[] = { |
bogdanm | 20:4263a77256ae | 36 | {PTB2, UART_0, 2}, |
bogdanm | 20:4263a77256ae | 37 | {NC , NC , 0} |
bogdanm | 20:4263a77256ae | 38 | }; |
bogdanm | 20:4263a77256ae | 39 | |
bogdanm | 20:4263a77256ae | 40 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
bogdanm | 20:4263a77256ae | 41 | static uart_irq_handler irq_handler; |
bogdanm | 20:4263a77256ae | 42 | |
bogdanm | 20:4263a77256ae | 43 | int stdio_uart_inited = 0; |
bogdanm | 20:4263a77256ae | 44 | serial_t stdio_uart; |
bogdanm | 20:4263a77256ae | 45 | |
bogdanm | 20:4263a77256ae | 46 | void serial_init(serial_t *obj, PinName tx, PinName rx) { |
bogdanm | 20:4263a77256ae | 47 | // determine the UART to use |
bogdanm | 20:4263a77256ae | 48 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
bogdanm | 20:4263a77256ae | 49 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
bogdanm | 20:4263a77256ae | 50 | UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx); |
bogdanm | 20:4263a77256ae | 51 | if ((int)uart == NC) { |
bogdanm | 20:4263a77256ae | 52 | error("Serial pinout mapping failed"); |
bogdanm | 20:4263a77256ae | 53 | } |
bogdanm | 20:4263a77256ae | 54 | |
bogdanm | 20:4263a77256ae | 55 | obj->uart = (UARTLP_Type *)uart; |
bogdanm | 20:4263a77256ae | 56 | // enable clk |
bogdanm | 20:4263a77256ae | 57 | switch (uart) { |
bogdanm | 20:4263a77256ae | 58 | case UART_0: |
bogdanm | 20:4263a77256ae | 59 | SIM->SOPT2 |= 1 << SIM_SOPT2_UART0SRC_SHIFT; |
bogdanm | 20:4263a77256ae | 60 | SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK; |
bogdanm | 20:4263a77256ae | 61 | SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; |
bogdanm | 20:4263a77256ae | 62 | break; |
bogdanm | 20:4263a77256ae | 63 | } |
bogdanm | 20:4263a77256ae | 64 | // Disable UART before changing registers |
bogdanm | 20:4263a77256ae | 65 | obj->uart->C2 &= ~(UART0_C2_RE_MASK | UART0_C2_TE_MASK); |
bogdanm | 20:4263a77256ae | 66 | |
bogdanm | 20:4263a77256ae | 67 | switch (uart) { |
bogdanm | 20:4263a77256ae | 68 | case UART_0: |
bogdanm | 20:4263a77256ae | 69 | obj->index = 0; |
bogdanm | 20:4263a77256ae | 70 | break; |
bogdanm | 20:4263a77256ae | 71 | } |
bogdanm | 20:4263a77256ae | 72 | |
bogdanm | 20:4263a77256ae | 73 | // set default baud rate and format |
bogdanm | 20:4263a77256ae | 74 | serial_baud (obj, 9600); |
bogdanm | 20:4263a77256ae | 75 | serial_format(obj, 8, ParityNone, 1); |
bogdanm | 20:4263a77256ae | 76 | |
bogdanm | 20:4263a77256ae | 77 | // pinout the chosen uart |
bogdanm | 20:4263a77256ae | 78 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 20:4263a77256ae | 79 | pinmap_pinout(rx, PinMap_UART_RX); |
bogdanm | 20:4263a77256ae | 80 | |
bogdanm | 20:4263a77256ae | 81 | // set rx/tx pins in PullUp mode |
bogdanm | 20:4263a77256ae | 82 | pin_mode(tx, PullUp); |
bogdanm | 20:4263a77256ae | 83 | pin_mode(rx, PullUp); |
bogdanm | 20:4263a77256ae | 84 | |
bogdanm | 20:4263a77256ae | 85 | obj->uart->C2 |= (UART0_C2_RE_MASK | UART0_C2_TE_MASK); |
bogdanm | 20:4263a77256ae | 86 | |
bogdanm | 20:4263a77256ae | 87 | if (uart == STDIO_UART) { |
bogdanm | 20:4263a77256ae | 88 | stdio_uart_inited = 1; |
bogdanm | 20:4263a77256ae | 89 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
bogdanm | 20:4263a77256ae | 90 | } |
bogdanm | 20:4263a77256ae | 91 | } |
bogdanm | 20:4263a77256ae | 92 | |
bogdanm | 20:4263a77256ae | 93 | void serial_free(serial_t *obj) { |
bogdanm | 20:4263a77256ae | 94 | serial_irq_ids[obj->index] = 0; |
bogdanm | 20:4263a77256ae | 95 | } |
bogdanm | 20:4263a77256ae | 96 | |
bogdanm | 20:4263a77256ae | 97 | void serial_baud(serial_t *obj, int baudrate) { |
bogdanm | 20:4263a77256ae | 98 | // save C2 state |
bogdanm | 20:4263a77256ae | 99 | uint8_t c2_state = (obj->uart->C2 & (UART0_C2_RE_MASK | UART0_C2_TE_MASK)); |
bogdanm | 20:4263a77256ae | 100 | |
bogdanm | 20:4263a77256ae | 101 | // Disable UART before changing registers |
bogdanm | 20:4263a77256ae | 102 | obj->uart->C2 &= ~(UART0_C2_RE_MASK | UART0_C2_TE_MASK); |
bogdanm | 20:4263a77256ae | 103 | |
bogdanm | 20:4263a77256ae | 104 | // First we check to see if the basic divide with no DivAddVal/MulVal |
bogdanm | 20:4263a77256ae | 105 | // ratio gives us an integer result. If it does, we set DivAddVal = 0, |
bogdanm | 20:4263a77256ae | 106 | // MulVal = 1. Otherwise, we search the valid ratio value range to find |
bogdanm | 20:4263a77256ae | 107 | // the closest match. This could be more elegant, using search methods |
bogdanm | 20:4263a77256ae | 108 | // and/or lookup tables, but the brute force method is not that much |
bogdanm | 20:4263a77256ae | 109 | // slower, and is more maintainable. |
bogdanm | 20:4263a77256ae | 110 | uint16_t DL = UART_CLOCK_HZ / (16 * baudrate); |
bogdanm | 20:4263a77256ae | 111 | |
bogdanm | 20:4263a77256ae | 112 | // set BDH and BDL |
bogdanm | 20:4263a77256ae | 113 | obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f); |
bogdanm | 20:4263a77256ae | 114 | obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff); |
bogdanm | 20:4263a77256ae | 115 | |
bogdanm | 20:4263a77256ae | 116 | // restore C2 state |
bogdanm | 20:4263a77256ae | 117 | obj->uart->C2 |= c2_state; |
bogdanm | 20:4263a77256ae | 118 | } |
bogdanm | 20:4263a77256ae | 119 | |
bogdanm | 20:4263a77256ae | 120 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
bogdanm | 20:4263a77256ae | 121 | uint8_t m10 = 0; |
bogdanm | 20:4263a77256ae | 122 | |
bogdanm | 20:4263a77256ae | 123 | // save C2 state |
bogdanm | 20:4263a77256ae | 124 | uint8_t c2_state = (obj->uart->C2 & (UART0_C2_RE_MASK | UART0_C2_TE_MASK)); |
bogdanm | 20:4263a77256ae | 125 | |
bogdanm | 20:4263a77256ae | 126 | // Disable UART before changing registers |
bogdanm | 20:4263a77256ae | 127 | obj->uart->C2 &= ~(UART0_C2_RE_MASK | UART0_C2_TE_MASK); |
bogdanm | 20:4263a77256ae | 128 | |
bogdanm | 20:4263a77256ae | 129 | // 8 data bits = 0 ... 9 data bits = 1 |
bogdanm | 20:4263a77256ae | 130 | if ((data_bits < 8) || (data_bits > 9)) { |
bogdanm | 20:4263a77256ae | 131 | error("Invalid number of bits (%d) in serial format, should be 8..9\r\n", data_bits); |
bogdanm | 20:4263a77256ae | 132 | } |
bogdanm | 20:4263a77256ae | 133 | data_bits -= 8; |
bogdanm | 20:4263a77256ae | 134 | |
bogdanm | 20:4263a77256ae | 135 | uint8_t parity_enable, parity_select; |
bogdanm | 20:4263a77256ae | 136 | switch (parity) { |
bogdanm | 20:4263a77256ae | 137 | case ParityNone: parity_enable = 0; parity_select = 0; break; |
bogdanm | 20:4263a77256ae | 138 | case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break; |
bogdanm | 20:4263a77256ae | 139 | case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break; |
bogdanm | 20:4263a77256ae | 140 | default: |
bogdanm | 20:4263a77256ae | 141 | error("Invalid serial parity setting\r\n"); |
bogdanm | 20:4263a77256ae | 142 | return; |
bogdanm | 20:4263a77256ae | 143 | } |
bogdanm | 20:4263a77256ae | 144 | |
bogdanm | 20:4263a77256ae | 145 | // 1 stop bits = 0, 2 stop bits = 1 |
bogdanm | 20:4263a77256ae | 146 | if ((stop_bits != 1) && (stop_bits != 2)) { |
bogdanm | 20:4263a77256ae | 147 | error("Invalid stop bits specified\r\n"); |
bogdanm | 20:4263a77256ae | 148 | } |
bogdanm | 20:4263a77256ae | 149 | stop_bits -= 1; |
bogdanm | 20:4263a77256ae | 150 | |
bogdanm | 20:4263a77256ae | 151 | // 9 data bits + parity |
bogdanm | 20:4263a77256ae | 152 | if (data_bits == 2) { |
bogdanm | 20:4263a77256ae | 153 | // only uart0 supports 10 bit communication |
bogdanm | 20:4263a77256ae | 154 | if (obj->index != 0) { |
bogdanm | 20:4263a77256ae | 155 | error("Invalid number of bits (9) to be used with parity\r\n"); |
bogdanm | 20:4263a77256ae | 156 | } |
bogdanm | 20:4263a77256ae | 157 | data_bits = 0; |
bogdanm | 20:4263a77256ae | 158 | m10 = 1; |
bogdanm | 20:4263a77256ae | 159 | } |
bogdanm | 20:4263a77256ae | 160 | |
bogdanm | 20:4263a77256ae | 161 | // data bits, parity and parity mode |
bogdanm | 20:4263a77256ae | 162 | obj->uart->C1 = ((data_bits << 4) |
bogdanm | 20:4263a77256ae | 163 | | (parity_enable << 1) |
bogdanm | 20:4263a77256ae | 164 | | (parity_select << 0)); |
bogdanm | 20:4263a77256ae | 165 | |
bogdanm | 20:4263a77256ae | 166 | // enable 10bit mode if needed |
bogdanm | 20:4263a77256ae | 167 | if (obj->index == 0) { |
bogdanm | 20:4263a77256ae | 168 | obj->uart->C4 &= ~UARTLP_C4_M10_MASK; |
bogdanm | 20:4263a77256ae | 169 | obj->uart->C4 |= (m10 << UARTLP_C4_M10_SHIFT); |
bogdanm | 20:4263a77256ae | 170 | } |
bogdanm | 20:4263a77256ae | 171 | |
bogdanm | 20:4263a77256ae | 172 | // stop bits |
bogdanm | 20:4263a77256ae | 173 | obj->uart->BDH &= ~UART0_BDH_SBNS_MASK; |
bogdanm | 20:4263a77256ae | 174 | obj->uart->BDH |= (stop_bits << UART0_BDH_SBNS_SHIFT); |
bogdanm | 20:4263a77256ae | 175 | |
bogdanm | 20:4263a77256ae | 176 | // restore C2 state |
bogdanm | 20:4263a77256ae | 177 | obj->uart->C2 |= c2_state; |
bogdanm | 20:4263a77256ae | 178 | } |
bogdanm | 20:4263a77256ae | 179 | |
bogdanm | 20:4263a77256ae | 180 | static inline void uart_irq(uint8_t status, uint32_t index) { |
bogdanm | 20:4263a77256ae | 181 | if (serial_irq_ids[index] != 0) { |
bogdanm | 20:4263a77256ae | 182 | if (status & UART0_S1_TDRE_MASK) |
bogdanm | 20:4263a77256ae | 183 | irq_handler(serial_irq_ids[index], TxIrq); |
bogdanm | 20:4263a77256ae | 184 | |
bogdanm | 20:4263a77256ae | 185 | if (status & UART0_S1_RDRF_MASK) |
bogdanm | 20:4263a77256ae | 186 | irq_handler(serial_irq_ids[index], RxIrq); |
bogdanm | 20:4263a77256ae | 187 | } |
bogdanm | 20:4263a77256ae | 188 | } |
bogdanm | 20:4263a77256ae | 189 | |
bogdanm | 20:4263a77256ae | 190 | void uart0_irq() { |
bogdanm | 20:4263a77256ae | 191 | uart_irq(UART0->S1, 0); |
bogdanm | 20:4263a77256ae | 192 | if (UART0->S1 & UART0_S1_OR_MASK) |
bogdanm | 20:4263a77256ae | 193 | UART0->S1 |= UART0_S1_OR_MASK; |
bogdanm | 20:4263a77256ae | 194 | } |
bogdanm | 20:4263a77256ae | 195 | |
bogdanm | 20:4263a77256ae | 196 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
bogdanm | 20:4263a77256ae | 197 | irq_handler = handler; |
bogdanm | 20:4263a77256ae | 198 | serial_irq_ids[obj->index] = id; |
bogdanm | 20:4263a77256ae | 199 | } |
bogdanm | 20:4263a77256ae | 200 | |
bogdanm | 20:4263a77256ae | 201 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
bogdanm | 20:4263a77256ae | 202 | IRQn_Type irq_n = (IRQn_Type)0; |
bogdanm | 20:4263a77256ae | 203 | uint32_t vector = 0; |
bogdanm | 20:4263a77256ae | 204 | switch ((int)obj->uart) { |
bogdanm | 20:4263a77256ae | 205 | case UART_0: |
bogdanm | 20:4263a77256ae | 206 | irq_n=UART0_IRQn; |
bogdanm | 20:4263a77256ae | 207 | vector = (uint32_t)&uart0_irq; |
bogdanm | 20:4263a77256ae | 208 | break; |
bogdanm | 20:4263a77256ae | 209 | } |
bogdanm | 20:4263a77256ae | 210 | |
bogdanm | 20:4263a77256ae | 211 | if (enable) { |
bogdanm | 20:4263a77256ae | 212 | switch (irq) { |
bogdanm | 20:4263a77256ae | 213 | case RxIrq: |
bogdanm | 20:4263a77256ae | 214 | obj->uart->C2 |= (UART0_C2_RIE_MASK); |
bogdanm | 20:4263a77256ae | 215 | break; |
bogdanm | 20:4263a77256ae | 216 | case TxIrq: |
bogdanm | 20:4263a77256ae | 217 | obj->uart->C2 |= (UART0_C2_TIE_MASK); |
bogdanm | 20:4263a77256ae | 218 | break; |
bogdanm | 20:4263a77256ae | 219 | } |
bogdanm | 20:4263a77256ae | 220 | NVIC_SetVector(irq_n, vector); |
bogdanm | 20:4263a77256ae | 221 | NVIC_EnableIRQ(irq_n); |
bogdanm | 20:4263a77256ae | 222 | |
bogdanm | 20:4263a77256ae | 223 | } else { // disable |
bogdanm | 20:4263a77256ae | 224 | int all_disabled = 0; |
bogdanm | 20:4263a77256ae | 225 | SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq); |
bogdanm | 20:4263a77256ae | 226 | switch (irq) { |
bogdanm | 20:4263a77256ae | 227 | case RxIrq: |
bogdanm | 20:4263a77256ae | 228 | obj->uart->C2 &= ~(UART0_C2_RIE_MASK); |
bogdanm | 20:4263a77256ae | 229 | break; |
bogdanm | 20:4263a77256ae | 230 | case TxIrq: |
bogdanm | 20:4263a77256ae | 231 | obj->uart->C2 &= ~(UART0_C2_TIE_MASK); |
bogdanm | 20:4263a77256ae | 232 | break; |
bogdanm | 20:4263a77256ae | 233 | } |
bogdanm | 20:4263a77256ae | 234 | switch (other_irq) { |
bogdanm | 20:4263a77256ae | 235 | case RxIrq: |
bogdanm | 20:4263a77256ae | 236 | all_disabled = (obj->uart->C2 & (UART0_C2_RIE_MASK)) == 0; |
bogdanm | 20:4263a77256ae | 237 | break; |
bogdanm | 20:4263a77256ae | 238 | case TxIrq: |
bogdanm | 20:4263a77256ae | 239 | all_disabled = (obj->uart->C2 & (UART0_C2_TIE_MASK)) == 0; |
bogdanm | 20:4263a77256ae | 240 | break; |
bogdanm | 20:4263a77256ae | 241 | } |
bogdanm | 20:4263a77256ae | 242 | if (all_disabled) |
bogdanm | 20:4263a77256ae | 243 | NVIC_DisableIRQ(irq_n); |
bogdanm | 20:4263a77256ae | 244 | } |
bogdanm | 20:4263a77256ae | 245 | } |
bogdanm | 20:4263a77256ae | 246 | |
bogdanm | 20:4263a77256ae | 247 | int serial_getc(serial_t *obj) { |
bogdanm | 20:4263a77256ae | 248 | while (!serial_readable(obj)); |
bogdanm | 20:4263a77256ae | 249 | return obj->uart->D; |
bogdanm | 20:4263a77256ae | 250 | } |
bogdanm | 20:4263a77256ae | 251 | |
bogdanm | 20:4263a77256ae | 252 | void serial_putc(serial_t *obj, int c) { |
bogdanm | 20:4263a77256ae | 253 | while (!serial_writable(obj)); |
bogdanm | 20:4263a77256ae | 254 | obj->uart->D = c; |
bogdanm | 20:4263a77256ae | 255 | } |
bogdanm | 20:4263a77256ae | 256 | |
bogdanm | 20:4263a77256ae | 257 | int serial_readable(serial_t *obj) { |
bogdanm | 20:4263a77256ae | 258 | // check overrun |
bogdanm | 20:4263a77256ae | 259 | if (obj->uart->S1 & UART0_S1_OR_MASK) { |
bogdanm | 20:4263a77256ae | 260 | obj->uart->S1 |= UART0_S1_OR_MASK; |
bogdanm | 20:4263a77256ae | 261 | } |
bogdanm | 20:4263a77256ae | 262 | return (obj->uart->S1 & UART0_S1_RDRF_MASK); |
bogdanm | 20:4263a77256ae | 263 | } |
bogdanm | 20:4263a77256ae | 264 | |
bogdanm | 20:4263a77256ae | 265 | int serial_writable(serial_t *obj) { |
bogdanm | 20:4263a77256ae | 266 | // check overrun |
bogdanm | 20:4263a77256ae | 267 | if (obj->uart->S1 & UART0_S1_OR_MASK) { |
bogdanm | 20:4263a77256ae | 268 | obj->uart->S1 |= UART0_S1_OR_MASK; |
bogdanm | 20:4263a77256ae | 269 | } |
bogdanm | 20:4263a77256ae | 270 | return (obj->uart->S1 & UART0_S1_TDRE_MASK); |
bogdanm | 20:4263a77256ae | 271 | } |
bogdanm | 20:4263a77256ae | 272 | |
bogdanm | 20:4263a77256ae | 273 | void serial_clear(serial_t *obj) { |
bogdanm | 20:4263a77256ae | 274 | |
bogdanm | 20:4263a77256ae | 275 | } |
bogdanm | 20:4263a77256ae | 276 | |
bogdanm | 20:4263a77256ae | 277 | void serial_pinout_tx(PinName tx) { |
bogdanm | 20:4263a77256ae | 278 | pinmap_pinout(tx, PinMap_UART_TX); |
bogdanm | 20:4263a77256ae | 279 | } |
bogdanm | 20:4263a77256ae | 280 | |
bogdanm | 20:4263a77256ae | 281 | void serial_break_set(serial_t *obj) { |
bogdanm | 20:4263a77256ae | 282 | obj->uart->C2 |= UART0_C2_SBK_MASK; |
bogdanm | 20:4263a77256ae | 283 | } |
bogdanm | 20:4263a77256ae | 284 | |
bogdanm | 20:4263a77256ae | 285 | void serial_break_clear(serial_t *obj) { |
bogdanm | 20:4263a77256ae | 286 | obj->uart->C2 &= ~UART0_C2_SBK_MASK; |
bogdanm | 20:4263a77256ae | 287 | } |
bogdanm | 20:4263a77256ae | 288 |