david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/hal/TARGET_NXP/TARGET_LPC11CXX/serial_api.c@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 */
bogdanm 20:4263a77256ae 16 // math.h required for floating point operations for baud rate calculation
bogdanm 20:4263a77256ae 17 #include <math.h>
bogdanm 20:4263a77256ae 18 #include <string.h>
bogdanm 20:4263a77256ae 19
bogdanm 20:4263a77256ae 20 #include "serial_api.h"
bogdanm 20:4263a77256ae 21 #include "cmsis.h"
bogdanm 20:4263a77256ae 22 #include "pinmap.h"
bogdanm 20:4263a77256ae 23 #include "error.h"
bogdanm 20:4263a77256ae 24
bogdanm 20:4263a77256ae 25 /******************************************************************************
bogdanm 20:4263a77256ae 26 * INITIALIZATION
bogdanm 20:4263a77256ae 27 ******************************************************************************/
bogdanm 20:4263a77256ae 28 #define UART_NUM 1
bogdanm 20:4263a77256ae 29
bogdanm 20:4263a77256ae 30 static const PinMap PinMap_UART_TX[] = {
bogdanm 20:4263a77256ae 31 {P2_8 , UART_0, 0x02},
bogdanm 20:4263a77256ae 32 {P3_5 , UART_0, 0x02},
bogdanm 20:4263a77256ae 33 {P3_0 , UART_0, 0x03},
bogdanm 20:4263a77256ae 34 {P1_7 , UART_0, 0x01},
bogdanm 20:4263a77256ae 35 {NC , NC , 0x00}
bogdanm 20:4263a77256ae 36 };
bogdanm 20:4263a77256ae 37
bogdanm 20:4263a77256ae 38 static const PinMap PinMap_UART_RX[] = {
bogdanm 20:4263a77256ae 39 {P2_7 , UART_0, 0x02},
bogdanm 20:4263a77256ae 40 {P3_4 , UART_0, 0x02},
bogdanm 20:4263a77256ae 41 {P3_1 , UART_0, 0x03},
bogdanm 20:4263a77256ae 42 {P1_6 , UART_0, 0x01},
bogdanm 20:4263a77256ae 43 {NC , NC , 0x00}
bogdanm 20:4263a77256ae 44 };
bogdanm 20:4263a77256ae 45
bogdanm 20:4263a77256ae 46 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 20:4263a77256ae 47 static uart_irq_handler irq_handler;
bogdanm 20:4263a77256ae 48
bogdanm 20:4263a77256ae 49 int stdio_uart_inited = 0;
bogdanm 20:4263a77256ae 50 serial_t stdio_uart;
bogdanm 20:4263a77256ae 51
bogdanm 20:4263a77256ae 52 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 20:4263a77256ae 53 int is_stdio_uart = 0;
bogdanm 20:4263a77256ae 54
bogdanm 20:4263a77256ae 55 // determine the UART to use
bogdanm 20:4263a77256ae 56 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 20:4263a77256ae 57 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 20:4263a77256ae 58 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 20:4263a77256ae 59 if ((int)uart == NC) {
bogdanm 20:4263a77256ae 60 error("Serial pinout mapping failed");
bogdanm 20:4263a77256ae 61 }
bogdanm 20:4263a77256ae 62
bogdanm 20:4263a77256ae 63 obj->uart = (LPC_UART_TypeDef *)uart;
bogdanm 20:4263a77256ae 64 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
bogdanm 20:4263a77256ae 65
bogdanm 20:4263a77256ae 66 // enable fifos and default rx trigger level
bogdanm 20:4263a77256ae 67 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
bogdanm 20:4263a77256ae 68 | 0 << 1 // Rx Fifo Reset
bogdanm 20:4263a77256ae 69 | 0 << 2 // Tx Fifo Reset
bogdanm 20:4263a77256ae 70 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
bogdanm 20:4263a77256ae 71
bogdanm 20:4263a77256ae 72 // disable irqs
bogdanm 20:4263a77256ae 73 obj->uart->IER = 0 << 0 // Rx Data available irq enable
bogdanm 20:4263a77256ae 74 | 0 << 1 // Tx Fifo empty irq enable
bogdanm 20:4263a77256ae 75 | 0 << 2; // Rx Line Status irq enable
bogdanm 20:4263a77256ae 76
bogdanm 20:4263a77256ae 77 // set default baud rate and format
bogdanm 20:4263a77256ae 78 serial_baud (obj, 9600);
bogdanm 20:4263a77256ae 79 serial_format(obj, 8, ParityNone, 1);
bogdanm 20:4263a77256ae 80
bogdanm 20:4263a77256ae 81 // pinout the chosen uart
bogdanm 20:4263a77256ae 82 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 20:4263a77256ae 83 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 20:4263a77256ae 84
bogdanm 20:4263a77256ae 85 // set rx/tx pins in PullUp mode
bogdanm 20:4263a77256ae 86 pin_mode(tx, PullUp);
bogdanm 20:4263a77256ae 87 pin_mode(rx, PullUp);
bogdanm 20:4263a77256ae 88
bogdanm 20:4263a77256ae 89 switch (uart) {
bogdanm 20:4263a77256ae 90 case UART_0: obj->index = 0; break;
bogdanm 20:4263a77256ae 91 }
bogdanm 20:4263a77256ae 92
bogdanm 20:4263a77256ae 93 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
bogdanm 20:4263a77256ae 94
bogdanm 20:4263a77256ae 95 if (is_stdio_uart) {
bogdanm 20:4263a77256ae 96 stdio_uart_inited = 1;
bogdanm 20:4263a77256ae 97 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 20:4263a77256ae 98 }
bogdanm 20:4263a77256ae 99 }
bogdanm 20:4263a77256ae 100
bogdanm 20:4263a77256ae 101 void serial_free(serial_t *obj) {
bogdanm 20:4263a77256ae 102 serial_irq_ids[obj->index] = 0;
bogdanm 20:4263a77256ae 103 }
bogdanm 20:4263a77256ae 104
bogdanm 20:4263a77256ae 105 // serial_baud
bogdanm 20:4263a77256ae 106 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 20:4263a77256ae 107 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 20:4263a77256ae 108 LPC_SYSCON->UARTCLKDIV = 0x1;
bogdanm 20:4263a77256ae 109 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 110 // First we check to see if the basic divide with no DivAddVal/MulVal
bogdanm 20:4263a77256ae 111 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
bogdanm 20:4263a77256ae 112 // MulVal = 1. Otherwise, we search the valid ratio value range to find
bogdanm 20:4263a77256ae 113 // the closest match. This could be more elegant, using search methods
bogdanm 20:4263a77256ae 114 // and/or lookup tables, but the brute force method is not that much
bogdanm 20:4263a77256ae 115 // slower, and is more maintainable.
bogdanm 20:4263a77256ae 116 uint16_t DL = PCLK / (16 * baudrate);
bogdanm 20:4263a77256ae 117
bogdanm 20:4263a77256ae 118 uint8_t DivAddVal = 0;
bogdanm 20:4263a77256ae 119 uint8_t MulVal = 1;
bogdanm 20:4263a77256ae 120 int hit = 0;
bogdanm 20:4263a77256ae 121 uint16_t dlv;
bogdanm 20:4263a77256ae 122 uint8_t mv, dav;
bogdanm 20:4263a77256ae 123 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
bogdanm 20:4263a77256ae 124 float err_best = (float) baudrate;
bogdanm 20:4263a77256ae 125 uint16_t dlmax = DL;
bogdanm 20:4263a77256ae 126 for ( dlv = (dlmax/2); (dlv <= dlmax) && !hit; dlv++) {
bogdanm 20:4263a77256ae 127 for ( mv = 1; mv <= 15; mv++) {
bogdanm 20:4263a77256ae 128 for ( dav = 1; dav < mv; dav++) {
bogdanm 20:4263a77256ae 129 float ratio = 1.0f + ((float) dav / (float) mv);
bogdanm 20:4263a77256ae 130 float calcbaud = (float)PCLK / (16.0f * (float) dlv * ratio);
bogdanm 20:4263a77256ae 131 float err = fabs(((float) baudrate - calcbaud) / (float) baudrate);
bogdanm 20:4263a77256ae 132 if (err < err_best) {
bogdanm 20:4263a77256ae 133 DL = dlv;
bogdanm 20:4263a77256ae 134 DivAddVal = dav;
bogdanm 20:4263a77256ae 135 MulVal = mv;
bogdanm 20:4263a77256ae 136 err_best = err;
bogdanm 20:4263a77256ae 137 if (err < 0.001f) {
bogdanm 20:4263a77256ae 138 hit = 1;
bogdanm 20:4263a77256ae 139 }
bogdanm 20:4263a77256ae 140 }
bogdanm 20:4263a77256ae 141 }
bogdanm 20:4263a77256ae 142 }
bogdanm 20:4263a77256ae 143 }
bogdanm 20:4263a77256ae 144 }
bogdanm 20:4263a77256ae 145
bogdanm 20:4263a77256ae 146 // set LCR[DLAB] to enable writing to divider registers
bogdanm 20:4263a77256ae 147 obj->uart->LCR |= (1 << 7);
bogdanm 20:4263a77256ae 148
bogdanm 20:4263a77256ae 149 // set divider values
bogdanm 20:4263a77256ae 150 obj->uart->DLM = (DL >> 8) & 0xFF;
bogdanm 20:4263a77256ae 151 obj->uart->DLL = (DL >> 0) & 0xFF;
bogdanm 20:4263a77256ae 152 obj->uart->FDR = (uint32_t) DivAddVal << 0
bogdanm 20:4263a77256ae 153 | (uint32_t) MulVal << 4;
bogdanm 20:4263a77256ae 154
bogdanm 20:4263a77256ae 155 // clear LCR[DLAB]
bogdanm 20:4263a77256ae 156 obj->uart->LCR &= ~(1 << 7);
bogdanm 20:4263a77256ae 157 }
bogdanm 20:4263a77256ae 158
bogdanm 20:4263a77256ae 159 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 20:4263a77256ae 160 // 0: 1 stop bits, 1: 2 stop bits
bogdanm 20:4263a77256ae 161 if (stop_bits != 1 && stop_bits != 2) {
bogdanm 20:4263a77256ae 162 error("Invalid stop bits specified");
bogdanm 20:4263a77256ae 163 }
bogdanm 20:4263a77256ae 164 stop_bits -= 1;
bogdanm 20:4263a77256ae 165
bogdanm 20:4263a77256ae 166 // 0: 5 data bits ... 3: 8 data bits
bogdanm 20:4263a77256ae 167 if (data_bits < 5 || data_bits > 8) {
bogdanm 20:4263a77256ae 168 error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits);
bogdanm 20:4263a77256ae 169 }
bogdanm 20:4263a77256ae 170 data_bits -= 5;
bogdanm 20:4263a77256ae 171
bogdanm 20:4263a77256ae 172 int parity_enable, parity_select;
bogdanm 20:4263a77256ae 173 switch (parity) {
bogdanm 20:4263a77256ae 174 case ParityNone: parity_enable = 0; parity_select = 0; break;
bogdanm 20:4263a77256ae 175 case ParityOdd : parity_enable = 1; parity_select = 0; break;
bogdanm 20:4263a77256ae 176 case ParityEven: parity_enable = 1; parity_select = 1; break;
bogdanm 20:4263a77256ae 177 case ParityForced1: parity_enable = 1; parity_select = 2; break;
bogdanm 20:4263a77256ae 178 case ParityForced0: parity_enable = 1; parity_select = 3; break;
bogdanm 20:4263a77256ae 179 default:
bogdanm 20:4263a77256ae 180 error("Invalid serial parity setting");
bogdanm 20:4263a77256ae 181 return;
bogdanm 20:4263a77256ae 182 }
bogdanm 20:4263a77256ae 183
bogdanm 20:4263a77256ae 184 obj->uart->LCR = data_bits << 0
bogdanm 20:4263a77256ae 185 | stop_bits << 2
bogdanm 20:4263a77256ae 186 | parity_enable << 3
bogdanm 20:4263a77256ae 187 | parity_select << 4;
bogdanm 20:4263a77256ae 188 }
bogdanm 20:4263a77256ae 189
bogdanm 20:4263a77256ae 190 /******************************************************************************
bogdanm 20:4263a77256ae 191 * INTERRUPTS HANDLING
bogdanm 20:4263a77256ae 192 ******************************************************************************/
bogdanm 20:4263a77256ae 193 static inline void uart_irq(uint32_t iir, uint32_t index) {
bogdanm 20:4263a77256ae 194 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
bogdanm 20:4263a77256ae 195 SerialIrq irq_type;
bogdanm 20:4263a77256ae 196 switch (iir) {
bogdanm 20:4263a77256ae 197 case 1: irq_type = TxIrq; break;
bogdanm 20:4263a77256ae 198 case 2: irq_type = RxIrq; break;
bogdanm 20:4263a77256ae 199 default: return;
bogdanm 20:4263a77256ae 200 }
bogdanm 20:4263a77256ae 201
bogdanm 20:4263a77256ae 202 if (serial_irq_ids[index] != 0)
bogdanm 20:4263a77256ae 203 irq_handler(serial_irq_ids[index], irq_type);
bogdanm 20:4263a77256ae 204 }
bogdanm 20:4263a77256ae 205
bogdanm 20:4263a77256ae 206 void uart0_irq() {uart_irq((LPC_UART->IIR >> 1) & 0x7, 0);}
bogdanm 20:4263a77256ae 207
bogdanm 20:4263a77256ae 208 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 20:4263a77256ae 209 irq_handler = handler;
bogdanm 20:4263a77256ae 210 serial_irq_ids[obj->index] = id;
bogdanm 20:4263a77256ae 211 }
bogdanm 20:4263a77256ae 212
bogdanm 20:4263a77256ae 213 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 20:4263a77256ae 214 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 20:4263a77256ae 215 uint32_t vector = 0;
bogdanm 20:4263a77256ae 216 switch ((int)obj->uart) {
bogdanm 20:4263a77256ae 217 case UART_0:
bogdanm 20:4263a77256ae 218 irq_n=UART_IRQn;
bogdanm 20:4263a77256ae 219 vector = (uint32_t)&uart0_irq;
bogdanm 20:4263a77256ae 220 break;
bogdanm 20:4263a77256ae 221 default:
bogdanm 20:4263a77256ae 222 return;
bogdanm 20:4263a77256ae 223 }
bogdanm 20:4263a77256ae 224
bogdanm 20:4263a77256ae 225 if (enable) {
bogdanm 20:4263a77256ae 226 obj->uart->IER |= 1 << irq;
bogdanm 20:4263a77256ae 227 NVIC_SetVector(irq_n, vector);
bogdanm 20:4263a77256ae 228 NVIC_EnableIRQ(irq_n);
bogdanm 20:4263a77256ae 229 } else { // disable
bogdanm 20:4263a77256ae 230 int all_disabled = 0;
bogdanm 20:4263a77256ae 231 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
bogdanm 20:4263a77256ae 232
bogdanm 20:4263a77256ae 233 obj->uart->IER &= ~(1 << irq);
bogdanm 20:4263a77256ae 234 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
bogdanm 20:4263a77256ae 235
bogdanm 20:4263a77256ae 236 if (all_disabled)
bogdanm 20:4263a77256ae 237 NVIC_DisableIRQ(irq_n);
bogdanm 20:4263a77256ae 238 }
bogdanm 20:4263a77256ae 239 }
bogdanm 20:4263a77256ae 240
bogdanm 20:4263a77256ae 241 /******************************************************************************
bogdanm 20:4263a77256ae 242 * READ/WRITE
bogdanm 20:4263a77256ae 243 ******************************************************************************/
bogdanm 20:4263a77256ae 244 int serial_getc(serial_t *obj) {
bogdanm 20:4263a77256ae 245 while (!serial_readable(obj));
bogdanm 20:4263a77256ae 246 return obj->uart->RBR;
bogdanm 20:4263a77256ae 247 }
bogdanm 20:4263a77256ae 248
bogdanm 20:4263a77256ae 249 void serial_putc(serial_t *obj, int c) {
bogdanm 20:4263a77256ae 250 while (!serial_writable(obj));
bogdanm 20:4263a77256ae 251 obj->uart->THR = c;
bogdanm 20:4263a77256ae 252 }
bogdanm 20:4263a77256ae 253
bogdanm 20:4263a77256ae 254 int serial_readable(serial_t *obj) {
bogdanm 20:4263a77256ae 255 return obj->uart->LSR & 0x01;
bogdanm 20:4263a77256ae 256 }
bogdanm 20:4263a77256ae 257
bogdanm 20:4263a77256ae 258 int serial_writable(serial_t *obj) {
bogdanm 20:4263a77256ae 259 return obj->uart->LSR & 0x20;
bogdanm 20:4263a77256ae 260 }
bogdanm 20:4263a77256ae 261
bogdanm 20:4263a77256ae 262 void serial_clear(serial_t *obj) {
bogdanm 20:4263a77256ae 263 obj->uart->FCR = 1 << 1 // rx FIFO reset
bogdanm 20:4263a77256ae 264 | 1 << 2 // tx FIFO reset
bogdanm 20:4263a77256ae 265 | 0 << 6; // interrupt depth
bogdanm 20:4263a77256ae 266 }
bogdanm 20:4263a77256ae 267
bogdanm 20:4263a77256ae 268 void serial_pinout_tx(PinName tx) {
bogdanm 20:4263a77256ae 269 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 20:4263a77256ae 270 }
bogdanm 20:4263a77256ae 271
bogdanm 20:4263a77256ae 272 void serial_break_clear(serial_t *obj) {
bogdanm 20:4263a77256ae 273 obj->uart->LCR &= ~(1 << 6);
bogdanm 20:4263a77256ae 274 }
bogdanm 20:4263a77256ae 275
bogdanm 20:4263a77256ae 276 void serial_break_set(serial_t *obj) {
bogdanm 20:4263a77256ae 277 obj->uart->LCR |= 1 << 6;
bogdanm 20:4263a77256ae 278 }