david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/hal/TARGET_NXP/TARGET_LPC11CXX/i2c_api.c@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 */
bogdanm 20:4263a77256ae 16 #include "i2c_api.h"
bogdanm 20:4263a77256ae 17 #include "cmsis.h"
bogdanm 20:4263a77256ae 18 #include "pinmap.h"
bogdanm 20:4263a77256ae 19 #include "error.h"
bogdanm 20:4263a77256ae 20
bogdanm 20:4263a77256ae 21 static const PinMap PinMap_I2C_SDA[] = {
bogdanm 20:4263a77256ae 22 {P0_5, I2C_0, 1},
bogdanm 20:4263a77256ae 23 {NC , NC , 0}
bogdanm 20:4263a77256ae 24 };
bogdanm 20:4263a77256ae 25
bogdanm 20:4263a77256ae 26 static const PinMap PinMap_I2C_SCL[] = {
bogdanm 20:4263a77256ae 27 {P0_4, I2C_0, 1},
bogdanm 20:4263a77256ae 28 {NC , NC, 0}
bogdanm 20:4263a77256ae 29 };
bogdanm 20:4263a77256ae 30
bogdanm 20:4263a77256ae 31 #define I2C_CONSET(x) (x->i2c->CONSET)
bogdanm 20:4263a77256ae 32 #define I2C_CONCLR(x) (x->i2c->CONCLR)
bogdanm 20:4263a77256ae 33 #define I2C_STAT(x) (x->i2c->STAT)
bogdanm 20:4263a77256ae 34 #define I2C_DAT(x) (x->i2c->DAT)
bogdanm 20:4263a77256ae 35 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
bogdanm 20:4263a77256ae 36 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
bogdanm 20:4263a77256ae 37
bogdanm 20:4263a77256ae 38 static const uint32_t I2C_addr_offset[2][4] = {
bogdanm 20:4263a77256ae 39 {0x0C, 0x20, 0x24, 0x28},
bogdanm 20:4263a77256ae 40 {0x30, 0x34, 0x38, 0x3C}
bogdanm 20:4263a77256ae 41 };
bogdanm 20:4263a77256ae 42
bogdanm 20:4263a77256ae 43 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 20:4263a77256ae 44 I2C_CONCLR(obj) = (start << 5)
bogdanm 20:4263a77256ae 45 | (stop << 4)
bogdanm 20:4263a77256ae 46 | (interrupt << 3)
bogdanm 20:4263a77256ae 47 | (acknowledge << 2);
bogdanm 20:4263a77256ae 48 }
bogdanm 20:4263a77256ae 49
bogdanm 20:4263a77256ae 50 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 20:4263a77256ae 51 I2C_CONSET(obj) = (start << 5)
bogdanm 20:4263a77256ae 52 | (stop << 4)
bogdanm 20:4263a77256ae 53 | (interrupt << 3)
bogdanm 20:4263a77256ae 54 | (acknowledge << 2);
bogdanm 20:4263a77256ae 55 }
bogdanm 20:4263a77256ae 56
bogdanm 20:4263a77256ae 57 // Clear the Serial Interrupt (SI)
bogdanm 20:4263a77256ae 58 static inline void i2c_clear_SI(i2c_t *obj) {
bogdanm 20:4263a77256ae 59 i2c_conclr(obj, 0, 0, 1, 0);
bogdanm 20:4263a77256ae 60 }
bogdanm 20:4263a77256ae 61
bogdanm 20:4263a77256ae 62 static inline int i2c_status(i2c_t *obj) {
bogdanm 20:4263a77256ae 63 return I2C_STAT(obj);
bogdanm 20:4263a77256ae 64 }
bogdanm 20:4263a77256ae 65
bogdanm 20:4263a77256ae 66 // Wait until the Serial Interrupt (SI) is set
bogdanm 20:4263a77256ae 67 static int i2c_wait_SI(i2c_t *obj) {
bogdanm 20:4263a77256ae 68 int timeout = 0;
bogdanm 20:4263a77256ae 69 while (!(I2C_CONSET(obj) & (1 << 3))) {
bogdanm 20:4263a77256ae 70 timeout++;
bogdanm 20:4263a77256ae 71 if (timeout > 100000) return -1;
bogdanm 20:4263a77256ae 72 }
bogdanm 20:4263a77256ae 73 return 0;
bogdanm 20:4263a77256ae 74 }
bogdanm 20:4263a77256ae 75
bogdanm 20:4263a77256ae 76 static inline void i2c_interface_enable(i2c_t *obj) {
bogdanm 20:4263a77256ae 77 I2C_CONSET(obj) = 0x40;
bogdanm 20:4263a77256ae 78 }
bogdanm 20:4263a77256ae 79
bogdanm 20:4263a77256ae 80 static inline void i2c_power_enable(i2c_t *obj) {
bogdanm 20:4263a77256ae 81 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
bogdanm 20:4263a77256ae 82 LPC_SYSCON->PRESETCTRL |= 1 << 1;
bogdanm 20:4263a77256ae 83 }
bogdanm 20:4263a77256ae 84
bogdanm 20:4263a77256ae 85 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
bogdanm 20:4263a77256ae 86 // determine the SPI to use
bogdanm 20:4263a77256ae 87 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
bogdanm 20:4263a77256ae 88 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
bogdanm 20:4263a77256ae 89 obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
bogdanm 20:4263a77256ae 90
bogdanm 20:4263a77256ae 91 if ((int)obj->i2c == NC) {
bogdanm 20:4263a77256ae 92 error("I2C pin mapping failed");
bogdanm 20:4263a77256ae 93 }
bogdanm 20:4263a77256ae 94
bogdanm 20:4263a77256ae 95 // enable power
bogdanm 20:4263a77256ae 96 i2c_power_enable(obj);
bogdanm 20:4263a77256ae 97
bogdanm 20:4263a77256ae 98 // set default frequency at 100k
bogdanm 20:4263a77256ae 99 i2c_frequency(obj, 100000);
bogdanm 20:4263a77256ae 100 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 20:4263a77256ae 101 i2c_interface_enable(obj);
bogdanm 20:4263a77256ae 102
bogdanm 20:4263a77256ae 103 pinmap_pinout(sda, PinMap_I2C_SDA);
bogdanm 20:4263a77256ae 104 pinmap_pinout(scl, PinMap_I2C_SCL);
bogdanm 20:4263a77256ae 105 }
bogdanm 20:4263a77256ae 106
bogdanm 20:4263a77256ae 107 inline int i2c_start(i2c_t *obj) {
bogdanm 20:4263a77256ae 108 int status = 0;
bogdanm 20:4263a77256ae 109 // 8.1 Before master mode can be entered, I2CON must be initialised to:
bogdanm 20:4263a77256ae 110 // - I2EN STA STO SI AA - -
bogdanm 20:4263a77256ae 111 // - 1 0 0 0 x - -
bogdanm 20:4263a77256ae 112 // if AA = 0, it can't enter slave mode
bogdanm 20:4263a77256ae 113 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 20:4263a77256ae 114
bogdanm 20:4263a77256ae 115 // The master mode may now be entered by setting the STA bit
bogdanm 20:4263a77256ae 116 // this will generate a start condition when the bus becomes free
bogdanm 20:4263a77256ae 117 i2c_conset(obj, 1, 0, 0, 1);
bogdanm 20:4263a77256ae 118
bogdanm 20:4263a77256ae 119 i2c_wait_SI(obj);
bogdanm 20:4263a77256ae 120 status = i2c_status(obj);
bogdanm 20:4263a77256ae 121
bogdanm 20:4263a77256ae 122 // Clear start bit now transmitted, and interrupt bit
bogdanm 20:4263a77256ae 123 i2c_conclr(obj, 1, 0, 0, 0);
bogdanm 20:4263a77256ae 124 return status;
bogdanm 20:4263a77256ae 125 }
bogdanm 20:4263a77256ae 126
bogdanm 20:4263a77256ae 127 inline int i2c_stop(i2c_t *obj) {
bogdanm 20:4263a77256ae 128 int timeout = 0;
bogdanm 20:4263a77256ae 129
bogdanm 20:4263a77256ae 130 // write the stop bit
bogdanm 20:4263a77256ae 131 i2c_conset(obj, 0, 1, 0, 0);
bogdanm 20:4263a77256ae 132 i2c_clear_SI(obj);
bogdanm 20:4263a77256ae 133
bogdanm 20:4263a77256ae 134 // wait for STO bit to reset
bogdanm 20:4263a77256ae 135 while(I2C_CONSET(obj) & (1 << 4)) {
bogdanm 20:4263a77256ae 136 timeout ++;
bogdanm 20:4263a77256ae 137 if (timeout > 100000) return 1;
bogdanm 20:4263a77256ae 138 }
bogdanm 20:4263a77256ae 139
bogdanm 20:4263a77256ae 140 return 0;
bogdanm 20:4263a77256ae 141 }
bogdanm 20:4263a77256ae 142
bogdanm 20:4263a77256ae 143
bogdanm 20:4263a77256ae 144 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
bogdanm 20:4263a77256ae 145 // write the data
bogdanm 20:4263a77256ae 146 I2C_DAT(obj) = value;
bogdanm 20:4263a77256ae 147
bogdanm 20:4263a77256ae 148 // clear SI to init a send
bogdanm 20:4263a77256ae 149 i2c_clear_SI(obj);
bogdanm 20:4263a77256ae 150
bogdanm 20:4263a77256ae 151 // wait and return status
bogdanm 20:4263a77256ae 152 i2c_wait_SI(obj);
bogdanm 20:4263a77256ae 153 return i2c_status(obj);
bogdanm 20:4263a77256ae 154 }
bogdanm 20:4263a77256ae 155
bogdanm 20:4263a77256ae 156 static inline int i2c_do_read(i2c_t *obj, int last) {
bogdanm 20:4263a77256ae 157 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
bogdanm 20:4263a77256ae 158 if (last) {
bogdanm 20:4263a77256ae 159 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
bogdanm 20:4263a77256ae 160 } else {
bogdanm 20:4263a77256ae 161 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
bogdanm 20:4263a77256ae 162 }
bogdanm 20:4263a77256ae 163
bogdanm 20:4263a77256ae 164 // accept byte
bogdanm 20:4263a77256ae 165 i2c_clear_SI(obj);
bogdanm 20:4263a77256ae 166
bogdanm 20:4263a77256ae 167 // wait for it to arrive
bogdanm 20:4263a77256ae 168 i2c_wait_SI(obj);
bogdanm 20:4263a77256ae 169
bogdanm 20:4263a77256ae 170 // return the data
bogdanm 20:4263a77256ae 171 return (I2C_DAT(obj) & 0xFF);
bogdanm 20:4263a77256ae 172 }
bogdanm 20:4263a77256ae 173
bogdanm 20:4263a77256ae 174 void i2c_frequency(i2c_t *obj, int hz) {
bogdanm 20:4263a77256ae 175 // No peripheral clock divider on the M0
bogdanm 20:4263a77256ae 176 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 177
bogdanm 20:4263a77256ae 178 uint32_t pulse = PCLK / (hz * 2);
bogdanm 20:4263a77256ae 179
bogdanm 20:4263a77256ae 180 // I2C Rate
bogdanm 20:4263a77256ae 181 I2C_SCLL(obj, pulse);
bogdanm 20:4263a77256ae 182 I2C_SCLH(obj, pulse);
bogdanm 20:4263a77256ae 183 }
bogdanm 20:4263a77256ae 184
bogdanm 20:4263a77256ae 185 // The I2C does a read or a write as a whole operation
bogdanm 20:4263a77256ae 186 // There are two types of error conditions it can encounter
bogdanm 20:4263a77256ae 187 // 1) it can not obtain the bus
bogdanm 20:4263a77256ae 188 // 2) it gets error responses at part of the transmission
bogdanm 20:4263a77256ae 189 //
bogdanm 20:4263a77256ae 190 // We tackle them as follows:
bogdanm 20:4263a77256ae 191 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
bogdanm 20:4263a77256ae 192 // which basically turns it in to a 2)
bogdanm 20:4263a77256ae 193 // 2) on error, we use the standard error mechanisms to report/debug
bogdanm 20:4263a77256ae 194 //
bogdanm 20:4263a77256ae 195 // Therefore an I2C transaction should always complete. If it doesn't it is usually
bogdanm 20:4263a77256ae 196 // because something is setup wrong (e.g. wiring), and we don't need to programatically
bogdanm 20:4263a77256ae 197 // check for that
bogdanm 20:4263a77256ae 198
bogdanm 20:4263a77256ae 199 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
bogdanm 20:4263a77256ae 200 int count, status;
bogdanm 20:4263a77256ae 201
bogdanm 20:4263a77256ae 202 status = i2c_start(obj);
bogdanm 20:4263a77256ae 203
bogdanm 20:4263a77256ae 204 if ((status != 0x10) && (status != 0x08)) {
bogdanm 20:4263a77256ae 205 i2c_stop(obj);
bogdanm 20:4263a77256ae 206 return I2C_ERROR_BUS_BUSY;
bogdanm 20:4263a77256ae 207 }
bogdanm 20:4263a77256ae 208
bogdanm 20:4263a77256ae 209 status = i2c_do_write(obj, (address | 0x01), 1);
bogdanm 20:4263a77256ae 210 if (status != 0x40) {
bogdanm 20:4263a77256ae 211 i2c_stop(obj);
bogdanm 20:4263a77256ae 212 return I2C_ERROR_NO_SLAVE;
bogdanm 20:4263a77256ae 213 }
bogdanm 20:4263a77256ae 214
bogdanm 20:4263a77256ae 215 // Read in all except last byte
bogdanm 20:4263a77256ae 216 for (count = 0; count < (length - 1); count++) {
bogdanm 20:4263a77256ae 217 int value = i2c_do_read(obj, 0);
bogdanm 20:4263a77256ae 218 status = i2c_status(obj);
bogdanm 20:4263a77256ae 219 if (status != 0x50) {
bogdanm 20:4263a77256ae 220 i2c_stop(obj);
bogdanm 20:4263a77256ae 221 return count;
bogdanm 20:4263a77256ae 222 }
bogdanm 20:4263a77256ae 223 data[count] = (char) value;
bogdanm 20:4263a77256ae 224 }
bogdanm 20:4263a77256ae 225
bogdanm 20:4263a77256ae 226 // read in last byte
bogdanm 20:4263a77256ae 227 int value = i2c_do_read(obj, 1);
bogdanm 20:4263a77256ae 228 status = i2c_status(obj);
bogdanm 20:4263a77256ae 229 if (status != 0x58) {
bogdanm 20:4263a77256ae 230 i2c_stop(obj);
bogdanm 20:4263a77256ae 231 return length - 1;
bogdanm 20:4263a77256ae 232 }
bogdanm 20:4263a77256ae 233
bogdanm 20:4263a77256ae 234 data[count] = (char) value;
bogdanm 20:4263a77256ae 235
bogdanm 20:4263a77256ae 236 // If not repeated start, send stop.
bogdanm 20:4263a77256ae 237 if (stop) {
bogdanm 20:4263a77256ae 238 i2c_stop(obj);
bogdanm 20:4263a77256ae 239 }
bogdanm 20:4263a77256ae 240
bogdanm 20:4263a77256ae 241 return length;
bogdanm 20:4263a77256ae 242 }
bogdanm 20:4263a77256ae 243
bogdanm 20:4263a77256ae 244 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
bogdanm 20:4263a77256ae 245 int i, status;
bogdanm 20:4263a77256ae 246
bogdanm 20:4263a77256ae 247 status = i2c_start(obj);
bogdanm 20:4263a77256ae 248
bogdanm 20:4263a77256ae 249 if ((status != 0x10) && (status != 0x08)) {
bogdanm 20:4263a77256ae 250 i2c_stop(obj);
bogdanm 20:4263a77256ae 251 return I2C_ERROR_BUS_BUSY;
bogdanm 20:4263a77256ae 252 }
bogdanm 20:4263a77256ae 253
bogdanm 20:4263a77256ae 254 status = i2c_do_write(obj, (address & 0xFE), 1);
bogdanm 20:4263a77256ae 255 if (status != 0x18) {
bogdanm 20:4263a77256ae 256 i2c_stop(obj);
bogdanm 20:4263a77256ae 257 return I2C_ERROR_NO_SLAVE;
bogdanm 20:4263a77256ae 258 }
bogdanm 20:4263a77256ae 259
bogdanm 20:4263a77256ae 260 for (i=0; i<length; i++) {
bogdanm 20:4263a77256ae 261 status = i2c_do_write(obj, data[i], 0);
bogdanm 20:4263a77256ae 262 if(status != 0x28) {
bogdanm 20:4263a77256ae 263 i2c_stop(obj);
bogdanm 20:4263a77256ae 264 return i;
bogdanm 20:4263a77256ae 265 }
bogdanm 20:4263a77256ae 266 }
bogdanm 20:4263a77256ae 267
bogdanm 20:4263a77256ae 268 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
bogdanm 20:4263a77256ae 269 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
bogdanm 20:4263a77256ae 270 // i2c_clear_SI(obj);
bogdanm 20:4263a77256ae 271
bogdanm 20:4263a77256ae 272 // If not repeated start, send stop.
bogdanm 20:4263a77256ae 273 if (stop) {
bogdanm 20:4263a77256ae 274 i2c_stop(obj);
bogdanm 20:4263a77256ae 275 }
bogdanm 20:4263a77256ae 276
bogdanm 20:4263a77256ae 277 return length;
bogdanm 20:4263a77256ae 278 }
bogdanm 20:4263a77256ae 279
bogdanm 20:4263a77256ae 280 void i2c_reset(i2c_t *obj) {
bogdanm 20:4263a77256ae 281 i2c_stop(obj);
bogdanm 20:4263a77256ae 282 }
bogdanm 20:4263a77256ae 283
bogdanm 20:4263a77256ae 284 int i2c_byte_read(i2c_t *obj, int last) {
bogdanm 20:4263a77256ae 285 return (i2c_do_read(obj, last) & 0xFF);
bogdanm 20:4263a77256ae 286 }
bogdanm 20:4263a77256ae 287
bogdanm 20:4263a77256ae 288 int i2c_byte_write(i2c_t *obj, int data) {
bogdanm 20:4263a77256ae 289 int ack;
bogdanm 20:4263a77256ae 290 int status = i2c_do_write(obj, (data & 0xFF), 0);
bogdanm 20:4263a77256ae 291
bogdanm 20:4263a77256ae 292 switch(status) {
bogdanm 20:4263a77256ae 293 case 0x18: case 0x28: // Master transmit ACKs
bogdanm 20:4263a77256ae 294 ack = 1;
bogdanm 20:4263a77256ae 295 break;
bogdanm 20:4263a77256ae 296 case 0x40: // Master receive address transmitted ACK
bogdanm 20:4263a77256ae 297 ack = 1;
bogdanm 20:4263a77256ae 298 break;
bogdanm 20:4263a77256ae 299 case 0xB8: // Slave transmit ACK
bogdanm 20:4263a77256ae 300 ack = 1;
bogdanm 20:4263a77256ae 301 break;
bogdanm 20:4263a77256ae 302 default:
bogdanm 20:4263a77256ae 303 ack = 0;
bogdanm 20:4263a77256ae 304 break;
bogdanm 20:4263a77256ae 305 }
bogdanm 20:4263a77256ae 306
bogdanm 20:4263a77256ae 307 return ack;
bogdanm 20:4263a77256ae 308 }
bogdanm 20:4263a77256ae 309
bogdanm 20:4263a77256ae 310 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
bogdanm 20:4263a77256ae 311 if (enable_slave != 0) {
bogdanm 20:4263a77256ae 312 i2c_conclr(obj, 1, 1, 1, 0);
bogdanm 20:4263a77256ae 313 i2c_conset(obj, 0, 0, 0, 1);
bogdanm 20:4263a77256ae 314 } else {
bogdanm 20:4263a77256ae 315 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 20:4263a77256ae 316 }
bogdanm 20:4263a77256ae 317 }
bogdanm 20:4263a77256ae 318
bogdanm 20:4263a77256ae 319 int i2c_slave_receive(i2c_t *obj) {
bogdanm 20:4263a77256ae 320 int status;
bogdanm 20:4263a77256ae 321 int retval;
bogdanm 20:4263a77256ae 322
bogdanm 20:4263a77256ae 323 status = i2c_status(obj);
bogdanm 20:4263a77256ae 324 switch(status) {
bogdanm 20:4263a77256ae 325 case 0x60: retval = 3; break;
bogdanm 20:4263a77256ae 326 case 0x70: retval = 2; break;
bogdanm 20:4263a77256ae 327 case 0xA8: retval = 1; break;
bogdanm 20:4263a77256ae 328 default : retval = 0; break;
bogdanm 20:4263a77256ae 329 }
bogdanm 20:4263a77256ae 330
bogdanm 20:4263a77256ae 331 return(retval);
bogdanm 20:4263a77256ae 332 }
bogdanm 20:4263a77256ae 333
bogdanm 20:4263a77256ae 334 int i2c_slave_read(i2c_t *obj, char *data, int length) {
bogdanm 20:4263a77256ae 335 int count = 0;
bogdanm 20:4263a77256ae 336 int status;
bogdanm 20:4263a77256ae 337
bogdanm 20:4263a77256ae 338 do {
bogdanm 20:4263a77256ae 339 i2c_clear_SI(obj);
bogdanm 20:4263a77256ae 340 i2c_wait_SI(obj);
bogdanm 20:4263a77256ae 341 status = i2c_status(obj);
bogdanm 20:4263a77256ae 342 if((status == 0x80) || (status == 0x90)) {
bogdanm 20:4263a77256ae 343 data[count] = I2C_DAT(obj) & 0xFF;
bogdanm 20:4263a77256ae 344 }
bogdanm 20:4263a77256ae 345 count++;
bogdanm 20:4263a77256ae 346 } while (((status == 0x80) || (status == 0x90) ||
bogdanm 20:4263a77256ae 347 (status == 0x060) || (status == 0x70)) && (count < length));
bogdanm 20:4263a77256ae 348
bogdanm 20:4263a77256ae 349 if(status != 0xA0) {
bogdanm 20:4263a77256ae 350 i2c_stop(obj);
bogdanm 20:4263a77256ae 351 }
bogdanm 20:4263a77256ae 352
bogdanm 20:4263a77256ae 353 i2c_clear_SI(obj);
bogdanm 20:4263a77256ae 354
bogdanm 20:4263a77256ae 355 return count;
bogdanm 20:4263a77256ae 356 }
bogdanm 20:4263a77256ae 357
bogdanm 20:4263a77256ae 358 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
bogdanm 20:4263a77256ae 359 int count = 0;
bogdanm 20:4263a77256ae 360 int status;
bogdanm 20:4263a77256ae 361
bogdanm 20:4263a77256ae 362 if(length <= 0) {
bogdanm 20:4263a77256ae 363 return(0);
bogdanm 20:4263a77256ae 364 }
bogdanm 20:4263a77256ae 365
bogdanm 20:4263a77256ae 366 do {
bogdanm 20:4263a77256ae 367 status = i2c_do_write(obj, data[count], 0);
bogdanm 20:4263a77256ae 368 count++;
bogdanm 20:4263a77256ae 369 } while ((count < length) && (status == 0xB8));
bogdanm 20:4263a77256ae 370
bogdanm 20:4263a77256ae 371 if((status != 0xC0) && (status != 0xC8)) {
bogdanm 20:4263a77256ae 372 i2c_stop(obj);
bogdanm 20:4263a77256ae 373 }
bogdanm 20:4263a77256ae 374
bogdanm 20:4263a77256ae 375 i2c_clear_SI(obj);
bogdanm 20:4263a77256ae 376
bogdanm 20:4263a77256ae 377 return(count);
bogdanm 20:4263a77256ae 378 }
bogdanm 20:4263a77256ae 379
bogdanm 20:4263a77256ae 380 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
bogdanm 20:4263a77256ae 381 uint32_t addr;
bogdanm 20:4263a77256ae 382
bogdanm 20:4263a77256ae 383 if ((idx >= 0) && (idx <= 3)) {
bogdanm 20:4263a77256ae 384 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
bogdanm 20:4263a77256ae 385 *((uint32_t *) addr) = address & 0xFF;
bogdanm 20:4263a77256ae 386 }
bogdanm 20:4263a77256ae 387 }