david dicarlo / mbed-src-FLL48

mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).

Fork of mbed-src by mbed official

The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h

targets/cmsis/TARGET_NXP/TARGET_LPC43XX/TOOLCHAIN_GCC_CR/LPC43xx.ld@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /*
bogdanm 20:4263a77256ae 2 * LPC43XX Dual core Blinky stand-alone Cortex-M4 LD script
bogdanm 20:4263a77256ae 3 */
bogdanm 20:4263a77256ae 4
bogdanm 20:4263a77256ae 5 MEMORY
bogdanm 20:4263a77256ae 6 {
bogdanm 20:4263a77256ae 7 /* Define each memory region */
bogdanm 20:4263a77256ae 8 RO_MEM (rx) : ORIGIN = 0x14000000, LENGTH = 0x40000 /* 256K */
bogdanm 20:4263a77256ae 9 RW_MEM (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32k */
bogdanm 20:4263a77256ae 10 RW_MEM1 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x4000 /* 16K */
bogdanm 20:4263a77256ae 11 SH_MEM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x2000 /* 8k */
bogdanm 20:4263a77256ae 12 FAT12_MEM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000 /* 8k */
bogdanm 20:4263a77256ae 13
bogdanm 20:4263a77256ae 14 }
bogdanm 20:4263a77256ae 15
bogdanm 20:4263a77256ae 16 __top_RW_MEM = 0x10000000 + 0x8000;
bogdanm 20:4263a77256ae 17
bogdanm 20:4263a77256ae 18 INCLUDE "lpc43xx_dualcore_lib.ld"
bogdanm 20:4263a77256ae 19 INCLUDE "lpc43xx_dualcore.ld"