Ian Kilburn / VL53L0X

Simple library for VL53L0X ToF Sensor

Dependents:   4012Code PWM

VL53L0X.h@0:aae0c331fe7e, 2017-02-26 (annotated)

Committer:
highroads
Date:
Sun Feb 26 12:45:46 2017 +0000
Revision:
0:aae0c331fe7e
Library for VL53L0X

Who changed what in which revision?

UserRevisionLine numberNew contents of line
highroads 0:aae0c331fe7e 1 #ifndef VL53L0X_h
highroads 0:aae0c331fe7e 2 #define VL53L0X_h
highroads 0:aae0c331fe7e 3 #include "mbed.h"
highroads 0:aae0c331fe7e 4 //#include "millis.h"
highroads 0:aae0c331fe7e 5 class VL53L0X
highroads 0:aae0c331fe7e 6 {
highroads 0:aae0c331fe7e 7 public:
highroads 0:aae0c331fe7e 8 // register addresses from API vl53l0x_device.h (ordered as listed there)
highroads 0:aae0c331fe7e 9 enum regAddr
highroads 0:aae0c331fe7e 10 {
highroads 0:aae0c331fe7e 11 SYSRANGE_START = 0x00,
highroads 0:aae0c331fe7e 12
highroads 0:aae0c331fe7e 13 SYSTEM_THRESH_HIGH = 0x0C,
highroads 0:aae0c331fe7e 14 SYSTEM_THRESH_LOW = 0x0E,
highroads 0:aae0c331fe7e 15
highroads 0:aae0c331fe7e 16 SYSTEM_SEQUENCE_CONFIG = 0x01,
highroads 0:aae0c331fe7e 17 SYSTEM_RANGE_CONFIG = 0x09,
highroads 0:aae0c331fe7e 18 SYSTEM_INTERMEASUREMENT_PERIOD = 0x04,
highroads 0:aae0c331fe7e 19
highroads 0:aae0c331fe7e 20 SYSTEM_INTERRUPT_CONFIG_GPIO = 0x0A,
highroads 0:aae0c331fe7e 21
highroads 0:aae0c331fe7e 22 GPIO_HV_MUX_ACTIVE_HIGH = 0x84,
highroads 0:aae0c331fe7e 23
highroads 0:aae0c331fe7e 24 SYSTEM_INTERRUPT_CLEAR = 0x0B,
highroads 0:aae0c331fe7e 25
highroads 0:aae0c331fe7e 26 RESULT_INTERRUPT_STATUS = 0x13,
highroads 0:aae0c331fe7e 27 RESULT_RANGE_STATUS = 0x14,
highroads 0:aae0c331fe7e 28
highroads 0:aae0c331fe7e 29 RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN = 0xBC,
highroads 0:aae0c331fe7e 30 RESULT_CORE_RANGING_TOTAL_EVENTS_RTN = 0xC0,
highroads 0:aae0c331fe7e 31 RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF = 0xD0,
highroads 0:aae0c331fe7e 32 RESULT_CORE_RANGING_TOTAL_EVENTS_REF = 0xD4,
highroads 0:aae0c331fe7e 33 RESULT_PEAK_SIGNAL_RATE_REF = 0xB6,
highroads 0:aae0c331fe7e 34
highroads 0:aae0c331fe7e 35 ALGO_PART_TO_PART_RANGE_OFFSET_MM = 0x28,
highroads 0:aae0c331fe7e 36
highroads 0:aae0c331fe7e 37 I2C_SLAVE_DEVICE_ADDRESS = 0x8A,
highroads 0:aae0c331fe7e 38
highroads 0:aae0c331fe7e 39 MSRC_CONFIG_CONTROL = 0x60,
highroads 0:aae0c331fe7e 40
highroads 0:aae0c331fe7e 41 PRE_RANGE_CONFIG_MIN_SNR = 0x27,
highroads 0:aae0c331fe7e 42 PRE_RANGE_CONFIG_VALID_PHASE_LOW = 0x56,
highroads 0:aae0c331fe7e 43 PRE_RANGE_CONFIG_VALID_PHASE_HIGH = 0x57,
highroads 0:aae0c331fe7e 44 PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT = 0x64,
highroads 0:aae0c331fe7e 45
highroads 0:aae0c331fe7e 46 FINAL_RANGE_CONFIG_MIN_SNR = 0x67,
highroads 0:aae0c331fe7e 47 FINAL_RANGE_CONFIG_VALID_PHASE_LOW = 0x47,
highroads 0:aae0c331fe7e 48 FINAL_RANGE_CONFIG_VALID_PHASE_HIGH = 0x48,
highroads 0:aae0c331fe7e 49 FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT = 0x44,
highroads 0:aae0c331fe7e 50
highroads 0:aae0c331fe7e 51 PRE_RANGE_CONFIG_SIGMA_THRESH_HI = 0x61,
highroads 0:aae0c331fe7e 52 PRE_RANGE_CONFIG_SIGMA_THRESH_LO = 0x62,
highroads 0:aae0c331fe7e 53
highroads 0:aae0c331fe7e 54 PRE_RANGE_CONFIG_VCSEL_PERIOD = 0x50,
highroads 0:aae0c331fe7e 55 PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI = 0x51,
highroads 0:aae0c331fe7e 56 PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO = 0x52,
highroads 0:aae0c331fe7e 57
highroads 0:aae0c331fe7e 58 SYSTEM_HISTOGRAM_BIN = 0x81,
highroads 0:aae0c331fe7e 59 HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT = 0x33,
highroads 0:aae0c331fe7e 60 HISTOGRAM_CONFIG_READOUT_CTRL = 0x55,
highroads 0:aae0c331fe7e 61
highroads 0:aae0c331fe7e 62 FINAL_RANGE_CONFIG_VCSEL_PERIOD = 0x70,
highroads 0:aae0c331fe7e 63 FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI = 0x71,
highroads 0:aae0c331fe7e 64 FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO = 0x72,
highroads 0:aae0c331fe7e 65 CROSSTALK_COMPENSATION_PEAK_RATE_MCPS = 0x20,
highroads 0:aae0c331fe7e 66
highroads 0:aae0c331fe7e 67 MSRC_CONFIG_TIMEOUT_MACROP = 0x46,
highroads 0:aae0c331fe7e 68
highroads 0:aae0c331fe7e 69 SOFT_RESET_GO2_SOFT_RESET_N = 0xBF,
highroads 0:aae0c331fe7e 70 IDENTIFICATION_MODEL_ID = 0xC0,
highroads 0:aae0c331fe7e 71 IDENTIFICATION_REVISION_ID = 0xC2,
highroads 0:aae0c331fe7e 72
highroads 0:aae0c331fe7e 73 OSC_CALIBRATE_VAL = 0xF8,
highroads 0:aae0c331fe7e 74
highroads 0:aae0c331fe7e 75 GLOBAL_CONFIG_VCSEL_WIDTH = 0x32,
highroads 0:aae0c331fe7e 76 GLOBAL_CONFIG_SPAD_ENABLES_REF_0 = 0xB0,
highroads 0:aae0c331fe7e 77 GLOBAL_CONFIG_SPAD_ENABLES_REF_1 = 0xB1,
highroads 0:aae0c331fe7e 78 GLOBAL_CONFIG_SPAD_ENABLES_REF_2 = 0xB2,
highroads 0:aae0c331fe7e 79 GLOBAL_CONFIG_SPAD_ENABLES_REF_3 = 0xB3,
highroads 0:aae0c331fe7e 80 GLOBAL_CONFIG_SPAD_ENABLES_REF_4 = 0xB4,
highroads 0:aae0c331fe7e 81 GLOBAL_CONFIG_SPAD_ENABLES_REF_5 = 0xB5,
highroads 0:aae0c331fe7e 82
highroads 0:aae0c331fe7e 83 GLOBAL_CONFIG_REF_EN_START_SELECT = 0xB6,
highroads 0:aae0c331fe7e 84 DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD = 0x4E,
highroads 0:aae0c331fe7e 85 DYNAMIC_SPAD_REF_EN_START_OFFSET = 0x4F,
highroads 0:aae0c331fe7e 86 POWER_MANAGEMENT_GO1_POWER_FORCE = 0x80,
highroads 0:aae0c331fe7e 87
highroads 0:aae0c331fe7e 88 VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV = 0x89,
highroads 0:aae0c331fe7e 89
highroads 0:aae0c331fe7e 90 ALGO_PHASECAL_LIM = 0x30,
highroads 0:aae0c331fe7e 91 ALGO_PHASECAL_CONFIG_TIMEOUT = 0x30,
highroads 0:aae0c331fe7e 92 };
highroads 0:aae0c331fe7e 93
highroads 0:aae0c331fe7e 94 enum vcselPeriodType { VcselPeriodPreRange, VcselPeriodFinalRange };
highroads 0:aae0c331fe7e 95
highroads 0:aae0c331fe7e 96 uint8_t last_status; // status of last I2C transmission
highroads 0:aae0c331fe7e 97
highroads 0:aae0c331fe7e 98 VL53L0X(PinName sda_pin, PinName scl_pin);
highroads 0:aae0c331fe7e 99
highroads 0:aae0c331fe7e 100 void setAddress(uint8_t new_addr);
highroads 0:aae0c331fe7e 101 inline uint8_t getAddress(void) { return address; }
highroads 0:aae0c331fe7e 102
highroads 0:aae0c331fe7e 103 bool init(bool io_2v8 = true);
highroads 0:aae0c331fe7e 104
highroads 0:aae0c331fe7e 105
highroads 0:aae0c331fe7e 106
highroads 0:aae0c331fe7e 107 bool setSignalRateLimit(float limit_Mcps);
highroads 0:aae0c331fe7e 108 float getSignalRateLimit(void);
highroads 0:aae0c331fe7e 109
highroads 0:aae0c331fe7e 110 bool setMeasurementTimingBudget(uint32_t budget_us);
highroads 0:aae0c331fe7e 111 uint32_t getMeasurementTimingBudget(void);
highroads 0:aae0c331fe7e 112
highroads 0:aae0c331fe7e 113 bool setVcselPulsePeriod(vcselPeriodType type, uint8_t period_pclks);
highroads 0:aae0c331fe7e 114 uint8_t getVcselPulsePeriod(vcselPeriodType type);
highroads 0:aae0c331fe7e 115
highroads 0:aae0c331fe7e 116 void startContinuous(uint32_t period_ms = 0);
highroads 0:aae0c331fe7e 117 void stopContinuous(void);
highroads 0:aae0c331fe7e 118 uint16_t readRangeContinuousMillimeters(void);
highroads 0:aae0c331fe7e 119 uint16_t readRangeSingleMillimeters(void);
highroads 0:aae0c331fe7e 120
highroads 0:aae0c331fe7e 121 inline void setTimeout(uint16_t timeout) { io_timeout = timeout; }
highroads 0:aae0c331fe7e 122 inline uint16_t getTimeout(void) { return io_timeout; }
highroads 0:aae0c331fe7e 123 bool timeoutOccurred(void);
highroads 0:aae0c331fe7e 124
highroads 0:aae0c331fe7e 125 private:
highroads 0:aae0c331fe7e 126 // TCC: Target CentreCheck
highroads 0:aae0c331fe7e 127 // MSRC: Minimum Signal Rate Check
highroads 0:aae0c331fe7e 128 // DSS: Dynamic Spad Selection
highroads 0:aae0c331fe7e 129 I2C m_i2c;
highroads 0:aae0c331fe7e 130 int m_addr;
highroads 0:aae0c331fe7e 131
highroads 0:aae0c331fe7e 132 void writeReg(uint8_t reg, uint8_t value);
highroads 0:aae0c331fe7e 133 void writeReg16Bit(uint8_t reg, uint16_t value);
highroads 0:aae0c331fe7e 134 void writeReg32Bit(uint8_t reg, uint32_t value);
highroads 0:aae0c331fe7e 135 uint8_t readReg(uint8_t reg);
highroads 0:aae0c331fe7e 136 uint16_t readReg16Bit(uint8_t reg);
highroads 0:aae0c331fe7e 137 uint32_t readReg32Bit(uint8_t reg);
highroads 0:aae0c331fe7e 138
highroads 0:aae0c331fe7e 139 void writeMulti(uint8_t reg, char src[], uint8_t count);
highroads 0:aae0c331fe7e 140 void readMulti(uint8_t reg, char dst[], uint8_t count);
highroads 0:aae0c331fe7e 141
highroads 0:aae0c331fe7e 142 struct SequenceStepEnables
highroads 0:aae0c331fe7e 143 {
highroads 0:aae0c331fe7e 144 bool tcc, msrc, dss, pre_range, final_range;
highroads 0:aae0c331fe7e 145 };
highroads 0:aae0c331fe7e 146
highroads 0:aae0c331fe7e 147 struct SequenceStepTimeouts
highroads 0:aae0c331fe7e 148 {
highroads 0:aae0c331fe7e 149 uint16_t pre_range_vcsel_period_pclks, final_range_vcsel_period_pclks;
highroads 0:aae0c331fe7e 150
highroads 0:aae0c331fe7e 151 uint16_t msrc_dss_tcc_mclks, pre_range_mclks, final_range_mclks;
highroads 0:aae0c331fe7e 152 uint32_t msrc_dss_tcc_us, pre_range_us, final_range_us;
highroads 0:aae0c331fe7e 153 };
highroads 0:aae0c331fe7e 154
highroads 0:aae0c331fe7e 155 uint8_t address;
highroads 0:aae0c331fe7e 156 uint16_t io_timeout;
highroads 0:aae0c331fe7e 157 bool did_timeout;
highroads 0:aae0c331fe7e 158 uint16_t timeout_start_ms;
highroads 0:aae0c331fe7e 159
highroads 0:aae0c331fe7e 160 uint8_t stop_variable; // read by init and used when starting measurement; is StopVariable field of VL53L0X_DevData_t structure in API
highroads 0:aae0c331fe7e 161 uint32_t measurement_timing_budget_us;
highroads 0:aae0c331fe7e 162
highroads 0:aae0c331fe7e 163 bool getSpadInfo(uint8_t * count, bool * type_is_aperture);
highroads 0:aae0c331fe7e 164
highroads 0:aae0c331fe7e 165 void getSequenceStepEnables(SequenceStepEnables * enables);
highroads 0:aae0c331fe7e 166 void getSequenceStepTimeouts(SequenceStepEnables const * enables, SequenceStepTimeouts * timeouts);
highroads 0:aae0c331fe7e 167
highroads 0:aae0c331fe7e 168 bool performSingleRefCalibration(uint8_t vhv_init_byte);
highroads 0:aae0c331fe7e 169
highroads 0:aae0c331fe7e 170 static uint16_t decodeTimeout(uint16_t value);
highroads 0:aae0c331fe7e 171 static uint16_t encodeTimeout(uint16_t timeout_mclks);
highroads 0:aae0c331fe7e 172 static uint32_t timeoutMclksToMicroseconds(uint16_t timeout_period_mclks, uint8_t vcsel_period_pclks);
highroads 0:aae0c331fe7e 173 static uint32_t timeoutMicrosecondsToMclks(uint32_t timeout_period_us, uint8_t vcsel_period_pclks);
highroads 0:aae0c331fe7e 174 };
highroads 0:aae0c331fe7e 175
highroads 0:aae0c331fe7e 176 #endif