The actual SCK frequency for the SPI 3 module in an 84 MHz Nucleo-F401RE has been measured. A test program was written so that various values could be sent to the spi.frequency() parameter, and the resultant SCK signal then observed with an oscilloscope.

The F401RE CPU only supports 8 SCK frequencies; this limitation is due to the fact that only a 3-bit divider is provided in the rate generator.

According to the documentation, SPI 1 should run at twice the rate that SPI 2 and SPI 3 operate. This may account for the fact that the SPI 3 SCK frequency is about half of what would be expected, as shown in the table below.

The eight observed rates agree with theory, assuming that SPI 3 is fed from PCLK1 (which is running at 42MHz). However, the measured rates for SPI 3 SCK are not in good agreement with the requested frequencies, probably for the reason noted above. The frequency arguments listed are the empirically-determined points at which SCK switches from one value to the next.