Hexley Ball / CaptureT0_11U24

Uses Timer 0 of the 11U24 to capture input pulsesl

capturet0_11u24.cpp@0:22c6b94e7da6, 2014-03-13 (annotated)

Committer:
hexley
Date:
Thu Mar 13 17:52:43 2014 +0000
Revision:
0:22c6b94e7da6
Initial version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hexley 0:22c6b94e7da6 1 /* mbed Library - Capture driver for CT32B0
hexley 0:22c6b94e7da6 2 * Copyright (c) 2010
hexley 0:22c6b94e7da6 3 * released under MIT license http://mbed.org/licence/mit
hexley 0:22c6b94e7da6 4 */
hexley 0:22c6b94e7da6 5 /***********************************************************************//**
hexley 0:22c6b94e7da6 6 * @file capturet1_11u24.cpp
hexley 0:22c6b94e7da6 7 * @brief Driver file for the CAP1 function of CT32B0 in the mbed 11U24.
hexley 0:22c6b94e7da6 8 * @version 0.0
hexley 0:22c6b94e7da6 9 * @date 05 Feb 2014
hexley 0:22c6b94e7da6 10 * @author
hexley 0:22c6b94e7da6 11 **************************************************************************/
hexley 0:22c6b94e7da6 12 #include "mbed.h"
hexley 0:22c6b94e7da6 13 #include "capturet0_11u24.h"
hexley 0:22c6b94e7da6 14
hexley 0:22c6b94e7da6 15 Capture *Capture::instance;
hexley 0:22c6b94e7da6 16
hexley 0:22c6b94e7da6 17 /*********************************************************************//**
hexley 0:22c6b94e7da6 18 * @brief Create a Capture object and configure it.
hexley 0:22c6b94e7da6 19 * @param None Uses p7 as the Capture input
hexley 0:22c6b94e7da6 20 * @return None
hexley 0:22c6b94e7da6 21 **********************************************************************/
hexley 0:22c6b94e7da6 22 Capture::Capture(void)
hexley 0:22c6b94e7da6 23 {
hexley 0:22c6b94e7da6 24 /* Set up clock and power, using default peripheral system clock divider */
hexley 0:22c6b94e7da6 25 LPC_SYSCON->SYSAHBCLKCTRL |= CT32B0_CLK_ENABLE; // See page 30 of the 11U24 User Guide
hexley 0:22c6b94e7da6 26 // Check the clock divider ratio by reading LPC_SYSCON->SYSAHBCLKDIV ls byte
hexley 0:22c6b94e7da6 27 LPC_CT32B0->PR = 0; // Prescale counter divide by 1
hexley 0:22c6b94e7da6 28
hexley 0:22c6b94e7da6 29 /* Configure IOCON for the proper function of the capture pin. Use a pull-up. */
hexley 0:22c6b94e7da6 30 LPC_IOCON->PIO1_29 = (CT32B0_CAP1 | CAP_PULLUP); // See page 114 of the 11U24 User Guide
hexley 0:22c6b94e7da6 31
hexley 0:22c6b94e7da6 32 // Select the capture edge and int mode
hexley 0:22c6b94e7da6 33 LPC_CT32B0->CCR = CCR_CAP1FE | CCR_CAP1I; // Select inputs and interrupts. See page 345
hexley 0:22c6b94e7da6 34
hexley 0:22c6b94e7da6 35 // Set up the rising edge clear, using timer mode
hexley 0:22c6b94e7da6 36 LPC_CT32B0->CTCR = CTCR_CTM_TIMER | CTCR_ENCC | CTCR_SEICC_CAP1RE; // See page 350
hexley 0:22c6b94e7da6 37
hexley 0:22c6b94e7da6 38
hexley 0:22c6b94e7da6 39 // Clear interrupt flag
hexley 0:22c6b94e7da6 40 LPC_CT32B0->IR = IR_CR1INT; // See page 342
hexley 0:22c6b94e7da6 41
hexley 0:22c6b94e7da6 42 /* preemption = 1, sub-priority = 1 */
hexley 0:22c6b94e7da6 43 // NVIC_SetPriority(TIMER2_IRQn, ((0x01<<3)|0x01));
hexley 0:22c6b94e7da6 44 // NVIC_SetPriority(TIMER2_IRQn, 0); // Set to top priority to minimize interference from tickers.
hexley 0:22c6b94e7da6 45
hexley 0:22c6b94e7da6 46 //* Attach IRQ
hexley 0:22c6b94e7da6 47 instance = this;
hexley 0:22c6b94e7da6 48 NVIC_SetVector(TIMER_32_0_IRQn, (uint32_t)&_Captureisr);
hexley 0:22c6b94e7da6 49
hexley 0:22c6b94e7da6 50 }
hexley 0:22c6b94e7da6 51
hexley 0:22c6b94e7da6 52 /*********************************************************************//**
hexley 0:22c6b94e7da6 53 * @brief Start capturing data. Average the specified number of samples.
hexley 0:22c6b94e7da6 54 * @param (int) numsamples Log base 2 of the number of samples to be averaged
hexley 0:22c6b94e7da6 55 * @return None
hexley 0:22c6b94e7da6 56 **********************************************************************/
hexley 0:22c6b94e7da6 57 void Capture::Start(int numsamples) {
hexley 0:22c6b94e7da6 58 Nsamples = numsamples;
hexley 0:22c6b94e7da6 59 capturedata = 0; // Clear the accumulator
hexley 0:22c6b94e7da6 60 flag = 0; // No data ready
hexley 0:22c6b94e7da6 61
hexley 0:22c6b94e7da6 62 /* Enable interrupt for CAPTURE */
hexley 0:22c6b94e7da6 63 NVIC_EnableIRQ(TIMER_32_0_IRQn);
hexley 0:22c6b94e7da6 64
hexley 0:22c6b94e7da6 65 // Start the timer
hexley 0:22c6b94e7da6 66 LPC_CT32B0->TCR = TCR_CEN; // enable
hexley 0:22c6b94e7da6 67 }
hexley 0:22c6b94e7da6 68
hexley 0:22c6b94e7da6 69 /*********************************************************************//**
hexley 0:22c6b94e7da6 70 * @brief Read (accumulated) sample count.
hexley 0:22c6b94e7da6 71 *
hexley 0:22c6b94e7da6 72 * @return (unsigned int) Accumulated capture value
hexley 0:22c6b94e7da6 73 **********************************************************************/
hexley 0:22c6b94e7da6 74 unsigned int Capture::Read(void) {
hexley 0:22c6b94e7da6 75 flag = 0; // Clear previous status (or error)
hexley 0:22c6b94e7da6 76 return capturedata;
hexley 0:22c6b94e7da6 77 }
hexley 0:22c6b94e7da6 78
hexley 0:22c6b94e7da6 79 /*********************************************************************//**
hexley 0:22c6b94e7da6 80 * @brief Check for accumulation complete (data is ready to read).
hexley 0:22c6b94e7da6 81 *
hexley 0:22c6b94e7da6 82 * @return (unsigned int) Accumulated capture value
hexley 0:22c6b94e7da6 83 **********************************************************************/
hexley 0:22c6b94e7da6 84 int Capture::Ready(void) {
hexley 0:22c6b94e7da6 85 return flag;
hexley 0:22c6b94e7da6 86 }
hexley 0:22c6b94e7da6 87
hexley 0:22c6b94e7da6 88
hexley 0:22c6b94e7da6 89 /* Capture isr instantiator */
hexley 0:22c6b94e7da6 90 void Capture::_Captureisr(void)
hexley 0:22c6b94e7da6 91 {
hexley 0:22c6b94e7da6 92 instance->Captureisr();
hexley 0:22c6b94e7da6 93 }
hexley 0:22c6b94e7da6 94
hexley 0:22c6b94e7da6 95 /*********************************************************************//**
hexley 0:22c6b94e7da6 96 * @brief Capture interrupt service routine. Handles accumulation.
hexley 0:22c6b94e7da6 97 *
hexley 0:22c6b94e7da6 98 * @param[in] none
hexley 0:22c6b94e7da6 99 *
hexley 0:22c6b94e7da6 100 * @return none
hexley 0:22c6b94e7da6 101 **********************************************************************/
hexley 0:22c6b94e7da6 102 void Capture::Captureisr(void) {
hexley 0:22c6b94e7da6 103 static unsigned int samplecount = 0; // Counts passes
hexley 0:22c6b94e7da6 104 static unsigned int capturesum = 0; // Accumulates the readings
hexley 0:22c6b94e7da6 105
hexley 0:22c6b94e7da6 106 if(LPC_CT32B0->IR & IR_CR1INT) {
hexley 0:22c6b94e7da6 107 LPC_CT32B0->IR |= IR_CR1INT; // Clear the interrupt request
hexley 0:22c6b94e7da6 108 capturesum += LPC_CT32B0->CR2; // Read and accumulate the captured results
hexley 0:22c6b94e7da6 109 // It is necessary to use "CR2" in order to get the proper
hexley 0:22c6b94e7da6 110 // offset from the base address (an issue with CMSIS)
hexley 0:22c6b94e7da6 111 if(++samplecount == Nsamples) {
hexley 0:22c6b94e7da6 112 capturedata = capturesum; // Update the output data
hexley 0:22c6b94e7da6 113 samplecount = 0; // Restart the pass counter
hexley 0:22c6b94e7da6 114 capturesum = 0; // Re-initialize the running total
hexley 0:22c6b94e7da6 115 if(flag != 0) flag = -1; // Make flag negative on an overrun
hexley 0:22c6b94e7da6 116 else flag = 1; // Set flag to 1 if no error
hexley 0:22c6b94e7da6 117 }
hexley 0:22c6b94e7da6 118 }
hexley 0:22c6b94e7da6 119 return;
hexley 0:22c6b94e7da6 120 }