Hepta 2 / Mbed 2 deprecated HEPTA2_assembly_0720

Hepta2_Assembly_Ver.1

Dependencies:   HeptaBattery Hepta2_9axis Hepta_Serial SDHCFileSystem HeptaTemp HeptaXbee mbed

Fork of Hepta_Camera_test by Hepta 2

SDHCFileSystem.cpp@2:726072016da1, 2017-07-21 (annotated)

Committer:
hepta2ume
Date:
Fri Jul 21 10:38:11 2017 +0000
Revision:
2:726072016da1
Parent:
1:890188e041da 
Hepta??.Ver1

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hepta2ume 1:890188e041da 1 /* mbed SDFileSystem Library, for providing file access to SD cards
hepta2ume 1:890188e041da 2 * Copyright (c) 2008-2010, sford
hepta2ume 1:890188e041da 3 *
hepta2ume 1:890188e041da 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
hepta2ume 1:890188e041da 5 * of this software and associated documentation files (the "Software"), to deal
hepta2ume 1:890188e041da 6 * in the Software without restriction, including without limitation the rights
hepta2ume 1:890188e041da 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
hepta2ume 1:890188e041da 8 * copies of the Software, and to permit persons to whom the Software is
hepta2ume 1:890188e041da 9 * furnished to do so, subject to the following conditions:
hepta2ume 1:890188e041da 10 *
hepta2ume 1:890188e041da 11 * The above copyright notice and this permission notice shall be included in
hepta2ume 1:890188e041da 12 * all copies or substantial portions of the Software.
hepta2ume 1:890188e041da 13 *
hepta2ume 1:890188e041da 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
hepta2ume 1:890188e041da 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
hepta2ume 1:890188e041da 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
hepta2ume 1:890188e041da 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
hepta2ume 1:890188e041da 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
hepta2ume 1:890188e041da 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
hepta2ume 1:890188e041da 20 * THE SOFTWARE.
hepta2ume 1:890188e041da 21 */
hepta2ume 1:890188e041da 22
hepta2ume 1:890188e041da 23 /* Introduction
hepta2ume 1:890188e041da 24 * ------------
hepta2ume 1:890188e041da 25 * SD and MMC cards support a number of interfaces, but common to them all
hepta2ume 1:890188e041da 26 * is one based on SPI. This is the one I'm implmenting because it means
hepta2ume 1:890188e041da 27 * it is much more portable even though not so performant, and we already
hepta2ume 1:890188e041da 28 * have the mbed SPI Interface!
hepta2ume 1:890188e041da 29 *
hepta2ume 1:890188e041da 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
hepta2ume 1:890188e041da 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
hepta2ume 1:890188e041da 32 *
hepta2ume 1:890188e041da 33 * SPI Startup
hepta2ume 1:890188e041da 34 * -----------
hepta2ume 1:890188e041da 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
hepta2ume 1:890188e041da 36 * asserting CS low and sending the reset command (CMD0). The card will
hepta2ume 1:890188e041da 37 * respond with a (R1) response.
hepta2ume 1:890188e041da 38 *
hepta2ume 1:890188e041da 39 * CMD8 is optionally sent to determine the voltage range supported, and
hepta2ume 1:890188e041da 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
hepta2ume 1:890188e041da 41 * version 2.x. I'll just ignore this for now.
hepta2ume 1:890188e041da 42 *
hepta2ume 1:890188e041da 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
hepta2ume 1:890188e041da 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
hepta2ume 1:890188e041da 45 *
hepta2ume 1:890188e041da 46 * You should also indicate whether the host supports High Capicity cards,
hepta2ume 1:890188e041da 47 * and check whether the card is high capacity - i'll also ignore this
hepta2ume 1:890188e041da 48 *
hepta2ume 1:890188e041da 49 * SPI Protocol
hepta2ume 1:890188e041da 50 * ------------
hepta2ume 1:890188e041da 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
hepta2ume 1:890188e041da 52 * the host starting every bus transaction by asserting the CS signal low. The
hepta2ume 1:890188e041da 53 * card always responds to commands, data blocks and errors.
hepta2ume 1:890188e041da 54 *
hepta2ume 1:890188e041da 55 * The protocol supports a CRC, but by default it is off (except for the
hepta2ume 1:890188e041da 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
hepta2ume 1:890188e041da 57 * I'll leave the CRC off I think!
hepta2ume 1:890188e041da 58 *
hepta2ume 1:890188e041da 59 * Standard capacity cards have variable data block sizes, whereas High
hepta2ume 1:890188e041da 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
hepta2ume 1:890188e041da 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
hepta2ume 1:890188e041da 62 * This is set with CMD16.
hepta2ume 1:890188e041da 63 *
hepta2ume 1:890188e041da 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
hepta2ume 1:890188e041da 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
hepta2ume 1:890188e041da 66 * the card gets a read command, it responds with a response token, and then
hepta2ume 1:890188e041da 67 * a data token or an error.
hepta2ume 1:890188e041da 68 *
hepta2ume 1:890188e041da 69 * SPI Command Format
hepta2ume 1:890188e041da 70 * ------------------
hepta2ume 1:890188e041da 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
hepta2ume 1:890188e041da 72 *
hepta2ume 1:890188e041da 73 * +---------------+------------+------------+-----------+----------+--------------+
hepta2ume 1:890188e041da 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
hepta2ume 1:890188e041da 75 * +---------------+------------+------------+-----------+----------+--------------+
hepta2ume 1:890188e041da 76 *
hepta2ume 1:890188e041da 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
hepta2ume 1:890188e041da 78 *
hepta2ume 1:890188e041da 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
hepta2ume 1:890188e041da 80 *
hepta2ume 1:890188e041da 81 * SPI Response Format
hepta2ume 1:890188e041da 82 * -------------------
hepta2ume 1:890188e041da 83 * The main response format (R1) is a status byte (normally zero). Key flags:
hepta2ume 1:890188e041da 84 * idle - 1 if the card is in an idle state/initialising
hepta2ume 1:890188e041da 85 * cmd - 1 if an illegal command code was detected
hepta2ume 1:890188e041da 86 *
hepta2ume 1:890188e041da 87 * +-------------------------------------------------+
hepta2ume 1:890188e041da 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
hepta2ume 1:890188e041da 89 * +-------------------------------------------------+
hepta2ume 1:890188e041da 90 *
hepta2ume 1:890188e041da 91 * R1b is the same, except it is followed by a busy signal (zeros) until
hepta2ume 1:890188e041da 92 * the first non-zero byte when it is ready again.
hepta2ume 1:890188e041da 93 *
hepta2ume 1:890188e041da 94 * Data Response Token
hepta2ume 1:890188e041da 95 * -------------------
hepta2ume 1:890188e041da 96 * Every data block written to the card is acknowledged by a byte
hepta2ume 1:890188e041da 97 * response token
hepta2ume 1:890188e041da 98 *
hepta2ume 1:890188e041da 99 * +----------------------+
hepta2ume 1:890188e041da 100 * | xxx | 0 | status | 1 |
hepta2ume 1:890188e041da 101 * +----------------------+
hepta2ume 1:890188e041da 102 * 010 - OK!
hepta2ume 1:890188e041da 103 * 101 - CRC Error
hepta2ume 1:890188e041da 104 * 110 - Write Error
hepta2ume 1:890188e041da 105 *
hepta2ume 1:890188e041da 106 * Single Block Read and Write
hepta2ume 1:890188e041da 107 * ---------------------------
hepta2ume 1:890188e041da 108 *
hepta2ume 1:890188e041da 109 * Block transfers have a byte header, followed by the data, followed
hepta2ume 1:890188e041da 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
hepta2ume 1:890188e041da 111 *
hepta2ume 1:890188e041da 112 * +------+---------+---------+- - - -+---------+-----------+----------+
hepta2ume 1:890188e041da 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
hepta2ume 1:890188e041da 114 * +------+---------+---------+- - - -+---------+-----------+----------+
hepta2ume 1:890188e041da 115 */
hepta2ume 1:890188e041da 116
hepta2ume 1:890188e041da 117 /*
hepta2ume 1:890188e041da 118 * Comment: Changes for SDHC support till 32GB
hepta2ume 1:890188e041da 119 * Name: KB
hepta2ume 1:890188e041da 120 * Date: 07/24/2010
hepta2ume 1:890188e041da 121 * Release: 0.1
hepta2ume 1:890188e041da 122 */
hepta2ume 1:890188e041da 123
hepta2ume 1:890188e041da 124 #include "SDHCFileSystem.h"
hepta2ume 1:890188e041da 125
hepta2ume 1:890188e041da 126 #define DEBUG
hepta2ume 1:890188e041da 127 #define SD_COMMAND_TIMEOUT 5000
hepta2ume 1:890188e041da 128
hepta2ume 1:890188e041da 129
hepta2ume 1:890188e041da 130 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
hepta2ume 1:890188e041da 131 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
hepta2ume 1:890188e041da 132 _cs = 1;
hepta2ume 1:890188e041da 133 }
hepta2ume 1:890188e041da 134
hepta2ume 1:890188e041da 135 #define R1_IDLE_STATE (1 << 0)
hepta2ume 1:890188e041da 136 #define R1_ERASE_RESET (1 << 1)
hepta2ume 1:890188e041da 137 #define R1_ILLEGAL_COMMAND (1 << 2)
hepta2ume 1:890188e041da 138 #define R1_COM_CRC_ERROR (1 << 3)
hepta2ume 1:890188e041da 139 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
hepta2ume 1:890188e041da 140 #define R1_ADDRESS_ERROR (1 << 5)
hepta2ume 1:890188e041da 141 #define R1_PARAMETER_ERROR (1 << 6)
hepta2ume 1:890188e041da 142
hepta2ume 1:890188e041da 143 // Types
hepta2ume 1:890188e041da 144 // - v1.x Standard Capacity
hepta2ume 1:890188e041da 145 // - v2.x Standard Capacity
hepta2ume 1:890188e041da 146 // - v2.x High Capacity
hepta2ume 1:890188e041da 147 // - Not recognised as an SD Card
hepta2ume 1:890188e041da 148
hepta2ume 1:890188e041da 149 #define SDCARD_FAIL 0
hepta2ume 1:890188e041da 150 #define SDCARD_V1 1
hepta2ume 1:890188e041da 151 #define SDCARD_V2 2
hepta2ume 1:890188e041da 152 #define SDCARD_V2HC 3
hepta2ume 1:890188e041da 153
hepta2ume 1:890188e041da 154 int SDFileSystem::initialise_card() {
hepta2ume 1:890188e041da 155 // Set to 100kHz for initialisation, and clock card with cs = 1
hepta2ume 1:890188e041da 156 _spi.frequency(100000);
hepta2ume 1:890188e041da 157 _cs = 1;
hepta2ume 1:890188e041da 158 for(int i=0; i<16; i++) {
hepta2ume 1:890188e041da 159 _spi.write(0xFF);
hepta2ume 1:890188e041da 160 }
hepta2ume 1:890188e041da 161
hepta2ume 1:890188e041da 162 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
hepta2ume 1:890188e041da 163 if(_cmd(0, 0) != R1_IDLE_STATE) {
hepta2ume 1:890188e041da 164 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
hepta2ume 1:890188e041da 165 return SDCARD_FAIL;
hepta2ume 1:890188e041da 166 }
hepta2ume 1:890188e041da 167
hepta2ume 1:890188e041da 168 // send CMD8 to determine whther it is ver 2.x
hepta2ume 1:890188e041da 169 int r = _cmd8();
hepta2ume 1:890188e041da 170 if(r == R1_IDLE_STATE) {
hepta2ume 1:890188e041da 171 return initialise_card_v2();
hepta2ume 1:890188e041da 172 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
hepta2ume 1:890188e041da 173 return initialise_card_v1();
hepta2ume 1:890188e041da 174 } else {
hepta2ume 1:890188e041da 175 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
hepta2ume 1:890188e041da 176 return SDCARD_FAIL;
hepta2ume 1:890188e041da 177 }
hepta2ume 1:890188e041da 178 }
hepta2ume 1:890188e041da 179
hepta2ume 1:890188e041da 180 int SDFileSystem::initialise_card_v1() {
hepta2ume 1:890188e041da 181 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
hepta2ume 1:890188e041da 182 _cmd(55, 0);
hepta2ume 1:890188e041da 183 if(_cmd(41, 0) == 0) {
hepta2ume 1:890188e041da 184 cdv = 512;
hepta2ume 1:890188e041da 185 #ifdef DEBUG
hepta2ume 1:890188e041da 186 printf("\n\rInit: SEDCARD_V1\n\r");
hepta2ume 1:890188e041da 187 #endif
hepta2ume 1:890188e041da 188 return SDCARD_V1;
hepta2ume 1:890188e041da 189 }
hepta2ume 1:890188e041da 190 }
hepta2ume 1:890188e041da 191
hepta2ume 1:890188e041da 192 fprintf(stderr, "Timeout waiting for v1.x card\n");
hepta2ume 1:890188e041da 193 return SDCARD_FAIL;
hepta2ume 1:890188e041da 194 }
hepta2ume 1:890188e041da 195
hepta2ume 1:890188e041da 196 int SDFileSystem::initialise_card_v2() {
hepta2ume 1:890188e041da 197
hepta2ume 1:890188e041da 198 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
hepta2ume 1:890188e041da 199 wait_ms(50);
hepta2ume 1:890188e041da 200 _cmd58();
hepta2ume 1:890188e041da 201 _cmd(55, 0);
hepta2ume 1:890188e041da 202 if(_cmd(41, 0x40000000) == 0) {
hepta2ume 1:890188e041da 203 _cmd58();
hepta2ume 1:890188e041da 204 #ifdef DEBUG
hepta2ume 1:890188e041da 205 printf("\n\rInit: SDCARD_V2\n\r");
hepta2ume 1:890188e041da 206 #endif
hepta2ume 1:890188e041da 207 cdv = 1;
hepta2ume 1:890188e041da 208 return SDCARD_V2;
hepta2ume 1:890188e041da 209 }
hepta2ume 1:890188e041da 210 }
hepta2ume 1:890188e041da 211
hepta2ume 1:890188e041da 212 fprintf(stderr, "Timeout waiting for v2.x card\n");
hepta2ume 1:890188e041da 213 return SDCARD_FAIL;
hepta2ume 1:890188e041da 214 }
hepta2ume 1:890188e041da 215
hepta2ume 1:890188e041da 216 int SDFileSystem::disk_initialize() {
hepta2ume 1:890188e041da 217
hepta2ume 1:890188e041da 218 int i = initialise_card();
hepta2ume 1:890188e041da 219 #ifdef DEBUG
hepta2ume 1:890188e041da 220 printf("init card = %d\n", i);
hepta2ume 1:890188e041da 221 #endif
hepta2ume 1:890188e041da 222 _sectors = _sd_sectors();
hepta2ume 1:890188e041da 223
hepta2ume 1:890188e041da 224 // Set block length to 512 (CMD16)
hepta2ume 1:890188e041da 225 if(_cmd(16, 512) != 0) {
hepta2ume 1:890188e041da 226 fprintf(stderr, "Set 512-byte block timed out\n");
hepta2ume 1:890188e041da 227 return 1;
hepta2ume 1:890188e041da 228 }
hepta2ume 1:890188e041da 229
hepta2ume 1:890188e041da 230 _spi.frequency(1000000); // Set to 1MHz for data transfer
hepta2ume 1:890188e041da 231 return 0;
hepta2ume 1:890188e041da 232 }
hepta2ume 1:890188e041da 233
hepta2ume 1:890188e041da 234 int SDFileSystem::disk_write(const char *buffer, int block_number) {
hepta2ume 1:890188e041da 235 // set write address for single block (CMD24)
hepta2ume 1:890188e041da 236 if(_cmd(24, block_number * cdv) != 0) {
hepta2ume 1:890188e041da 237 return 1;
hepta2ume 1:890188e041da 238 }
hepta2ume 1:890188e041da 239
hepta2ume 1:890188e041da 240 // send the data block
hepta2ume 1:890188e041da 241 _write(buffer, 512);
hepta2ume 1:890188e041da 242 return 0;
hepta2ume 1:890188e041da 243 }
hepta2ume 1:890188e041da 244
hepta2ume 1:890188e041da 245 int SDFileSystem::disk_read(char *buffer, int block_number) {
hepta2ume 1:890188e041da 246 // set read address for single block (CMD17)
hepta2ume 1:890188e041da 247 if(_cmd(17, block_number * cdv) != 0) {
hepta2ume 1:890188e041da 248 return 1;
hepta2ume 1:890188e041da 249 }
hepta2ume 1:890188e041da 250
hepta2ume 1:890188e041da 251 // receive the data
hepta2ume 1:890188e041da 252 _read(buffer, 512);
hepta2ume 1:890188e041da 253 return 0;
hepta2ume 1:890188e041da 254 }
hepta2ume 1:890188e041da 255
hepta2ume 1:890188e041da 256 int SDFileSystem::disk_status() { return 0; }
hepta2ume 1:890188e041da 257 int SDFileSystem::disk_sync() { return 0; }
hepta2ume 1:890188e041da 258 int SDFileSystem::disk_sectors() { return _sectors; }
hepta2ume 1:890188e041da 259
hepta2ume 1:890188e041da 260 // PRIVATE FUNCTIONS
hepta2ume 1:890188e041da 261
hepta2ume 1:890188e041da 262 int SDFileSystem::_cmd(int cmd, int arg) {
hepta2ume 1:890188e041da 263 _cs = 0;
hepta2ume 1:890188e041da 264
hepta2ume 1:890188e041da 265 // send a command
hepta2ume 1:890188e041da 266 _spi.write(0x40 | cmd);
hepta2ume 1:890188e041da 267 _spi.write(arg >> 24);
hepta2ume 1:890188e041da 268 _spi.write(arg >> 16);
hepta2ume 1:890188e041da 269 _spi.write(arg >> 8);
hepta2ume 1:890188e041da 270 _spi.write(arg >> 0);
hepta2ume 1:890188e041da 271 _spi.write(0x95);
hepta2ume 1:890188e041da 272
hepta2ume 1:890188e041da 273 // wait for the repsonse (response[7] == 0)
hepta2ume 1:890188e041da 274 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
hepta2ume 1:890188e041da 275 int response = _spi.write(0xFF);
hepta2ume 1:890188e041da 276 if(!(response & 0x80)) {
hepta2ume 1:890188e041da 277 _cs = 1;
hepta2ume 1:890188e041da 278 _spi.write(0xFF);
hepta2ume 1:890188e041da 279 return response;
hepta2ume 1:890188e041da 280 }
hepta2ume 1:890188e041da 281 }
hepta2ume 1:890188e041da 282 _cs = 1;
hepta2ume 1:890188e041da 283 _spi.write(0xFF);
hepta2ume 1:890188e041da 284 return -1; // timeout
hepta2ume 1:890188e041da 285 }
hepta2ume 1:890188e041da 286 int SDFileSystem::_cmdx(int cmd, int arg) {
hepta2ume 1:890188e041da 287 _cs = 0;
hepta2ume 1:890188e041da 288
hepta2ume 1:890188e041da 289 // send a command
hepta2ume 1:890188e041da 290 _spi.write(0x40 | cmd);
hepta2ume 1:890188e041da 291 _spi.write(arg >> 24);
hepta2ume 1:890188e041da 292 _spi.write(arg >> 16);
hepta2ume 1:890188e041da 293 _spi.write(arg >> 8);
hepta2ume 1:890188e041da 294 _spi.write(arg >> 0);
hepta2ume 1:890188e041da 295 _spi.write(0x95);
hepta2ume 1:890188e041da 296
hepta2ume 1:890188e041da 297 // wait for the repsonse (response[7] == 0)
hepta2ume 1:890188e041da 298 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
hepta2ume 1:890188e041da 299 int response = _spi.write(0xFF);
hepta2ume 1:890188e041da 300 if(!(response & 0x80)) {
hepta2ume 1:890188e041da 301 return response;
hepta2ume 1:890188e041da 302 }
hepta2ume 1:890188e041da 303 }
hepta2ume 1:890188e041da 304 _cs = 1;
hepta2ume 1:890188e041da 305 _spi.write(0xFF);
hepta2ume 1:890188e041da 306 return -1; // timeout
hepta2ume 1:890188e041da 307 }
hepta2ume 1:890188e041da 308
hepta2ume 1:890188e041da 309
hepta2ume 1:890188e041da 310 int SDFileSystem::_cmd58() {
hepta2ume 1:890188e041da 311 _cs = 0;
hepta2ume 1:890188e041da 312 int arg = 0;
hepta2ume 1:890188e041da 313
hepta2ume 1:890188e041da 314 // send a command
hepta2ume 1:890188e041da 315 _spi.write(0x40 | 58);
hepta2ume 1:890188e041da 316 _spi.write(arg >> 24);
hepta2ume 1:890188e041da 317 _spi.write(arg >> 16);
hepta2ume 1:890188e041da 318 _spi.write(arg >> 8);
hepta2ume 1:890188e041da 319 _spi.write(arg >> 0);
hepta2ume 1:890188e041da 320 _spi.write(0x95);
hepta2ume 1:890188e041da 321
hepta2ume 1:890188e041da 322 // wait for the repsonse (response[7] == 0)
hepta2ume 1:890188e041da 323 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
hepta2ume 1:890188e041da 324 int response = _spi.write(0xFF);
hepta2ume 1:890188e041da 325 if(!(response & 0x80)) {
hepta2ume 1:890188e041da 326 int ocr = _spi.write(0xFF) << 24;
hepta2ume 1:890188e041da 327 ocr |= _spi.write(0xFF) << 16;
hepta2ume 1:890188e041da 328 ocr |= _spi.write(0xFF) << 8;
hepta2ume 1:890188e041da 329 ocr |= _spi.write(0xFF) << 0;
hepta2ume 1:890188e041da 330 // printf("OCR = 0x%08X\n", ocr);
hepta2ume 1:890188e041da 331 _cs = 1;
hepta2ume 1:890188e041da 332 _spi.write(0xFF);
hepta2ume 1:890188e041da 333 return response;
hepta2ume 1:890188e041da 334 }
hepta2ume 1:890188e041da 335 }
hepta2ume 1:890188e041da 336 _cs = 1;
hepta2ume 1:890188e041da 337 _spi.write(0xFF);
hepta2ume 1:890188e041da 338 return -1; // timeout
hepta2ume 1:890188e041da 339 }
hepta2ume 1:890188e041da 340
hepta2ume 1:890188e041da 341 int SDFileSystem::_cmd8() {
hepta2ume 1:890188e041da 342 _cs = 0;
hepta2ume 1:890188e041da 343
hepta2ume 1:890188e041da 344 // send a command
hepta2ume 1:890188e041da 345 _spi.write(0x40 | 8); // CMD8
hepta2ume 1:890188e041da 346 _spi.write(0x00); // reserved
hepta2ume 1:890188e041da 347 _spi.write(0x00); // reserved
hepta2ume 1:890188e041da 348 _spi.write(0x01); // 3.3v
hepta2ume 1:890188e041da 349 _spi.write(0xAA); // check pattern
hepta2ume 1:890188e041da 350 _spi.write(0x87); // crc
hepta2ume 1:890188e041da 351
hepta2ume 1:890188e041da 352 // wait for the repsonse (response[7] == 0)
hepta2ume 1:890188e041da 353 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
hepta2ume 1:890188e041da 354 char response[5];
hepta2ume 1:890188e041da 355 response[0] = _spi.write(0xFF);
hepta2ume 1:890188e041da 356 if(!(response[0] & 0x80)) {
hepta2ume 1:890188e041da 357 for(int j=1; j<5; j++) {
hepta2ume 1:890188e041da 358 response[i] = _spi.write(0xFF);
hepta2ume 1:890188e041da 359 }
hepta2ume 1:890188e041da 360 _cs = 1;
hepta2ume 1:890188e041da 361 _spi.write(0xFF);
hepta2ume 1:890188e041da 362 return response[0];
hepta2ume 1:890188e041da 363 }
hepta2ume 1:890188e041da 364 }
hepta2ume 1:890188e041da 365 _cs = 1;
hepta2ume 1:890188e041da 366 _spi.write(0xFF);
hepta2ume 1:890188e041da 367 return -1; // timeout
hepta2ume 1:890188e041da 368 }
hepta2ume 1:890188e041da 369
hepta2ume 1:890188e041da 370 int SDFileSystem::_read(char *buffer, int length) {
hepta2ume 1:890188e041da 371 _cs = 0;
hepta2ume 1:890188e041da 372
hepta2ume 1:890188e041da 373 // read until start byte (0xFF)
hepta2ume 1:890188e041da 374 while(_spi.write(0xFF) != 0xFE);
hepta2ume 1:890188e041da 375
hepta2ume 1:890188e041da 376 // read data
hepta2ume 1:890188e041da 377 for(int i=0; i<length; i++) {
hepta2ume 1:890188e041da 378 buffer[i] = _spi.write(0xFF);
hepta2ume 1:890188e041da 379 }
hepta2ume 1:890188e041da 380 _spi.write(0xFF); // checksum
hepta2ume 1:890188e041da 381 _spi.write(0xFF);
hepta2ume 1:890188e041da 382
hepta2ume 1:890188e041da 383 _cs = 1;
hepta2ume 1:890188e041da 384 _spi.write(0xFF);
hepta2ume 1:890188e041da 385 return 0;
hepta2ume 1:890188e041da 386 }
hepta2ume 1:890188e041da 387
hepta2ume 1:890188e041da 388 int SDFileSystem::_write(const char *buffer, int length) {
hepta2ume 1:890188e041da 389 _cs = 0;
hepta2ume 1:890188e041da 390
hepta2ume 1:890188e041da 391 // indicate start of block
hepta2ume 1:890188e041da 392 _spi.write(0xFE);
hepta2ume 1:890188e041da 393
hepta2ume 1:890188e041da 394 // write the data
hepta2ume 1:890188e041da 395 for(int i=0; i<length; i++) {
hepta2ume 1:890188e041da 396 _spi.write(buffer[i]);
hepta2ume 1:890188e041da 397 }
hepta2ume 1:890188e041da 398
hepta2ume 1:890188e041da 399 // write the checksum
hepta2ume 1:890188e041da 400 _spi.write(0xFF);
hepta2ume 1:890188e041da 401 _spi.write(0xFF);
hepta2ume 1:890188e041da 402
hepta2ume 1:890188e041da 403 // check the repsonse token
hepta2ume 1:890188e041da 404 if((_spi.write(0xFF) & 0x1F) != 0x05) {
hepta2ume 1:890188e041da 405 _cs = 1;
hepta2ume 1:890188e041da 406 _spi.write(0xFF);
hepta2ume 1:890188e041da 407 return 1;
hepta2ume 1:890188e041da 408 }
hepta2ume 1:890188e041da 409
hepta2ume 1:890188e041da 410 // wait for write to finish
hepta2ume 1:890188e041da 411 while(_spi.write(0xFF) == 0);
hepta2ume 1:890188e041da 412
hepta2ume 1:890188e041da 413 _cs = 1;
hepta2ume 1:890188e041da 414 _spi.write(0xFF);
hepta2ume 1:890188e041da 415 return 0;
hepta2ume 1:890188e041da 416 }
hepta2ume 1:890188e041da 417
hepta2ume 1:890188e041da 418 static int ext_bits(char *data, int msb, int lsb) {
hepta2ume 1:890188e041da 419 int bits = 0;
hepta2ume 1:890188e041da 420 int size = 1 + msb - lsb;
hepta2ume 1:890188e041da 421 for(int i=0; i<size; i++) {
hepta2ume 1:890188e041da 422 int position = lsb + i;
hepta2ume 1:890188e041da 423 int byte = 15 - (position >> 3);
hepta2ume 1:890188e041da 424 int bit = position & 0x7;
hepta2ume 1:890188e041da 425 int value = (data[byte] >> bit) & 1;
hepta2ume 1:890188e041da 426 bits |= value << i;
hepta2ume 1:890188e041da 427 }
hepta2ume 1:890188e041da 428 return bits;
hepta2ume 1:890188e041da 429 }
hepta2ume 1:890188e041da 430
hepta2ume 1:890188e041da 431 int SDFileSystem::_sd_sectors() {
hepta2ume 1:890188e041da 432
hepta2ume 1:890188e041da 433 int c_size, c_size_mult, read_bl_len;
hepta2ume 1:890188e041da 434 int block_len, mult, blocknr, capacity;
hepta2ume 1:890188e041da 435 int blocks, hc_c_size;
hepta2ume 1:890188e041da 436 uint64_t hc_capacity;
hepta2ume 1:890188e041da 437
hepta2ume 1:890188e041da 438 // CMD9, Response R2 (R1 byte + 16-byte block read)
hepta2ume 1:890188e041da 439 if(_cmdx(9, 0) != 0) {
hepta2ume 1:890188e041da 440 fprintf(stderr, "Didn't get a response from the disk\n");
hepta2ume 1:890188e041da 441 return 0;
hepta2ume 1:890188e041da 442 }
hepta2ume 1:890188e041da 443
hepta2ume 1:890188e041da 444 char csd[16];
hepta2ume 1:890188e041da 445 if(_read(csd, 16) != 0) {
hepta2ume 1:890188e041da 446 fprintf(stderr, "Couldn't read csd response from disk\n");
hepta2ume 1:890188e041da 447 return 0;
hepta2ume 1:890188e041da 448 }
hepta2ume 1:890188e041da 449
hepta2ume 1:890188e041da 450 // csd_structure : csd[127:126]
hepta2ume 1:890188e041da 451 // c_size : csd[73:62]
hepta2ume 1:890188e041da 452 // c_size_mult : csd[49:47]
hepta2ume 1:890188e041da 453 // read_bl_len : csd[83:80] - the *maximum* read block length
hepta2ume 1:890188e041da 454
hepta2ume 1:890188e041da 455 int csd_structure = ext_bits(csd, 127, 126);
hepta2ume 1:890188e041da 456
hepta2ume 1:890188e041da 457 #ifdef DEBUG
hepta2ume 1:890188e041da 458 printf("\n\rCSD_STRUCT = %d\n", csd_structure);
hepta2ume 1:890188e041da 459 #endif
hepta2ume 1:890188e041da 460
hepta2ume 1:890188e041da 461 switch (csd_structure){
hepta2ume 1:890188e041da 462 case 0:
hepta2ume 1:890188e041da 463 cdv = 512;
hepta2ume 1:890188e041da 464 c_size = ext_bits(csd, 73, 62);
hepta2ume 1:890188e041da 465 c_size_mult = ext_bits(csd, 49, 47);
hepta2ume 1:890188e041da 466 read_bl_len = ext_bits(csd, 83, 80);
hepta2ume 1:890188e041da 467
hepta2ume 1:890188e041da 468 block_len = 1 << read_bl_len;
hepta2ume 1:890188e041da 469 mult = 1 << (c_size_mult + 2);
hepta2ume 1:890188e041da 470 blocknr = (c_size + 1) * mult;
hepta2ume 1:890188e041da 471 capacity = blocknr * block_len;
hepta2ume 1:890188e041da 472 blocks = capacity / 512;
hepta2ume 1:890188e041da 473 #ifdef DEBUG
hepta2ume 1:890188e041da 474 printf("\n\rSDCard\n\rc_size: %.4X \n\rcapacity: %.ld \n\rsectors: %d\n\r", c_size, capacity, blocks);
hepta2ume 1:890188e041da 475 #endif
hepta2ume 1:890188e041da 476 break;
hepta2ume 1:890188e041da 477
hepta2ume 1:890188e041da 478 case 1:
hepta2ume 1:890188e041da 479 cdv = 1;
hepta2ume 1:890188e041da 480 hc_c_size = ext_bits(csd, 63, 48);
hepta2ume 1:890188e041da 481 int hc_read_bl_len = ext_bits(csd, 83, 80);
hepta2ume 1:890188e041da 482 hc_capacity = hc_c_size+1;
hepta2ume 1:890188e041da 483 blocks = (hc_c_size+1)*1024;
hepta2ume 1:890188e041da 484 #ifdef DEBUG
hepta2ume 1:890188e041da 485 printf("\n\rSDHC Card \n\rhc_c_size: %.4X \n\rcapacity: %.lld \n\rsectors: %d\n\r", hc_c_size, hc_capacity*512*1024, blocks);
hepta2ume 1:890188e041da 486 #endif
hepta2ume 1:890188e041da 487 break;
hepta2ume 1:890188e041da 488
hepta2ume 1:890188e041da 489 default:
hepta2ume 1:890188e041da 490 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
hepta2ume 1:890188e041da 491 return 0;
hepta2ume 1:890188e041da 492 break;
hepta2ume 1:890188e041da 493 };
hepta2ume 1:890188e041da 494 return blocks;
hepta2ume 1:890188e041da 495 }