Henrique Rosa
/
ILI9341_01_PAR8_Teste_V3
Testanto funções Display
MCUFRIEND_kbv/MCUFRIEND_kbv.cpp@4:2d8f54d22dbd, 2021-04-27 (annotated)
- Committer:
- henriquer
- Date:
- Tue Apr 27 21:18:52 2021 +0000
- Revision:
- 4:2d8f54d22dbd
- Parent:
- 1:a5ccd53612ea
Escrevendo um sinal analogico ( Seno e Cosseno) no display TFT
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
silviosz | 1:a5ccd53612ea | 1 | // link: |
silviosz | 1:a5ccd53612ea | 2 | // https://os.mbed.com/users/davidprentice/code/Nucleo_dir_L152//file/d88d2ad55fac/main.cpp/ |
silviosz | 1:a5ccd53612ea | 3 | // Committer: davidprentice |
silviosz | 1:a5ccd53612ea | 4 | // Date: 19 months ago |
silviosz | 1:a5ccd53612ea | 5 | // 2021-04-21 |
silviosz | 1:a5ccd53612ea | 6 | // |
silviosz | 1:a5ccd53612ea | 7 | // MCUFRIEND_kbv.cpp |
silviosz | 1:a5ccd53612ea | 8 | // |
silviosz | 1:a5ccd53612ea | 9 | |
silviosz | 1:a5ccd53612ea | 10 | //#define SUPPORT_0139 //S6D0139 +280 bytes |
silviosz | 1:a5ccd53612ea | 11 | #define SUPPORT_0154 //S6D0154 +320 bytes |
silviosz | 1:a5ccd53612ea | 12 | //#define SUPPORT_1289 //SSD1289,SSD1297 (ID=0x9797) +626 bytes, 0.03s |
silviosz | 1:a5ccd53612ea | 13 | //#define SUPPORT_1580 //R61580 Untested |
silviosz | 1:a5ccd53612ea | 14 | #define SUPPORT_1963 //only works with 16BIT bus anyway |
silviosz | 1:a5ccd53612ea | 15 | //#define SUPPORT_4532 //LGDP4532 +120 bytes. thanks Leodino |
silviosz | 1:a5ccd53612ea | 16 | #define SUPPORT_4535 //LGDP4535 +180 bytes |
silviosz | 1:a5ccd53612ea | 17 | #define SUPPORT_68140 //RM68140 +52 bytes defaults to PIXFMT=0x55 |
silviosz | 1:a5ccd53612ea | 18 | //#define SUPPORT_7735 |
silviosz | 1:a5ccd53612ea | 19 | #define SUPPORT_7781 //ST7781 +172 bytes |
silviosz | 1:a5ccd53612ea | 20 | //#define SUPPORT_8230 //UC8230 +118 bytes |
silviosz | 1:a5ccd53612ea | 21 | //#define SUPPORT_8347D //HX8347-D, HX8347-G, HX8347-I, HX8367-A +520 bytes, 0.27s |
silviosz | 1:a5ccd53612ea | 22 | //#define SUPPORT_8347A //HX8347-A +500 bytes, 0.27s |
silviosz | 1:a5ccd53612ea | 23 | //#define SUPPORT_8352A //HX8352A +486 bytes, 0.27s |
silviosz | 1:a5ccd53612ea | 24 | //#define SUPPORT_8352B //HX8352B |
silviosz | 1:a5ccd53612ea | 25 | //#define SUPPORT_8357D_GAMMA //monster 34 byte |
silviosz | 1:a5ccd53612ea | 26 | //#define SUPPORT_9163 // |
silviosz | 1:a5ccd53612ea | 27 | //#define SUPPORT_9225 //ILI9225-B, ILI9225-G ID=0x9225, ID=0x9226, ID=0x6813 +380 bytes |
silviosz | 1:a5ccd53612ea | 28 | //#define SUPPORT_9326_5420 //ILI9326, SPFD5420 +246 bytes |
silviosz | 1:a5ccd53612ea | 29 | //#define SUPPORT_9342 //costs +114 bytes |
silviosz | 1:a5ccd53612ea | 30 | //#define SUPPORT_9806 //UNTESTED |
silviosz | 1:a5ccd53612ea | 31 | #define SUPPORT_9488_555 //costs +230 bytes, 0.03s / 0.19s |
silviosz | 1:a5ccd53612ea | 32 | #define SUPPORT_B509_7793 //R61509, ST7793 +244 bytes |
silviosz | 1:a5ccd53612ea | 33 | #define OFFSET_9327 32 //costs about 103 bytes, 0.08s |
silviosz | 1:a5ccd53612ea | 34 | |
silviosz | 1:a5ccd53612ea | 35 | #include "MCUFRIEND_kbv.h" |
silviosz | 1:a5ccd53612ea | 36 | #if defined(USE_SERIAL) |
silviosz | 1:a5ccd53612ea | 37 | #include "utility/mcufriend_serial.h" |
silviosz | 1:a5ccd53612ea | 38 | //uint8_t running; |
silviosz | 1:a5ccd53612ea | 39 | #elif defined(__MBED__) |
silviosz | 1:a5ccd53612ea | 40 | #include "utility/mcufriend_mbed.h" |
silviosz | 1:a5ccd53612ea | 41 | #elif defined(__CC_ARM) || defined(__CROSSWORKS_ARM) |
silviosz | 1:a5ccd53612ea | 42 | #include "utility/mcufriend_keil.h" |
silviosz | 1:a5ccd53612ea | 43 | #else |
silviosz | 1:a5ccd53612ea | 44 | #include "utility/mcufriend_shield.h" |
silviosz | 1:a5ccd53612ea | 45 | #endif |
silviosz | 1:a5ccd53612ea | 46 | |
silviosz | 1:a5ccd53612ea | 47 | #define MIPI_DCS_REV1 (1<<0) |
silviosz | 1:a5ccd53612ea | 48 | #define AUTO_READINC (1<<1) |
silviosz | 1:a5ccd53612ea | 49 | #define READ_BGR (1<<2) |
silviosz | 1:a5ccd53612ea | 50 | #define READ_LOWHIGH (1<<3) |
silviosz | 1:a5ccd53612ea | 51 | #define READ_24BITS (1<<4) |
silviosz | 1:a5ccd53612ea | 52 | #define XSA_XEA_16BIT (1<<5) |
silviosz | 1:a5ccd53612ea | 53 | #define READ_NODUMMY (1<<6) |
silviosz | 1:a5ccd53612ea | 54 | #define INVERT_GS (1<<8) |
silviosz | 1:a5ccd53612ea | 55 | #define INVERT_SS (1<<9) |
silviosz | 1:a5ccd53612ea | 56 | #define MV_AXIS (1<<10) |
silviosz | 1:a5ccd53612ea | 57 | #define INVERT_RGB (1<<11) |
silviosz | 1:a5ccd53612ea | 58 | #define REV_SCREEN (1<<12) |
silviosz | 1:a5ccd53612ea | 59 | #define FLIP_VERT (1<<13) |
silviosz | 1:a5ccd53612ea | 60 | #define FLIP_HORIZ (1<<14) |
silviosz | 1:a5ccd53612ea | 61 | |
silviosz | 1:a5ccd53612ea | 62 | #if (defined(USES_16BIT_BUS)) //only comes from SPECIALs |
silviosz | 1:a5ccd53612ea | 63 | #define USING_16BIT_BUS 1 |
silviosz | 1:a5ccd53612ea | 64 | #else |
silviosz | 1:a5ccd53612ea | 65 | #define USING_16BIT_BUS 0 |
silviosz | 1:a5ccd53612ea | 66 | #endif |
silviosz | 1:a5ccd53612ea | 67 | |
silviosz | 1:a5ccd53612ea | 68 | MCUFRIEND_kbv::MCUFRIEND_kbv(int CS, int RS, int WR, int RD, int _RST):Adafruit_GFX(240, 320) |
silviosz | 1:a5ccd53612ea | 69 | { |
silviosz | 1:a5ccd53612ea | 70 | // we can not access GPIO pins until AHB has been enabled. |
silviosz | 1:a5ccd53612ea | 71 | } |
silviosz | 1:a5ccd53612ea | 72 | |
silviosz | 1:a5ccd53612ea | 73 | static uint8_t done_reset, is8347, is555, is9797; |
silviosz | 1:a5ccd53612ea | 74 | static uint16_t color565_to_555(uint16_t color) { |
silviosz | 1:a5ccd53612ea | 75 | return (color & 0xFFC0) | ((color & 0x1F) << 1) | ((color & 0x01)); //lose Green LSB, extend Blue LSB |
silviosz | 1:a5ccd53612ea | 76 | } |
silviosz | 1:a5ccd53612ea | 77 | static uint16_t color555_to_565(uint16_t color) { |
silviosz | 1:a5ccd53612ea | 78 | return (color & 0xFFC0) | ((color & 0x0400) >> 5) | ((color & 0x3F) >> 1); //extend Green LSB |
silviosz | 1:a5ccd53612ea | 79 | } |
silviosz | 1:a5ccd53612ea | 80 | static uint8_t color565_to_r(uint16_t color) { |
silviosz | 1:a5ccd53612ea | 81 | return ((color & 0xF800) >> 8); // transform to rrrrrxxx |
silviosz | 1:a5ccd53612ea | 82 | } |
silviosz | 1:a5ccd53612ea | 83 | static uint8_t color565_to_g(uint16_t color) { |
silviosz | 1:a5ccd53612ea | 84 | return ((color & 0x07E0) >> 3); // transform to ggggggxx |
silviosz | 1:a5ccd53612ea | 85 | } |
silviosz | 1:a5ccd53612ea | 86 | static uint8_t color565_to_b(uint16_t color) { |
silviosz | 1:a5ccd53612ea | 87 | return ((color & 0x001F) << 3); // transform to bbbbbxxx |
silviosz | 1:a5ccd53612ea | 88 | } |
silviosz | 1:a5ccd53612ea | 89 | static void write24(uint16_t color) { |
silviosz | 1:a5ccd53612ea | 90 | uint8_t r = color565_to_r(color); |
silviosz | 1:a5ccd53612ea | 91 | uint8_t g = color565_to_g(color); |
silviosz | 1:a5ccd53612ea | 92 | uint8_t b = color565_to_b(color); |
silviosz | 1:a5ccd53612ea | 93 | write8(r); |
silviosz | 1:a5ccd53612ea | 94 | write8(g); |
silviosz | 1:a5ccd53612ea | 95 | write8(b); |
silviosz | 1:a5ccd53612ea | 96 | } |
silviosz | 1:a5ccd53612ea | 97 | |
silviosz | 1:a5ccd53612ea | 98 | void MCUFRIEND_kbv::reset(void) |
silviosz | 1:a5ccd53612ea | 99 | { |
silviosz | 1:a5ccd53612ea | 100 | done_reset = 1; |
silviosz | 1:a5ccd53612ea | 101 | setWriteDir(); |
silviosz | 1:a5ccd53612ea | 102 | CTL_INIT(); |
silviosz | 1:a5ccd53612ea | 103 | CS_IDLE; |
silviosz | 1:a5ccd53612ea | 104 | RD_IDLE; |
silviosz | 1:a5ccd53612ea | 105 | WR_IDLE; |
silviosz | 1:a5ccd53612ea | 106 | RESET_IDLE; |
silviosz | 1:a5ccd53612ea | 107 | delay(50); |
silviosz | 1:a5ccd53612ea | 108 | RESET_ACTIVE; |
silviosz | 1:a5ccd53612ea | 109 | delay(100); |
silviosz | 1:a5ccd53612ea | 110 | RESET_IDLE; |
silviosz | 1:a5ccd53612ea | 111 | delay(100); |
silviosz | 1:a5ccd53612ea | 112 | WriteCmdData(0xB0, 0x0000); //R61520 needs this to read ID |
silviosz | 1:a5ccd53612ea | 113 | } |
silviosz | 1:a5ccd53612ea | 114 | |
silviosz | 1:a5ccd53612ea | 115 | static void writecmddata(uint16_t cmd, uint16_t dat) |
silviosz | 1:a5ccd53612ea | 116 | { |
silviosz | 1:a5ccd53612ea | 117 | CS_ACTIVE; |
silviosz | 1:a5ccd53612ea | 118 | WriteCmd(cmd); |
silviosz | 1:a5ccd53612ea | 119 | WriteData(dat); |
silviosz | 1:a5ccd53612ea | 120 | CS_IDLE; |
silviosz | 1:a5ccd53612ea | 121 | } |
silviosz | 1:a5ccd53612ea | 122 | |
silviosz | 1:a5ccd53612ea | 123 | void MCUFRIEND_kbv::WriteCmdData(uint16_t cmd, uint16_t dat) { writecmddata(cmd, dat); } |
silviosz | 1:a5ccd53612ea | 124 | |
silviosz | 1:a5ccd53612ea | 125 | static void WriteCmdParamN(uint16_t cmd, int8_t N, uint8_t * block) |
silviosz | 1:a5ccd53612ea | 126 | { |
silviosz | 1:a5ccd53612ea | 127 | CS_ACTIVE; |
silviosz | 1:a5ccd53612ea | 128 | WriteCmd(cmd); |
silviosz | 1:a5ccd53612ea | 129 | while (N-- > 0) { |
silviosz | 1:a5ccd53612ea | 130 | uint8_t u8 = *block++; |
silviosz | 1:a5ccd53612ea | 131 | write8(u8); |
silviosz | 1:a5ccd53612ea | 132 | if (N && is8347) { |
silviosz | 1:a5ccd53612ea | 133 | cmd++; |
silviosz | 1:a5ccd53612ea | 134 | WriteCmd(cmd); |
silviosz | 1:a5ccd53612ea | 135 | } |
silviosz | 1:a5ccd53612ea | 136 | } |
silviosz | 1:a5ccd53612ea | 137 | CS_IDLE; |
silviosz | 1:a5ccd53612ea | 138 | } |
silviosz | 1:a5ccd53612ea | 139 | |
silviosz | 1:a5ccd53612ea | 140 | static inline void WriteCmdParam4(uint8_t cmd, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4) |
silviosz | 1:a5ccd53612ea | 141 | { |
silviosz | 1:a5ccd53612ea | 142 | uint8_t d[4]; |
silviosz | 1:a5ccd53612ea | 143 | d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4; |
silviosz | 1:a5ccd53612ea | 144 | WriteCmdParamN(cmd, 4, d); |
silviosz | 1:a5ccd53612ea | 145 | } |
silviosz | 1:a5ccd53612ea | 146 | |
silviosz | 1:a5ccd53612ea | 147 | //#define WriteCmdParam4(cmd, d1, d2, d3, d4) {uint8_t d[4];d[0] = d1, d[1] = d2, d[2] = d3, d[3] = d4;WriteCmdParamN(cmd, 4, d);} |
silviosz | 1:a5ccd53612ea | 148 | void MCUFRIEND_kbv::pushCommand(uint16_t cmd, uint8_t * block, int8_t N) { WriteCmdParamN(cmd, N, block); } |
silviosz | 1:a5ccd53612ea | 149 | |
silviosz | 1:a5ccd53612ea | 150 | static uint16_t read16bits(void) |
silviosz | 1:a5ccd53612ea | 151 | { |
silviosz | 1:a5ccd53612ea | 152 | uint16_t ret; |
silviosz | 1:a5ccd53612ea | 153 | uint8_t lo; |
silviosz | 1:a5ccd53612ea | 154 | #if USING_16BIT_BUS |
silviosz | 1:a5ccd53612ea | 155 | READ_16(ret); //single strobe to read whole bus |
silviosz | 1:a5ccd53612ea | 156 | if (ret > 255) //ID might say 0x00D3 |
silviosz | 1:a5ccd53612ea | 157 | return ret; |
silviosz | 1:a5ccd53612ea | 158 | #else |
silviosz | 1:a5ccd53612ea | 159 | READ_8(ret); |
silviosz | 1:a5ccd53612ea | 160 | #endif |
silviosz | 1:a5ccd53612ea | 161 | //all MIPI_DCS_REV1 style params are 8-bit |
silviosz | 1:a5ccd53612ea | 162 | READ_8(lo); |
silviosz | 1:a5ccd53612ea | 163 | return (ret << 8) | lo; |
silviosz | 1:a5ccd53612ea | 164 | } |
silviosz | 1:a5ccd53612ea | 165 | |
silviosz | 1:a5ccd53612ea | 166 | uint16_t MCUFRIEND_kbv::readReg(uint16_t reg, int8_t index) |
silviosz | 1:a5ccd53612ea | 167 | { |
silviosz | 1:a5ccd53612ea | 168 | uint16_t ret; |
silviosz | 1:a5ccd53612ea | 169 | uint8_t lo; |
silviosz | 1:a5ccd53612ea | 170 | if (!done_reset) |
silviosz | 1:a5ccd53612ea | 171 | reset(); |
silviosz | 1:a5ccd53612ea | 172 | CS_ACTIVE; |
silviosz | 1:a5ccd53612ea | 173 | WriteCmd(reg); |
silviosz | 1:a5ccd53612ea | 174 | setReadDir(); |
silviosz | 1:a5ccd53612ea | 175 | delay(1); //1us should be adequate |
silviosz | 1:a5ccd53612ea | 176 | // READ_16(ret); |
silviosz | 1:a5ccd53612ea | 177 | do { ret = read16bits(); }while (--index >= 0); //need to test with SSD1963 |
silviosz | 1:a5ccd53612ea | 178 | RD_IDLE; |
silviosz | 1:a5ccd53612ea | 179 | CS_IDLE; |
silviosz | 1:a5ccd53612ea | 180 | setWriteDir(); |
silviosz | 1:a5ccd53612ea | 181 | return ret; |
silviosz | 1:a5ccd53612ea | 182 | } |
silviosz | 1:a5ccd53612ea | 183 | |
silviosz | 1:a5ccd53612ea | 184 | uint32_t MCUFRIEND_kbv::readReg32(uint16_t reg) |
silviosz | 1:a5ccd53612ea | 185 | { |
silviosz | 1:a5ccd53612ea | 186 | uint16_t h = readReg(reg, 0); |
silviosz | 1:a5ccd53612ea | 187 | uint16_t l = readReg(reg, 1); |
silviosz | 1:a5ccd53612ea | 188 | return ((uint32_t) h << 16) | (l); |
silviosz | 1:a5ccd53612ea | 189 | } |
silviosz | 1:a5ccd53612ea | 190 | |
silviosz | 1:a5ccd53612ea | 191 | uint32_t MCUFRIEND_kbv::readReg40(uint16_t reg) |
silviosz | 1:a5ccd53612ea | 192 | { |
silviosz | 1:a5ccd53612ea | 193 | uint16_t h = readReg(reg, 0); |
silviosz | 1:a5ccd53612ea | 194 | uint16_t m = readReg(reg, 1); |
silviosz | 1:a5ccd53612ea | 195 | uint16_t l = readReg(reg, 2); |
silviosz | 1:a5ccd53612ea | 196 | return ((uint32_t) h << 24) | (m << 8) | (l >> 8); |
silviosz | 1:a5ccd53612ea | 197 | } |
silviosz | 1:a5ccd53612ea | 198 | |
silviosz | 1:a5ccd53612ea | 199 | uint16_t MCUFRIEND_kbv::readID(void) |
silviosz | 1:a5ccd53612ea | 200 | { |
silviosz | 1:a5ccd53612ea | 201 | uint16_t ret, ret2; |
silviosz | 1:a5ccd53612ea | 202 | uint8_t msb; |
silviosz | 1:a5ccd53612ea | 203 | ret = readReg(0); //forces a reset() if called before begin() |
silviosz | 1:a5ccd53612ea | 204 | if (ret == 0x5408) //the SPFD5408 fails the 0xD3D3 test. |
silviosz | 1:a5ccd53612ea | 205 | return 0x5408; |
silviosz | 1:a5ccd53612ea | 206 | if (ret == 0x5420) //the SPFD5420 fails the 0xD3D3 test. |
silviosz | 1:a5ccd53612ea | 207 | return 0x5420; |
silviosz | 1:a5ccd53612ea | 208 | if (ret == 0x8989) //SSD1289 is always 8989 |
silviosz | 1:a5ccd53612ea | 209 | return 0x1289; |
silviosz | 1:a5ccd53612ea | 210 | ret = readReg(0x67); //HX8347-A |
silviosz | 1:a5ccd53612ea | 211 | if (ret == 0x4747) |
silviosz | 1:a5ccd53612ea | 212 | return 0x8347; |
silviosz | 1:a5ccd53612ea | 213 | //#if defined(SUPPORT_1963) && USING_16BIT_BUS |
silviosz | 1:a5ccd53612ea | 214 | ret = readReg32(0xA1); //SSD1963: [01 57 61 01] |
silviosz | 1:a5ccd53612ea | 215 | if (ret == 0x6101) |
silviosz | 1:a5ccd53612ea | 216 | return 0x1963; |
silviosz | 1:a5ccd53612ea | 217 | if (ret == 0xFFFF) //R61526: [xx FF FF FF] |
silviosz | 1:a5ccd53612ea | 218 | return 0x1526; //subsequent begin() enables Command Access |
silviosz | 1:a5ccd53612ea | 219 | // if (ret == 0xFF00) //R61520: [xx FF FF 00] |
silviosz | 1:a5ccd53612ea | 220 | // return 0x1520; //subsequent begin() enables Command Access |
silviosz | 1:a5ccd53612ea | 221 | //#endif |
silviosz | 1:a5ccd53612ea | 222 | ret = readReg40(0xBF); |
silviosz | 1:a5ccd53612ea | 223 | if (ret == 0x8357) //HX8357B: [xx 01 62 83 57 FF] |
silviosz | 1:a5ccd53612ea | 224 | return 0x8357; |
silviosz | 1:a5ccd53612ea | 225 | if (ret == 0x9481) //ILI9481: [xx 02 04 94 81 FF] |
silviosz | 1:a5ccd53612ea | 226 | return 0x9481; |
silviosz | 1:a5ccd53612ea | 227 | if (ret == 0x1511) //?R61511: [xx 02 04 15 11] not tested yet |
silviosz | 1:a5ccd53612ea | 228 | return 0x1511; |
silviosz | 1:a5ccd53612ea | 229 | if (ret == 0x1520) //?R61520: [xx 01 22 15 20] |
silviosz | 1:a5ccd53612ea | 230 | return 0x1520; |
silviosz | 1:a5ccd53612ea | 231 | if (ret == 0x1526) //?R61526: [xx 01 22 15 26] |
silviosz | 1:a5ccd53612ea | 232 | return 0x1526; |
silviosz | 1:a5ccd53612ea | 233 | if (ret == 0x1581) //R61581: [xx 01 22 15 81] |
silviosz | 1:a5ccd53612ea | 234 | return 0x1581; |
silviosz | 1:a5ccd53612ea | 235 | if (ret == 0x1400) //?RM68140:[xx FF 68 14 00] not tested yet |
silviosz | 1:a5ccd53612ea | 236 | return 0x6814; |
silviosz | 1:a5ccd53612ea | 237 | ret = readReg32(0xD4); |
silviosz | 1:a5ccd53612ea | 238 | if (ret == 0x5310) //NT35310: [xx 01 53 10] |
silviosz | 1:a5ccd53612ea | 239 | return 0x5310; |
silviosz | 1:a5ccd53612ea | 240 | ret = readReg32(0xD7); |
silviosz | 1:a5ccd53612ea | 241 | if (ret == 0x8031) //weird unknown from BangGood [xx 20 80 31] PrinceCharles |
silviosz | 1:a5ccd53612ea | 242 | return 0x8031; |
silviosz | 1:a5ccd53612ea | 243 | ret = readReg40(0xEF); //ILI9327: [xx 02 04 93 27 FF] |
silviosz | 1:a5ccd53612ea | 244 | if (ret == 0x9327) |
silviosz | 1:a5ccd53612ea | 245 | return 0x9327; |
silviosz | 1:a5ccd53612ea | 246 | ret = readReg32(0xFE) >> 8; //weird unknown from BangGood [04 20 53] |
silviosz | 1:a5ccd53612ea | 247 | if (ret == 0x2053) |
silviosz | 1:a5ccd53612ea | 248 | return 0x2053; |
silviosz | 1:a5ccd53612ea | 249 | uint32_t ret32 = readReg32(0x04); |
silviosz | 1:a5ccd53612ea | 250 | msb = ret32 >> 16; |
silviosz | 1:a5ccd53612ea | 251 | ret = ret32; |
silviosz | 1:a5ccd53612ea | 252 | // if (msb = 0x38 && ret == 0x8000) //unknown [xx 38 80 00] with D3 = 0x1602 |
silviosz | 1:a5ccd53612ea | 253 | if (msb == 0x00 && ret == 0x8000) { //HX8357-D [xx 00 80 00] |
silviosz | 1:a5ccd53612ea | 254 | #if 1 |
silviosz | 1:a5ccd53612ea | 255 | uint8_t cmds[] = {0xFF, 0x83, 0x57}; |
silviosz | 1:a5ccd53612ea | 256 | pushCommand(0xB9, cmds, 3); |
silviosz | 1:a5ccd53612ea | 257 | msb = readReg(0xD0); |
silviosz | 1:a5ccd53612ea | 258 | if (msb == 0x99) return 0x0099; //HX8357-D from datasheet |
silviosz | 1:a5ccd53612ea | 259 | if (msb == 0x90) //HX8357-C undocumented |
silviosz | 1:a5ccd53612ea | 260 | #endif |
silviosz | 1:a5ccd53612ea | 261 | return 0x9090; //BIG CHANGE: HX8357-D was 0x8357 |
silviosz | 1:a5ccd53612ea | 262 | } |
silviosz | 1:a5ccd53612ea | 263 | // if (msb == 0xFF && ret == 0xFFFF) //R61526 [xx FF FF FF] |
silviosz | 1:a5ccd53612ea | 264 | // return 0x1526; //subsequent begin() enables Command Access |
silviosz | 1:a5ccd53612ea | 265 | if (ret == 0x1526) //R61526 [xx 06 15 26] if I have written NVM |
silviosz | 1:a5ccd53612ea | 266 | return 0x1526; //subsequent begin() enables Command Access |
silviosz | 1:a5ccd53612ea | 267 | if (ret == 0x89F0) //ST7735S: [xx 7C 89 F0] |
silviosz | 1:a5ccd53612ea | 268 | return 0x7735; |
silviosz | 1:a5ccd53612ea | 269 | if (ret == 0x8552) //ST7789V: [xx 85 85 52] |
silviosz | 1:a5ccd53612ea | 270 | return 0x7789; |
silviosz | 1:a5ccd53612ea | 271 | if (ret == 0xAC11) //?unknown [xx 61 AC 11] |
silviosz | 1:a5ccd53612ea | 272 | return 0xAC11; |
silviosz | 1:a5ccd53612ea | 273 | ret32 = readReg32(0xD3); //[xx 91 63 00] |
silviosz | 1:a5ccd53612ea | 274 | ret = ret32 >> 8; |
silviosz | 1:a5ccd53612ea | 275 | if (ret == 0x9163) return ret; |
silviosz | 1:a5ccd53612ea | 276 | ret = readReg32(0xD3); //for ILI9488, 9486, 9340, 9341 |
silviosz | 1:a5ccd53612ea | 277 | msb = ret >> 8; |
silviosz | 1:a5ccd53612ea | 278 | if (msb == 0x93 || msb == 0x94 || msb == 0x98 || msb == 0x77 || msb == 0x16) |
silviosz | 1:a5ccd53612ea | 279 | return ret; //0x9488, 9486, 9340, 9341, 7796 |
silviosz | 1:a5ccd53612ea | 280 | if (ret == 0x00D3 || ret == 0xD3D3) |
silviosz | 1:a5ccd53612ea | 281 | return ret; //16-bit write-only bus |
silviosz | 1:a5ccd53612ea | 282 | /* |
silviosz | 1:a5ccd53612ea | 283 | msb = 0x12; //read 3rd,4th byte. does not work in parallel |
silviosz | 1:a5ccd53612ea | 284 | pushCommand(0xD9, &msb, 1); |
silviosz | 1:a5ccd53612ea | 285 | ret2 = readReg(0xD3); |
silviosz | 1:a5ccd53612ea | 286 | msb = 0x13; |
silviosz | 1:a5ccd53612ea | 287 | pushCommand(0xD9, &msb, 1); |
silviosz | 1:a5ccd53612ea | 288 | ret = (ret2 << 8) | readReg(0xD3); |
silviosz | 1:a5ccd53612ea | 289 | // if (ret2 == 0x93) |
silviosz | 1:a5ccd53612ea | 290 | return ret2; |
silviosz | 1:a5ccd53612ea | 291 | */ |
silviosz | 1:a5ccd53612ea | 292 | return readReg(0); //0154, 7783, 9320, 9325, 9335, B505, B509 |
silviosz | 1:a5ccd53612ea | 293 | } |
silviosz | 1:a5ccd53612ea | 294 | |
silviosz | 1:a5ccd53612ea | 295 | // independent cursor and window registers. S6D0154, ST7781 increments. ILI92320/5 do not. |
silviosz | 1:a5ccd53612ea | 296 | int16_t MCUFRIEND_kbv::readGRAM(int16_t x, int16_t y, uint16_t * block, int16_t w, int16_t h) |
silviosz | 1:a5ccd53612ea | 297 | { |
silviosz | 1:a5ccd53612ea | 298 | uint16_t ret, dummy, _MR = _MW; |
silviosz | 1:a5ccd53612ea | 299 | int16_t n = w * h, row = 0, col = 0; |
silviosz | 1:a5ccd53612ea | 300 | uint8_t r, g, b, tmp; |
silviosz | 1:a5ccd53612ea | 301 | if (!is8347 && _lcd_capable & MIPI_DCS_REV1) // HX8347 uses same register |
silviosz | 1:a5ccd53612ea | 302 | _MR = 0x2E; |
silviosz | 1:a5ccd53612ea | 303 | if (_lcd_ID == 0x1602) _MR = 0x2E; |
silviosz | 1:a5ccd53612ea | 304 | setAddrWindow(x, y, x + w - 1, y + h - 1); |
silviosz | 1:a5ccd53612ea | 305 | while (n > 0) { |
silviosz | 1:a5ccd53612ea | 306 | if (!(_lcd_capable & MIPI_DCS_REV1)) { |
silviosz | 1:a5ccd53612ea | 307 | WriteCmdData(_MC, x + col); |
silviosz | 1:a5ccd53612ea | 308 | WriteCmdData(_MP, y + row); |
silviosz | 1:a5ccd53612ea | 309 | } |
silviosz | 1:a5ccd53612ea | 310 | CS_ACTIVE; |
silviosz | 1:a5ccd53612ea | 311 | WriteCmd(_MR); |
silviosz | 1:a5ccd53612ea | 312 | setReadDir(); |
silviosz | 1:a5ccd53612ea | 313 | if (_lcd_capable & READ_NODUMMY) { |
silviosz | 1:a5ccd53612ea | 314 | ; |
silviosz | 1:a5ccd53612ea | 315 | } else if ((_lcd_capable & MIPI_DCS_REV1) || _lcd_ID == 0x1289) { |
silviosz | 1:a5ccd53612ea | 316 | READ_8(r); |
silviosz | 1:a5ccd53612ea | 317 | } else { |
silviosz | 1:a5ccd53612ea | 318 | READ_16(dummy); |
silviosz | 1:a5ccd53612ea | 319 | } |
silviosz | 1:a5ccd53612ea | 320 | if (_lcd_ID == 0x1511) READ_8(r); //extra dummy for R61511 |
silviosz | 1:a5ccd53612ea | 321 | while (n) { |
silviosz | 1:a5ccd53612ea | 322 | if (_lcd_capable & READ_24BITS) { |
silviosz | 1:a5ccd53612ea | 323 | READ_8(r); |
silviosz | 1:a5ccd53612ea | 324 | READ_8(g); |
silviosz | 1:a5ccd53612ea | 325 | READ_8(b); |
silviosz | 1:a5ccd53612ea | 326 | if (_lcd_capable & READ_BGR) |
silviosz | 1:a5ccd53612ea | 327 | ret = color565(b, g, r); |
silviosz | 1:a5ccd53612ea | 328 | else |
silviosz | 1:a5ccd53612ea | 329 | ret = color565(r, g, b); |
silviosz | 1:a5ccd53612ea | 330 | } else { |
silviosz | 1:a5ccd53612ea | 331 | READ_16(ret); |
silviosz | 1:a5ccd53612ea | 332 | if (_lcd_capable & READ_LOWHIGH) |
silviosz | 1:a5ccd53612ea | 333 | ret = (ret >> 8) | (ret << 8); |
silviosz | 1:a5ccd53612ea | 334 | if (_lcd_capable & READ_BGR) |
silviosz | 1:a5ccd53612ea | 335 | ret = (ret & 0x07E0) | (ret >> 11) | (ret << 11); |
silviosz | 1:a5ccd53612ea | 336 | } |
silviosz | 1:a5ccd53612ea | 337 | #if defined(SUPPORT_9488_555) |
silviosz | 1:a5ccd53612ea | 338 | if (is555) ret = color555_to_565(ret); |
silviosz | 1:a5ccd53612ea | 339 | #endif |
silviosz | 1:a5ccd53612ea | 340 | *block++ = ret; |
silviosz | 1:a5ccd53612ea | 341 | n--; |
silviosz | 1:a5ccd53612ea | 342 | if (!(_lcd_capable & AUTO_READINC)) |
silviosz | 1:a5ccd53612ea | 343 | break; |
silviosz | 1:a5ccd53612ea | 344 | } |
silviosz | 1:a5ccd53612ea | 345 | if (++col >= w) { |
silviosz | 1:a5ccd53612ea | 346 | col = 0; |
silviosz | 1:a5ccd53612ea | 347 | if (++row >= h) |
silviosz | 1:a5ccd53612ea | 348 | row = 0; |
silviosz | 1:a5ccd53612ea | 349 | } |
silviosz | 1:a5ccd53612ea | 350 | RD_IDLE; |
silviosz | 1:a5ccd53612ea | 351 | CS_IDLE; |
silviosz | 1:a5ccd53612ea | 352 | setWriteDir(); |
silviosz | 1:a5ccd53612ea | 353 | } |
silviosz | 1:a5ccd53612ea | 354 | if (!(_lcd_capable & MIPI_DCS_REV1)) |
silviosz | 1:a5ccd53612ea | 355 | setAddrWindow(0, 0, width() - 1, height() - 1); |
silviosz | 1:a5ccd53612ea | 356 | return 0; |
silviosz | 1:a5ccd53612ea | 357 | } |
silviosz | 1:a5ccd53612ea | 358 | |
silviosz | 1:a5ccd53612ea | 359 | void MCUFRIEND_kbv::setRotation(uint8_t r) |
silviosz | 1:a5ccd53612ea | 360 | { |
silviosz | 1:a5ccd53612ea | 361 | uint16_t GS, SS_v, ORG, REV = _lcd_rev; |
silviosz | 1:a5ccd53612ea | 362 | uint8_t val, d[3]; |
silviosz | 1:a5ccd53612ea | 363 | rotation = r & 3; // just perform the operation ourselves on the protected variables |
silviosz | 1:a5ccd53612ea | 364 | _width = (rotation & 1) ? HEIGHT : WIDTH; |
silviosz | 1:a5ccd53612ea | 365 | _height = (rotation & 1) ? WIDTH : HEIGHT; |
silviosz | 1:a5ccd53612ea | 366 | switch (rotation) { |
silviosz | 1:a5ccd53612ea | 367 | case 0: //PORTRAIT: |
silviosz | 1:a5ccd53612ea | 368 | val = 0x48; //MY=0, MX=1, MV=0, ML=0, BGR=1 |
silviosz | 1:a5ccd53612ea | 369 | break; |
silviosz | 1:a5ccd53612ea | 370 | case 1: //LANDSCAPE: 90 degrees |
silviosz | 1:a5ccd53612ea | 371 | val = 0x28; //MY=0, MX=0, MV=1, ML=0, BGR=1 |
silviosz | 1:a5ccd53612ea | 372 | break; |
silviosz | 1:a5ccd53612ea | 373 | case 2: //PORTRAIT_REV: 180 degrees |
silviosz | 1:a5ccd53612ea | 374 | val = 0x98; //MY=1, MX=0, MV=0, ML=1, BGR=1 |
silviosz | 1:a5ccd53612ea | 375 | break; |
silviosz | 1:a5ccd53612ea | 376 | case 3: //LANDSCAPE_REV: 270 degrees |
silviosz | 1:a5ccd53612ea | 377 | val = 0xF8; //MY=1, MX=1, MV=1, ML=1, BGR=1 |
silviosz | 1:a5ccd53612ea | 378 | break; |
silviosz | 1:a5ccd53612ea | 379 | } |
silviosz | 1:a5ccd53612ea | 380 | if (_lcd_capable & INVERT_GS) |
silviosz | 1:a5ccd53612ea | 381 | val ^= 0x80; |
silviosz | 1:a5ccd53612ea | 382 | if (_lcd_capable & INVERT_SS) |
silviosz | 1:a5ccd53612ea | 383 | val ^= 0x40; |
silviosz | 1:a5ccd53612ea | 384 | if (_lcd_capable & INVERT_RGB) |
silviosz | 1:a5ccd53612ea | 385 | val ^= 0x08; |
silviosz | 1:a5ccd53612ea | 386 | if (_lcd_capable & MIPI_DCS_REV1) { |
silviosz | 1:a5ccd53612ea | 387 | if (_lcd_ID == 0x6814) { //.kbv my weird 0x9486 might be 68140 |
silviosz | 1:a5ccd53612ea | 388 | GS = (val & 0x80) ? (1 << 6) : 0; //MY |
silviosz | 1:a5ccd53612ea | 389 | SS_v = (val & 0x40) ? (1 << 5) : 0; //MX |
silviosz | 1:a5ccd53612ea | 390 | val &= 0x28; //keep MV, BGR, MY=0, MX=0, ML=0 |
silviosz | 1:a5ccd53612ea | 391 | d[0] = 0; |
silviosz | 1:a5ccd53612ea | 392 | d[1] = GS | SS_v | 0x02; //MY, MX |
silviosz | 1:a5ccd53612ea | 393 | d[2] = 0x3B; |
silviosz | 1:a5ccd53612ea | 394 | WriteCmdParamN(0xB6, 3, d); |
silviosz | 1:a5ccd53612ea | 395 | goto common_MC; |
silviosz | 1:a5ccd53612ea | 396 | } else if (_lcd_ID == 0x1963 || _lcd_ID == 0x9481 || _lcd_ID == 0x1511) { |
silviosz | 1:a5ccd53612ea | 397 | if (val & 0x80) |
silviosz | 1:a5ccd53612ea | 398 | val |= 0x01; //GS |
silviosz | 1:a5ccd53612ea | 399 | if ((val & 0x40)) |
silviosz | 1:a5ccd53612ea | 400 | val |= 0x02; //SS |
silviosz | 1:a5ccd53612ea | 401 | if (_lcd_ID == 0x1963) val &= ~0xC0; |
silviosz | 1:a5ccd53612ea | 402 | if (_lcd_ID == 0x9481) val &= ~0xD0; |
silviosz | 1:a5ccd53612ea | 403 | if (_lcd_ID == 0x1511) { |
silviosz | 1:a5ccd53612ea | 404 | val &= ~0x10; //remove ML |
silviosz | 1:a5ccd53612ea | 405 | val |= 0xC0; //force penguin 180 rotation |
silviosz | 1:a5ccd53612ea | 406 | } |
silviosz | 1:a5ccd53612ea | 407 | // val &= (_lcd_ID == 0x1963) ? ~0xC0 : ~0xD0; //MY=0, MX=0 with ML=0 for ILI9481 |
silviosz | 1:a5ccd53612ea | 408 | goto common_MC; |
silviosz | 1:a5ccd53612ea | 409 | } else if (is8347) { |
silviosz | 1:a5ccd53612ea | 410 | _MC = 0x02, _MP = 0x06, _MW = 0x22, _SC = 0x02, _EC = 0x04, _SP = 0x06, _EP = 0x08; |
silviosz | 1:a5ccd53612ea | 411 | if (_lcd_ID == 0x0065) { //HX8352-B |
silviosz | 1:a5ccd53612ea | 412 | val |= 0x01; //GS=1 |
silviosz | 1:a5ccd53612ea | 413 | if ((val & 0x10)) val ^= 0xD3; //(ML) flip MY, MX, ML, SS, GS |
silviosz | 1:a5ccd53612ea | 414 | if (r & 1) _MC = 0x82, _MP = 0x80; |
silviosz | 1:a5ccd53612ea | 415 | else _MC = 0x80, _MP = 0x82; |
silviosz | 1:a5ccd53612ea | 416 | } |
silviosz | 1:a5ccd53612ea | 417 | if (_lcd_ID == 0x5252) { //HX8352-A |
silviosz | 1:a5ccd53612ea | 418 | val |= 0x02; //VERT_SCROLLON |
silviosz | 1:a5ccd53612ea | 419 | if ((val & 0x10)) val ^= 0xD4; //(ML) flip MY, MX, SS. GS=1 |
silviosz | 1:a5ccd53612ea | 420 | } |
silviosz | 1:a5ccd53612ea | 421 | goto common_BGR; |
silviosz | 1:a5ccd53612ea | 422 | } |
silviosz | 1:a5ccd53612ea | 423 | common_MC: |
silviosz | 1:a5ccd53612ea | 424 | _MC = 0x2A, _MP = 0x2B, _MW = 0x2C, _SC = 0x2A, _EC = 0x2A, _SP = 0x2B, _EP = 0x2B; |
silviosz | 1:a5ccd53612ea | 425 | common_BGR: |
silviosz | 1:a5ccd53612ea | 426 | WriteCmdParamN(is8347 ? 0x16 : 0x36, 1, &val); |
silviosz | 1:a5ccd53612ea | 427 | _lcd_madctl = val; |
silviosz | 1:a5ccd53612ea | 428 | // if (_lcd_ID == 0x1963) WriteCmdParamN(0x13, 0, NULL); //NORMAL mode |
silviosz | 1:a5ccd53612ea | 429 | } |
silviosz | 1:a5ccd53612ea | 430 | // cope with 9320 variants |
silviosz | 1:a5ccd53612ea | 431 | else { |
silviosz | 1:a5ccd53612ea | 432 | switch (_lcd_ID) { |
silviosz | 1:a5ccd53612ea | 433 | #if defined(SUPPORT_9225) |
silviosz | 1:a5ccd53612ea | 434 | case 0x9225: |
silviosz | 1:a5ccd53612ea | 435 | _SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38; |
silviosz | 1:a5ccd53612ea | 436 | _MC = 0x20, _MP = 0x21, _MW = 0x22; |
silviosz | 1:a5ccd53612ea | 437 | GS = (val & 0x80) ? (1 << 9) : 0; |
silviosz | 1:a5ccd53612ea | 438 | SS_v = (val & 0x40) ? (1 << 8) : 0; |
silviosz | 1:a5ccd53612ea | 439 | WriteCmdData(0x01, GS | SS_v | 0x001C); // set Driver Output Control |
silviosz | 1:a5ccd53612ea | 440 | goto common_ORG; |
silviosz | 1:a5ccd53612ea | 441 | #endif |
silviosz | 1:a5ccd53612ea | 442 | #if defined(SUPPORT_0139) || defined(SUPPORT_0154) |
silviosz | 1:a5ccd53612ea | 443 | #ifdef SUPPORT_0139 |
silviosz | 1:a5ccd53612ea | 444 | case 0x0139: |
silviosz | 1:a5ccd53612ea | 445 | _SC = 0x46, _EC = 0x46, _SP = 0x48, _EP = 0x47; |
silviosz | 1:a5ccd53612ea | 446 | goto common_S6D; |
silviosz | 1:a5ccd53612ea | 447 | #endif |
silviosz | 1:a5ccd53612ea | 448 | #ifdef SUPPORT_0154 |
silviosz | 1:a5ccd53612ea | 449 | case 0x0154: |
silviosz | 1:a5ccd53612ea | 450 | _SC = 0x37, _EC = 0x36, _SP = 0x39, _EP = 0x38; |
silviosz | 1:a5ccd53612ea | 451 | goto common_S6D; |
silviosz | 1:a5ccd53612ea | 452 | #endif |
silviosz | 1:a5ccd53612ea | 453 | common_S6D: |
silviosz | 1:a5ccd53612ea | 454 | _MC = 0x20, _MP = 0x21, _MW = 0x22; |
silviosz | 1:a5ccd53612ea | 455 | GS = (val & 0x80) ? (1 << 9) : 0; |
silviosz | 1:a5ccd53612ea | 456 | SS_v = (val & 0x40) ? (1 << 8) : 0; |
silviosz | 1:a5ccd53612ea | 457 | // S6D0139 requires NL = 0x27, S6D0154 NL = 0x28 |
silviosz | 1:a5ccd53612ea | 458 | WriteCmdData(0x01, GS | SS_v | ((_lcd_ID == 0x0139) ? 0x27 : 0x28)); |
silviosz | 1:a5ccd53612ea | 459 | goto common_ORG; |
silviosz | 1:a5ccd53612ea | 460 | #endif |
silviosz | 1:a5ccd53612ea | 461 | case 0x5420: |
silviosz | 1:a5ccd53612ea | 462 | case 0x7793: |
silviosz | 1:a5ccd53612ea | 463 | case 0x9326: |
silviosz | 1:a5ccd53612ea | 464 | case 0xB509: |
silviosz | 1:a5ccd53612ea | 465 | _MC = 0x200, _MP = 0x201, _MW = 0x202, _SC = 0x210, _EC = 0x211, _SP = 0x212, _EP = 0x213; |
silviosz | 1:a5ccd53612ea | 466 | GS = (val & 0x80) ? (1 << 15) : 0; |
silviosz | 1:a5ccd53612ea | 467 | uint16_t NL; |
silviosz | 1:a5ccd53612ea | 468 | NL = ((432 / 8) - 1) << 9; |
silviosz | 1:a5ccd53612ea | 469 | if (_lcd_ID == 0x9326 || _lcd_ID == 0x5420) NL >>= 1; |
silviosz | 1:a5ccd53612ea | 470 | WriteCmdData(0x400, GS | NL); |
silviosz | 1:a5ccd53612ea | 471 | goto common_SS; |
silviosz | 1:a5ccd53612ea | 472 | default: |
silviosz | 1:a5ccd53612ea | 473 | _MC = 0x20, _MP = 0x21, _MW = 0x22, _SC = 0x50, _EC = 0x51, _SP = 0x52, _EP = 0x53; |
silviosz | 1:a5ccd53612ea | 474 | GS = (val & 0x80) ? (1 << 15) : 0; |
silviosz | 1:a5ccd53612ea | 475 | WriteCmdData(0x60, GS | 0x2700); // Gate Scan Line (0xA700) |
silviosz | 1:a5ccd53612ea | 476 | common_SS: |
silviosz | 1:a5ccd53612ea | 477 | SS_v = (val & 0x40) ? (1 << 8) : 0; |
silviosz | 1:a5ccd53612ea | 478 | WriteCmdData(0x01, SS_v); // set Driver Output Control |
silviosz | 1:a5ccd53612ea | 479 | common_ORG: |
silviosz | 1:a5ccd53612ea | 480 | ORG = (val & 0x20) ? (1 << 3) : 0; |
silviosz | 1:a5ccd53612ea | 481 | #ifdef SUPPORT_8230 |
silviosz | 1:a5ccd53612ea | 482 | if (_lcd_ID == 0x8230) { // UC8230 has strange BGR and READ_BGR behaviour |
silviosz | 1:a5ccd53612ea | 483 | if (rotation == 1 || rotation == 2) { |
silviosz | 1:a5ccd53612ea | 484 | val ^= 0x08; // change BGR bit for LANDSCAPE and PORTRAIT_REV |
silviosz | 1:a5ccd53612ea | 485 | } |
silviosz | 1:a5ccd53612ea | 486 | } |
silviosz | 1:a5ccd53612ea | 487 | #endif |
silviosz | 1:a5ccd53612ea | 488 | if (val & 0x08) |
silviosz | 1:a5ccd53612ea | 489 | ORG |= 0x1000; //BGR |
silviosz | 1:a5ccd53612ea | 490 | _lcd_madctl = ORG | 0x0030; |
silviosz | 1:a5ccd53612ea | 491 | WriteCmdData(0x03, _lcd_madctl); // set GRAM write direction and BGR=1. |
silviosz | 1:a5ccd53612ea | 492 | break; |
silviosz | 1:a5ccd53612ea | 493 | #ifdef SUPPORT_1289 |
silviosz | 1:a5ccd53612ea | 494 | case 0x1289: |
silviosz | 1:a5ccd53612ea | 495 | _MC = 0x4E, _MP = 0x4F, _MW = 0x22, _SC = 0x44, _EC = 0x44, _SP = 0x45, _EP = 0x46; |
silviosz | 1:a5ccd53612ea | 496 | if (rotation & 1) |
silviosz | 1:a5ccd53612ea | 497 | val ^= 0xD0; // exchange Landscape modes |
silviosz | 1:a5ccd53612ea | 498 | GS = (val & 0x80) ? (1 << 14) : 0; //called TB (top-bottom), CAD=0 |
silviosz | 1:a5ccd53612ea | 499 | SS_v = (val & 0x40) ? (1 << 9) : 0; //called RL (right-left) |
silviosz | 1:a5ccd53612ea | 500 | ORG = (val & 0x20) ? (1 << 3) : 0; //called AM |
silviosz | 1:a5ccd53612ea | 501 | _lcd_drivOut = GS | SS_v | (REV << 13) | 0x013F; //REV=0, BGR=0, MUX=319 |
silviosz | 1:a5ccd53612ea | 502 | if (val & 0x08) |
silviosz | 1:a5ccd53612ea | 503 | _lcd_drivOut |= 0x0800; //BGR |
silviosz | 1:a5ccd53612ea | 504 | WriteCmdData(0x01, _lcd_drivOut); // set Driver Output Control |
silviosz | 1:a5ccd53612ea | 505 | if (is9797) WriteCmdData(0x11, ORG | 0x4C30); else // DFM=2, DEN=1, WM=1, TY=0 |
silviosz | 1:a5ccd53612ea | 506 | WriteCmdData(0x11, ORG | 0x6070); // DFM=3, EN=0, TY=1 |
silviosz | 1:a5ccd53612ea | 507 | break; |
silviosz | 1:a5ccd53612ea | 508 | #endif |
silviosz | 1:a5ccd53612ea | 509 | } |
silviosz | 1:a5ccd53612ea | 510 | } |
silviosz | 1:a5ccd53612ea | 511 | if ((rotation & 1) && ((_lcd_capable & MV_AXIS) == 0)) { |
silviosz | 1:a5ccd53612ea | 512 | uint16_t x; |
silviosz | 1:a5ccd53612ea | 513 | x = _MC, _MC = _MP, _MP = x; |
silviosz | 1:a5ccd53612ea | 514 | x = _SC, _SC = _SP, _SP = x; //.kbv check 0139 |
silviosz | 1:a5ccd53612ea | 515 | x = _EC, _EC = _EP, _EP = x; //.kbv check 0139 |
silviosz | 1:a5ccd53612ea | 516 | } |
silviosz | 1:a5ccd53612ea | 517 | setAddrWindow(0, 0, width() - 1, height() - 1); |
silviosz | 1:a5ccd53612ea | 518 | vertScroll(0, HEIGHT, 0); //reset scrolling after a rotation |
silviosz | 1:a5ccd53612ea | 519 | } |
silviosz | 1:a5ccd53612ea | 520 | |
silviosz | 1:a5ccd53612ea | 521 | void MCUFRIEND_kbv::drawPixel(int16_t x, int16_t y, uint16_t color) |
silviosz | 1:a5ccd53612ea | 522 | { |
silviosz | 1:a5ccd53612ea | 523 | // MCUFRIEND just plots at edge if you try to write outside of the box: |
silviosz | 1:a5ccd53612ea | 524 | if (x < 0 || y < 0 || x >= width() || y >= height()) |
silviosz | 1:a5ccd53612ea | 525 | return; |
silviosz | 1:a5ccd53612ea | 526 | #if defined(SUPPORT_9488_555) |
silviosz | 1:a5ccd53612ea | 527 | if (is555) color = color565_to_555(color); |
silviosz | 1:a5ccd53612ea | 528 | #endif |
silviosz | 1:a5ccd53612ea | 529 | setAddrWindow(x, y, x, y); |
silviosz | 1:a5ccd53612ea | 530 | // CS_ACTIVE; WriteCmd(_MW); write16(color); CS_IDLE; //-0.01s +98B |
silviosz | 1:a5ccd53612ea | 531 | if (is9797) { CS_ACTIVE; WriteCmd(_MW); write24(color); CS_IDLE;} else |
silviosz | 1:a5ccd53612ea | 532 | WriteCmdData(_MW, color); |
silviosz | 1:a5ccd53612ea | 533 | } |
silviosz | 1:a5ccd53612ea | 534 | |
silviosz | 1:a5ccd53612ea | 535 | void MCUFRIEND_kbv::setAddrWindow(int16_t x, int16_t y, int16_t x1, int16_t y1) |
silviosz | 1:a5ccd53612ea | 536 | { |
silviosz | 1:a5ccd53612ea | 537 | #if defined(OFFSET_9327) |
silviosz | 1:a5ccd53612ea | 538 | if (_lcd_ID == 0x9327) { |
silviosz | 1:a5ccd53612ea | 539 | if (rotation == 2) y += OFFSET_9327, y1 += OFFSET_9327; |
silviosz | 1:a5ccd53612ea | 540 | if (rotation == 3) x += OFFSET_9327, x1 += OFFSET_9327; |
silviosz | 1:a5ccd53612ea | 541 | } |
silviosz | 1:a5ccd53612ea | 542 | #endif |
silviosz | 1:a5ccd53612ea | 543 | #if 1 |
silviosz | 1:a5ccd53612ea | 544 | if (_lcd_ID == 0x1526 && (rotation & 1)) { |
silviosz | 1:a5ccd53612ea | 545 | int16_t dx = x1 - x, dy = y1 - y; |
silviosz | 1:a5ccd53612ea | 546 | if (dy == 0) { y1++; } |
silviosz | 1:a5ccd53612ea | 547 | else if (dx == 0) { x1 += dy; y1 -= dy; } |
silviosz | 1:a5ccd53612ea | 548 | } |
silviosz | 1:a5ccd53612ea | 549 | #endif |
silviosz | 1:a5ccd53612ea | 550 | if (_lcd_capable & MIPI_DCS_REV1) { |
silviosz | 1:a5ccd53612ea | 551 | WriteCmdParam4(_SC, x >> 8, x, x1 >> 8, x1); //Start column instead of _MC |
silviosz | 1:a5ccd53612ea | 552 | WriteCmdParam4(_SP, y >> 8, y, y1 >> 8, y1); // |
silviosz | 1:a5ccd53612ea | 553 | if (is8347 && _lcd_ID == 0x0065) { //HX8352-B has separate _MC, _SC |
silviosz | 1:a5ccd53612ea | 554 | uint8_t d[2]; |
silviosz | 1:a5ccd53612ea | 555 | d[0] = x >> 8; d[1] = x; |
silviosz | 1:a5ccd53612ea | 556 | WriteCmdParamN(_MC, 2, d); //allows !MV_AXIS to work |
silviosz | 1:a5ccd53612ea | 557 | d[0] = y >> 8; d[1] = y; |
silviosz | 1:a5ccd53612ea | 558 | WriteCmdParamN(_MP, 2, d); |
silviosz | 1:a5ccd53612ea | 559 | } |
silviosz | 1:a5ccd53612ea | 560 | } else { |
silviosz | 1:a5ccd53612ea | 561 | WriteCmdData(_MC, x); |
silviosz | 1:a5ccd53612ea | 562 | WriteCmdData(_MP, y); |
silviosz | 1:a5ccd53612ea | 563 | if (!(x == x1 && y == y1)) { //only need MC,MP for drawPixel |
silviosz | 1:a5ccd53612ea | 564 | if (_lcd_capable & XSA_XEA_16BIT) { |
silviosz | 1:a5ccd53612ea | 565 | if (rotation & 1) |
silviosz | 1:a5ccd53612ea | 566 | y1 = y = (y1 << 8) | y; |
silviosz | 1:a5ccd53612ea | 567 | else |
silviosz | 1:a5ccd53612ea | 568 | x1 = x = (x1 << 8) | x; |
silviosz | 1:a5ccd53612ea | 569 | } |
silviosz | 1:a5ccd53612ea | 570 | WriteCmdData(_SC, x); |
silviosz | 1:a5ccd53612ea | 571 | WriteCmdData(_SP, y); |
silviosz | 1:a5ccd53612ea | 572 | WriteCmdData(_EC, x1); |
silviosz | 1:a5ccd53612ea | 573 | WriteCmdData(_EP, y1); |
silviosz | 1:a5ccd53612ea | 574 | } |
silviosz | 1:a5ccd53612ea | 575 | } |
silviosz | 1:a5ccd53612ea | 576 | } |
silviosz | 1:a5ccd53612ea | 577 | |
silviosz | 1:a5ccd53612ea | 578 | void MCUFRIEND_kbv::fillRect(int16_t x, int16_t y, int16_t w, int16_t h, uint16_t color) |
silviosz | 1:a5ccd53612ea | 579 | { |
silviosz | 1:a5ccd53612ea | 580 | int16_t end; |
silviosz | 1:a5ccd53612ea | 581 | #if defined(SUPPORT_9488_555) |
silviosz | 1:a5ccd53612ea | 582 | if (is555) color = color565_to_555(color); |
silviosz | 1:a5ccd53612ea | 583 | #endif |
silviosz | 1:a5ccd53612ea | 584 | if (w < 0) { |
silviosz | 1:a5ccd53612ea | 585 | w = -w; |
silviosz | 1:a5ccd53612ea | 586 | x -= w; |
silviosz | 1:a5ccd53612ea | 587 | } //+ve w |
silviosz | 1:a5ccd53612ea | 588 | end = x + w; |
silviosz | 1:a5ccd53612ea | 589 | if (x < 0) |
silviosz | 1:a5ccd53612ea | 590 | x = 0; |
silviosz | 1:a5ccd53612ea | 591 | if (end > width()) |
silviosz | 1:a5ccd53612ea | 592 | end = width(); |
silviosz | 1:a5ccd53612ea | 593 | w = end - x; |
silviosz | 1:a5ccd53612ea | 594 | if (h < 0) { |
silviosz | 1:a5ccd53612ea | 595 | h = -h; |
silviosz | 1:a5ccd53612ea | 596 | y -= h; |
silviosz | 1:a5ccd53612ea | 597 | } //+ve h |
silviosz | 1:a5ccd53612ea | 598 | end = y + h; |
silviosz | 1:a5ccd53612ea | 599 | if (y < 0) |
silviosz | 1:a5ccd53612ea | 600 | y = 0; |
silviosz | 1:a5ccd53612ea | 601 | if (end > height()) |
silviosz | 1:a5ccd53612ea | 602 | end = height(); |
silviosz | 1:a5ccd53612ea | 603 | h = end - y; |
silviosz | 1:a5ccd53612ea | 604 | setAddrWindow(x, y, x + w - 1, y + h - 1); |
silviosz | 1:a5ccd53612ea | 605 | CS_ACTIVE; |
silviosz | 1:a5ccd53612ea | 606 | WriteCmd(_MW); |
silviosz | 1:a5ccd53612ea | 607 | if (h > w) { |
silviosz | 1:a5ccd53612ea | 608 | end = h; |
silviosz | 1:a5ccd53612ea | 609 | h = w; |
silviosz | 1:a5ccd53612ea | 610 | w = end; |
silviosz | 1:a5ccd53612ea | 611 | } |
silviosz | 1:a5ccd53612ea | 612 | uint8_t hi = color >> 8, lo = color & 0xFF; |
silviosz | 1:a5ccd53612ea | 613 | while (h-- > 0) { |
silviosz | 1:a5ccd53612ea | 614 | end = w; |
silviosz | 1:a5ccd53612ea | 615 | #if USING_16BIT_BUS |
silviosz | 1:a5ccd53612ea | 616 | #if defined(__MK66FX1M0__) //180MHz M4 |
silviosz | 1:a5ccd53612ea | 617 | #define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;} //56ns |
silviosz | 1:a5ccd53612ea | 618 | #elif defined(__SAM3X8E__) //84MHz M3 |
silviosz | 1:a5ccd53612ea | 619 | #define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE2;WR_IDLE4;WR_IDLE2;} //286ns ?ILI9486 |
silviosz | 1:a5ccd53612ea | 620 | //#define STROBE_16BIT {WR_ACTIVE4;WR_ACTIVE;WR_IDLE4;WR_IDLE;} //238ns SSD1289 |
silviosz | 1:a5ccd53612ea | 621 | //#define STROBE_16BIT {WR_ACTIVE2;WR_ACTIVE;WR_IDLE2;} //119ns RM68140 |
silviosz | 1:a5ccd53612ea | 622 | #else //16MHz AVR |
silviosz | 1:a5ccd53612ea | 623 | #define STROBE_16BIT {WR_ACTIVE;WR_ACTIVE;WR_IDLE; } //375ns ?ILI9486 |
silviosz | 1:a5ccd53612ea | 624 | #endif |
silviosz | 1:a5ccd53612ea | 625 | write_16(color); //we could just do the strobe |
silviosz | 1:a5ccd53612ea | 626 | lo = end & 7; |
silviosz | 1:a5ccd53612ea | 627 | hi = end >> 3; |
silviosz | 1:a5ccd53612ea | 628 | if (hi) |
silviosz | 1:a5ccd53612ea | 629 | do { |
silviosz | 1:a5ccd53612ea | 630 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 631 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 632 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 633 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 634 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 635 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 636 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 637 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 638 | } while (--hi > 0); |
silviosz | 1:a5ccd53612ea | 639 | while (lo-- > 0) { |
silviosz | 1:a5ccd53612ea | 640 | STROBE_16BIT; |
silviosz | 1:a5ccd53612ea | 641 | } |
silviosz | 1:a5ccd53612ea | 642 | #else |
silviosz | 1:a5ccd53612ea | 643 | #if defined(SUPPORT_1289) |
silviosz | 1:a5ccd53612ea | 644 | if (is9797) { |
silviosz | 1:a5ccd53612ea | 645 | uint8_t r = color565_to_r(color); |
silviosz | 1:a5ccd53612ea | 646 | uint8_t g = color565_to_g(color); |
silviosz | 1:a5ccd53612ea | 647 | uint8_t b = color565_to_b(color); |
silviosz | 1:a5ccd53612ea | 648 | do { |
silviosz | 1:a5ccd53612ea | 649 | write8(r); |
silviosz | 1:a5ccd53612ea | 650 | write8(g); |
silviosz | 1:a5ccd53612ea | 651 | write8(b); |
silviosz | 1:a5ccd53612ea | 652 | } while (--end != 0); |
silviosz | 1:a5ccd53612ea | 653 | } else |
silviosz | 1:a5ccd53612ea | 654 | #endif |
silviosz | 1:a5ccd53612ea | 655 | do { |
silviosz | 1:a5ccd53612ea | 656 | write8(hi); |
silviosz | 1:a5ccd53612ea | 657 | write8(lo); |
silviosz | 1:a5ccd53612ea | 658 | } while (--end != 0); |
silviosz | 1:a5ccd53612ea | 659 | #endif |
silviosz | 1:a5ccd53612ea | 660 | } |
silviosz | 1:a5ccd53612ea | 661 | CS_IDLE; |
silviosz | 1:a5ccd53612ea | 662 | if (!(_lcd_capable & MIPI_DCS_REV1) || ((_lcd_ID == 0x1526) && (rotation & 1))) |
silviosz | 1:a5ccd53612ea | 663 | setAddrWindow(0, 0, width() - 1, height() - 1); |
silviosz | 1:a5ccd53612ea | 664 | } |
silviosz | 1:a5ccd53612ea | 665 | |
silviosz | 1:a5ccd53612ea | 666 | static void pushColors_any(uint16_t cmd, uint8_t * block, int16_t n, bool first, uint8_t flags) |
silviosz | 1:a5ccd53612ea | 667 | { |
silviosz | 1:a5ccd53612ea | 668 | uint16_t color; |
silviosz | 1:a5ccd53612ea | 669 | uint8_t h, l; |
silviosz | 1:a5ccd53612ea | 670 | bool isconst = flags & 1; |
silviosz | 1:a5ccd53612ea | 671 | bool isbigend = (flags & 2) != 0; |
silviosz | 1:a5ccd53612ea | 672 | CS_ACTIVE; |
silviosz | 1:a5ccd53612ea | 673 | if (first) { |
silviosz | 1:a5ccd53612ea | 674 | WriteCmd(cmd); |
silviosz | 1:a5ccd53612ea | 675 | } |
silviosz | 1:a5ccd53612ea | 676 | |
silviosz | 1:a5ccd53612ea | 677 | if (!isconst && !isbigend) { |
silviosz | 1:a5ccd53612ea | 678 | uint16_t *block16 = (uint16_t*)block; |
silviosz | 1:a5ccd53612ea | 679 | while (n-- > 0) { |
silviosz | 1:a5ccd53612ea | 680 | color = *block16++; |
silviosz | 1:a5ccd53612ea | 681 | write16(color); |
silviosz | 1:a5ccd53612ea | 682 | } |
silviosz | 1:a5ccd53612ea | 683 | } else |
silviosz | 1:a5ccd53612ea | 684 | |
silviosz | 1:a5ccd53612ea | 685 | while (n-- > 0) { |
silviosz | 1:a5ccd53612ea | 686 | if (isconst) { |
silviosz | 1:a5ccd53612ea | 687 | h = pgm_read_byte(block++); |
silviosz | 1:a5ccd53612ea | 688 | l = pgm_read_byte(block++); |
silviosz | 1:a5ccd53612ea | 689 | } else { |
silviosz | 1:a5ccd53612ea | 690 | h = (*block++); |
silviosz | 1:a5ccd53612ea | 691 | l = (*block++); |
silviosz | 1:a5ccd53612ea | 692 | } |
silviosz | 1:a5ccd53612ea | 693 | color = (isbigend) ? (h << 8 | l) : (l << 8 | h); |
silviosz | 1:a5ccd53612ea | 694 | #if defined(SUPPORT_9488_555) |
silviosz | 1:a5ccd53612ea | 695 | if (is555) color = color565_to_555(color); |
silviosz | 1:a5ccd53612ea | 696 | #endif |
silviosz | 1:a5ccd53612ea | 697 | if (is9797) write24(color); else |
silviosz | 1:a5ccd53612ea | 698 | write16(color); |
silviosz | 1:a5ccd53612ea | 699 | } |
silviosz | 1:a5ccd53612ea | 700 | CS_IDLE; |
silviosz | 1:a5ccd53612ea | 701 | } |
silviosz | 1:a5ccd53612ea | 702 | |
silviosz | 1:a5ccd53612ea | 703 | void MCUFRIEND_kbv::pushColors(uint16_t * block, int16_t n, bool first) |
silviosz | 1:a5ccd53612ea | 704 | { |
silviosz | 1:a5ccd53612ea | 705 | pushColors_any(_MW, (uint8_t *)block, n, first, 0); |
silviosz | 1:a5ccd53612ea | 706 | } |
silviosz | 1:a5ccd53612ea | 707 | void MCUFRIEND_kbv::pushColors(uint8_t * block, int16_t n, bool first) |
silviosz | 1:a5ccd53612ea | 708 | { |
silviosz | 1:a5ccd53612ea | 709 | pushColors_any(_MW, (uint8_t *)block, n, first, 2); //regular bigend |
silviosz | 1:a5ccd53612ea | 710 | } |
silviosz | 1:a5ccd53612ea | 711 | void MCUFRIEND_kbv::pushColors(const uint8_t * block, int16_t n, bool first, bool bigend) |
silviosz | 1:a5ccd53612ea | 712 | { |
silviosz | 1:a5ccd53612ea | 713 | pushColors_any(_MW, (uint8_t *)block, n, first, bigend ? 3 : 1); |
silviosz | 1:a5ccd53612ea | 714 | } |
silviosz | 1:a5ccd53612ea | 715 | |
silviosz | 1:a5ccd53612ea | 716 | void MCUFRIEND_kbv::vertScroll(int16_t top, int16_t scrollines, int16_t offset) |
silviosz | 1:a5ccd53612ea | 717 | { |
silviosz | 1:a5ccd53612ea | 718 | #if defined(OFFSET_9327) |
silviosz | 1:a5ccd53612ea | 719 | if (_lcd_ID == 0x9327) { |
silviosz | 1:a5ccd53612ea | 720 | if (rotation == 2 || rotation == 3) top += OFFSET_9327; |
silviosz | 1:a5ccd53612ea | 721 | } |
silviosz | 1:a5ccd53612ea | 722 | #endif |
silviosz | 1:a5ccd53612ea | 723 | int16_t bfa = HEIGHT - top - scrollines; // bottom fixed area |
silviosz | 1:a5ccd53612ea | 724 | int16_t vsp; |
silviosz | 1:a5ccd53612ea | 725 | int16_t sea = top; |
silviosz | 1:a5ccd53612ea | 726 | if (_lcd_ID == 0x9327) bfa += 32; |
silviosz | 1:a5ccd53612ea | 727 | if (offset <= -scrollines || offset >= scrollines) offset = 0; //valid scroll |
silviosz | 1:a5ccd53612ea | 728 | vsp = top + offset; // vertical start position |
silviosz | 1:a5ccd53612ea | 729 | if (offset < 0) |
silviosz | 1:a5ccd53612ea | 730 | vsp += scrollines; //keep in unsigned range |
silviosz | 1:a5ccd53612ea | 731 | sea = top + scrollines - 1; |
silviosz | 1:a5ccd53612ea | 732 | if (_lcd_capable & MIPI_DCS_REV1) { |
silviosz | 1:a5ccd53612ea | 733 | uint8_t d[6]; // for multi-byte parameters |
silviosz | 1:a5ccd53612ea | 734 | /* |
silviosz | 1:a5ccd53612ea | 735 | if (_lcd_ID == 0x9327) { //panel is wired for 240x432 |
silviosz | 1:a5ccd53612ea | 736 | if (rotation == 2 || rotation == 3) { //180 or 270 degrees |
silviosz | 1:a5ccd53612ea | 737 | if (scrollines == HEIGHT) { |
silviosz | 1:a5ccd53612ea | 738 | scrollines = 432; // we get a glitch but hey-ho |
silviosz | 1:a5ccd53612ea | 739 | vsp -= 432 - HEIGHT; |
silviosz | 1:a5ccd53612ea | 740 | } |
silviosz | 1:a5ccd53612ea | 741 | if (vsp < 0) |
silviosz | 1:a5ccd53612ea | 742 | vsp += 432; |
silviosz | 1:a5ccd53612ea | 743 | } |
silviosz | 1:a5ccd53612ea | 744 | bfa = 432 - top - scrollines; |
silviosz | 1:a5ccd53612ea | 745 | } |
silviosz | 1:a5ccd53612ea | 746 | */ |
silviosz | 1:a5ccd53612ea | 747 | d[0] = top >> 8; //TFA |
silviosz | 1:a5ccd53612ea | 748 | d[1] = top; |
silviosz | 1:a5ccd53612ea | 749 | d[2] = scrollines >> 8; //VSA |
silviosz | 1:a5ccd53612ea | 750 | d[3] = scrollines; |
silviosz | 1:a5ccd53612ea | 751 | d[4] = bfa >> 8; //BFA |
silviosz | 1:a5ccd53612ea | 752 | d[5] = bfa; |
silviosz | 1:a5ccd53612ea | 753 | WriteCmdParamN(is8347 ? 0x0E : 0x33, 6, d); |
silviosz | 1:a5ccd53612ea | 754 | // if (offset == 0 && rotation > 1) vsp = top + scrollines; //make non-valid |
silviosz | 1:a5ccd53612ea | 755 | d[0] = vsp >> 8; //VSP |
silviosz | 1:a5ccd53612ea | 756 | d[1] = vsp; |
silviosz | 1:a5ccd53612ea | 757 | WriteCmdParamN(is8347 ? 0x14 : 0x37, 2, d); |
silviosz | 1:a5ccd53612ea | 758 | if (is8347) { |
silviosz | 1:a5ccd53612ea | 759 | d[0] = (offset != 0) ? (_lcd_ID == 0x8347 ? 0x02 : 0x08) : 0; |
silviosz | 1:a5ccd53612ea | 760 | WriteCmdParamN(_lcd_ID == 0x8347 ? 0x18 : 0x01, 1, d); //HX8347-D |
silviosz | 1:a5ccd53612ea | 761 | } else if (offset == 0 && (_lcd_capable & MIPI_DCS_REV1)) { |
silviosz | 1:a5ccd53612ea | 762 | WriteCmdParamN(0x13, 0, NULL); //NORMAL i.e. disable scroll |
silviosz | 1:a5ccd53612ea | 763 | } |
silviosz | 1:a5ccd53612ea | 764 | return; |
silviosz | 1:a5ccd53612ea | 765 | } |
silviosz | 1:a5ccd53612ea | 766 | // cope with 9320 style variants: |
silviosz | 1:a5ccd53612ea | 767 | switch (_lcd_ID) { |
silviosz | 1:a5ccd53612ea | 768 | case 0x7783: |
silviosz | 1:a5ccd53612ea | 769 | WriteCmdData(0x61, _lcd_rev); //!NDL, !VLE, REV |
silviosz | 1:a5ccd53612ea | 770 | WriteCmdData(0x6A, vsp); //VL# |
silviosz | 1:a5ccd53612ea | 771 | break; |
silviosz | 1:a5ccd53612ea | 772 | #ifdef SUPPORT_0139 |
silviosz | 1:a5ccd53612ea | 773 | case 0x0139: |
silviosz | 1:a5ccd53612ea | 774 | WriteCmdData(0x07, 0x0213 | (_lcd_rev << 2)); //VLE1=1, GON=1, REV=x, D=3 |
silviosz | 1:a5ccd53612ea | 775 | WriteCmdData(0x41, vsp); //VL# check vsp |
silviosz | 1:a5ccd53612ea | 776 | break; |
silviosz | 1:a5ccd53612ea | 777 | #endif |
silviosz | 1:a5ccd53612ea | 778 | #if defined(SUPPORT_0154) || defined(SUPPORT_9225) //thanks tongbajiel |
silviosz | 1:a5ccd53612ea | 779 | case 0x9225: |
silviosz | 1:a5ccd53612ea | 780 | case 0x0154: |
silviosz | 1:a5ccd53612ea | 781 | WriteCmdData(0x31, sea); //SEA |
silviosz | 1:a5ccd53612ea | 782 | WriteCmdData(0x32, top); //SSA |
silviosz | 1:a5ccd53612ea | 783 | WriteCmdData(0x33, vsp - top); //SST |
silviosz | 1:a5ccd53612ea | 784 | break; |
silviosz | 1:a5ccd53612ea | 785 | #endif |
silviosz | 1:a5ccd53612ea | 786 | #ifdef SUPPORT_1289 |
silviosz | 1:a5ccd53612ea | 787 | case 0x1289: |
silviosz | 1:a5ccd53612ea | 788 | WriteCmdData(0x41, vsp); //VL# |
silviosz | 1:a5ccd53612ea | 789 | break; |
silviosz | 1:a5ccd53612ea | 790 | #endif |
silviosz | 1:a5ccd53612ea | 791 | case 0x5420: |
silviosz | 1:a5ccd53612ea | 792 | case 0x7793: |
silviosz | 1:a5ccd53612ea | 793 | case 0x9326: |
silviosz | 1:a5ccd53612ea | 794 | case 0xB509: |
silviosz | 1:a5ccd53612ea | 795 | WriteCmdData(0x401, (1 << 1) | _lcd_rev); //VLE, REV |
silviosz | 1:a5ccd53612ea | 796 | WriteCmdData(0x404, vsp); //VL# |
silviosz | 1:a5ccd53612ea | 797 | break; |
silviosz | 1:a5ccd53612ea | 798 | default: |
silviosz | 1:a5ccd53612ea | 799 | // 0x6809, 0x9320, 0x9325, 0x9335, 0xB505 can only scroll whole screen |
silviosz | 1:a5ccd53612ea | 800 | WriteCmdData(0x61, (1 << 1) | _lcd_rev); //!NDL, VLE, REV |
silviosz | 1:a5ccd53612ea | 801 | WriteCmdData(0x6A, vsp); //VL# |
silviosz | 1:a5ccd53612ea | 802 | break; |
silviosz | 1:a5ccd53612ea | 803 | } |
silviosz | 1:a5ccd53612ea | 804 | } |
silviosz | 1:a5ccd53612ea | 805 | |
silviosz | 1:a5ccd53612ea | 806 | void MCUFRIEND_kbv::invertDisplay(boolean i) |
silviosz | 1:a5ccd53612ea | 807 | { |
silviosz | 1:a5ccd53612ea | 808 | uint8_t val; |
silviosz | 1:a5ccd53612ea | 809 | _lcd_rev = ((_lcd_capable & REV_SCREEN) != 0) ^ i; |
silviosz | 1:a5ccd53612ea | 810 | if (_lcd_capable & MIPI_DCS_REV1) { |
silviosz | 1:a5ccd53612ea | 811 | if (is8347) { |
silviosz | 1:a5ccd53612ea | 812 | // HX8347D: 0x36 Panel Characteristic. REV_Panel |
silviosz | 1:a5ccd53612ea | 813 | // HX8347A: 0x36 is Display Control 10 |
silviosz | 1:a5ccd53612ea | 814 | if (_lcd_ID == 0x8347 || _lcd_ID == 0x5252) // HX8347-A, HX5352-A |
silviosz | 1:a5ccd53612ea | 815 | val = _lcd_rev ? 6 : 2; //INVON id bit#2, NORON=bit#1 |
silviosz | 1:a5ccd53612ea | 816 | else val = _lcd_rev ? 8 : 10; //HX8347-D, G, I: SCROLLON=bit3, INVON=bit1 |
silviosz | 1:a5ccd53612ea | 817 | // HX8347: 0x01 Display Mode has diff bit mapping for A, D |
silviosz | 1:a5ccd53612ea | 818 | WriteCmdParamN(0x01, 1, &val); |
silviosz | 1:a5ccd53612ea | 819 | } else |
silviosz | 1:a5ccd53612ea | 820 | WriteCmdParamN(_lcd_rev ? 0x21 : 0x20, 0, NULL); |
silviosz | 1:a5ccd53612ea | 821 | return; |
silviosz | 1:a5ccd53612ea | 822 | } |
silviosz | 1:a5ccd53612ea | 823 | // cope with 9320 style variants: |
silviosz | 1:a5ccd53612ea | 824 | switch (_lcd_ID) { |
silviosz | 1:a5ccd53612ea | 825 | #ifdef SUPPORT_0139 |
silviosz | 1:a5ccd53612ea | 826 | case 0x0139: |
silviosz | 1:a5ccd53612ea | 827 | #endif |
silviosz | 1:a5ccd53612ea | 828 | case 0x9225: //REV is in reg(0x07) like Samsung |
silviosz | 1:a5ccd53612ea | 829 | case 0x0154: |
silviosz | 1:a5ccd53612ea | 830 | WriteCmdData(0x07, 0x13 | (_lcd_rev << 2)); //.kbv kludge |
silviosz | 1:a5ccd53612ea | 831 | break; |
silviosz | 1:a5ccd53612ea | 832 | #ifdef SUPPORT_1289 |
silviosz | 1:a5ccd53612ea | 833 | case 0x1289: |
silviosz | 1:a5ccd53612ea | 834 | _lcd_drivOut &= ~(1 << 13); |
silviosz | 1:a5ccd53612ea | 835 | if (_lcd_rev) |
silviosz | 1:a5ccd53612ea | 836 | _lcd_drivOut |= (1 << 13); |
silviosz | 1:a5ccd53612ea | 837 | WriteCmdData(0x01, _lcd_drivOut); |
silviosz | 1:a5ccd53612ea | 838 | break; |
silviosz | 1:a5ccd53612ea | 839 | #endif |
silviosz | 1:a5ccd53612ea | 840 | case 0x5420: |
silviosz | 1:a5ccd53612ea | 841 | case 0x7793: |
silviosz | 1:a5ccd53612ea | 842 | case 0x9326: |
silviosz | 1:a5ccd53612ea | 843 | case 0xB509: |
silviosz | 1:a5ccd53612ea | 844 | WriteCmdData(0x401, (1 << 1) | _lcd_rev); //.kbv kludge VLE |
silviosz | 1:a5ccd53612ea | 845 | break; |
silviosz | 1:a5ccd53612ea | 846 | default: |
silviosz | 1:a5ccd53612ea | 847 | WriteCmdData(0x61, _lcd_rev); |
silviosz | 1:a5ccd53612ea | 848 | break; |
silviosz | 1:a5ccd53612ea | 849 | } |
silviosz | 1:a5ccd53612ea | 850 | } |
silviosz | 1:a5ccd53612ea | 851 | |
silviosz | 1:a5ccd53612ea | 852 | #define TFTLCD_DELAY 0xFFFF |
silviosz | 1:a5ccd53612ea | 853 | #define TFTLCD_DELAY8 0x7F |
silviosz | 1:a5ccd53612ea | 854 | static void init_table(const void *table, int16_t size) |
silviosz | 1:a5ccd53612ea | 855 | { |
silviosz | 1:a5ccd53612ea | 856 | #ifdef SUPPORT_8357D_GAMMA |
silviosz | 1:a5ccd53612ea | 857 | uint8_t *p = (uint8_t *) table, dat[36]; //HX8357_99 has GAMMA[34] |
silviosz | 1:a5ccd53612ea | 858 | #else |
silviosz | 1:a5ccd53612ea | 859 | uint8_t *p = (uint8_t *) table, dat[24]; //R61526 has GAMMA[22] |
silviosz | 1:a5ccd53612ea | 860 | #endif |
silviosz | 1:a5ccd53612ea | 861 | while (size > 0) { |
silviosz | 1:a5ccd53612ea | 862 | uint8_t cmd = pgm_read_byte(p++); |
silviosz | 1:a5ccd53612ea | 863 | uint8_t len = pgm_read_byte(p++); |
silviosz | 1:a5ccd53612ea | 864 | if (cmd == TFTLCD_DELAY8) { |
silviosz | 1:a5ccd53612ea | 865 | delay(len); |
silviosz | 1:a5ccd53612ea | 866 | len = 0; |
silviosz | 1:a5ccd53612ea | 867 | } else { |
silviosz | 1:a5ccd53612ea | 868 | for (uint8_t i = 0; i < len; i++) |
silviosz | 1:a5ccd53612ea | 869 | dat[i] = pgm_read_byte(p++); |
silviosz | 1:a5ccd53612ea | 870 | WriteCmdParamN(cmd, len, dat); |
silviosz | 1:a5ccd53612ea | 871 | } |
silviosz | 1:a5ccd53612ea | 872 | size -= len + 2; |
silviosz | 1:a5ccd53612ea | 873 | } |
silviosz | 1:a5ccd53612ea | 874 | } |
silviosz | 1:a5ccd53612ea | 875 | |
silviosz | 1:a5ccd53612ea | 876 | static void init_table16(const void *table, int16_t size) |
silviosz | 1:a5ccd53612ea | 877 | { |
silviosz | 1:a5ccd53612ea | 878 | uint16_t *p = (uint16_t *) table; |
silviosz | 1:a5ccd53612ea | 879 | while (size > 0) { |
silviosz | 1:a5ccd53612ea | 880 | uint16_t cmd = pgm_read_word(p++); |
silviosz | 1:a5ccd53612ea | 881 | uint16_t d = pgm_read_word(p++); |
silviosz | 1:a5ccd53612ea | 882 | if (cmd == TFTLCD_DELAY) |
silviosz | 1:a5ccd53612ea | 883 | delay(d); |
silviosz | 1:a5ccd53612ea | 884 | else { |
silviosz | 1:a5ccd53612ea | 885 | writecmddata(cmd, d); //static function |
silviosz | 1:a5ccd53612ea | 886 | } |
silviosz | 1:a5ccd53612ea | 887 | size -= 2 * sizeof(int16_t); |
silviosz | 1:a5ccd53612ea | 888 | } |
silviosz | 1:a5ccd53612ea | 889 | } |
silviosz | 1:a5ccd53612ea | 890 | |
silviosz | 1:a5ccd53612ea | 891 | void MCUFRIEND_kbv::begin(uint16_t ID) |
silviosz | 1:a5ccd53612ea | 892 | { |
silviosz | 1:a5ccd53612ea | 893 | int16_t *p16; //so we can "write" to a const protected variable. |
silviosz | 1:a5ccd53612ea | 894 | const uint8_t *table8_ads = NULL; |
silviosz | 1:a5ccd53612ea | 895 | int16_t table_size; |
silviosz | 1:a5ccd53612ea | 896 | reset(); |
silviosz | 1:a5ccd53612ea | 897 | _lcd_xor = 0; |
silviosz | 1:a5ccd53612ea | 898 | switch (_lcd_ID = ID) { |
silviosz | 1:a5ccd53612ea | 899 | /* |
silviosz | 1:a5ccd53612ea | 900 | static const uint16_t _regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 901 | 0x0000, 0x0001, // start oscillation |
silviosz | 1:a5ccd53612ea | 902 | 0x0007, 0x0000, // source output control 0 D0 |
silviosz | 1:a5ccd53612ea | 903 | 0x0013, 0x0000, // power control 3 off |
silviosz | 1:a5ccd53612ea | 904 | 0x0011, 0x2604, // |
silviosz | 1:a5ccd53612ea | 905 | 0x0014, 0x0015, // |
silviosz | 1:a5ccd53612ea | 906 | 0x0010, 0x3C00, // |
silviosz | 1:a5ccd53612ea | 907 | // 0x0013, 0x0040, // |
silviosz | 1:a5ccd53612ea | 908 | // 0x0013, 0x0060, // |
silviosz | 1:a5ccd53612ea | 909 | // 0x0013, 0x0070, // |
silviosz | 1:a5ccd53612ea | 910 | 0x0013, 0x0070, // power control 3 PON PON1 AON |
silviosz | 1:a5ccd53612ea | 911 | |
silviosz | 1:a5ccd53612ea | 912 | 0x0001, 0x0127, // driver output control |
silviosz | 1:a5ccd53612ea | 913 | // 0x0002, 0x0700, // field 0 b/c waveform xor waveform |
silviosz | 1:a5ccd53612ea | 914 | 0x0003, 0x1030, // |
silviosz | 1:a5ccd53612ea | 915 | 0x0007, 0x0000, // |
silviosz | 1:a5ccd53612ea | 916 | 0x0008, 0x0404, // |
silviosz | 1:a5ccd53612ea | 917 | 0x000B, 0x0200, // |
silviosz | 1:a5ccd53612ea | 918 | 0x000C, 0x0000, // |
silviosz | 1:a5ccd53612ea | 919 | 0x00015,0x0000, // |
silviosz | 1:a5ccd53612ea | 920 | |
silviosz | 1:a5ccd53612ea | 921 | //gamma setting |
silviosz | 1:a5ccd53612ea | 922 | 0x0030, 0x0000, |
silviosz | 1:a5ccd53612ea | 923 | 0x0031, 0x0606, |
silviosz | 1:a5ccd53612ea | 924 | 0x0032, 0x0006, |
silviosz | 1:a5ccd53612ea | 925 | 0x0033, 0x0403, |
silviosz | 1:a5ccd53612ea | 926 | 0x0034, 0x0107, |
silviosz | 1:a5ccd53612ea | 927 | 0x0035, 0x0101, |
silviosz | 1:a5ccd53612ea | 928 | 0x0036, 0x0707, |
silviosz | 1:a5ccd53612ea | 929 | 0x0037, 0x0304, |
silviosz | 1:a5ccd53612ea | 930 | 0x0038, 0x0A00, |
silviosz | 1:a5ccd53612ea | 931 | 0x0039, 0x0706, |
silviosz | 1:a5ccd53612ea | 932 | |
silviosz | 1:a5ccd53612ea | 933 | 0x0040, 0x0000, |
silviosz | 1:a5ccd53612ea | 934 | 0x0041, 0x0000, |
silviosz | 1:a5ccd53612ea | 935 | 0x0042, 0x013F, |
silviosz | 1:a5ccd53612ea | 936 | 0x0043, 0x0000, |
silviosz | 1:a5ccd53612ea | 937 | 0x0044, 0x0000, |
silviosz | 1:a5ccd53612ea | 938 | 0x0045, 0x0000, |
silviosz | 1:a5ccd53612ea | 939 | 0x0046, 0xEF00, |
silviosz | 1:a5ccd53612ea | 940 | 0x0047, 0x013F, |
silviosz | 1:a5ccd53612ea | 941 | 0x0048, 0x0000, |
silviosz | 1:a5ccd53612ea | 942 | 0x0007, 0x0011, |
silviosz | 1:a5ccd53612ea | 943 | 0x0007, 0x0017, |
silviosz | 1:a5ccd53612ea | 944 | }; |
silviosz | 1:a5ccd53612ea | 945 | */ |
silviosz | 1:a5ccd53612ea | 946 | #ifdef SUPPORT_0139 |
silviosz | 1:a5ccd53612ea | 947 | case 0x0139: |
silviosz | 1:a5ccd53612ea | 948 | _lcd_capable = REV_SCREEN | XSA_XEA_16BIT; //remove AUTO_READINC |
silviosz | 1:a5ccd53612ea | 949 | static const uint16_t S6D0139_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 950 | 0x0000, 0x0001, //Start oscillator |
silviosz | 1:a5ccd53612ea | 951 | 0x0011, 0x1a00, //Power Control 2 |
silviosz | 1:a5ccd53612ea | 952 | 0x0014, 0x2020, //Power Control 4 |
silviosz | 1:a5ccd53612ea | 953 | 0x0010, 0x0900, //Power Control 1 |
silviosz | 1:a5ccd53612ea | 954 | 0x0013, 0x0040, //Power Control 3 |
silviosz | 1:a5ccd53612ea | 955 | 0x0013, 0x0060, //Power Control 3 |
silviosz | 1:a5ccd53612ea | 956 | 0x0013, 0x0070, //Power Control 3 |
silviosz | 1:a5ccd53612ea | 957 | 0x0011, 0x1a04, //Power Control 2 |
silviosz | 1:a5ccd53612ea | 958 | 0x0010, 0x2f00, //Power Control 1 |
silviosz | 1:a5ccd53612ea | 959 | 0x0001, 0x0127, //Driver Control: SM=0, GS=0, SS=1, 240x320 |
silviosz | 1:a5ccd53612ea | 960 | 0x0002, 0x0100, //LCD Control: (.kbv was 0700) FLD=0, BC= 0, EOR=1 |
silviosz | 1:a5ccd53612ea | 961 | 0x0003, 0x1030, //Entry Mode: TR1=0, DFM=0, BGR=1, I_D=3 |
silviosz | 1:a5ccd53612ea | 962 | 0x0007, 0x0000, //Display Control: everything off |
silviosz | 1:a5ccd53612ea | 963 | 0x0008, 0x0303, //Blank Period: FP=3, BP=3 |
silviosz | 1:a5ccd53612ea | 964 | 0x0009, 0x0000, //f.k. |
silviosz | 1:a5ccd53612ea | 965 | 0x000b, 0x0000, //Frame Control: |
silviosz | 1:a5ccd53612ea | 966 | 0x000c, 0x0000, //Interface Control: system i/f |
silviosz | 1:a5ccd53612ea | 967 | 0x0040, 0x0000, //Scan Line |
silviosz | 1:a5ccd53612ea | 968 | 0x0041, 0x0000, //Vertical Scroll Control |
silviosz | 1:a5ccd53612ea | 969 | 0x0007, 0x0014, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=0 (halt) |
silviosz | 1:a5ccd53612ea | 970 | 0x0007, 0x0016, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=2 (blank) |
silviosz | 1:a5ccd53612ea | 971 | 0x0007, 0x0017, //Display Control: VLE1=0, SPT=0, GON=1, REV=1, D=3 (normal) |
silviosz | 1:a5ccd53612ea | 972 | // 0x0007, 0x0217, //Display Control: VLE1=1, SPT=0, GON=1, REV=1, D=3 |
silviosz | 1:a5ccd53612ea | 973 | }; |
silviosz | 1:a5ccd53612ea | 974 | init_table16(S6D0139_regValues, sizeof(S6D0139_regValues)); |
silviosz | 1:a5ccd53612ea | 975 | break; |
silviosz | 1:a5ccd53612ea | 976 | #endif |
silviosz | 1:a5ccd53612ea | 977 | |
silviosz | 1:a5ccd53612ea | 978 | #ifdef SUPPORT_0154 |
silviosz | 1:a5ccd53612ea | 979 | case 0x0154: |
silviosz | 1:a5ccd53612ea | 980 | _lcd_capable = AUTO_READINC | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 981 | static const uint16_t S6D0154_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 982 | 0x0011, 0x001A, |
silviosz | 1:a5ccd53612ea | 983 | 0x0012, 0x3121, //BT=3, DC1=1, DC2=2, DC3=1 |
silviosz | 1:a5ccd53612ea | 984 | 0x0013, 0x006C, //GVD=108 |
silviosz | 1:a5ccd53612ea | 985 | 0x0014, 0x4249, //VCM=66, VML=73 |
silviosz | 1:a5ccd53612ea | 986 | |
silviosz | 1:a5ccd53612ea | 987 | 0x0010, 0x0800, //SAP=8 |
silviosz | 1:a5ccd53612ea | 988 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 989 | 0x0011, 0x011A, //APON=0, PON=1, AON=0, VCI1_EN=1, VC=10 |
silviosz | 1:a5ccd53612ea | 990 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 991 | 0x0011, 0x031A, //APON=0, PON=3, AON=0, VCI1_EN=1, VC=10 |
silviosz | 1:a5ccd53612ea | 992 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 993 | 0x0011, 0x071A, //APON=0, PON=7, AON=0, VCI1_EN=1, VC=10 |
silviosz | 1:a5ccd53612ea | 994 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 995 | 0x0011, 0x0F1A, //APON=0, PON=15, AON=0, VCI1_EN=1, VC=10 |
silviosz | 1:a5ccd53612ea | 996 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 997 | 0x0011, 0x0F3A, //APON=0, PON=15, AON=1, VCI1_EN=1, VC=10 |
silviosz | 1:a5ccd53612ea | 998 | TFTLCD_DELAY, 30, |
silviosz | 1:a5ccd53612ea | 999 | |
silviosz | 1:a5ccd53612ea | 1000 | 0x0001, 0x0128, |
silviosz | 1:a5ccd53612ea | 1001 | 0x0002, 0x0100, |
silviosz | 1:a5ccd53612ea | 1002 | 0x0003, 0x1030, |
silviosz | 1:a5ccd53612ea | 1003 | 0x0007, 0x1012, |
silviosz | 1:a5ccd53612ea | 1004 | 0x0008, 0x0303, |
silviosz | 1:a5ccd53612ea | 1005 | 0x000B, 0x1100, |
silviosz | 1:a5ccd53612ea | 1006 | 0x000C, 0x0000, |
silviosz | 1:a5ccd53612ea | 1007 | 0x000F, 0x1801, |
silviosz | 1:a5ccd53612ea | 1008 | 0x0015, 0x0020, |
silviosz | 1:a5ccd53612ea | 1009 | |
silviosz | 1:a5ccd53612ea | 1010 | 0x0050,0x0101, |
silviosz | 1:a5ccd53612ea | 1011 | 0x0051,0x0603, |
silviosz | 1:a5ccd53612ea | 1012 | 0x0052,0x0408, |
silviosz | 1:a5ccd53612ea | 1013 | 0x0053,0x0000, |
silviosz | 1:a5ccd53612ea | 1014 | 0x0054,0x0605, |
silviosz | 1:a5ccd53612ea | 1015 | 0x0055,0x0406, |
silviosz | 1:a5ccd53612ea | 1016 | 0x0056,0x0303, |
silviosz | 1:a5ccd53612ea | 1017 | 0x0057,0x0303, |
silviosz | 1:a5ccd53612ea | 1018 | 0x0058,0x0010, |
silviosz | 1:a5ccd53612ea | 1019 | 0x0059,0x1000, |
silviosz | 1:a5ccd53612ea | 1020 | |
silviosz | 1:a5ccd53612ea | 1021 | 0x0007, 0x0012, //GON=1, REV=0, D=2 |
silviosz | 1:a5ccd53612ea | 1022 | TFTLCD_DELAY, 40, |
silviosz | 1:a5ccd53612ea | 1023 | 0x0007, 0x0013, //GON=1, REV=0, D=3 |
silviosz | 1:a5ccd53612ea | 1024 | 0x0007, 0x0017, //GON=1, REV=1, D=3 DISPLAY ON |
silviosz | 1:a5ccd53612ea | 1025 | }; |
silviosz | 1:a5ccd53612ea | 1026 | init_table16(S6D0154_regValues, sizeof(S6D0154_regValues)); |
silviosz | 1:a5ccd53612ea | 1027 | |
silviosz | 1:a5ccd53612ea | 1028 | break; |
silviosz | 1:a5ccd53612ea | 1029 | #endif |
silviosz | 1:a5ccd53612ea | 1030 | |
silviosz | 1:a5ccd53612ea | 1031 | #ifdef SUPPORT_1289 |
silviosz | 1:a5ccd53612ea | 1032 | case 0x9797: |
silviosz | 1:a5ccd53612ea | 1033 | is9797 = 1; |
silviosz | 1:a5ccd53612ea | 1034 | // _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1035 | // deliberately set READ_BGR to disable Software Scroll in graphictest_kbv example |
silviosz | 1:a5ccd53612ea | 1036 | _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC | READ_24BITS | READ_BGR; |
silviosz | 1:a5ccd53612ea | 1037 | _lcd_ID = 0x1289; |
silviosz | 1:a5ccd53612ea | 1038 | goto common_1289; |
silviosz | 1:a5ccd53612ea | 1039 | case 0x1289: |
silviosz | 1:a5ccd53612ea | 1040 | _lcd_capable = 0 | XSA_XEA_16BIT | REV_SCREEN | AUTO_READINC; |
silviosz | 1:a5ccd53612ea | 1041 | common_1289: |
silviosz | 1:a5ccd53612ea | 1042 | // came from MikroElektronika library http://www.hmsprojects.com/tft_lcd.html |
silviosz | 1:a5ccd53612ea | 1043 | static const uint16_t SSD1289_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1044 | 0x0000, 0x0001, |
silviosz | 1:a5ccd53612ea | 1045 | 0x0003, 0xA8A4, |
silviosz | 1:a5ccd53612ea | 1046 | 0x000C, 0x0000, |
silviosz | 1:a5ccd53612ea | 1047 | 0x000D, 0x000A, // VRH=10 |
silviosz | 1:a5ccd53612ea | 1048 | 0x000E, 0x2B00, |
silviosz | 1:a5ccd53612ea | 1049 | 0x001E, 0x00B7, |
silviosz | 1:a5ccd53612ea | 1050 | 0x0001, 0x2B3F, // setRotation() alters |
silviosz | 1:a5ccd53612ea | 1051 | 0x0002, 0x0600, // B_C=1, EOR=1 |
silviosz | 1:a5ccd53612ea | 1052 | 0x0010, 0x0000, |
silviosz | 1:a5ccd53612ea | 1053 | 0x0011, 0x6070, // setRotation() alters |
silviosz | 1:a5ccd53612ea | 1054 | 0x0005, 0x0000, |
silviosz | 1:a5ccd53612ea | 1055 | 0x0006, 0x0000, |
silviosz | 1:a5ccd53612ea | 1056 | 0x0016, 0xEF1C, |
silviosz | 1:a5ccd53612ea | 1057 | 0x0017, 0x0003, |
silviosz | 1:a5ccd53612ea | 1058 | 0x0007, 0x0233, |
silviosz | 1:a5ccd53612ea | 1059 | 0x000B, 0x0000, |
silviosz | 1:a5ccd53612ea | 1060 | 0x000F, 0x0000, |
silviosz | 1:a5ccd53612ea | 1061 | 0x0030, 0x0707, |
silviosz | 1:a5ccd53612ea | 1062 | 0x0031, 0x0204, |
silviosz | 1:a5ccd53612ea | 1063 | 0x0032, 0x0204, |
silviosz | 1:a5ccd53612ea | 1064 | 0x0033, 0x0502, |
silviosz | 1:a5ccd53612ea | 1065 | 0x0034, 0x0507, |
silviosz | 1:a5ccd53612ea | 1066 | 0x0035, 0x0204, |
silviosz | 1:a5ccd53612ea | 1067 | 0x0036, 0x0204, |
silviosz | 1:a5ccd53612ea | 1068 | 0x0037, 0x0502, |
silviosz | 1:a5ccd53612ea | 1069 | 0x003A, 0x0302, |
silviosz | 1:a5ccd53612ea | 1070 | 0x003B, 0x0302, |
silviosz | 1:a5ccd53612ea | 1071 | 0x0023, 0x0000, |
silviosz | 1:a5ccd53612ea | 1072 | 0x0024, 0x0000, |
silviosz | 1:a5ccd53612ea | 1073 | 0x0025, 0x8000, |
silviosz | 1:a5ccd53612ea | 1074 | }; |
silviosz | 1:a5ccd53612ea | 1075 | init_table16(SSD1289_regValues, sizeof(SSD1289_regValues)); |
silviosz | 1:a5ccd53612ea | 1076 | break; |
silviosz | 1:a5ccd53612ea | 1077 | #endif |
silviosz | 1:a5ccd53612ea | 1078 | |
silviosz | 1:a5ccd53612ea | 1079 | case 0x1511: // Unknown from Levy |
silviosz | 1:a5ccd53612ea | 1080 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1; //extra read_8(dummy) |
silviosz | 1:a5ccd53612ea | 1081 | static const uint8_t R61511_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1082 | 0xB0, 1, 0x00, //Command Access Protect |
silviosz | 1:a5ccd53612ea | 1083 | }; |
silviosz | 1:a5ccd53612ea | 1084 | table8_ads = R61511_regValues, table_size = sizeof(R61511_regValues); |
silviosz | 1:a5ccd53612ea | 1085 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1086 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 1087 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 1088 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 1089 | break; |
silviosz | 1:a5ccd53612ea | 1090 | |
silviosz | 1:a5ccd53612ea | 1091 | case 0x1520: |
silviosz | 1:a5ccd53612ea | 1092 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1093 | static const uint8_t R61520_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1094 | 0xB0, 1, 0x00, //Command Access Protect |
silviosz | 1:a5ccd53612ea | 1095 | 0xC0, 1, 0x0A, //DM=1, BGR=1 |
silviosz | 1:a5ccd53612ea | 1096 | }; |
silviosz | 1:a5ccd53612ea | 1097 | table8_ads = R61520_regValues, table_size = sizeof(R61520_regValues); |
silviosz | 1:a5ccd53612ea | 1098 | break; |
silviosz | 1:a5ccd53612ea | 1099 | |
silviosz | 1:a5ccd53612ea | 1100 | case 0x1526: |
silviosz | 1:a5ccd53612ea | 1101 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1102 | static const uint8_t R61526_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1103 | 0xB0, 1, 0x03, //Command Access |
silviosz | 1:a5ccd53612ea | 1104 | 0xE2, 1, 0x3F, //Command Write Access |
silviosz | 1:a5ccd53612ea | 1105 | 0xC0, 1, 0x22, //REV=0, BGR=1, SS=0 |
silviosz | 1:a5ccd53612ea | 1106 | 0xE2, 1, 0x00, //Command Write Protect |
silviosz | 1:a5ccd53612ea | 1107 | }; |
silviosz | 1:a5ccd53612ea | 1108 | table8_ads = R61526_regValues, table_size = sizeof(R61526_regValues); |
silviosz | 1:a5ccd53612ea | 1109 | break; |
silviosz | 1:a5ccd53612ea | 1110 | |
silviosz | 1:a5ccd53612ea | 1111 | #ifdef SUPPORT_1580 |
silviosz | 1:a5ccd53612ea | 1112 | case 0x1580: |
silviosz | 1:a5ccd53612ea | 1113 | _lcd_capable = 0 | REV_SCREEN | READ_BGR | INVERT_GS | READ_NODUMMY; //thanks vanhan123 |
silviosz | 1:a5ccd53612ea | 1114 | static const uint16_t R61580_regValues[] PROGMEM = { //from MCHIP Graphics Lib drvTFT001.c |
silviosz | 1:a5ccd53612ea | 1115 | // Synchronization after reset |
silviosz | 1:a5ccd53612ea | 1116 | TFTLCD_DELAY, 2, |
silviosz | 1:a5ccd53612ea | 1117 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 1118 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 1119 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 1120 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 1121 | |
silviosz | 1:a5ccd53612ea | 1122 | // Setup display |
silviosz | 1:a5ccd53612ea | 1123 | 0x00A4, 0x0001, // CALB=1 |
silviosz | 1:a5ccd53612ea | 1124 | TFTLCD_DELAY, 2, |
silviosz | 1:a5ccd53612ea | 1125 | 0x0060, 0xA700, // Driver Output Control |
silviosz | 1:a5ccd53612ea | 1126 | 0x0008, 0x0808, // Display Control BP=8, FP=8 |
silviosz | 1:a5ccd53612ea | 1127 | 0x0030, 0x0111, // y control |
silviosz | 1:a5ccd53612ea | 1128 | 0x0031, 0x2410, // y control |
silviosz | 1:a5ccd53612ea | 1129 | 0x0032, 0x0501, // y control |
silviosz | 1:a5ccd53612ea | 1130 | 0x0033, 0x050C, // y control |
silviosz | 1:a5ccd53612ea | 1131 | 0x0034, 0x2211, // y control |
silviosz | 1:a5ccd53612ea | 1132 | 0x0035, 0x0C05, // y control |
silviosz | 1:a5ccd53612ea | 1133 | 0x0036, 0x2105, // y control |
silviosz | 1:a5ccd53612ea | 1134 | 0x0037, 0x1004, // y control |
silviosz | 1:a5ccd53612ea | 1135 | 0x0038, 0x1101, // y control |
silviosz | 1:a5ccd53612ea | 1136 | 0x0039, 0x1122, // y control |
silviosz | 1:a5ccd53612ea | 1137 | 0x0090, 0x0019, // 80Hz |
silviosz | 1:a5ccd53612ea | 1138 | 0x0010, 0x0530, // Power Control |
silviosz | 1:a5ccd53612ea | 1139 | 0x0011, 0x0237, //DC1=2, DC0=3, VC=7 |
silviosz | 1:a5ccd53612ea | 1140 | // 0x0011, 0x17B0, //DC1=7, DC0=3, VC=0 ?b12 ?b7 vanhan123 |
silviosz | 1:a5ccd53612ea | 1141 | 0x0012, 0x01BF, //VCMR=1, PSON=1, PON=1, VRH=15 |
silviosz | 1:a5ccd53612ea | 1142 | // 0x0012, 0x013A, //VCMR=1, PSON=1, PON=1, VRH=10 vanhan123 |
silviosz | 1:a5ccd53612ea | 1143 | 0x0013, 0x1300, //VDV=19 |
silviosz | 1:a5ccd53612ea | 1144 | TFTLCD_DELAY, 100, |
silviosz | 1:a5ccd53612ea | 1145 | |
silviosz | 1:a5ccd53612ea | 1146 | 0x0001, 0x0100, |
silviosz | 1:a5ccd53612ea | 1147 | 0x0002, 0x0200, |
silviosz | 1:a5ccd53612ea | 1148 | 0x0003, 0x1030, |
silviosz | 1:a5ccd53612ea | 1149 | 0x0009, 0x0001, |
silviosz | 1:a5ccd53612ea | 1150 | 0x000A, 0x0008, |
silviosz | 1:a5ccd53612ea | 1151 | 0x000C, 0x0001, |
silviosz | 1:a5ccd53612ea | 1152 | 0x000D, 0xD000, |
silviosz | 1:a5ccd53612ea | 1153 | 0x000E, 0x0030, |
silviosz | 1:a5ccd53612ea | 1154 | 0x000F, 0x0000, |
silviosz | 1:a5ccd53612ea | 1155 | 0x0020, 0x0000, |
silviosz | 1:a5ccd53612ea | 1156 | 0x0021, 0x0000, |
silviosz | 1:a5ccd53612ea | 1157 | 0x0029, 0x0077, |
silviosz | 1:a5ccd53612ea | 1158 | 0x0050, 0x0000, |
silviosz | 1:a5ccd53612ea | 1159 | 0x0051, 0xD0EF, |
silviosz | 1:a5ccd53612ea | 1160 | 0x0052, 0x0000, |
silviosz | 1:a5ccd53612ea | 1161 | 0x0053, 0x013F, |
silviosz | 1:a5ccd53612ea | 1162 | 0x0061, 0x0001, |
silviosz | 1:a5ccd53612ea | 1163 | 0x006A, 0x0000, |
silviosz | 1:a5ccd53612ea | 1164 | 0x0080, 0x0000, |
silviosz | 1:a5ccd53612ea | 1165 | 0x0081, 0x0000, |
silviosz | 1:a5ccd53612ea | 1166 | 0x0082, 0x005F, |
silviosz | 1:a5ccd53612ea | 1167 | 0x0093, 0x0701, |
silviosz | 1:a5ccd53612ea | 1168 | 0x0007, 0x0100, |
silviosz | 1:a5ccd53612ea | 1169 | }; |
silviosz | 1:a5ccd53612ea | 1170 | static const uint16_t R61580_DEM240320C[] PROGMEM = { //from DEM 240320C TMH-PW-N |
silviosz | 1:a5ccd53612ea | 1171 | 0x00, 0x0000, |
silviosz | 1:a5ccd53612ea | 1172 | 0x00, 0x0000, |
silviosz | 1:a5ccd53612ea | 1173 | TFTLCD_DELAY, 100, |
silviosz | 1:a5ccd53612ea | 1174 | 0x00, 0x0000, |
silviosz | 1:a5ccd53612ea | 1175 | 0x00, 0x0000, |
silviosz | 1:a5ccd53612ea | 1176 | 0x00, 0x0000, |
silviosz | 1:a5ccd53612ea | 1177 | 0x00, 0x0000, |
silviosz | 1:a5ccd53612ea | 1178 | 0xA4, 0x0001, |
silviosz | 1:a5ccd53612ea | 1179 | TFTLCD_DELAY, 100, |
silviosz | 1:a5ccd53612ea | 1180 | 0x60, 0xA700, |
silviosz | 1:a5ccd53612ea | 1181 | 0x08, 0x0808, |
silviosz | 1:a5ccd53612ea | 1182 | /******************************************/ |
silviosz | 1:a5ccd53612ea | 1183 | //Gamma Setting: |
silviosz | 1:a5ccd53612ea | 1184 | 0x30, 0x0203, |
silviosz | 1:a5ccd53612ea | 1185 | 0x31, 0x080F, |
silviosz | 1:a5ccd53612ea | 1186 | 0x32, 0x0401, |
silviosz | 1:a5ccd53612ea | 1187 | 0x33, 0x050B, |
silviosz | 1:a5ccd53612ea | 1188 | 0x34, 0x3330, |
silviosz | 1:a5ccd53612ea | 1189 | 0x35, 0x0B05, |
silviosz | 1:a5ccd53612ea | 1190 | 0x36, 0x0005, |
silviosz | 1:a5ccd53612ea | 1191 | 0x37, 0x0F08, |
silviosz | 1:a5ccd53612ea | 1192 | 0x38, 0x0302, |
silviosz | 1:a5ccd53612ea | 1193 | 0x39, 0x3033, |
silviosz | 1:a5ccd53612ea | 1194 | /******************************************/ |
silviosz | 1:a5ccd53612ea | 1195 | //Power Setting: |
silviosz | 1:a5ccd53612ea | 1196 | 0x90, 0x0018, //80Hz |
silviosz | 1:a5ccd53612ea | 1197 | 0x10, 0x0530, //BT,AP |
silviosz | 1:a5ccd53612ea | 1198 | 0x11, 0x0237, //DC1,DC0,VC |
silviosz | 1:a5ccd53612ea | 1199 | 0x12, 0x01BF, |
silviosz | 1:a5ccd53612ea | 1200 | 0x13, 0x1000, //VCOM |
silviosz | 1:a5ccd53612ea | 1201 | TFTLCD_DELAY, 200, |
silviosz | 1:a5ccd53612ea | 1202 | /******************************************/ |
silviosz | 1:a5ccd53612ea | 1203 | 0x01, 0x0100, |
silviosz | 1:a5ccd53612ea | 1204 | 0x02, 0x0200, |
silviosz | 1:a5ccd53612ea | 1205 | 0x03, 0x1030, |
silviosz | 1:a5ccd53612ea | 1206 | 0x09, 0x0001, |
silviosz | 1:a5ccd53612ea | 1207 | 0x0A, 0x0008, |
silviosz | 1:a5ccd53612ea | 1208 | 0x0C, 0x0000, |
silviosz | 1:a5ccd53612ea | 1209 | 0x0D, 0xD000, |
silviosz | 1:a5ccd53612ea | 1210 | |
silviosz | 1:a5ccd53612ea | 1211 | 0x0E, 0x0030, |
silviosz | 1:a5ccd53612ea | 1212 | 0x0F, 0x0000, |
silviosz | 1:a5ccd53612ea | 1213 | 0x20, 0x0000, //H Start |
silviosz | 1:a5ccd53612ea | 1214 | 0x21, 0x0000, //V Start |
silviosz | 1:a5ccd53612ea | 1215 | 0x29, 0x002E, |
silviosz | 1:a5ccd53612ea | 1216 | 0x50, 0x0000, |
silviosz | 1:a5ccd53612ea | 1217 | 0x51, 0x00EF, |
silviosz | 1:a5ccd53612ea | 1218 | 0x52, 0x0000, |
silviosz | 1:a5ccd53612ea | 1219 | 0x53, 0x013F, |
silviosz | 1:a5ccd53612ea | 1220 | 0x61, 0x0001, |
silviosz | 1:a5ccd53612ea | 1221 | 0x6A, 0x0000, |
silviosz | 1:a5ccd53612ea | 1222 | 0x80, 0x0000, |
silviosz | 1:a5ccd53612ea | 1223 | 0x81, 0x0000, |
silviosz | 1:a5ccd53612ea | 1224 | 0x82, 0x005F, |
silviosz | 1:a5ccd53612ea | 1225 | 0x93, 0x0701, |
silviosz | 1:a5ccd53612ea | 1226 | /******************************************/ |
silviosz | 1:a5ccd53612ea | 1227 | 0x07, 0x0100, |
silviosz | 1:a5ccd53612ea | 1228 | TFTLCD_DELAY, 100, |
silviosz | 1:a5ccd53612ea | 1229 | }; |
silviosz | 1:a5ccd53612ea | 1230 | init_table16(R61580_DEM240320C, sizeof(R61580_DEM240320C)); |
silviosz | 1:a5ccd53612ea | 1231 | // init_table16(R61580_regValues, sizeof(R61580_regValues)); |
silviosz | 1:a5ccd53612ea | 1232 | break; |
silviosz | 1:a5ccd53612ea | 1233 | #endif |
silviosz | 1:a5ccd53612ea | 1234 | |
silviosz | 1:a5ccd53612ea | 1235 | #if defined(SUPPORT_1963) && USING_16BIT_BUS |
silviosz | 1:a5ccd53612ea | 1236 | case 0x1963: |
silviosz | 1:a5ccd53612ea | 1237 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | READ_NODUMMY | INVERT_SS | INVERT_RGB; |
silviosz | 1:a5ccd53612ea | 1238 | // from NHD 5.0" 8-bit |
silviosz | 1:a5ccd53612ea | 1239 | static const uint8_t SSD1963_NHD_50_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1240 | (0xE0), 1, 0x01, // PLL enable |
silviosz | 1:a5ccd53612ea | 1241 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1242 | (0xE0), 1, 0x03, // Lock PLL |
silviosz | 1:a5ccd53612ea | 1243 | (0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION |
silviosz | 1:a5ccd53612ea | 1244 | (0xF0), 1, 0x03, //was 00 pixel data interface |
silviosz | 1:a5ccd53612ea | 1245 | // (0x3A), 1, 0x60, // SET R G B format = 6 6 6 |
silviosz | 1:a5ccd53612ea | 1246 | (0xE2), 3, 0x1D, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M |
silviosz | 1:a5ccd53612ea | 1247 | (0xE6), 3, 0x02, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution |
silviosz | 1:a5ccd53612ea | 1248 | (0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00, //HSYNC |
silviosz | 1:a5ccd53612ea | 1249 | (0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC |
silviosz | 1:a5ccd53612ea | 1250 | (0x13), 0, //Enter Normal mode |
silviosz | 1:a5ccd53612ea | 1251 | (0x38), 0, //Exit Idle mode |
silviosz | 1:a5ccd53612ea | 1252 | }; |
silviosz | 1:a5ccd53612ea | 1253 | // from NHD 7.0" 8-bit |
silviosz | 1:a5ccd53612ea | 1254 | static const uint8_t SSD1963_NHD_70_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1255 | (0xE2), 3, 0x1D, 0x02, 0x04, //PLL multiplier, set PLL clock to 120M |
silviosz | 1:a5ccd53612ea | 1256 | (0xE0), 1, 0x01, // PLL enable |
silviosz | 1:a5ccd53612ea | 1257 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1258 | (0xE0), 1, 0x03, // Lock PLL |
silviosz | 1:a5ccd53612ea | 1259 | 0x01, 0, //Soft Reset |
silviosz | 1:a5ccd53612ea | 1260 | TFTLCD_DELAY8, 120, |
silviosz | 1:a5ccd53612ea | 1261 | (0xB0), 7, 0x08, 0x80, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION |
silviosz | 1:a5ccd53612ea | 1262 | (0xF0), 1, 0x03, //was 00 pixel data interface |
silviosz | 1:a5ccd53612ea | 1263 | // (0x3A), 1, 0x60, // SET R G B format = 6 6 6 |
silviosz | 1:a5ccd53612ea | 1264 | (0xE6), 3, 0x0F, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution |
silviosz | 1:a5ccd53612ea | 1265 | (0xB4), 8, 0x04, 0x20, 0x00, 0x58, 0x80, 0x00, 0x00, 0x00, //HSYNC |
silviosz | 1:a5ccd53612ea | 1266 | (0xB6), 7, 0x02, 0x0D, 0x00, 0x20, 0x01, 0x00, 0x00, //VSYNC |
silviosz | 1:a5ccd53612ea | 1267 | (0x13), 0, //Enter Normal mode |
silviosz | 1:a5ccd53612ea | 1268 | (0x38), 0, //Exit Idle mode |
silviosz | 1:a5ccd53612ea | 1269 | }; |
silviosz | 1:a5ccd53612ea | 1270 | // from UTFTv2.81 initlcd.h |
silviosz | 1:a5ccd53612ea | 1271 | static const uint8_t SSD1963_800_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1272 | (0xE2), 3, 0x1E, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M |
silviosz | 1:a5ccd53612ea | 1273 | (0xE0), 1, 0x01, // PLL enable |
silviosz | 1:a5ccd53612ea | 1274 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1275 | (0xE0), 1, 0x03, // |
silviosz | 1:a5ccd53612ea | 1276 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1277 | 0x01, 0, //Soft Reset |
silviosz | 1:a5ccd53612ea | 1278 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1279 | (0xE6), 3, 0x03, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution |
silviosz | 1:a5ccd53612ea | 1280 | (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION |
silviosz | 1:a5ccd53612ea | 1281 | // (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x2D, //LCD SPECIFICATION |
silviosz | 1:a5ccd53612ea | 1282 | (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC |
silviosz | 1:a5ccd53612ea | 1283 | (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC |
silviosz | 1:a5ccd53612ea | 1284 | (0xBA), 1, 0x0F, //GPIO[3:0] out 1 |
silviosz | 1:a5ccd53612ea | 1285 | (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output |
silviosz | 1:a5ccd53612ea | 1286 | (0xF0), 1, 0x03, //pixel data interface |
silviosz | 1:a5ccd53612ea | 1287 | TFTLCD_DELAY8, 1, |
silviosz | 1:a5ccd53612ea | 1288 | 0x28, 0, //Display Off |
silviosz | 1:a5ccd53612ea | 1289 | 0x11, 0, //Sleep Out |
silviosz | 1:a5ccd53612ea | 1290 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1291 | 0x29, 0, //Display On |
silviosz | 1:a5ccd53612ea | 1292 | (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L |
silviosz | 1:a5ccd53612ea | 1293 | (0xD0), 1, 0x0D, |
silviosz | 1:a5ccd53612ea | 1294 | }; |
silviosz | 1:a5ccd53612ea | 1295 | // from UTFTv2.82 initlcd.h |
silviosz | 1:a5ccd53612ea | 1296 | static const uint8_t SSD1963_800NEW_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1297 | (0xE2), 3, 0x1E, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M |
silviosz | 1:a5ccd53612ea | 1298 | (0xE0), 1, 0x01, // PLL enable |
silviosz | 1:a5ccd53612ea | 1299 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1300 | (0xE0), 1, 0x03, // |
silviosz | 1:a5ccd53612ea | 1301 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1302 | 0x01, 0, //Soft Reset |
silviosz | 1:a5ccd53612ea | 1303 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1304 | (0xE6), 3, 0x03, 0xFF, 0xFF, //PLL setting for PCLK, depends on resolution |
silviosz | 1:a5ccd53612ea | 1305 | (0xB0), 7, 0x24, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION |
silviosz | 1:a5ccd53612ea | 1306 | (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC HT=928, HPS=46, HPW=48, LPS=15 |
silviosz | 1:a5ccd53612ea | 1307 | (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC VT=525, VPS=16, VPW=16, FPS=8 |
silviosz | 1:a5ccd53612ea | 1308 | (0xBA), 1, 0x0F, //GPIO[3:0] out 1 |
silviosz | 1:a5ccd53612ea | 1309 | (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output |
silviosz | 1:a5ccd53612ea | 1310 | (0xF0), 1, 0x03, //pixel data interface |
silviosz | 1:a5ccd53612ea | 1311 | TFTLCD_DELAY8, 1, |
silviosz | 1:a5ccd53612ea | 1312 | 0x28, 0, //Display Off |
silviosz | 1:a5ccd53612ea | 1313 | 0x11, 0, //Sleep Out |
silviosz | 1:a5ccd53612ea | 1314 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1315 | 0x29, 0, //Display On |
silviosz | 1:a5ccd53612ea | 1316 | (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L |
silviosz | 1:a5ccd53612ea | 1317 | (0xD0), 1, 0x0D, |
silviosz | 1:a5ccd53612ea | 1318 | }; |
silviosz | 1:a5ccd53612ea | 1319 | // from UTFTv2.82 initlcd.h |
silviosz | 1:a5ccd53612ea | 1320 | static const uint8_t SSD1963_800ALT_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1321 | (0xE2), 3, 0x23, 0x02, 0x04, //PLL multiplier, set PLL clock to 120M |
silviosz | 1:a5ccd53612ea | 1322 | (0xE0), 1, 0x01, // PLL enable |
silviosz | 1:a5ccd53612ea | 1323 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1324 | (0xE0), 1, 0x03, // |
silviosz | 1:a5ccd53612ea | 1325 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1326 | 0x01, 0, //Soft Reset |
silviosz | 1:a5ccd53612ea | 1327 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1328 | (0xE6), 3, 0x04, 0x93, 0xE0, //PLL setting for PCLK, depends on resolution |
silviosz | 1:a5ccd53612ea | 1329 | (0xB0), 7, 0x00, 0x00, 0x03, 0x1F, 0x01, 0xDF, 0x00, //LCD SPECIFICATION |
silviosz | 1:a5ccd53612ea | 1330 | (0xB4), 8, 0x03, 0xA0, 0x00, 0x2E, 0x30, 0x00, 0x0F, 0x00, //HSYNC HT=928, HPS=46, HPW=48, LPS=15 |
silviosz | 1:a5ccd53612ea | 1331 | (0xB6), 7, 0x02, 0x0D, 0x00, 0x10, 0x10, 0x00, 0x08, //VSYNC VT=525, VPS=16, VPW=16, FPS=8 |
silviosz | 1:a5ccd53612ea | 1332 | (0xBA), 1, 0x0F, //GPIO[3:0] out 1 |
silviosz | 1:a5ccd53612ea | 1333 | (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output |
silviosz | 1:a5ccd53612ea | 1334 | (0xF0), 1, 0x03, //pixel data interface |
silviosz | 1:a5ccd53612ea | 1335 | TFTLCD_DELAY8, 1, |
silviosz | 1:a5ccd53612ea | 1336 | 0x28, 0, //Display Off |
silviosz | 1:a5ccd53612ea | 1337 | 0x11, 0, //Sleep Out |
silviosz | 1:a5ccd53612ea | 1338 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1339 | 0x29, 0, //Display On |
silviosz | 1:a5ccd53612ea | 1340 | (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L |
silviosz | 1:a5ccd53612ea | 1341 | (0xD0), 1, 0x0D, |
silviosz | 1:a5ccd53612ea | 1342 | }; |
silviosz | 1:a5ccd53612ea | 1343 | // from UTFTv2.82 initlcd.h |
silviosz | 1:a5ccd53612ea | 1344 | static const uint8_t SSD1963_480_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1345 | (0xE2), 3, 0x23, 0x02, 0x54, //PLL multiplier, set PLL clock to 120M |
silviosz | 1:a5ccd53612ea | 1346 | (0xE0), 1, 0x01, // PLL enable |
silviosz | 1:a5ccd53612ea | 1347 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1348 | (0xE0), 1, 0x03, // |
silviosz | 1:a5ccd53612ea | 1349 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1350 | 0x01, 0, //Soft Reset |
silviosz | 1:a5ccd53612ea | 1351 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1352 | (0xE6), 3, 0x01, 0x1F, 0xFF, //PLL setting for PCLK, depends on resolution |
silviosz | 1:a5ccd53612ea | 1353 | (0xB0), 7, 0x20, 0x00, 0x01, 0xDF, 0x01, 0x0F, 0x00, //LCD SPECIFICATION |
silviosz | 1:a5ccd53612ea | 1354 | (0xB4), 8, 0x02, 0x13, 0x00, 0x08, 0x2B, 0x00, 0x02, 0x00, //HSYNC |
silviosz | 1:a5ccd53612ea | 1355 | (0xB6), 7, 0x01, 0x20, 0x00, 0x04, 0x0C, 0x00, 0x02, //VSYNC |
silviosz | 1:a5ccd53612ea | 1356 | (0xBA), 1, 0x0F, //GPIO[3:0] out 1 |
silviosz | 1:a5ccd53612ea | 1357 | (0xB8), 2, 0x07, 0x01, //GPIO3=input, GPIO[2:0]=output |
silviosz | 1:a5ccd53612ea | 1358 | (0xF0), 1, 0x03, //pixel data interface |
silviosz | 1:a5ccd53612ea | 1359 | TFTLCD_DELAY8, 1, |
silviosz | 1:a5ccd53612ea | 1360 | 0x28, 0, //Display Off |
silviosz | 1:a5ccd53612ea | 1361 | 0x11, 0, //Sleep Out |
silviosz | 1:a5ccd53612ea | 1362 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1363 | 0x29, 0, //Display On |
silviosz | 1:a5ccd53612ea | 1364 | (0xBE), 6, 0x06, 0xF0, 0x01, 0xF0, 0x00, 0x00, //set PWM for B/L |
silviosz | 1:a5ccd53612ea | 1365 | (0xD0), 1, 0x0D, |
silviosz | 1:a5ccd53612ea | 1366 | }; |
silviosz | 1:a5ccd53612ea | 1367 | // table8_ads = SSD1963_480_regValues, table_size = sizeof(SSD1963_480_regValues); |
silviosz | 1:a5ccd53612ea | 1368 | table8_ads = SSD1963_800_regValues, table_size = sizeof(SSD1963_800_regValues); |
silviosz | 1:a5ccd53612ea | 1369 | // table8_ads = SSD1963_NHD_50_regValues, table_size = sizeof(SSD1963_NHD_50_regValues); |
silviosz | 1:a5ccd53612ea | 1370 | // table8_ads = SSD1963_NHD_70_regValues, table_size = sizeof(SSD1963_NHD_70_regValues); |
silviosz | 1:a5ccd53612ea | 1371 | // table8_ads = SSD1963_800NEW_regValues, table_size = sizeof(SSD1963_800NEW_regValues); |
silviosz | 1:a5ccd53612ea | 1372 | // table8_ads = SSD1963_800ALT_regValues, table_size = sizeof(SSD1963_800ALT_regValues); |
silviosz | 1:a5ccd53612ea | 1373 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1374 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 1375 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 1376 | *p16 = 800; |
silviosz | 1:a5ccd53612ea | 1377 | break; |
silviosz | 1:a5ccd53612ea | 1378 | #endif |
silviosz | 1:a5ccd53612ea | 1379 | |
silviosz | 1:a5ccd53612ea | 1380 | #ifdef SUPPORT_4532 |
silviosz | 1:a5ccd53612ea | 1381 | //Support for LG Electronics LGDP4532 (also 4531 i guess) by Leodino v1.0 2-Nov-2016 |
silviosz | 1:a5ccd53612ea | 1382 | //based on data by waveshare and the datasheet of LG Electronics |
silviosz | 1:a5ccd53612ea | 1383 | //My approach to get it working: the parameters by waveshare did no make it function allright |
silviosz | 1:a5ccd53612ea | 1384 | //I started with remming lines to see if this helped. Basically the stuff in range 41-93 |
silviosz | 1:a5ccd53612ea | 1385 | //gives problems. |
silviosz | 1:a5ccd53612ea | 1386 | //The other lines that are REMmed give no problems, but it seems default values are OK as well. |
silviosz | 1:a5ccd53612ea | 1387 | case 0x4532: // thanks Leodino |
silviosz | 1:a5ccd53612ea | 1388 | _lcd_capable = 0 | REV_SCREEN; // | INVERT_GS; |
silviosz | 1:a5ccd53612ea | 1389 | static const uint16_t LGDP4532_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1390 | 0x0000,0x0001, //Device code read |
silviosz | 1:a5ccd53612ea | 1391 | 0x0010,0x0628, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP |
silviosz | 1:a5ccd53612ea | 1392 | 0x0012,0x0006, //Power control 3 PON VRH[3:0] |
silviosz | 1:a5ccd53612ea | 1393 | //0x0013,0x0A32, //Power control 4 VCOMG VDV[4:0] VCM[6:0] |
silviosz | 1:a5ccd53612ea | 1394 | 0x0011,0x0040, //Power control 2; DC1[2:0] DC0[2:0] VC[2:0] |
silviosz | 1:a5ccd53612ea | 1395 | //0x0015,0x0050, //Regulator control RSET RI[2:0] RV[2:0] RCONT[2:0] |
silviosz | 1:a5ccd53612ea | 1396 | 0x0012,0x0016, //Power control 3 PON VRH[3:0] |
silviosz | 1:a5ccd53612ea | 1397 | TFTLCD_DELAY,50, |
silviosz | 1:a5ccd53612ea | 1398 | 0x0010,0x5660, //Power control 1 SAP[2:0] BT[3:0] AP[2:0] DK DSTB SLP |
silviosz | 1:a5ccd53612ea | 1399 | TFTLCD_DELAY,50, |
silviosz | 1:a5ccd53612ea | 1400 | //0x0013,0x2A4E, //Power control 4 VCOMG VDV[4:0] VCM[6:0] |
silviosz | 1:a5ccd53612ea | 1401 | //0x0001,0x0100, //Driver output control SM SS |
silviosz | 1:a5ccd53612ea | 1402 | //0x0002,0x0300, //LCD Driving Wave Control |
silviosz | 1:a5ccd53612ea | 1403 | //0x0003,0x1030, //Entry mode TRI DFM BGR ORG I/D[1:0] AM |
silviosz | 1:a5ccd53612ea | 1404 | //0x0007,0x0202, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0] |
silviosz | 1:a5ccd53612ea | 1405 | TFTLCD_DELAY,50, |
silviosz | 1:a5ccd53612ea | 1406 | //0x0008,0x0202, //Display Control 2 FP[3:0] BP[3:0] front and back porch (blank period at begin and end..) |
silviosz | 1:a5ccd53612ea | 1407 | //0x000A,0x0000, //Test Register 1 (RA0h) |
silviosz | 1:a5ccd53612ea | 1408 | //Gamma adjustment |
silviosz | 1:a5ccd53612ea | 1409 | 0x0030,0x0000, |
silviosz | 1:a5ccd53612ea | 1410 | 0x0031,0x0402, |
silviosz | 1:a5ccd53612ea | 1411 | 0x0032,0x0106, |
silviosz | 1:a5ccd53612ea | 1412 | 0x0033,0x0700, |
silviosz | 1:a5ccd53612ea | 1413 | 0x0034,0x0104, |
silviosz | 1:a5ccd53612ea | 1414 | 0x0035,0x0301, |
silviosz | 1:a5ccd53612ea | 1415 | 0x0036,0x0707, |
silviosz | 1:a5ccd53612ea | 1416 | 0x0037,0x0305, |
silviosz | 1:a5ccd53612ea | 1417 | 0x0038,0x0208, |
silviosz | 1:a5ccd53612ea | 1418 | 0x0039,0x0F0B, |
silviosz | 1:a5ccd53612ea | 1419 | TFTLCD_DELAY,50, |
silviosz | 1:a5ccd53612ea | 1420 | //some of this stuff in range 41-93 really throws things off.... |
silviosz | 1:a5ccd53612ea | 1421 | //0x0041,0x0002, |
silviosz | 1:a5ccd53612ea | 1422 | //0x0060,0x2700, //Driver Output Control (R60h) |
silviosz | 1:a5ccd53612ea | 1423 | //0x0061,0x0001, //Base Image Display Control (R61h) |
silviosz | 1:a5ccd53612ea | 1424 | //0x0090,0x0119, //Panel Interface Control 1 (R90h) DIVI[1:0] RTNI[4:0] |
silviosz | 1:a5ccd53612ea | 1425 | //0x0092,0x010A, //Panel Interface Control 2 (R92h) NOWI[2:0] EQI2[1:0] EQI1[1:0] |
silviosz | 1:a5ccd53612ea | 1426 | //0x0093,0x0004, //Panel Interface Control 3 (R93h) MCPI[2:0] |
silviosz | 1:a5ccd53612ea | 1427 | //0x00A0,0x0100, //Test Register 1 (RA0h) |
silviosz | 1:a5ccd53612ea | 1428 | TFTLCD_DELAY,50, |
silviosz | 1:a5ccd53612ea | 1429 | 0x0007,0x0133, //Display Control 1 PTDE[1:0] BASEE GON DTE COL D[1:0] |
silviosz | 1:a5ccd53612ea | 1430 | TFTLCD_DELAY,50, |
silviosz | 1:a5ccd53612ea | 1431 | //0x00A0,0x0000, //Test Register 1 (RA0h) |
silviosz | 1:a5ccd53612ea | 1432 | }; |
silviosz | 1:a5ccd53612ea | 1433 | init_table16(LGDP4532_regValues, sizeof(LGDP4532_regValues)); |
silviosz | 1:a5ccd53612ea | 1434 | break; |
silviosz | 1:a5ccd53612ea | 1435 | #endif |
silviosz | 1:a5ccd53612ea | 1436 | |
silviosz | 1:a5ccd53612ea | 1437 | #ifdef SUPPORT_4535 |
silviosz | 1:a5ccd53612ea | 1438 | case 0x4535: |
silviosz | 1:a5ccd53612ea | 1439 | _lcd_capable = 0 | REV_SCREEN; // | INVERT_GS; |
silviosz | 1:a5ccd53612ea | 1440 | static const uint16_t LGDP4535_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1441 | 0x0015, 0x0030, // Set the internal vcore voltage |
silviosz | 1:a5ccd53612ea | 1442 | 0x009A, 0x0010, // Start internal OSC |
silviosz | 1:a5ccd53612ea | 1443 | 0x0011, 0x0020, // set SS and SM bit |
silviosz | 1:a5ccd53612ea | 1444 | 0x0010, 0x3428, // set 1 line inversion |
silviosz | 1:a5ccd53612ea | 1445 | 0x0012, 0x0002, // set GRAM write direction and BGR=1 |
silviosz | 1:a5ccd53612ea | 1446 | 0x0013, 0x1038, // Resize register |
silviosz | 1:a5ccd53612ea | 1447 | TFTLCD_DELAY, 40, |
silviosz | 1:a5ccd53612ea | 1448 | 0x0012, 0x0012, // set the back porch and front porch |
silviosz | 1:a5ccd53612ea | 1449 | TFTLCD_DELAY, 40, |
silviosz | 1:a5ccd53612ea | 1450 | 0x0010, 0x3420, // set non-display area refresh cycle ISC[3:0] |
silviosz | 1:a5ccd53612ea | 1451 | 0x0013, 0x3045, // FMARK function |
silviosz | 1:a5ccd53612ea | 1452 | TFTLCD_DELAY, 70, |
silviosz | 1:a5ccd53612ea | 1453 | 0x0030, 0x0000, // RGB interface setting |
silviosz | 1:a5ccd53612ea | 1454 | 0x0031, 0x0402, // Frame marker Position |
silviosz | 1:a5ccd53612ea | 1455 | 0x0032, 0x0307, // RGB interface polarity |
silviosz | 1:a5ccd53612ea | 1456 | 0x0033, 0x0304, // SAP, BT[3:0], AP, DSTB, SLP, STB |
silviosz | 1:a5ccd53612ea | 1457 | 0x0034, 0x0004, // DC1[2:0], DC0[2:0], VC[2:0] |
silviosz | 1:a5ccd53612ea | 1458 | 0x0035, 0x0401, // VREG1OUT voltage |
silviosz | 1:a5ccd53612ea | 1459 | 0x0036, 0x0707, // VDV[4:0] for VCOM amplitude |
silviosz | 1:a5ccd53612ea | 1460 | 0x0037, 0x0305, // SAP, BT[3:0], AP, DSTB, SLP, STB |
silviosz | 1:a5ccd53612ea | 1461 | 0x0038, 0x0610, // DC1[2:0], DC0[2:0], VC[2:0] |
silviosz | 1:a5ccd53612ea | 1462 | 0x0039, 0x0610, // VREG1OUT voltage |
silviosz | 1:a5ccd53612ea | 1463 | 0x0001, 0x0100, // VDV[4:0] for VCOM amplitude |
silviosz | 1:a5ccd53612ea | 1464 | 0x0002, 0x0300, // VCM[4:0] for VCOMH |
silviosz | 1:a5ccd53612ea | 1465 | 0x0003, 0x1030, // GRAM horizontal Address |
silviosz | 1:a5ccd53612ea | 1466 | 0x0008, 0x0808, // GRAM Vertical Address |
silviosz | 1:a5ccd53612ea | 1467 | 0x000A, 0x0008, |
silviosz | 1:a5ccd53612ea | 1468 | 0x0060, 0x2700, // Gate Scan Line |
silviosz | 1:a5ccd53612ea | 1469 | 0x0061, 0x0001, // NDL,VLE, REV |
silviosz | 1:a5ccd53612ea | 1470 | 0x0090, 0x013E, |
silviosz | 1:a5ccd53612ea | 1471 | 0x0092, 0x0100, |
silviosz | 1:a5ccd53612ea | 1472 | 0x0093, 0x0100, |
silviosz | 1:a5ccd53612ea | 1473 | 0x00A0, 0x3000, |
silviosz | 1:a5ccd53612ea | 1474 | 0x00A3, 0x0010, |
silviosz | 1:a5ccd53612ea | 1475 | 0x0007, 0x0001, |
silviosz | 1:a5ccd53612ea | 1476 | 0x0007, 0x0021, |
silviosz | 1:a5ccd53612ea | 1477 | 0x0007, 0x0023, |
silviosz | 1:a5ccd53612ea | 1478 | 0x0007, 0x0033, |
silviosz | 1:a5ccd53612ea | 1479 | 0x0007, 0x0133, |
silviosz | 1:a5ccd53612ea | 1480 | }; |
silviosz | 1:a5ccd53612ea | 1481 | init_table16(LGDP4535_regValues, sizeof(LGDP4535_regValues)); |
silviosz | 1:a5ccd53612ea | 1482 | break; |
silviosz | 1:a5ccd53612ea | 1483 | #endif |
silviosz | 1:a5ccd53612ea | 1484 | |
silviosz | 1:a5ccd53612ea | 1485 | case 0x5310: |
silviosz | 1:a5ccd53612ea | 1486 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | INVERT_RGB | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1487 | static const uint8_t NT35310_regValues[] PROGMEM = { // |
silviosz | 1:a5ccd53612ea | 1488 | TFTLCD_DELAY8, 10, //just some dummy |
silviosz | 1:a5ccd53612ea | 1489 | }; |
silviosz | 1:a5ccd53612ea | 1490 | table8_ads = NT35310_regValues, table_size = sizeof(NT35310_regValues); |
silviosz | 1:a5ccd53612ea | 1491 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1492 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 1493 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 1494 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 1495 | break; |
silviosz | 1:a5ccd53612ea | 1496 | |
silviosz | 1:a5ccd53612ea | 1497 | #ifdef SUPPORT_68140 |
silviosz | 1:a5ccd53612ea | 1498 | case 0x6814: |
silviosz | 1:a5ccd53612ea | 1499 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; |
silviosz | 1:a5ccd53612ea | 1500 | static const uint8_t RM68140_regValues_max[] PROGMEM = { // |
silviosz | 1:a5ccd53612ea | 1501 | 0x3A, 1, 0x55, //Pixel format .kbv my Mega Shield |
silviosz | 1:a5ccd53612ea | 1502 | }; |
silviosz | 1:a5ccd53612ea | 1503 | table8_ads = RM68140_regValues_max, table_size = sizeof(RM68140_regValues_max); |
silviosz | 1:a5ccd53612ea | 1504 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1505 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 1506 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 1507 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 1508 | break; |
silviosz | 1:a5ccd53612ea | 1509 | #endif |
silviosz | 1:a5ccd53612ea | 1510 | |
silviosz | 1:a5ccd53612ea | 1511 | #ifdef SUPPORT_7735 |
silviosz | 1:a5ccd53612ea | 1512 | case 0x7735: // |
silviosz | 1:a5ccd53612ea | 1513 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1514 | static const uint8_t PROGMEM table7735S[] = { |
silviosz | 1:a5ccd53612ea | 1515 | // (COMMAND_BYTE), n, data_bytes.... |
silviosz | 1:a5ccd53612ea | 1516 | 0xB1, 3, 0x01, 0x2C, 0x2D, // [05 3C 3C] FRMCTR1 if GM==11 |
silviosz | 1:a5ccd53612ea | 1517 | 0xB2, 3, 0x01, 0x2C, 0x2D, // [05 3C 3C] |
silviosz | 1:a5ccd53612ea | 1518 | 0xB3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, // [05 3C 3C 05 3C 3C] |
silviosz | 1:a5ccd53612ea | 1519 | 0xB4, 1, 0x07, // [07] INVCTR Column inversion |
silviosz | 1:a5ccd53612ea | 1520 | //ST7735XR Power Sequence |
silviosz | 1:a5ccd53612ea | 1521 | 0xC0, 3, 0xA2, 0x02, 0x84, // [A8 08 84] PWCTR1 |
silviosz | 1:a5ccd53612ea | 1522 | 0xC1, 1, 0xC5, // [C0] |
silviosz | 1:a5ccd53612ea | 1523 | 0xC2, 2, 0x0A, 0x00, // [0A 00] |
silviosz | 1:a5ccd53612ea | 1524 | 0xC3, 2, 0x8A, 0x2A, // [8A 26] |
silviosz | 1:a5ccd53612ea | 1525 | 0xC4, 2, 0x8A, 0xEE, // [8A EE] |
silviosz | 1:a5ccd53612ea | 1526 | 0xC5, 1, 0x0E, // [05] VMCTR1 VCOM |
silviosz | 1:a5ccd53612ea | 1527 | }; |
silviosz | 1:a5ccd53612ea | 1528 | table8_ads = table7735S, table_size = sizeof(table7735S); // |
silviosz | 1:a5ccd53612ea | 1529 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1530 | *p16 = 160; |
silviosz | 1:a5ccd53612ea | 1531 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 1532 | *p16 = 128; |
silviosz | 1:a5ccd53612ea | 1533 | break; |
silviosz | 1:a5ccd53612ea | 1534 | #endif |
silviosz | 1:a5ccd53612ea | 1535 | |
silviosz | 1:a5ccd53612ea | 1536 | #ifdef SUPPORT_7781 |
silviosz | 1:a5ccd53612ea | 1537 | case 0x7783: |
silviosz | 1:a5ccd53612ea | 1538 | _lcd_capable = AUTO_READINC | REV_SCREEN | INVERT_GS; |
silviosz | 1:a5ccd53612ea | 1539 | static const uint16_t ST7781_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1540 | 0x00FF, 0x0001, //can we do 0xFF |
silviosz | 1:a5ccd53612ea | 1541 | 0x00F3, 0x0008, |
silviosz | 1:a5ccd53612ea | 1542 | // LCD_Write_COM(0x00F3, |
silviosz | 1:a5ccd53612ea | 1543 | |
silviosz | 1:a5ccd53612ea | 1544 | 0x00, 0x0001, |
silviosz | 1:a5ccd53612ea | 1545 | 0x0001, 0x0100, // Driver Output Control Register (R01h) |
silviosz | 1:a5ccd53612ea | 1546 | 0x0002, 0x0700, // LCD Driving Waveform Control (R02h) |
silviosz | 1:a5ccd53612ea | 1547 | 0x0003, 0x1030, // Entry Mode (R03h) |
silviosz | 1:a5ccd53612ea | 1548 | 0x0008, 0x0302, |
silviosz | 1:a5ccd53612ea | 1549 | 0x0009, 0x0000, |
silviosz | 1:a5ccd53612ea | 1550 | 0x0010, 0x0000, // Power Control 1 (R10h) |
silviosz | 1:a5ccd53612ea | 1551 | 0x0011, 0x0007, // Power Control 2 (R11h) |
silviosz | 1:a5ccd53612ea | 1552 | 0x0012, 0x0000, // Power Control 3 (R12h) |
silviosz | 1:a5ccd53612ea | 1553 | 0x0013, 0x0000, // Power Control 4 (R13h) |
silviosz | 1:a5ccd53612ea | 1554 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 1555 | 0x0010, 0x14B0, // Power Control 1 SAP=1, BT=4, APE=1, AP=3 |
silviosz | 1:a5ccd53612ea | 1556 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 1557 | 0x0011, 0x0007, // Power Control 2 VC=7 |
silviosz | 1:a5ccd53612ea | 1558 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 1559 | 0x0012, 0x008E, // Power Control 3 VCIRE=1, VRH=14 |
silviosz | 1:a5ccd53612ea | 1560 | 0x0013, 0x0C00, // Power Control 4 VDV=12 |
silviosz | 1:a5ccd53612ea | 1561 | 0x0029, 0x0015, // NVM read data 2 VCM=21 |
silviosz | 1:a5ccd53612ea | 1562 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 1563 | 0x0030, 0x0000, // Gamma Control 1 |
silviosz | 1:a5ccd53612ea | 1564 | 0x0031, 0x0107, // Gamma Control 2 |
silviosz | 1:a5ccd53612ea | 1565 | 0x0032, 0x0000, // Gamma Control 3 |
silviosz | 1:a5ccd53612ea | 1566 | 0x0035, 0x0203, // Gamma Control 6 |
silviosz | 1:a5ccd53612ea | 1567 | 0x0036, 0x0402, // Gamma Control 7 |
silviosz | 1:a5ccd53612ea | 1568 | 0x0037, 0x0000, // Gamma Control 8 |
silviosz | 1:a5ccd53612ea | 1569 | 0x0038, 0x0207, // Gamma Control 9 |
silviosz | 1:a5ccd53612ea | 1570 | 0x0039, 0x0000, // Gamma Control 10 |
silviosz | 1:a5ccd53612ea | 1571 | 0x003C, 0x0203, // Gamma Control 13 |
silviosz | 1:a5ccd53612ea | 1572 | 0x003D, 0x0403, // Gamma Control 14 |
silviosz | 1:a5ccd53612ea | 1573 | 0x0060, 0xA700, // Driver Output Control (R60h) .kbv was 0xa700 |
silviosz | 1:a5ccd53612ea | 1574 | 0x0061, 0x0001, // Driver Output Control (R61h) |
silviosz | 1:a5ccd53612ea | 1575 | 0x0090, 0X0029, // Panel Interface Control 1 (R90h) |
silviosz | 1:a5ccd53612ea | 1576 | |
silviosz | 1:a5ccd53612ea | 1577 | // Display On |
silviosz | 1:a5ccd53612ea | 1578 | 0x0007, 0x0133, // Display Control (R07h) |
silviosz | 1:a5ccd53612ea | 1579 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 1580 | }; |
silviosz | 1:a5ccd53612ea | 1581 | init_table16(ST7781_regValues, sizeof(ST7781_regValues)); |
silviosz | 1:a5ccd53612ea | 1582 | break; |
silviosz | 1:a5ccd53612ea | 1583 | #endif |
silviosz | 1:a5ccd53612ea | 1584 | |
silviosz | 1:a5ccd53612ea | 1585 | case 0x7789: |
silviosz | 1:a5ccd53612ea | 1586 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1587 | static const uint8_t ST7789_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1588 | (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway |
silviosz | 1:a5ccd53612ea | 1589 | (0xB7), 1, 0x35, //GCTRL: Gate Control [35] |
silviosz | 1:a5ccd53612ea | 1590 | (0xBB), 1, 0x2B, //VCOMS: VCOM setting VCOM=1.175 [20] VCOM=0.9 |
silviosz | 1:a5ccd53612ea | 1591 | (0xC0), 1, 0x04, //LCMCTRL: LCM Control [2C] |
silviosz | 1:a5ccd53612ea | 1592 | (0xC2), 2, 0x01, 0xFF, //VDVVRHEN: VDV and VRH Command Enable [01 FF] |
silviosz | 1:a5ccd53612ea | 1593 | (0xC3), 1, 0x11, //VRHS: VRH Set VAP=4.4, VAN=-4.4 [0B] |
silviosz | 1:a5ccd53612ea | 1594 | (0xC4), 1, 0x20, //VDVS: VDV Set [20] |
silviosz | 1:a5ccd53612ea | 1595 | (0xC6), 1, 0x0F, //FRCTRL2: Frame Rate control in normal mode [0F] |
silviosz | 1:a5ccd53612ea | 1596 | (0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1] |
silviosz | 1:a5ccd53612ea | 1597 | (0xE0), 14, 0xD0, 0x00, 0x05, 0x0E, 0x15, 0x0D, 0x37, 0x43, 0x47, 0x09, 0x15, 0x12, 0x16, 0x19, //PVGAMCTRL: Positive Voltage Gamma control |
silviosz | 1:a5ccd53612ea | 1598 | (0xE1), 14, 0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19, //NVGAMCTRL: Negative Voltage Gamma control |
silviosz | 1:a5ccd53612ea | 1599 | }; |
silviosz | 1:a5ccd53612ea | 1600 | static const uint8_t ST7789_regValues_arcain6[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1601 | (0xB2), 5, 0x0C, 0x0C, 0x00, 0x33, 0x33, //PORCTRK: Porch setting [08 08 00 22 22] PSEN=0 anyway |
silviosz | 1:a5ccd53612ea | 1602 | (0xB7), 1, 0x35, //GCTRL: Gate Control [35] |
silviosz | 1:a5ccd53612ea | 1603 | (0xBB), 1, 0x35, //VCOMS: VCOM setting VCOM=??? [20] VCOM=0.9 |
silviosz | 1:a5ccd53612ea | 1604 | (0xC0), 1, 0x2C, //LCMCTRL: LCM Control [2C] |
silviosz | 1:a5ccd53612ea | 1605 | (0xC2), 2, 0x01, 0xFF, //VDVVRHEN: VDV and VRH Command Enable [01 FF] |
silviosz | 1:a5ccd53612ea | 1606 | (0xC3), 1, 0x13, //VRHS: VRH Set VAP=???, VAN=-??? [0B] |
silviosz | 1:a5ccd53612ea | 1607 | (0xC4), 1, 0x20, //VDVS: VDV Set [20] |
silviosz | 1:a5ccd53612ea | 1608 | (0xC6), 1, 0x0F, //FRCTRL2: Frame Rate control in normal mode [0F] |
silviosz | 1:a5ccd53612ea | 1609 | (0xCA), 1, 0x0F, //REGSEL2 [0F] |
silviosz | 1:a5ccd53612ea | 1610 | (0xC8), 1, 0x08, //REGSEL1 [08] |
silviosz | 1:a5ccd53612ea | 1611 | (0x55), 1, 0x90, //WRCACE [00] |
silviosz | 1:a5ccd53612ea | 1612 | (0xD0), 2, 0xA4, 0xA1, //PWCTRL1: Power Control 1 [A4 A1] |
silviosz | 1:a5ccd53612ea | 1613 | (0xE0), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x2A, 0x3C, 0x55, 0x4B, 0x08, 0x16, 0x14, 0x19, 0x20, //PVGAMCTRL: Positive Voltage Gamma control |
silviosz | 1:a5ccd53612ea | 1614 | (0xE1), 14, 0xD0, 0x00, 0x06, 0x09, 0x0B, 0x29, 0x36, 0x54, 0x4B, 0x0D, 0x16, 0x14, 0x21, 0x20, //NVGAMCTRL: Negative Voltage Gamma control |
silviosz | 1:a5ccd53612ea | 1615 | }; |
silviosz | 1:a5ccd53612ea | 1616 | table8_ads = ST7789_regValues, table_size = sizeof(ST7789_regValues); // |
silviosz | 1:a5ccd53612ea | 1617 | break; |
silviosz | 1:a5ccd53612ea | 1618 | |
silviosz | 1:a5ccd53612ea | 1619 | case 0x8031: //Unknown BangGood thanks PrinceCharles |
silviosz | 1:a5ccd53612ea | 1620 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 1621 | static const uint8_t FK8031_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1622 | // 0xF2:8.2 = SM, 0xF2:8.0 = REV. invertDisplay(), vertScroll() do not work |
silviosz | 1:a5ccd53612ea | 1623 | 0xF2,11, 0x16, 0x16, 0x03, 0x08, 0x08, 0x08, 0x08, 0x10, 0x04, 0x16, 0x16, // f.k. 0xF2:8.2 SM=1 |
silviosz | 1:a5ccd53612ea | 1624 | 0xFD, 3, 0x11, 0x02, 0x35, //f.k 0xFD:1.1 creates contiguous scan lins |
silviosz | 1:a5ccd53612ea | 1625 | }; |
silviosz | 1:a5ccd53612ea | 1626 | table8_ads = FK8031_regValues, table_size = sizeof(FK8031_regValues); |
silviosz | 1:a5ccd53612ea | 1627 | break; |
silviosz | 1:a5ccd53612ea | 1628 | |
silviosz | 1:a5ccd53612ea | 1629 | #ifdef SUPPORT_8347D |
silviosz | 1:a5ccd53612ea | 1630 | case 0x4747: //HX8347-D |
silviosz | 1:a5ccd53612ea | 1631 | _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | AUTO_READINC | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1632 | goto common_8347DGI; |
silviosz | 1:a5ccd53612ea | 1633 | case 0x6767: //HX8367-A |
silviosz | 1:a5ccd53612ea | 1634 | case 0x7575: //HX8347-G |
silviosz | 1:a5ccd53612ea | 1635 | case 0x9595: //HX8347-I |
silviosz | 1:a5ccd53612ea | 1636 | _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS; |
silviosz | 1:a5ccd53612ea | 1637 | common_8347DGI: |
silviosz | 1:a5ccd53612ea | 1638 | is8347 = 1; |
silviosz | 1:a5ccd53612ea | 1639 | static const uint8_t HX8347G_2_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1640 | 0xEA, 2, 0x00, 0x20, //PTBA[15:0] |
silviosz | 1:a5ccd53612ea | 1641 | 0xEC, 2, 0x0C, 0xC4, //STBA[15:0] |
silviosz | 1:a5ccd53612ea | 1642 | 0xE8, 1, 0x38, //OPON[7:0] |
silviosz | 1:a5ccd53612ea | 1643 | 0xE9, 1, 0x10, //OPON1[7:0] |
silviosz | 1:a5ccd53612ea | 1644 | 0xF1, 1, 0x01, //OTPS1B |
silviosz | 1:a5ccd53612ea | 1645 | 0xF2, 1, 0x10, //GEN |
silviosz | 1:a5ccd53612ea | 1646 | //Gamma 2.2 Setting |
silviosz | 1:a5ccd53612ea | 1647 | 0x40, 13, 0x01, 0x00, 0x00, 0x10, 0x0E, 0x24, 0x04, 0x50, 0x02, 0x13, 0x19, 0x19, 0x16, |
silviosz | 1:a5ccd53612ea | 1648 | 0x50, 14, 0x1B, 0x31, 0x2F, 0x3F, 0x3F, 0x3E, 0x2F, 0x7B, 0x09, 0x06, 0x06, 0x0C, 0x1D, 0xCC, |
silviosz | 1:a5ccd53612ea | 1649 | //Power Voltage Setting |
silviosz | 1:a5ccd53612ea | 1650 | 0x1B, 1, 0x1B, //VRH=4.65V |
silviosz | 1:a5ccd53612ea | 1651 | 0x1A, 1, 0x01, //BT (VGH~15V,VGL~-10V,DDVDH~5V) |
silviosz | 1:a5ccd53612ea | 1652 | 0x24, 1, 0x2F, //VMH(VCOM High voltage ~3.2V) |
silviosz | 1:a5ccd53612ea | 1653 | 0x25, 1, 0x57, //VML(VCOM Low voltage -1.2V) |
silviosz | 1:a5ccd53612ea | 1654 | //****VCOM offset**/// |
silviosz | 1:a5ccd53612ea | 1655 | 0x23, 1, 0x88, //for Flicker adjust //can reload from OTP |
silviosz | 1:a5ccd53612ea | 1656 | //Power on Setting |
silviosz | 1:a5ccd53612ea | 1657 | 0x18, 1, 0x34, //I/P_RADJ,N/P_RADJ, Normal mode 60Hz |
silviosz | 1:a5ccd53612ea | 1658 | 0x19, 1, 0x01, //OSC_EN='1', start Osc |
silviosz | 1:a5ccd53612ea | 1659 | 0x01, 1, 0x00, //DP_STB='0', out deep sleep |
silviosz | 1:a5ccd53612ea | 1660 | 0x1F, 1, 0x88, // GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1661 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1662 | 0x1F, 1, 0x80, // GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1663 | TFTLCD_DELAY8, 3, |
silviosz | 1:a5ccd53612ea | 1664 | 0x1F, 1, 0x90, // GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1665 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1666 | 0x1F, 1, 0xD0, // GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1667 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1668 | //262k/65k color selection |
silviosz | 1:a5ccd53612ea | 1669 | 0x17, 1, 0x05, //default 0x06 262k color // 0x05 65k color |
silviosz | 1:a5ccd53612ea | 1670 | //SET PANEL |
silviosz | 1:a5ccd53612ea | 1671 | 0x36, 1, 0x00, //SS_P, GS_P,REV_P,BGR_P |
silviosz | 1:a5ccd53612ea | 1672 | //Display ON Setting |
silviosz | 1:a5ccd53612ea | 1673 | 0x28, 1, 0x38, //GON=1, DTE=1, D=1000 |
silviosz | 1:a5ccd53612ea | 1674 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1675 | 0x28, 1, 0x3F, //GON=1, DTE=1, D=1100 |
silviosz | 1:a5ccd53612ea | 1676 | |
silviosz | 1:a5ccd53612ea | 1677 | 0x16, 1, 0x18, |
silviosz | 1:a5ccd53612ea | 1678 | }; |
silviosz | 1:a5ccd53612ea | 1679 | init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues)); |
silviosz | 1:a5ccd53612ea | 1680 | break; |
silviosz | 1:a5ccd53612ea | 1681 | #endif |
silviosz | 1:a5ccd53612ea | 1682 | |
silviosz | 1:a5ccd53612ea | 1683 | #ifdef SUPPORT_8352A |
silviosz | 1:a5ccd53612ea | 1684 | case 0x5252: //HX8352-A |
silviosz | 1:a5ccd53612ea | 1685 | _lcd_capable = MIPI_DCS_REV1 | MV_AXIS; |
silviosz | 1:a5ccd53612ea | 1686 | is8347 = 1; |
silviosz | 1:a5ccd53612ea | 1687 | static const uint8_t HX8352A_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1688 | 0x83, 1, 0x02, //Test Mode: TESTM=1 |
silviosz | 1:a5ccd53612ea | 1689 | 0x85, 1, 0x03, //VDD ctl : VDC_SEL=3 [05] |
silviosz | 1:a5ccd53612ea | 1690 | 0x8B, 1, 0x01, //VGS_RES 1: RES_VGS1=1 |
silviosz | 1:a5ccd53612ea | 1691 | 0x8C, 1, 0x93, //VGS_RES 2: RES_VGS2=1, anon=0x13 [93] |
silviosz | 1:a5ccd53612ea | 1692 | 0x91, 1, 0x01, //PWM control: SYNC=1 |
silviosz | 1:a5ccd53612ea | 1693 | 0x83, 1, 0x00, //Test Mode: TESTM=0 |
silviosz | 1:a5ccd53612ea | 1694 | //Gamma Setting |
silviosz | 1:a5ccd53612ea | 1695 | 0x3E, 12, 0xB0, 0x03, 0x10, 0x56, 0x13, 0x46, 0x23, 0x76, 0x00, 0x5E, 0x4F, 0x40, |
silviosz | 1:a5ccd53612ea | 1696 | //Power Voltage Setting |
silviosz | 1:a5ccd53612ea | 1697 | 0x17, 1, 0x91, //OSC 1: RADJ=9, OSC_EN=1 [F0] |
silviosz | 1:a5ccd53612ea | 1698 | 0x2B, 1, 0xF9, //Cycle 1: N_DC=F9 [BE] |
silviosz | 1:a5ccd53612ea | 1699 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1700 | 0x1B, 1, 0x14, //Power 3: BT=1, ??=1, AP=0 [42] |
silviosz | 1:a5ccd53612ea | 1701 | 0x1A, 1, 0x11, //Power 2: VC3=1, VC1=1 [05] |
silviosz | 1:a5ccd53612ea | 1702 | 0x1C, 1, 0x06, //Power 4: VRH=6 [0D] |
silviosz | 1:a5ccd53612ea | 1703 | 0x1F, 1, 0x42, //VCOM : VCM=42 [55] |
silviosz | 1:a5ccd53612ea | 1704 | TFTLCD_DELAY8, 20, |
silviosz | 1:a5ccd53612ea | 1705 | 0x19, 1, 0x0A, //Power 1: DK=1, VL_TR1=1 [09] |
silviosz | 1:a5ccd53612ea | 1706 | 0x19, 1, 0x1A, //Power 1: PON=1, DK=1, VL_TR1=1 [09] |
silviosz | 1:a5ccd53612ea | 1707 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1708 | 0x19, 1, 0x12, //Power 1: PON=1, DK=1, STB=1 [09] |
silviosz | 1:a5ccd53612ea | 1709 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1710 | 0x1E, 1, 0x27, //Power 6: VCOMG=1, VDV=7 [10] |
silviosz | 1:a5ccd53612ea | 1711 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1712 | //Display ON Setting |
silviosz | 1:a5ccd53612ea | 1713 | 0x24, 1, 0x60, //Display 2: PT=1, GON=1 [A0] |
silviosz | 1:a5ccd53612ea | 1714 | 0x3D, 1, 0x40, //Source 1: N_SAP=40 [C0] |
silviosz | 1:a5ccd53612ea | 1715 | 0x34, 1, 0x38, //Cycle 10: EQS=0x38 [38] |
silviosz | 1:a5ccd53612ea | 1716 | 0x35, 1, 0x38, //Cycle 11: EQP=0x38 [38] |
silviosz | 1:a5ccd53612ea | 1717 | 0x24, 1, 0x38, //Display 2: GON=1 D=2 [A0] |
silviosz | 1:a5ccd53612ea | 1718 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1719 | 0x24, 1, 0x3C, //Display 2: GON=1 D=3 [A0] |
silviosz | 1:a5ccd53612ea | 1720 | 0x16, 1, 0x1C, //Memaccess: GS=1, BGR=1, SS=1 |
silviosz | 1:a5ccd53612ea | 1721 | 0x01, 1, 0x06, //Disp Mode: INVON=1, NORON=1 [02] |
silviosz | 1:a5ccd53612ea | 1722 | 0x55, 1, 0x06, //SM_PANEL=0, SS_PANEL=0, GS_PANEL=1, REV_PANEL=1, BGR_PANEL=0 |
silviosz | 1:a5ccd53612ea | 1723 | }; |
silviosz | 1:a5ccd53612ea | 1724 | init_table(HX8352A_regValues, sizeof(HX8352A_regValues)); |
silviosz | 1:a5ccd53612ea | 1725 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1726 | *p16 = 400; |
silviosz | 1:a5ccd53612ea | 1727 | break; |
silviosz | 1:a5ccd53612ea | 1728 | #endif |
silviosz | 1:a5ccd53612ea | 1729 | |
silviosz | 1:a5ccd53612ea | 1730 | #ifdef SUPPORT_8352B |
silviosz | 1:a5ccd53612ea | 1731 | case 0x0065: //HX8352-B |
silviosz | 1:a5ccd53612ea | 1732 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 1733 | is8347 = 1; |
silviosz | 1:a5ccd53612ea | 1734 | static const uint8_t HX8352B_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1735 | // Register setting for EQ setting |
silviosz | 1:a5ccd53612ea | 1736 | 0xe5, 1, 0x10, // |
silviosz | 1:a5ccd53612ea | 1737 | 0xe7, 1, 0x10, // |
silviosz | 1:a5ccd53612ea | 1738 | 0xe8, 1, 0x48, // |
silviosz | 1:a5ccd53612ea | 1739 | 0xec, 1, 0x09, // |
silviosz | 1:a5ccd53612ea | 1740 | 0xed, 1, 0x6c, // |
silviosz | 1:a5ccd53612ea | 1741 | // Power on Setting |
silviosz | 1:a5ccd53612ea | 1742 | 0x23, 1, 0x6F, //VMF |
silviosz | 1:a5ccd53612ea | 1743 | 0x24, 1, 0x57, //VMH |
silviosz | 1:a5ccd53612ea | 1744 | 0x25, 1, 0x71, //VML |
silviosz | 1:a5ccd53612ea | 1745 | 0xE2, 1, 0x18, // |
silviosz | 1:a5ccd53612ea | 1746 | 0x1B, 1, 0x15, //VRH |
silviosz | 1:a5ccd53612ea | 1747 | 0x01, 1, 0x00, // |
silviosz | 1:a5ccd53612ea | 1748 | 0x1C, 1, 0x03, //AP=3 |
silviosz | 1:a5ccd53612ea | 1749 | // Power on sequence |
silviosz | 1:a5ccd53612ea | 1750 | 0x19, 1, 0x01, //OSCEN=1 |
silviosz | 1:a5ccd53612ea | 1751 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1752 | 0x1F, 1, 0x8C, //GASEN=1, DK=1, XDK=1 |
silviosz | 1:a5ccd53612ea | 1753 | 0x1F, 1, 0x84, //GASEN=1, XDK=1 |
silviosz | 1:a5ccd53612ea | 1754 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1755 | 0x1F, 1, 0x94, //GASEN=1, PON=1, XDK=1 |
silviosz | 1:a5ccd53612ea | 1756 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1757 | 0x1F, 1, 0xD4, //GASEN=1, VCOMG=1, PON=1, XDK=1 |
silviosz | 1:a5ccd53612ea | 1758 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1759 | // Gamma Setting |
silviosz | 1:a5ccd53612ea | 1760 | 0x40, 13, 0x00, 0x2B, 0x29, 0x3E, 0x3D, 0x3F, 0x24, 0x74, 0x08, 0x06, 0x07, 0x0D, 0x17, |
silviosz | 1:a5ccd53612ea | 1761 | 0x50, 13, 0x00, 0x02, 0x01, 0x16, 0x14, 0x3F, 0x0B, 0x5B, 0x08, 0x12, 0x18, 0x19, 0x17, |
silviosz | 1:a5ccd53612ea | 1762 | 0x5D, 1, 0xFF, // |
silviosz | 1:a5ccd53612ea | 1763 | |
silviosz | 1:a5ccd53612ea | 1764 | 0x16, 1, 0x08, //MemoryAccess BGR=1 |
silviosz | 1:a5ccd53612ea | 1765 | 0x28, 1, 0x20, //GON=1 |
silviosz | 1:a5ccd53612ea | 1766 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1767 | 0x28, 1, 0x38, //GON=1, DTE=1, D=2 |
silviosz | 1:a5ccd53612ea | 1768 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1769 | 0x28, 1, 0x3C, //GON=1, DTE=1, D=3 |
silviosz | 1:a5ccd53612ea | 1770 | |
silviosz | 1:a5ccd53612ea | 1771 | 0x02, 2, 0x00, 0x00, //SC |
silviosz | 1:a5ccd53612ea | 1772 | 0x04, 2, 0x00, 0xEF, //EC |
silviosz | 1:a5ccd53612ea | 1773 | 0x06, 2, 0x00, 0x00, //SP |
silviosz | 1:a5ccd53612ea | 1774 | 0x08, 2, 0x01, 0x8F, //EP |
silviosz | 1:a5ccd53612ea | 1775 | |
silviosz | 1:a5ccd53612ea | 1776 | 0x80, 2, 0x00, 0x00, //CAC |
silviosz | 1:a5ccd53612ea | 1777 | 0x82, 2, 0x00, 0x00, //RAC |
silviosz | 1:a5ccd53612ea | 1778 | 0x17, 1, 0x05, //COLMOD = 565 |
silviosz | 1:a5ccd53612ea | 1779 | |
silviosz | 1:a5ccd53612ea | 1780 | }; |
silviosz | 1:a5ccd53612ea | 1781 | init_table(HX8352B_regValues, sizeof(HX8352B_regValues)); |
silviosz | 1:a5ccd53612ea | 1782 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1783 | *p16 = 400; |
silviosz | 1:a5ccd53612ea | 1784 | break; |
silviosz | 1:a5ccd53612ea | 1785 | #endif |
silviosz | 1:a5ccd53612ea | 1786 | |
silviosz | 1:a5ccd53612ea | 1787 | #ifdef SUPPORT_8347A |
silviosz | 1:a5ccd53612ea | 1788 | case 0x8347: |
silviosz | 1:a5ccd53612ea | 1789 | _lcd_capable = REV_SCREEN | MIPI_DCS_REV1 | MV_AXIS; |
silviosz | 1:a5ccd53612ea | 1790 | // AN.01 The reference setting of CMO 3.2” Panel |
silviosz | 1:a5ccd53612ea | 1791 | static const uint8_t HX8347A_CMO32_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1792 | // VENDOR Gamma for 3.2" |
silviosz | 1:a5ccd53612ea | 1793 | (0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44, |
silviosz | 1:a5ccd53612ea | 1794 | // Display Setting |
silviosz | 1:a5ccd53612ea | 1795 | (0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0 |
silviosz | 1:a5ccd53612ea | 1796 | (0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 |
silviosz | 1:a5ccd53612ea | 1797 | (0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111 |
silviosz | 1:a5ccd53612ea | 1798 | |
silviosz | 1:a5ccd53612ea | 1799 | (0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2 |
silviosz | 1:a5ccd53612ea | 1800 | (0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2 |
silviosz | 1:a5ccd53612ea | 1801 | |
silviosz | 1:a5ccd53612ea | 1802 | (0x3a), 4, 0x01, 0x01, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0 |
silviosz | 1:a5ccd53612ea | 1803 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1804 | (0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h |
silviosz | 1:a5ccd53612ea | 1805 | (0x3E), 1, 0x38, // SON=38h |
silviosz | 1:a5ccd53612ea | 1806 | (0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF |
silviosz | 1:a5ccd53612ea | 1807 | // Power Supply Setting |
silviosz | 1:a5ccd53612ea | 1808 | (0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz |
silviosz | 1:a5ccd53612ea | 1809 | (0x93), 1, 0x0F, // RADJ=1111, 100% |
silviosz | 1:a5ccd53612ea | 1810 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1811 | (0x20), 1, 0x40, // BT=0100 |
silviosz | 1:a5ccd53612ea | 1812 | (0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=?? |
silviosz | 1:a5ccd53612ea | 1813 | //VCOM SETTING for 3.2" |
silviosz | 1:a5ccd53612ea | 1814 | (0x44), 2, 0x4D, 0x11, // VCM=100 1101, VDV=1 0001 |
silviosz | 1:a5ccd53612ea | 1815 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1816 | (0x1C), 1, 0x04, // AP=100 |
silviosz | 1:a5ccd53612ea | 1817 | TFTLCD_DELAY8, 20, |
silviosz | 1:a5ccd53612ea | 1818 | (0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1819 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1820 | (0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1821 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1822 | (0x43), 1, 0x80, //set VCOMG=1 |
silviosz | 1:a5ccd53612ea | 1823 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1824 | // Display ON Setting |
silviosz | 1:a5ccd53612ea | 1825 | (0x90), 1, 0x7F, // SAP=0111 1111 |
silviosz | 1:a5ccd53612ea | 1826 | (0x26), 1, 0x04, //GON=0, DTE=0, D=01 |
silviosz | 1:a5ccd53612ea | 1827 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1828 | (0x26), 1, 0x24, //GON=1, DTE=0, D=01 |
silviosz | 1:a5ccd53612ea | 1829 | (0x26), 1, 0x2C, //GON=1, DTE=0, D=11 |
silviosz | 1:a5ccd53612ea | 1830 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1831 | (0x26), 1, 0x3C, //GON=1, DTE=1, D=11 |
silviosz | 1:a5ccd53612ea | 1832 | // INTERNAL REGISTER SETTING |
silviosz | 1:a5ccd53612ea | 1833 | (0x57), 1, 0x02, // TEST_Mode=1: into TEST mode |
silviosz | 1:a5ccd53612ea | 1834 | (0x55), 1, 0x00, // VDC_SEL=000, VDDD=1.95V |
silviosz | 1:a5ccd53612ea | 1835 | (0xFE), 1, 0x5A, // For ESD protection |
silviosz | 1:a5ccd53612ea | 1836 | (0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode |
silviosz | 1:a5ccd53612ea | 1837 | }; |
silviosz | 1:a5ccd53612ea | 1838 | // AN.01 The reference setting of CMO 2.4” Panel |
silviosz | 1:a5ccd53612ea | 1839 | static const uint8_t HX8347A_CMO24_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1840 | // VENDOR Gamma for 2.4" |
silviosz | 1:a5ccd53612ea | 1841 | (0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82, |
silviosz | 1:a5ccd53612ea | 1842 | // Display Setting |
silviosz | 1:a5ccd53612ea | 1843 | (0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0 |
silviosz | 1:a5ccd53612ea | 1844 | (0x16), 1, 0x48, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 |
silviosz | 1:a5ccd53612ea | 1845 | (0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111 |
silviosz | 1:a5ccd53612ea | 1846 | |
silviosz | 1:a5ccd53612ea | 1847 | (0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2 |
silviosz | 1:a5ccd53612ea | 1848 | (0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2 |
silviosz | 1:a5ccd53612ea | 1849 | |
silviosz | 1:a5ccd53612ea | 1850 | (0x3a), 4, 0x01, 0x01, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, P_NW=1, I_RTN=15, I_NW=0, DIV=0 |
silviosz | 1:a5ccd53612ea | 1851 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1852 | (0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h |
silviosz | 1:a5ccd53612ea | 1853 | (0x3E), 1, 0x38, // SON=38h |
silviosz | 1:a5ccd53612ea | 1854 | (0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF |
silviosz | 1:a5ccd53612ea | 1855 | // Power Supply Setting |
silviosz | 1:a5ccd53612ea | 1856 | (0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz |
silviosz | 1:a5ccd53612ea | 1857 | (0x93), 1, 0x0F, // RADJ=1111, 100% |
silviosz | 1:a5ccd53612ea | 1858 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1859 | (0x20), 1, 0x40, // BT=0100 |
silviosz | 1:a5ccd53612ea | 1860 | (0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=?? |
silviosz | 1:a5ccd53612ea | 1861 | //VCOM SETTING for 2.4" |
silviosz | 1:a5ccd53612ea | 1862 | (0x44), 2, 0x40, 0x12, // VCM=100 0000, VDV=1 0001 |
silviosz | 1:a5ccd53612ea | 1863 | TFTLCD_DELAY8, 10, |
silviosz | 1:a5ccd53612ea | 1864 | (0x1C), 1, 0x04, // AP=100 |
silviosz | 1:a5ccd53612ea | 1865 | TFTLCD_DELAY8, 20, |
silviosz | 1:a5ccd53612ea | 1866 | (0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1867 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1868 | (0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1869 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1870 | (0x43), 1, 0x80, //set VCOMG=1 |
silviosz | 1:a5ccd53612ea | 1871 | TFTLCD_DELAY8, 100, |
silviosz | 1:a5ccd53612ea | 1872 | // Display ON Setting |
silviosz | 1:a5ccd53612ea | 1873 | (0x90), 1, 0x7F, // SAP=0111 1111 |
silviosz | 1:a5ccd53612ea | 1874 | (0x26), 1, 0x04, //GON=0, DTE=0, D=01 |
silviosz | 1:a5ccd53612ea | 1875 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1876 | (0x26), 1, 0x24, //GON=1, DTE=0, D=01 |
silviosz | 1:a5ccd53612ea | 1877 | (0x26), 1, 0x2C, //GON=1, DTE=0, D=11 |
silviosz | 1:a5ccd53612ea | 1878 | TFTLCD_DELAY8, 40, |
silviosz | 1:a5ccd53612ea | 1879 | (0x26), 1, 0x3C, //GON=1, DTE=1, D=11 |
silviosz | 1:a5ccd53612ea | 1880 | // INTERNAL REGISTER SETTING |
silviosz | 1:a5ccd53612ea | 1881 | (0x57), 1, 0x02, // TEST_Mode=1: into TEST mode |
silviosz | 1:a5ccd53612ea | 1882 | (0x55), 1, 0x00, // VDC_SEL=000, VDDD=1.95V |
silviosz | 1:a5ccd53612ea | 1883 | (0xFE), 1, 0x5A, // For ESD protection |
silviosz | 1:a5ccd53612ea | 1884 | (0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode |
silviosz | 1:a5ccd53612ea | 1885 | }; |
silviosz | 1:a5ccd53612ea | 1886 | static const uint8_t HX8347A_ITDB02_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1887 | // VENDOR Gamma ITDB02 same as CMO32. Delays are shorter than AN01 |
silviosz | 1:a5ccd53612ea | 1888 | (0x46), 12, 0xA4, 0x53, 0x00, 0x44, 0x04, 0x67, 0x33, 0x77, 0x12, 0x4C, 0x46, 0x44, |
silviosz | 1:a5ccd53612ea | 1889 | // Display Setting |
silviosz | 1:a5ccd53612ea | 1890 | (0x01), 1, 0x06, // IDMON=0, INVON=1, NORON=1, PTLON=0 |
silviosz | 1:a5ccd53612ea | 1891 | (0x16), 1, 0xC8, // MY=0, MX=0, MV=0, ML=1, BGR=0, TEON=0 .itead |
silviosz | 1:a5ccd53612ea | 1892 | (0x23), 3, 0x95, 0x95, 0xFF, // N_DC=1001 0101, PI_DC=1001 0101, I_DC=1111 1111 |
silviosz | 1:a5ccd53612ea | 1893 | |
silviosz | 1:a5ccd53612ea | 1894 | (0x27), 4, 0x02, 0x02, 0x02, 0x02, // N_BP=2, N_FP=2, PI_BP=2, PI_FP=2 |
silviosz | 1:a5ccd53612ea | 1895 | (0x2C), 2, 0x02, 0x02, // I_BP=2, I_FP=2 |
silviosz | 1:a5ccd53612ea | 1896 | |
silviosz | 1:a5ccd53612ea | 1897 | (0x3a), 4, 0x01, 0x00, 0xF0, 0x00, // N_RTN=0, N_NW=1, P_RTN=0, ?? P_NW=1, I_RTN=15, I_NW=0, DIV=0 .itead |
silviosz | 1:a5ccd53612ea | 1898 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1899 | (0x35), 2, 0x38, 0x78, // EQS=38h, EQP=78h |
silviosz | 1:a5ccd53612ea | 1900 | (0x3E), 1, 0x38, // SON=38h |
silviosz | 1:a5ccd53612ea | 1901 | (0x40), 2, 0x0F, 0xF0, // GDON=0Fh, GDOFF |
silviosz | 1:a5ccd53612ea | 1902 | // Power Supply Setting |
silviosz | 1:a5ccd53612ea | 1903 | (0x19), 1, 0x49, // CADJ=0100, CUADJ=100, OSD_EN=1 ,60Hz |
silviosz | 1:a5ccd53612ea | 1904 | (0x93), 1, 0x0F, // RADJ=1111, 100% |
silviosz | 1:a5ccd53612ea | 1905 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1906 | (0x20), 1, 0x40, // BT=0100 |
silviosz | 1:a5ccd53612ea | 1907 | (0x1D), 3, 0x07, 0x00, 0x04, // VC1=7, VC3=0, VRH=?? |
silviosz | 1:a5ccd53612ea | 1908 | //VCOM SETTING for ITDB02 |
silviosz | 1:a5ccd53612ea | 1909 | (0x44), 2, 0x4D, 0x0E, // VCM=101 0000 4D, VDV=1 0001 .itead |
silviosz | 1:a5ccd53612ea | 1910 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1911 | (0x1C), 1, 0x04, // AP=100 |
silviosz | 1:a5ccd53612ea | 1912 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1913 | (0x1B), 1, 0x18, // GASENB=0, PON=0, DK=1, XDK=0, VLCD_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1914 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1915 | (0x1B), 1, 0x10, // GASENB=0, PON=1, DK=0, XDK=0, VLCD_TRI=0, STB=0 |
silviosz | 1:a5ccd53612ea | 1916 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1917 | (0x43), 1, 0x80, //set VCOMG=1 |
silviosz | 1:a5ccd53612ea | 1918 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1919 | // Display ON Setting |
silviosz | 1:a5ccd53612ea | 1920 | (0x90), 1, 0x7F, // SAP=0111 1111 |
silviosz | 1:a5ccd53612ea | 1921 | (0x26), 1, 0x04, //GON=0, DTE=0, D=01 |
silviosz | 1:a5ccd53612ea | 1922 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1923 | (0x26), 1, 0x24, //GON=1, DTE=0, D=01 |
silviosz | 1:a5ccd53612ea | 1924 | (0x26), 1, 0x2C, //GON=1, DTE=0, D=11 |
silviosz | 1:a5ccd53612ea | 1925 | TFTLCD_DELAY8, 5, |
silviosz | 1:a5ccd53612ea | 1926 | (0x26), 1, 0x3C, //GON=1, DTE=1, D=11 |
silviosz | 1:a5ccd53612ea | 1927 | // INTERNAL REGISTER SETTING for ITDB02 |
silviosz | 1:a5ccd53612ea | 1928 | (0x57), 1, 0x02, // TEST_Mode=1: into TEST mode |
silviosz | 1:a5ccd53612ea | 1929 | (0x95), 1, 0x01, // SET DISPLAY CLOCK AND PUMPING CLOCK TO SYNCHRONIZE .itead |
silviosz | 1:a5ccd53612ea | 1930 | (0x57), 1, 0x00, // TEST_Mode=0: exit TEST mode |
silviosz | 1:a5ccd53612ea | 1931 | }; |
silviosz | 1:a5ccd53612ea | 1932 | static const uint8_t HX8347A_NHD_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1933 | //Gamma Setting NHD |
silviosz | 1:a5ccd53612ea | 1934 | (0x46), 12, 0x94, 0x41, 0x00, 0x33, 0x23, 0x45, 0x44, 0x77, 0x12, 0xCC, 0x46, 0x82, |
silviosz | 1:a5ccd53612ea | 1935 | (0x01), 1, 0x06, //Display Mode [06] |
silviosz | 1:a5ccd53612ea | 1936 | (0x16), 1, 0xC8, //MADCTL [00] MY=1, MX=1, BGR=1 |
silviosz | 1:a5ccd53612ea | 1937 | // (0x70), 1, 0x05, //Panel [06] 16-bit |
silviosz | 1:a5ccd53612ea | 1938 | (0x23), 3, 0x95, 0x95, 0xFF, //Cycle Control 1-3 [95 95 FF] |
silviosz | 1:a5ccd53612ea | 1939 | (0x27), 4, 0x02, 0x02, 0x02, 0x02, //Display Control 2-5 [02 02 02 02] |
silviosz | 1:a5ccd53612ea | 1940 | (0x2C), 2, 0x02, 0x02, //Display Control 6-7 [02 02] |
silviosz | 1:a5ccd53612ea | 1941 | (0x3A), 4, 0x01, 0x01, 0xF0, 0x00, //Cycle Control 1-4 [01 01 F0 00] |
silviosz | 1:a5ccd53612ea | 1942 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1943 | (0x35), 2, 0x38, 0x78, //Display Control 9-10 [09 09] EQS=56, EQP=120 |
silviosz | 1:a5ccd53612ea | 1944 | (0x3E), 1, 0x38, //Cycle Control 5 [38] |
silviosz | 1:a5ccd53612ea | 1945 | (0x40), 1, 0x0F, //Cycle Control 6 [03] GDON=15 |
silviosz | 1:a5ccd53612ea | 1946 | (0x41), 1, 0xF0, //Cycle Control 14 [F8] GDOF=248 |
silviosz | 1:a5ccd53612ea | 1947 | |
silviosz | 1:a5ccd53612ea | 1948 | (0x19), 1, 0x2D, //OSC Control 1 [86] CADJ=2, CUADJ=6, OSCEN=1 |
silviosz | 1:a5ccd53612ea | 1949 | (0x93), 1, 0x06, //SAP Idle mode [00] ??? .nhd |
silviosz | 1:a5ccd53612ea | 1950 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1951 | (0x20), 1, 0x40, //Power Control 6 [40] |
silviosz | 1:a5ccd53612ea | 1952 | (0x1D), 3, 0x07, 0x00, 0x04, //Power Control 3-5 [04 00 06] VC=7 |
silviosz | 1:a5ccd53612ea | 1953 | (0x44), 2, 0x3C, 0x12, //VCOM Control 2-3 [5A 11] VCM=60, VDV=18 |
silviosz | 1:a5ccd53612ea | 1954 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1955 | (0x1C), 1, 0x04, //Power Control 2 [04] |
silviosz | 1:a5ccd53612ea | 1956 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1957 | (0x43), 1, 0x80, //VCOM Control 1 [80] |
silviosz | 1:a5ccd53612ea | 1958 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1959 | (0x1B), 1, 0x08, //Power Control 1 [00] DK=1 |
silviosz | 1:a5ccd53612ea | 1960 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1961 | (0x1B), 1, 0x10, //Power Control 1 [00] PON=1 |
silviosz | 1:a5ccd53612ea | 1962 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1963 | (0x90), 1, 0x7F, //Display Control 8 [0A] |
silviosz | 1:a5ccd53612ea | 1964 | (0x26), 1, 0x04, //Display Control 1 [A0] D=1 |
silviosz | 1:a5ccd53612ea | 1965 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1966 | (0x26), 1, 0x24, //Display Control 1 [A0] GON=1, D=1 |
silviosz | 1:a5ccd53612ea | 1967 | (0x26), 1, 0x2C, //Display Control 1 [A0] GON=1, D=3 |
silviosz | 1:a5ccd53612ea | 1968 | TFTLCD_DELAY8, 80, |
silviosz | 1:a5ccd53612ea | 1969 | (0x26), 1, 0x3C, //Display Control 1 [A0] GON=1, DTE=1, D=3 |
silviosz | 1:a5ccd53612ea | 1970 | (0x57), 1, 0x02, //? |
silviosz | 1:a5ccd53612ea | 1971 | (0x55), 1, 0x00, //? |
silviosz | 1:a5ccd53612ea | 1972 | (0x57), 1, 0x00, //? |
silviosz | 1:a5ccd53612ea | 1973 | }; |
silviosz | 1:a5ccd53612ea | 1974 | // Atmel ASF code uses VCOM2-3: 0x38, 0x12. 50ms delays and no TEST mode changes. |
silviosz | 1:a5ccd53612ea | 1975 | init_table(HX8347A_NHD_regValues, sizeof(HX8347A_NHD_regValues)); |
silviosz | 1:a5ccd53612ea | 1976 | // init_table(HX8347A_CMO32_regValues, sizeof(HX8347A_CMO32_regValues)); |
silviosz | 1:a5ccd53612ea | 1977 | // init_table(HX8347A_CMO24_regValues, sizeof(HX8347A_CMO24_regValues)); |
silviosz | 1:a5ccd53612ea | 1978 | // init_table(HX8347A_ITDB02_regValues, sizeof(HX8347A_ITDB02_regValues)); |
silviosz | 1:a5ccd53612ea | 1979 | // init_table(HX8347G_2_regValues, sizeof(HX8347G_2_regValues)); |
silviosz | 1:a5ccd53612ea | 1980 | break; |
silviosz | 1:a5ccd53612ea | 1981 | #endif |
silviosz | 1:a5ccd53612ea | 1982 | |
silviosz | 1:a5ccd53612ea | 1983 | case 0x8357: //BIG CHANGE: HX8357-B is now 0x8357 |
silviosz | 1:a5ccd53612ea | 1984 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 1985 | goto common_8357; |
silviosz | 1:a5ccd53612ea | 1986 | case 0x9090: //BIG CHANGE: HX8357-D was 0x8357 |
silviosz | 1:a5ccd53612ea | 1987 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 1988 | common_8357: |
silviosz | 1:a5ccd53612ea | 1989 | static const uint8_t HX8357C_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 1990 | TFTLCD_DELAY8, 1, //dummy table |
silviosz | 1:a5ccd53612ea | 1991 | }; |
silviosz | 1:a5ccd53612ea | 1992 | table8_ads = HX8357C_regValues, table_size = sizeof(HX8357C_regValues); |
silviosz | 1:a5ccd53612ea | 1993 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 1994 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 1995 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 1996 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 1997 | break; |
silviosz | 1:a5ccd53612ea | 1998 | |
silviosz | 1:a5ccd53612ea | 1999 | case 0x0099: //HX8357-D matches datasheet |
silviosz | 1:a5ccd53612ea | 2000 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 2001 | static const uint8_t HX8357_99_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2002 | (0xB9), 3, 0xFF, 0x83, 0x57, // SETEXTC |
silviosz | 1:a5ccd53612ea | 2003 | TFTLCD_DELAY8, 150, |
silviosz | 1:a5ccd53612ea | 2004 | TFTLCD_DELAY8, 150, |
silviosz | 1:a5ccd53612ea | 2005 | (0xB6), 1, 0x25, // SETCOM [4B 00] -2.5V+37*0.02V=-1.76V [-1.00V] |
silviosz | 1:a5ccd53612ea | 2006 | (0xC0), 6, 0x50, 0x50, 0x01, 0x3C, 0x1E, 0x08, // SETSTBA [73 50 00 3C C4 08] |
silviosz | 1:a5ccd53612ea | 2007 | (0xB4), 7, 0x02, 0x40, 0x00, 0x2A, 0x2A, 0x0D, 0x78, // SETCYC [02 40 00 2A 2A 0D 96] |
silviosz | 1:a5ccd53612ea | 2008 | #ifdef SUPPORT_8357D_GAMMA |
silviosz | 1:a5ccd53612ea | 2009 | // HX8357D_SETGAMMA [0B 0C 11 1D 25 37 43 4B 4E 47 41 39 35 31 2E 21 1C 1D 1D 26 31 44 4E 56 44 3F 39 33 31 2E 28 1D E0 01] |
silviosz | 1:a5ccd53612ea | 2010 | (0xE0),34, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x02, 0x0A, 0x11, 0x1D, 0x23, 0x35, 0x41, 0x4B, 0x4B, 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01, |
silviosz | 1:a5ccd53612ea | 2011 | #endif |
silviosz | 1:a5ccd53612ea | 2012 | }; |
silviosz | 1:a5ccd53612ea | 2013 | table8_ads = HX8357_99_regValues, table_size = sizeof(HX8357_99_regValues); |
silviosz | 1:a5ccd53612ea | 2014 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2015 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 2016 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2017 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 2018 | break; |
silviosz | 1:a5ccd53612ea | 2019 | |
silviosz | 1:a5ccd53612ea | 2020 | #ifdef SUPPORT_8230 |
silviosz | 1:a5ccd53612ea | 2021 | case 0x8230: //thanks Auzman |
silviosz | 1:a5ccd53612ea | 2022 | _lcd_capable = 0 | REV_SCREEN | INVERT_GS | INVERT_RGB | READ_BGR; |
silviosz | 1:a5ccd53612ea | 2023 | static const uint16_t UC8230_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2024 | //After pin Reset wait at least 100ms |
silviosz | 1:a5ccd53612ea | 2025 | TFTLCD_DELAY, 100, //at least 100ms |
silviosz | 1:a5ccd53612ea | 2026 | 0x0046, 0x0002, //MTP Disable |
silviosz | 1:a5ccd53612ea | 2027 | 0x0010, 0x1590, //SAP=1, BT=5, APE=1, AP=1 |
silviosz | 1:a5ccd53612ea | 2028 | 0x0011, 0x0227, //DC1=2, DC0=2, VC=7 |
silviosz | 1:a5ccd53612ea | 2029 | 0x0012, 0x80ff, //P5VMD=1, PON=7, VRH=15 |
silviosz | 1:a5ccd53612ea | 2030 | 0x0013, 0x9c31, //VDV=28, VCM=49 |
silviosz | 1:a5ccd53612ea | 2031 | TFTLCD_DELAY, 10, //at least 10ms |
silviosz | 1:a5ccd53612ea | 2032 | 0x0002, 0x0300, //set N-line = 1 |
silviosz | 1:a5ccd53612ea | 2033 | 0x0003, 0x1030, //set GRAM writing direction & BGR=1 |
silviosz | 1:a5ccd53612ea | 2034 | 0x0060, 0xa700, //GS; gate scan: start position & drive line Q'ty |
silviosz | 1:a5ccd53612ea | 2035 | 0x0061, 0x0001, //REV, NDL, VLE |
silviosz | 1:a5ccd53612ea | 2036 | /*--------------------Gamma control------------------------*/ |
silviosz | 1:a5ccd53612ea | 2037 | 0x0030, 0x0303, |
silviosz | 1:a5ccd53612ea | 2038 | 0x0031, 0x0303, |
silviosz | 1:a5ccd53612ea | 2039 | 0x0032, 0x0303, |
silviosz | 1:a5ccd53612ea | 2040 | 0x0033, 0x0300, |
silviosz | 1:a5ccd53612ea | 2041 | 0x0034, 0x0003, |
silviosz | 1:a5ccd53612ea | 2042 | 0x0035, 0x0303, |
silviosz | 1:a5ccd53612ea | 2043 | 0x0036, 0x1400, |
silviosz | 1:a5ccd53612ea | 2044 | 0x0037, 0x0303, |
silviosz | 1:a5ccd53612ea | 2045 | 0x0038, 0x0303, |
silviosz | 1:a5ccd53612ea | 2046 | 0x0039, 0x0303, |
silviosz | 1:a5ccd53612ea | 2047 | 0x003a, 0x0300, |
silviosz | 1:a5ccd53612ea | 2048 | 0x003b, 0x0003, |
silviosz | 1:a5ccd53612ea | 2049 | 0x003c, 0x0303, |
silviosz | 1:a5ccd53612ea | 2050 | 0x003d, 0x1400, |
silviosz | 1:a5ccd53612ea | 2051 | //-----------------------------------------------------------// |
silviosz | 1:a5ccd53612ea | 2052 | 0x0020, 0x0000, //GRAM horizontal address |
silviosz | 1:a5ccd53612ea | 2053 | 0x0021, 0x0000, //GRAM vertical address |
silviosz | 1:a5ccd53612ea | 2054 | //************** Partial Display control*********************// |
silviosz | 1:a5ccd53612ea | 2055 | 0x0080, 0x0000, |
silviosz | 1:a5ccd53612ea | 2056 | 0x0081, 0x0000, |
silviosz | 1:a5ccd53612ea | 2057 | 0x0082, 0x0000, |
silviosz | 1:a5ccd53612ea | 2058 | 0x0083, 0x0000, |
silviosz | 1:a5ccd53612ea | 2059 | 0x0084, 0x0000, |
silviosz | 1:a5ccd53612ea | 2060 | 0x0085, 0x0000, |
silviosz | 1:a5ccd53612ea | 2061 | //-----------------------------------------------------------// |
silviosz | 1:a5ccd53612ea | 2062 | 0x0092, 0x0200, |
silviosz | 1:a5ccd53612ea | 2063 | 0x0093, 0x0303, |
silviosz | 1:a5ccd53612ea | 2064 | 0x0090, 0x0010, //set clocks/Line |
silviosz | 1:a5ccd53612ea | 2065 | 0x0000, 0x0001, |
silviosz | 1:a5ccd53612ea | 2066 | TFTLCD_DELAY, 200, // Delay 200 ms |
silviosz | 1:a5ccd53612ea | 2067 | 0x0007, 0x0173, //Display on setting |
silviosz | 1:a5ccd53612ea | 2068 | }; |
silviosz | 1:a5ccd53612ea | 2069 | init_table16(UC8230_regValues, sizeof(UC8230_regValues)); |
silviosz | 1:a5ccd53612ea | 2070 | break; |
silviosz | 1:a5ccd53612ea | 2071 | #endif |
silviosz | 1:a5ccd53612ea | 2072 | |
silviosz | 1:a5ccd53612ea | 2073 | #ifdef SUPPORT_9163 |
silviosz | 1:a5ccd53612ea | 2074 | case 0x9163: // |
silviosz | 1:a5ccd53612ea | 2075 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 2076 | static const uint8_t PROGMEM table9163C[] = { |
silviosz | 1:a5ccd53612ea | 2077 | // (COMMAND_BYTE), n, data_bytes.... |
silviosz | 1:a5ccd53612ea | 2078 | 0x26, 1, 0x02, // [01] GAMMASET use CURVE=1, 2, 4, 8 |
silviosz | 1:a5ccd53612ea | 2079 | 0xB1, 2, 0x08, 0x02, // [0E 14] FRMCTR1 if GM==011 61.7Hz |
silviosz | 1:a5ccd53612ea | 2080 | 0xB4, 1, 0x07, // [02] INVCTR |
silviosz | 1:a5ccd53612ea | 2081 | 0xB8, 1, 0x01, // [00] GSCTRL |
silviosz | 1:a5ccd53612ea | 2082 | 0xC0, 2, 0x0A, 0x02, // [0A 05] PWCTR1 if LCM==10 |
silviosz | 1:a5ccd53612ea | 2083 | 0xC1, 1, 0x02, // [07] PWCTR2 |
silviosz | 1:a5ccd53612ea | 2084 | 0xC5, 2, 0x50, 0x63, // [43 4D] VMCTR1 |
silviosz | 1:a5ccd53612ea | 2085 | 0xC7, 1, 0, // [40] VCOMOFFS |
silviosz | 1:a5ccd53612ea | 2086 | }; |
silviosz | 1:a5ccd53612ea | 2087 | table8_ads = table9163C, table_size = sizeof(table9163C); // |
silviosz | 1:a5ccd53612ea | 2088 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2089 | *p16 = 160; |
silviosz | 1:a5ccd53612ea | 2090 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2091 | *p16 = 128; |
silviosz | 1:a5ccd53612ea | 2092 | break; |
silviosz | 1:a5ccd53612ea | 2093 | #endif |
silviosz | 1:a5ccd53612ea | 2094 | |
silviosz | 1:a5ccd53612ea | 2095 | #ifdef SUPPORT_9225 |
silviosz | 1:a5ccd53612ea | 2096 | #define ILI9225_DRIVER_OUTPUT_CTRL (0x01u) // Driver Output Control |
silviosz | 1:a5ccd53612ea | 2097 | #define ILI9225_LCD_AC_DRIVING_CTRL (0x02u) // LCD AC Driving Control |
silviosz | 1:a5ccd53612ea | 2098 | #define ILI9225_ENTRY_MODE (0x03u) // Entry Mode |
silviosz | 1:a5ccd53612ea | 2099 | #define ILI9225_DISP_CTRL1 (0x07u) // Display Control 1 |
silviosz | 1:a5ccd53612ea | 2100 | #define ILI9225_BLANK_PERIOD_CTRL1 (0x08u) // Blank Period Control |
silviosz | 1:a5ccd53612ea | 2101 | #define ILI9225_FRAME_CYCLE_CTRL (0x0Bu) // Frame Cycle Control |
silviosz | 1:a5ccd53612ea | 2102 | #define ILI9225_INTERFACE_CTRL (0x0Cu) // Interface Control |
silviosz | 1:a5ccd53612ea | 2103 | #define ILI9225_OSC_CTRL (0x0Fu) // Osc Control |
silviosz | 1:a5ccd53612ea | 2104 | #define ILI9225_POWER_CTRL1 (0x10u) // Power Control 1 |
silviosz | 1:a5ccd53612ea | 2105 | #define ILI9225_POWER_CTRL2 (0x11u) // Power Control 2 |
silviosz | 1:a5ccd53612ea | 2106 | #define ILI9225_POWER_CTRL3 (0x12u) // Power Control 3 |
silviosz | 1:a5ccd53612ea | 2107 | #define ILI9225_POWER_CTRL4 (0x13u) // Power Control 4 |
silviosz | 1:a5ccd53612ea | 2108 | #define ILI9225_POWER_CTRL5 (0x14u) // Power Control 5 |
silviosz | 1:a5ccd53612ea | 2109 | #define ILI9225_VCI_RECYCLING (0x15u) // VCI Recycling |
silviosz | 1:a5ccd53612ea | 2110 | #define ILI9225_RAM_ADDR_SET1 (0x20u) // Horizontal GRAM Address Set |
silviosz | 1:a5ccd53612ea | 2111 | #define ILI9225_RAM_ADDR_SET2 (0x21u) // Vertical GRAM Address Set |
silviosz | 1:a5ccd53612ea | 2112 | #define ILI9225_GRAM_DATA_REG (0x22u) // GRAM Data Register |
silviosz | 1:a5ccd53612ea | 2113 | #define ILI9225_GATE_SCAN_CTRL (0x30u) // Gate Scan Control Register |
silviosz | 1:a5ccd53612ea | 2114 | #define ILI9225_VERTICAL_SCROLL_CTRL1 (0x31u) // Vertical Scroll Control 1 Register |
silviosz | 1:a5ccd53612ea | 2115 | #define ILI9225_VERTICAL_SCROLL_CTRL2 (0x32u) // Vertical Scroll Control 2 Register |
silviosz | 1:a5ccd53612ea | 2116 | #define ILI9225_VERTICAL_SCROLL_CTRL3 (0x33u) // Vertical Scroll Control 3 Register |
silviosz | 1:a5ccd53612ea | 2117 | #define ILI9225_PARTIAL_DRIVING_POS1 (0x34u) // Partial Driving Position 1 Register |
silviosz | 1:a5ccd53612ea | 2118 | #define ILI9225_PARTIAL_DRIVING_POS2 (0x35u) // Partial Driving Position 2 Register |
silviosz | 1:a5ccd53612ea | 2119 | #define ILI9225_HORIZONTAL_WINDOW_ADDR1 (0x36u) // Horizontal Address END Position HEA |
silviosz | 1:a5ccd53612ea | 2120 | #define ILI9225_HORIZONTAL_WINDOW_ADDR2 (0x37u) // Horizontal Address START Position HSA |
silviosz | 1:a5ccd53612ea | 2121 | #define ILI9225_VERTICAL_WINDOW_ADDR1 (0x38u) // Vertical Address END Position VEA |
silviosz | 1:a5ccd53612ea | 2122 | #define ILI9225_VERTICAL_WINDOW_ADDR2 (0x39u) // Vertical Address START Position VSA |
silviosz | 1:a5ccd53612ea | 2123 | #define ILI9225_GAMMA_CTRL1 (0x50u) // Gamma Control 1 |
silviosz | 1:a5ccd53612ea | 2124 | #define ILI9225_GAMMA_CTRL2 (0x51u) // Gamma Control 2 |
silviosz | 1:a5ccd53612ea | 2125 | #define ILI9225_GAMMA_CTRL3 (0x52u) // Gamma Control 3 |
silviosz | 1:a5ccd53612ea | 2126 | #define ILI9225_GAMMA_CTRL4 (0x53u) // Gamma Control 4 |
silviosz | 1:a5ccd53612ea | 2127 | #define ILI9225_GAMMA_CTRL5 (0x54u) // Gamma Control 5 |
silviosz | 1:a5ccd53612ea | 2128 | #define ILI9225_GAMMA_CTRL6 (0x55u) // Gamma Control 6 |
silviosz | 1:a5ccd53612ea | 2129 | #define ILI9225_GAMMA_CTRL7 (0x56u) // Gamma Control 7 |
silviosz | 1:a5ccd53612ea | 2130 | #define ILI9225_GAMMA_CTRL8 (0x57u) // Gamma Control 8 |
silviosz | 1:a5ccd53612ea | 2131 | #define ILI9225_GAMMA_CTRL9 (0x58u) // Gamma Control 9 |
silviosz | 1:a5ccd53612ea | 2132 | #define ILI9225_GAMMA_CTRL10 (0x59u) // Gamma Control 10 |
silviosz | 1:a5ccd53612ea | 2133 | |
silviosz | 1:a5ccd53612ea | 2134 | #define ILI9225C_INVOFF 0x20 |
silviosz | 1:a5ccd53612ea | 2135 | #define ILI9225C_INVON 0x21 |
silviosz | 1:a5ccd53612ea | 2136 | |
silviosz | 1:a5ccd53612ea | 2137 | case 0x6813: |
silviosz | 1:a5ccd53612ea | 2138 | case 0x9226: |
silviosz | 1:a5ccd53612ea | 2139 | _lcd_ID = 0x9225; //fall through |
silviosz | 1:a5ccd53612ea | 2140 | case 0x9225: |
silviosz | 1:a5ccd53612ea | 2141 | _lcd_capable = REV_SCREEN | READ_BGR; //thanks tongbajiel |
silviosz | 1:a5ccd53612ea | 2142 | static const uint16_t ILI9225_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2143 | /* Start Initial Sequence */ |
silviosz | 1:a5ccd53612ea | 2144 | /* Set SS bit and direction output from S528 to S1 */ |
silviosz | 1:a5ccd53612ea | 2145 | ILI9225_POWER_CTRL1, 0x0000, // Set SAP,DSTB,STB |
silviosz | 1:a5ccd53612ea | 2146 | ILI9225_POWER_CTRL2, 0x0000, // Set APON,PON,AON,VCI1EN,VC |
silviosz | 1:a5ccd53612ea | 2147 | ILI9225_POWER_CTRL3, 0x0000, // Set BT,DC1,DC2,DC3 |
silviosz | 1:a5ccd53612ea | 2148 | ILI9225_POWER_CTRL4, 0x0000, // Set GVDD |
silviosz | 1:a5ccd53612ea | 2149 | ILI9225_POWER_CTRL5, 0x0000, // Set VCOMH/VCOML voltage |
silviosz | 1:a5ccd53612ea | 2150 | TFTLCD_DELAY, 40, |
silviosz | 1:a5ccd53612ea | 2151 | |
silviosz | 1:a5ccd53612ea | 2152 | // Power-on sequence |
silviosz | 1:a5ccd53612ea | 2153 | ILI9225_POWER_CTRL2, 0x0018, // Set APON,PON,AON,VCI1EN,VC |
silviosz | 1:a5ccd53612ea | 2154 | ILI9225_POWER_CTRL3, 0x6121, // Set BT,DC1,DC2,DC3 |
silviosz | 1:a5ccd53612ea | 2155 | ILI9225_POWER_CTRL4, 0x006F, // Set GVDD /*007F 0088 */ |
silviosz | 1:a5ccd53612ea | 2156 | ILI9225_POWER_CTRL5, 0x495F, // Set VCOMH/VCOML voltage |
silviosz | 1:a5ccd53612ea | 2157 | ILI9225_POWER_CTRL1, 0x0800, // Set SAP,DSTB,STB |
silviosz | 1:a5ccd53612ea | 2158 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 2159 | ILI9225_POWER_CTRL2, 0x103B, // Set APON,PON,AON,VCI1EN,VC |
silviosz | 1:a5ccd53612ea | 2160 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 2161 | |
silviosz | 1:a5ccd53612ea | 2162 | ILI9225_DRIVER_OUTPUT_CTRL, 0x011C, // set the display line number and display direction |
silviosz | 1:a5ccd53612ea | 2163 | ILI9225_LCD_AC_DRIVING_CTRL, 0x0100, // set 1 line inversion |
silviosz | 1:a5ccd53612ea | 2164 | ILI9225_ENTRY_MODE, 0x1030, // set GRAM write direction and BGR=1. |
silviosz | 1:a5ccd53612ea | 2165 | ILI9225_DISP_CTRL1, 0x0000, // Display off |
silviosz | 1:a5ccd53612ea | 2166 | ILI9225_BLANK_PERIOD_CTRL1, 0x0808, // set the back porch and front porch |
silviosz | 1:a5ccd53612ea | 2167 | ILI9225_FRAME_CYCLE_CTRL, 0x1100, // set the clocks number per line |
silviosz | 1:a5ccd53612ea | 2168 | ILI9225_INTERFACE_CTRL, 0x0000, // CPU interface |
silviosz | 1:a5ccd53612ea | 2169 | ILI9225_OSC_CTRL, 0x0D01, // Set Osc /*0e01*/ |
silviosz | 1:a5ccd53612ea | 2170 | ILI9225_VCI_RECYCLING, 0x0020, // Set VCI recycling |
silviosz | 1:a5ccd53612ea | 2171 | ILI9225_RAM_ADDR_SET1, 0x0000, // RAM Address |
silviosz | 1:a5ccd53612ea | 2172 | ILI9225_RAM_ADDR_SET2, 0x0000, // RAM Address |
silviosz | 1:a5ccd53612ea | 2173 | |
silviosz | 1:a5ccd53612ea | 2174 | /* Set GRAM area */ |
silviosz | 1:a5ccd53612ea | 2175 | ILI9225_GATE_SCAN_CTRL, 0x0000, |
silviosz | 1:a5ccd53612ea | 2176 | ILI9225_VERTICAL_SCROLL_CTRL1, 0x00DB, |
silviosz | 1:a5ccd53612ea | 2177 | ILI9225_VERTICAL_SCROLL_CTRL2, 0x0000, |
silviosz | 1:a5ccd53612ea | 2178 | ILI9225_VERTICAL_SCROLL_CTRL3, 0x0000, |
silviosz | 1:a5ccd53612ea | 2179 | ILI9225_PARTIAL_DRIVING_POS1, 0x00DB, |
silviosz | 1:a5ccd53612ea | 2180 | ILI9225_PARTIAL_DRIVING_POS2, 0x0000, |
silviosz | 1:a5ccd53612ea | 2181 | ILI9225_HORIZONTAL_WINDOW_ADDR1, 0x00AF, |
silviosz | 1:a5ccd53612ea | 2182 | ILI9225_HORIZONTAL_WINDOW_ADDR2, 0x0000, |
silviosz | 1:a5ccd53612ea | 2183 | ILI9225_VERTICAL_WINDOW_ADDR1, 0x00DB, |
silviosz | 1:a5ccd53612ea | 2184 | ILI9225_VERTICAL_WINDOW_ADDR2, 0x0000, |
silviosz | 1:a5ccd53612ea | 2185 | |
silviosz | 1:a5ccd53612ea | 2186 | /* Set GAMMA curve */ |
silviosz | 1:a5ccd53612ea | 2187 | ILI9225_GAMMA_CTRL1, 0x0000, |
silviosz | 1:a5ccd53612ea | 2188 | ILI9225_GAMMA_CTRL2, 0x0808, |
silviosz | 1:a5ccd53612ea | 2189 | ILI9225_GAMMA_CTRL3, 0x080A, |
silviosz | 1:a5ccd53612ea | 2190 | ILI9225_GAMMA_CTRL4, 0x000A, |
silviosz | 1:a5ccd53612ea | 2191 | ILI9225_GAMMA_CTRL5, 0x0A08, |
silviosz | 1:a5ccd53612ea | 2192 | ILI9225_GAMMA_CTRL6, 0x0808, |
silviosz | 1:a5ccd53612ea | 2193 | ILI9225_GAMMA_CTRL7, 0x0000, |
silviosz | 1:a5ccd53612ea | 2194 | ILI9225_GAMMA_CTRL8, 0x0A00, |
silviosz | 1:a5ccd53612ea | 2195 | ILI9225_GAMMA_CTRL9, 0x0710, |
silviosz | 1:a5ccd53612ea | 2196 | ILI9225_GAMMA_CTRL10, 0x0710, |
silviosz | 1:a5ccd53612ea | 2197 | |
silviosz | 1:a5ccd53612ea | 2198 | ILI9225_DISP_CTRL1, 0x0012, |
silviosz | 1:a5ccd53612ea | 2199 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 2200 | ILI9225_DISP_CTRL1, 0x1017, |
silviosz | 1:a5ccd53612ea | 2201 | }; |
silviosz | 1:a5ccd53612ea | 2202 | init_table16(ILI9225_regValues, sizeof(ILI9225_regValues)); |
silviosz | 1:a5ccd53612ea | 2203 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2204 | *p16 = 220; |
silviosz | 1:a5ccd53612ea | 2205 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2206 | *p16 = 176; |
silviosz | 1:a5ccd53612ea | 2207 | break; |
silviosz | 1:a5ccd53612ea | 2208 | #endif |
silviosz | 1:a5ccd53612ea | 2209 | |
silviosz | 1:a5ccd53612ea | 2210 | case 0x0001: |
silviosz | 1:a5ccd53612ea | 2211 | _lcd_capable = 0 | REV_SCREEN | INVERT_GS; //no RGB bug. thanks Ivo_Deshev |
silviosz | 1:a5ccd53612ea | 2212 | goto common_9320; |
silviosz | 1:a5ccd53612ea | 2213 | case 0x5408: |
silviosz | 1:a5ccd53612ea | 2214 | _lcd_capable = 0 | REV_SCREEN | READ_BGR; //Red 2.4" thanks jorgenv, Ardlab_Gent |
silviosz | 1:a5ccd53612ea | 2215 | // _lcd_capable = 0 | REV_SCREEN | READ_BGR | INVERT_GS; //Blue 2.8" might be different |
silviosz | 1:a5ccd53612ea | 2216 | goto common_9320; |
silviosz | 1:a5ccd53612ea | 2217 | case 0x1505: //R61505 thanks Ravi_kanchan2004. R61505V, R61505W different |
silviosz | 1:a5ccd53612ea | 2218 | case 0x9320: |
silviosz | 1:a5ccd53612ea | 2219 | _lcd_capable = 0 | REV_SCREEN | READ_BGR; |
silviosz | 1:a5ccd53612ea | 2220 | common_9320: |
silviosz | 1:a5ccd53612ea | 2221 | static const uint16_t ILI9320_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2222 | 0x00e5, 0x8000, |
silviosz | 1:a5ccd53612ea | 2223 | 0x0000, 0x0001, |
silviosz | 1:a5ccd53612ea | 2224 | 0x0001, 0x100, |
silviosz | 1:a5ccd53612ea | 2225 | 0x0002, 0x0700, |
silviosz | 1:a5ccd53612ea | 2226 | 0x0003, 0x1030, |
silviosz | 1:a5ccd53612ea | 2227 | 0x0004, 0x0000, |
silviosz | 1:a5ccd53612ea | 2228 | 0x0008, 0x0202, |
silviosz | 1:a5ccd53612ea | 2229 | 0x0009, 0x0000, |
silviosz | 1:a5ccd53612ea | 2230 | 0x000A, 0x0000, |
silviosz | 1:a5ccd53612ea | 2231 | 0x000C, 0x0000, |
silviosz | 1:a5ccd53612ea | 2232 | 0x000D, 0x0000, |
silviosz | 1:a5ccd53612ea | 2233 | 0x000F, 0x0000, |
silviosz | 1:a5ccd53612ea | 2234 | //-----Power On sequence----------------------- |
silviosz | 1:a5ccd53612ea | 2235 | 0x0010, 0x0000, |
silviosz | 1:a5ccd53612ea | 2236 | 0x0011, 0x0007, |
silviosz | 1:a5ccd53612ea | 2237 | 0x0012, 0x0000, |
silviosz | 1:a5ccd53612ea | 2238 | 0x0013, 0x0000, |
silviosz | 1:a5ccd53612ea | 2239 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 2240 | 0x0010, 0x17B0, //SAP=1, BT=7, APE=1, AP=3 |
silviosz | 1:a5ccd53612ea | 2241 | 0x0011, 0x0007, //DC1=0, DC0=0, VC=7 |
silviosz | 1:a5ccd53612ea | 2242 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 2243 | 0x0012, 0x013A, //VCMR=1, PON=3, VRH=10 |
silviosz | 1:a5ccd53612ea | 2244 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 2245 | 0x0013, 0x1A00, //VDV=26 |
silviosz | 1:a5ccd53612ea | 2246 | 0x0029, 0x000c, //VCM=12 |
silviosz | 1:a5ccd53612ea | 2247 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 2248 | //-----Gamma control----------------------- |
silviosz | 1:a5ccd53612ea | 2249 | 0x0030, 0x0000, |
silviosz | 1:a5ccd53612ea | 2250 | 0x0031, 0x0505, |
silviosz | 1:a5ccd53612ea | 2251 | 0x0032, 0x0004, |
silviosz | 1:a5ccd53612ea | 2252 | 0x0035, 0x0006, |
silviosz | 1:a5ccd53612ea | 2253 | 0x0036, 0x0707, |
silviosz | 1:a5ccd53612ea | 2254 | 0x0037, 0x0105, |
silviosz | 1:a5ccd53612ea | 2255 | 0x0038, 0x0002, |
silviosz | 1:a5ccd53612ea | 2256 | 0x0039, 0x0707, |
silviosz | 1:a5ccd53612ea | 2257 | 0x003C, 0x0704, |
silviosz | 1:a5ccd53612ea | 2258 | 0x003D, 0x0807, |
silviosz | 1:a5ccd53612ea | 2259 | //-----Set RAM area----------------------- |
silviosz | 1:a5ccd53612ea | 2260 | 0x0060, 0xA700, //GS=1 |
silviosz | 1:a5ccd53612ea | 2261 | 0x0061, 0x0001, |
silviosz | 1:a5ccd53612ea | 2262 | 0x006A, 0x0000, |
silviosz | 1:a5ccd53612ea | 2263 | 0x0021, 0x0000, |
silviosz | 1:a5ccd53612ea | 2264 | 0x0020, 0x0000, |
silviosz | 1:a5ccd53612ea | 2265 | //-----Partial Display Control------------ |
silviosz | 1:a5ccd53612ea | 2266 | 0x0080, 0x0000, |
silviosz | 1:a5ccd53612ea | 2267 | 0x0081, 0x0000, |
silviosz | 1:a5ccd53612ea | 2268 | 0x0082, 0x0000, |
silviosz | 1:a5ccd53612ea | 2269 | 0x0083, 0x0000, |
silviosz | 1:a5ccd53612ea | 2270 | 0x0084, 0x0000, |
silviosz | 1:a5ccd53612ea | 2271 | 0x0085, 0x0000, |
silviosz | 1:a5ccd53612ea | 2272 | //-----Panel Control---------------------- |
silviosz | 1:a5ccd53612ea | 2273 | 0x0090, 0x0010, |
silviosz | 1:a5ccd53612ea | 2274 | 0x0092, 0x0000, |
silviosz | 1:a5ccd53612ea | 2275 | 0x0093, 0x0003, |
silviosz | 1:a5ccd53612ea | 2276 | 0x0095, 0x0110, |
silviosz | 1:a5ccd53612ea | 2277 | 0x0097, 0x0000, |
silviosz | 1:a5ccd53612ea | 2278 | 0x0098, 0x0000, |
silviosz | 1:a5ccd53612ea | 2279 | //-----Display on----------------------- |
silviosz | 1:a5ccd53612ea | 2280 | 0x0007, 0x0173, |
silviosz | 1:a5ccd53612ea | 2281 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 2282 | }; |
silviosz | 1:a5ccd53612ea | 2283 | init_table16(ILI9320_regValues, sizeof(ILI9320_regValues)); |
silviosz | 1:a5ccd53612ea | 2284 | break; |
silviosz | 1:a5ccd53612ea | 2285 | case 0x6809: |
silviosz | 1:a5ccd53612ea | 2286 | _lcd_capable = 0 | REV_SCREEN | INVERT_GS | AUTO_READINC; |
silviosz | 1:a5ccd53612ea | 2287 | goto common_93x5; |
silviosz | 1:a5ccd53612ea | 2288 | case 0x9328: |
silviosz | 1:a5ccd53612ea | 2289 | case 0x9325: |
silviosz | 1:a5ccd53612ea | 2290 | _lcd_capable = 0 | REV_SCREEN | INVERT_GS; |
silviosz | 1:a5ccd53612ea | 2291 | goto common_93x5; |
silviosz | 1:a5ccd53612ea | 2292 | case 0x9331: |
silviosz | 1:a5ccd53612ea | 2293 | case 0x9335: |
silviosz | 1:a5ccd53612ea | 2294 | _lcd_capable = 0 | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 2295 | common_93x5: |
silviosz | 1:a5ccd53612ea | 2296 | static const uint16_t ILI9325_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2297 | 0x00E5, 0x78F0, // set SRAM internal timing |
silviosz | 1:a5ccd53612ea | 2298 | 0x0001, 0x0100, // set Driver Output Control |
silviosz | 1:a5ccd53612ea | 2299 | 0x0002, 0x0200, // set 1 line inversion |
silviosz | 1:a5ccd53612ea | 2300 | 0x0003, 0x1030, // set GRAM write direction and BGR=1. |
silviosz | 1:a5ccd53612ea | 2301 | 0x0004, 0x0000, // Resize register |
silviosz | 1:a5ccd53612ea | 2302 | 0x0005, 0x0000, // .kbv 16bits Data Format Selection |
silviosz | 1:a5ccd53612ea | 2303 | 0x0008, 0x0207, // set the back porch and front porch |
silviosz | 1:a5ccd53612ea | 2304 | 0x0009, 0x0000, // set non-display area refresh cycle ISC[3:0] |
silviosz | 1:a5ccd53612ea | 2305 | 0x000A, 0x0000, // FMARK function |
silviosz | 1:a5ccd53612ea | 2306 | 0x000C, 0x0000, // RGB interface setting |
silviosz | 1:a5ccd53612ea | 2307 | 0x000D, 0x0000, // Frame marker Position |
silviosz | 1:a5ccd53612ea | 2308 | 0x000F, 0x0000, // RGB interface polarity |
silviosz | 1:a5ccd53612ea | 2309 | // ----------- Power On sequence ----------- // |
silviosz | 1:a5ccd53612ea | 2310 | 0x0010, 0x0000, // SAP, BT[3:0], AP, DSTB, SLP, STB |
silviosz | 1:a5ccd53612ea | 2311 | 0x0011, 0x0007, // DC1[2:0], DC0[2:0], VC[2:0] |
silviosz | 1:a5ccd53612ea | 2312 | 0x0012, 0x0000, // VREG1OUT voltage |
silviosz | 1:a5ccd53612ea | 2313 | 0x0013, 0x0000, // VDV[4:0] for VCOM amplitude |
silviosz | 1:a5ccd53612ea | 2314 | 0x0007, 0x0001, |
silviosz | 1:a5ccd53612ea | 2315 | TFTLCD_DELAY, 200, // Dis-charge capacitor power voltage |
silviosz | 1:a5ccd53612ea | 2316 | 0x0010, 0x1690, // SAP=1, BT=6, APE=1, AP=1, DSTB=0, SLP=0, STB=0 |
silviosz | 1:a5ccd53612ea | 2317 | 0x0011, 0x0227, // DC1=2, DC0=2, VC=7 |
silviosz | 1:a5ccd53612ea | 2318 | TFTLCD_DELAY, 50, // wait_ms 50ms |
silviosz | 1:a5ccd53612ea | 2319 | 0x0012, 0x000D, // VCIRE=1, PON=0, VRH=5 |
silviosz | 1:a5ccd53612ea | 2320 | TFTLCD_DELAY, 50, // wait_ms 50ms |
silviosz | 1:a5ccd53612ea | 2321 | 0x0013, 0x1200, // VDV=28 for VCOM amplitude |
silviosz | 1:a5ccd53612ea | 2322 | 0x0029, 0x000A, // VCM=10 for VCOMH |
silviosz | 1:a5ccd53612ea | 2323 | 0x002B, 0x000D, // Set Frame Rate |
silviosz | 1:a5ccd53612ea | 2324 | TFTLCD_DELAY, 50, // wait_ms 50ms |
silviosz | 1:a5ccd53612ea | 2325 | 0x0020, 0x0000, // GRAM horizontal Address |
silviosz | 1:a5ccd53612ea | 2326 | 0x0021, 0x0000, // GRAM Vertical Address |
silviosz | 1:a5ccd53612ea | 2327 | // ----------- Adjust the Gamma Curve ----------// |
silviosz | 1:a5ccd53612ea | 2328 | |
silviosz | 1:a5ccd53612ea | 2329 | 0x0030, 0x0000, |
silviosz | 1:a5ccd53612ea | 2330 | 0x0031, 0x0404, |
silviosz | 1:a5ccd53612ea | 2331 | 0x0032, 0x0003, |
silviosz | 1:a5ccd53612ea | 2332 | 0x0035, 0x0405, |
silviosz | 1:a5ccd53612ea | 2333 | 0x0036, 0x0808, |
silviosz | 1:a5ccd53612ea | 2334 | 0x0037, 0x0407, |
silviosz | 1:a5ccd53612ea | 2335 | 0x0038, 0x0303, |
silviosz | 1:a5ccd53612ea | 2336 | 0x0039, 0x0707, |
silviosz | 1:a5ccd53612ea | 2337 | 0x003C, 0x0504, |
silviosz | 1:a5ccd53612ea | 2338 | 0x003D, 0x0808, |
silviosz | 1:a5ccd53612ea | 2339 | |
silviosz | 1:a5ccd53612ea | 2340 | //------------------ Set GRAM area ---------------// |
silviosz | 1:a5ccd53612ea | 2341 | 0x0060, 0x2700, // Gate Scan Line GS=0 [0xA700] |
silviosz | 1:a5ccd53612ea | 2342 | 0x0061, 0x0001, // NDL,VLE, REV .kbv |
silviosz | 1:a5ccd53612ea | 2343 | 0x006A, 0x0000, // set scrolling line |
silviosz | 1:a5ccd53612ea | 2344 | //-------------- Partial Display Control ---------// |
silviosz | 1:a5ccd53612ea | 2345 | 0x0080, 0x0000, |
silviosz | 1:a5ccd53612ea | 2346 | 0x0081, 0x0000, |
silviosz | 1:a5ccd53612ea | 2347 | 0x0082, 0x0000, |
silviosz | 1:a5ccd53612ea | 2348 | 0x0083, 0x0000, |
silviosz | 1:a5ccd53612ea | 2349 | 0x0084, 0x0000, |
silviosz | 1:a5ccd53612ea | 2350 | 0x0085, 0x0000, |
silviosz | 1:a5ccd53612ea | 2351 | //-------------- Panel Control -------------------// |
silviosz | 1:a5ccd53612ea | 2352 | 0x0090, 0x0010, |
silviosz | 1:a5ccd53612ea | 2353 | 0x0092, 0x0000, |
silviosz | 1:a5ccd53612ea | 2354 | 0x0007, 0x0133, // 262K color and display ON |
silviosz | 1:a5ccd53612ea | 2355 | }; |
silviosz | 1:a5ccd53612ea | 2356 | init_table16(ILI9325_regValues, sizeof(ILI9325_regValues)); |
silviosz | 1:a5ccd53612ea | 2357 | break; |
silviosz | 1:a5ccd53612ea | 2358 | |
silviosz | 1:a5ccd53612ea | 2359 | #if defined(SUPPORT_9326_5420) |
silviosz | 1:a5ccd53612ea | 2360 | case 0x5420: |
silviosz | 1:a5ccd53612ea | 2361 | case 0x9326: |
silviosz | 1:a5ccd53612ea | 2362 | _lcd_capable = REV_SCREEN | READ_BGR; |
silviosz | 1:a5ccd53612ea | 2363 | static const uint16_t ILI9326_CPT28_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2364 | //************* Start Initial Sequence **********// |
silviosz | 1:a5ccd53612ea | 2365 | 0x0702, 0x3008, // Set internal timing, don’t change this value |
silviosz | 1:a5ccd53612ea | 2366 | 0x0705, 0x0036, // Set internal timing, don’t change this value |
silviosz | 1:a5ccd53612ea | 2367 | 0x070B, 0x1213, // Set internal timing, don’t change this value |
silviosz | 1:a5ccd53612ea | 2368 | 0x0001, 0x0100, // set SS and SM bit |
silviosz | 1:a5ccd53612ea | 2369 | 0x0002, 0x0100, // set 1 line inversion |
silviosz | 1:a5ccd53612ea | 2370 | 0x0003, 0x1030, // set GRAM write direction and BGR=1. |
silviosz | 1:a5ccd53612ea | 2371 | 0x0008, 0x0202, // set the back porch and front porch |
silviosz | 1:a5ccd53612ea | 2372 | 0x0009, 0x0000, // set non-display area refresh cycle ISC[3:0] |
silviosz | 1:a5ccd53612ea | 2373 | 0x000C, 0x0000, // RGB interface setting |
silviosz | 1:a5ccd53612ea | 2374 | 0x000F, 0x0000, // RGB interface polarity |
silviosz | 1:a5ccd53612ea | 2375 | //*************Power On sequence ****************// |
silviosz | 1:a5ccd53612ea | 2376 | 0x0100, 0x0000, // SAP, BT[3:0], AP, DSTB, SLP, STB |
silviosz | 1:a5ccd53612ea | 2377 | 0x0102, 0x0000, // VREG1OUT voltage |
silviosz | 1:a5ccd53612ea | 2378 | 0x0103, 0x0000, // VDV[4:0] for VCOM amplitude |
silviosz | 1:a5ccd53612ea | 2379 | TFTLCD_DELAY, 200, // Dis-charge capacitor power voltage |
silviosz | 1:a5ccd53612ea | 2380 | 0x0100, 0x1190, // SAP, BT[3:0], AP, DSTB, SLP, STB |
silviosz | 1:a5ccd53612ea | 2381 | 0x0101, 0x0227, // DC1[2:0], DC0[2:0], VC[2:0] |
silviosz | 1:a5ccd53612ea | 2382 | TFTLCD_DELAY, 50, // Delay 50ms |
silviosz | 1:a5ccd53612ea | 2383 | 0x0102, 0x01BD, // VREG1OUT voltage |
silviosz | 1:a5ccd53612ea | 2384 | TFTLCD_DELAY, 50, // Delay 50ms |
silviosz | 1:a5ccd53612ea | 2385 | 0x0103, 0x2D00, // VDV[4:0] for VCOM amplitude |
silviosz | 1:a5ccd53612ea | 2386 | 0x0281, 0x000E, // VCM[5:0] for VCOMH |
silviosz | 1:a5ccd53612ea | 2387 | TFTLCD_DELAY, 50, // |
silviosz | 1:a5ccd53612ea | 2388 | 0x0200, 0x0000, // GRAM horizontal Address |
silviosz | 1:a5ccd53612ea | 2389 | 0x0201, 0x0000, // GRAM Vertical Address |
silviosz | 1:a5ccd53612ea | 2390 | // ----------- Adjust the Gamma Curve ----------// |
silviosz | 1:a5ccd53612ea | 2391 | 0x0300, 0x0000, // |
silviosz | 1:a5ccd53612ea | 2392 | 0x0301, 0x0707, // |
silviosz | 1:a5ccd53612ea | 2393 | 0x0302, 0x0606, // |
silviosz | 1:a5ccd53612ea | 2394 | 0x0305, 0x0000, // |
silviosz | 1:a5ccd53612ea | 2395 | 0x0306, 0x0D00, // |
silviosz | 1:a5ccd53612ea | 2396 | 0x0307, 0x0706, // |
silviosz | 1:a5ccd53612ea | 2397 | 0x0308, 0x0005, // |
silviosz | 1:a5ccd53612ea | 2398 | 0x0309, 0x0007, // |
silviosz | 1:a5ccd53612ea | 2399 | 0x030C, 0x0000, // |
silviosz | 1:a5ccd53612ea | 2400 | 0x030D, 0x000A, // |
silviosz | 1:a5ccd53612ea | 2401 | //------------------ Set GRAM area ---------------// |
silviosz | 1:a5ccd53612ea | 2402 | 0x0400, 0x3100, // Gate Scan Line 400 lines |
silviosz | 1:a5ccd53612ea | 2403 | 0x0401, 0x0001, // NDL,VLE, REV |
silviosz | 1:a5ccd53612ea | 2404 | 0x0404, 0x0000, // set scrolling line |
silviosz | 1:a5ccd53612ea | 2405 | //-------------- Partial Display Control ---------// |
silviosz | 1:a5ccd53612ea | 2406 | 0x0500, 0x0000, // Partial Image 1 Display Position |
silviosz | 1:a5ccd53612ea | 2407 | 0x0501, 0x0000, // Partial Image 1 RAM Start/End Address |
silviosz | 1:a5ccd53612ea | 2408 | 0x0502, 0x0000, // Partial Image 1 RAM Start/End Address |
silviosz | 1:a5ccd53612ea | 2409 | 0x0503, 0x0000, // Partial Image 2 Display Position |
silviosz | 1:a5ccd53612ea | 2410 | 0x0504, 0x0000, // Partial Image 2 RAM Start/End Address |
silviosz | 1:a5ccd53612ea | 2411 | 0x0505, 0x0000, // Partial Image 2 RAM Start/End Address |
silviosz | 1:a5ccd53612ea | 2412 | //-------------- Panel Control -------------------// |
silviosz | 1:a5ccd53612ea | 2413 | 0x0010, 0x0010, // DIVI[1:0];RTNI[4:0] |
silviosz | 1:a5ccd53612ea | 2414 | 0x0011, 0x0600, // NOWI[2:0];SDTI[2:0] |
silviosz | 1:a5ccd53612ea | 2415 | 0x0020, 0x0002, // DIVE[1:0];RTNE[5:0] |
silviosz | 1:a5ccd53612ea | 2416 | 0x0007, 0x0173, // 262K color and display ON |
silviosz | 1:a5ccd53612ea | 2417 | }; |
silviosz | 1:a5ccd53612ea | 2418 | init_table16(ILI9326_CPT28_regValues, sizeof(ILI9326_CPT28_regValues)); |
silviosz | 1:a5ccd53612ea | 2419 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2420 | *p16 = 400; |
silviosz | 1:a5ccd53612ea | 2421 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2422 | *p16 = 240; |
silviosz | 1:a5ccd53612ea | 2423 | break; |
silviosz | 1:a5ccd53612ea | 2424 | #endif |
silviosz | 1:a5ccd53612ea | 2425 | |
silviosz | 1:a5ccd53612ea | 2426 | case 0x9327: |
silviosz | 1:a5ccd53612ea | 2427 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; |
silviosz | 1:a5ccd53612ea | 2428 | static const uint8_t ILI9327_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2429 | 0xB0, 1, 0x00, //Disable Protect for cmds B1-DF, E0-EF, F0-FF |
silviosz | 1:a5ccd53612ea | 2430 | // 0xE0, 1, 0x20, //NV Memory Write [00] |
silviosz | 1:a5ccd53612ea | 2431 | // 0xD1, 3, 0x00, 0x71, 0x19, //VCOM control [00 40 0F] |
silviosz | 1:a5ccd53612ea | 2432 | // 0xD0, 3, 0x07, 0x01, 0x08, //Power Setting [07 04 8C] |
silviosz | 1:a5ccd53612ea | 2433 | 0xC1, 4, 0x10, 0x10, 0x02, 0x02, //Display Timing [10 10 02 02] |
silviosz | 1:a5ccd53612ea | 2434 | 0xC0, 6, 0x00, 0x35, 0x00, 0x00, 0x01, 0x02, //Panel Drive [00 35 00 00 01 02 REV=0,GS=0,SS=0 |
silviosz | 1:a5ccd53612ea | 2435 | 0xC5, 1, 0x04, //Frame Rate [04] |
silviosz | 1:a5ccd53612ea | 2436 | 0xD2, 2, 0x01, 0x04, //Power Setting [01 44] |
silviosz | 1:a5ccd53612ea | 2437 | // 0xC8, 15, 0x04, 0x67, 0x35, 0x04, 0x08, 0x06, 0x24, 0x01, 0x37, 0x40, 0x03, 0x10, 0x08, 0x80, 0x00, |
silviosz | 1:a5ccd53612ea | 2438 | // 0xC8, 15, 0x00, 0x77, 0x77, 0x04, 0x04, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, |
silviosz | 1:a5ccd53612ea | 2439 | 0xCA, 1, 0x00, //DGC LUT ??? |
silviosz | 1:a5ccd53612ea | 2440 | 0xEA, 1, 0x80, //3-Gamma Function Enable |
silviosz | 1:a5ccd53612ea | 2441 | // 0xB0, 1, 0x03, //Enable Protect |
silviosz | 1:a5ccd53612ea | 2442 | }; |
silviosz | 1:a5ccd53612ea | 2443 | table8_ads = ILI9327_regValues, table_size = sizeof(ILI9327_regValues); |
silviosz | 1:a5ccd53612ea | 2444 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2445 | *p16 = 400; |
silviosz | 1:a5ccd53612ea | 2446 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2447 | *p16 = 240; |
silviosz | 1:a5ccd53612ea | 2448 | break; |
silviosz | 1:a5ccd53612ea | 2449 | case 0x1602: |
silviosz | 1:a5ccd53612ea | 2450 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //does not readGRAM |
silviosz | 1:a5ccd53612ea | 2451 | static const uint8_t XX1602_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2452 | 0xB8, 1, 0x01, //GS [00] |
silviosz | 1:a5ccd53612ea | 2453 | 0xC0, 1, 0x0E, //??Power [0A] |
silviosz | 1:a5ccd53612ea | 2454 | }; |
silviosz | 1:a5ccd53612ea | 2455 | table8_ads = XX1602_regValues, table_size = sizeof(XX1602_regValues); |
silviosz | 1:a5ccd53612ea | 2456 | break; |
silviosz | 1:a5ccd53612ea | 2457 | |
silviosz | 1:a5ccd53612ea | 2458 | case 0x2053: //weird from BangGood |
silviosz | 1:a5ccd53612ea | 2459 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN | READ_BGR; |
silviosz | 1:a5ccd53612ea | 2460 | goto common_9329; |
silviosz | 1:a5ccd53612ea | 2461 | case 0xAC11: |
silviosz | 1:a5ccd53612ea | 2462 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; //thanks viliam |
silviosz | 1:a5ccd53612ea | 2463 | goto common_9329; |
silviosz | 1:a5ccd53612ea | 2464 | case 0x9302: |
silviosz | 1:a5ccd53612ea | 2465 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; |
silviosz | 1:a5ccd53612ea | 2466 | goto common_9329; |
silviosz | 1:a5ccd53612ea | 2467 | case 0x9338: |
silviosz | 1:a5ccd53612ea | 2468 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 2469 | goto common_9329; |
silviosz | 1:a5ccd53612ea | 2470 | case 0x9329: |
silviosz | 1:a5ccd53612ea | 2471 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | INVERT_SS | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 2472 | common_9329: |
silviosz | 1:a5ccd53612ea | 2473 | static const uint8_t ILI9329_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2474 | // 0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MX_EOR=1, TM=0, RIM=0 |
silviosz | 1:a5ccd53612ea | 2475 | // 0xB6, 3, 0x0A, 0x82, 0x27, //Display Function [0A 82 27] |
silviosz | 1:a5ccd53612ea | 2476 | // 0xB7, 1, 0x06, //Entry Mode Set [06] |
silviosz | 1:a5ccd53612ea | 2477 | 0x36, 1, 0x00, //Memory Access [00] pointless but stops an empty array |
silviosz | 1:a5ccd53612ea | 2478 | }; |
silviosz | 1:a5ccd53612ea | 2479 | table8_ads = ILI9329_regValues, table_size = sizeof(ILI9329_regValues); |
silviosz | 1:a5ccd53612ea | 2480 | break; |
silviosz | 1:a5ccd53612ea | 2481 | |
silviosz | 1:a5ccd53612ea | 2482 | case 0x9340: //ILI9340 thanks Ravi_kanchan2004. |
silviosz | 1:a5ccd53612ea | 2483 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 2484 | goto common_9341; |
silviosz | 1:a5ccd53612ea | 2485 | case 0x9341: |
silviosz | 1:a5ccd53612ea | 2486 | common_9341: |
silviosz | 1:a5ccd53612ea | 2487 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 2488 | static const uint8_t ILI9341_regValues_2_4[] PROGMEM = { // BOE 2.4" |
silviosz | 1:a5ccd53612ea | 2489 | 0xF6, 3, 0x01, 0x01, 0x00, //Interface Control needs EXTC=1 MV_EOR=0, TM=0, RIM=0 |
silviosz | 1:a5ccd53612ea | 2490 | 0xCF, 3, 0x00, 0x81, 0x30, //Power Control B [00 81 30] |
silviosz | 1:a5ccd53612ea | 2491 | 0xED, 4, 0x64, 0x03, 0x12, 0x81, //Power On Seq [55 01 23 01] |
silviosz | 1:a5ccd53612ea | 2492 | 0xE8, 3, 0x85, 0x10, 0x78, //Driver Timing A [04 11 7A] |
silviosz | 1:a5ccd53612ea | 2493 | 0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, //Power Control A [39 2C 00 34 02] |
silviosz | 1:a5ccd53612ea | 2494 | 0xF7, 1, 0x20, //Pump Ratio [10] |
silviosz | 1:a5ccd53612ea | 2495 | 0xEA, 2, 0x00, 0x00, //Driver Timing B [66 00] |
silviosz | 1:a5ccd53612ea | 2496 | 0xB0, 1, 0x00, //RGB Signal [00] |
silviosz | 1:a5ccd53612ea | 2497 | 0xB1, 2, 0x00, 0x1B, //Frame Control [00 1B] |
silviosz | 1:a5ccd53612ea | 2498 | // 0xB6, 2, 0x0A, 0xA2, 0x27, //Display Function [0A 82 27 XX] .kbv SS=1 |
silviosz | 1:a5ccd53612ea | 2499 | 0xB4, 1, 0x00, //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1 |
silviosz | 1:a5ccd53612ea | 2500 | 0xC0, 1, 0x21, //Power Control 1 [26] |
silviosz | 1:a5ccd53612ea | 2501 | 0xC1, 1, 0x11, //Power Control 2 [00] |
silviosz | 1:a5ccd53612ea | 2502 | 0xC5, 2, 0x3F, 0x3C, //VCOM 1 [31 3C] |
silviosz | 1:a5ccd53612ea | 2503 | 0xC7, 1, 0xB5, //VCOM 2 [C0] |
silviosz | 1:a5ccd53612ea | 2504 | 0x36, 1, 0x48, //Memory Access [00] |
silviosz | 1:a5ccd53612ea | 2505 | 0xF2, 1, 0x00, //Enable 3G [02] |
silviosz | 1:a5ccd53612ea | 2506 | 0x26, 1, 0x01, //Gamma Set [01] |
silviosz | 1:a5ccd53612ea | 2507 | 0xE0, 15, 0x0f, 0x26, 0x24, 0x0b, 0x0e, 0x09, 0x54, 0xa8, 0x46, 0x0c, 0x17, 0x09, 0x0f, 0x07, 0x00, |
silviosz | 1:a5ccd53612ea | 2508 | 0xE1, 15, 0x00, 0x19, 0x1b, 0x04, 0x10, 0x07, 0x2a, 0x47, 0x39, 0x03, 0x06, 0x06, 0x30, 0x38, 0x0f, |
silviosz | 1:a5ccd53612ea | 2509 | }; |
silviosz | 1:a5ccd53612ea | 2510 | static const uint8_t ILI9341_regValues_ada[] PROGMEM = { // Adafruit_TFTLCD only works with EXTC=0 |
silviosz | 1:a5ccd53612ea | 2511 | // 0xF6, 3, 0x00, 0x01, 0x00, //Interface Control needs EXTC=1 TM=0, RIM=0 |
silviosz | 1:a5ccd53612ea | 2512 | // 0xF6, 3, 0x01, 0x01, 0x03, //Interface Control needs EXTC=1 RM=1, RIM=1 |
silviosz | 1:a5ccd53612ea | 2513 | 0xF6, 3, 0x09, 0x01, 0x03, //Interface Control needs EXTC=1 RM=0, RIM=1 |
silviosz | 1:a5ccd53612ea | 2514 | 0xB0, 1, 0x40, //RGB Signal [40] RCM=2 |
silviosz | 1:a5ccd53612ea | 2515 | 0xB4, 1, 0x00, //Inversion Control [02] .kbv NLA=1, NLB=1, NLC=1 |
silviosz | 1:a5ccd53612ea | 2516 | 0xC0, 1, 0x23, //Power Control 1 [26] |
silviosz | 1:a5ccd53612ea | 2517 | 0xC1, 1, 0x10, //Power Control 2 [00] |
silviosz | 1:a5ccd53612ea | 2518 | 0xC5, 2, 0x2B, 0x2B, //VCOM 1 [31 3C] |
silviosz | 1:a5ccd53612ea | 2519 | 0xC7, 1, 0xC0, //VCOM 2 [C0] |
silviosz | 1:a5ccd53612ea | 2520 | 0x36, 1, 0x88, //Memory Access [00] |
silviosz | 1:a5ccd53612ea | 2521 | 0xB1, 2, 0x00, 0x1B, //Frame Control [00 1B] |
silviosz | 1:a5ccd53612ea | 2522 | 0xB7, 1, 0x07, //Entry Mode [00] |
silviosz | 1:a5ccd53612ea | 2523 | }; |
silviosz | 1:a5ccd53612ea | 2524 | table8_ads = ILI9341_regValues_2_4, table_size = sizeof(ILI9341_regValues_2_4); // |
silviosz | 1:a5ccd53612ea | 2525 | break; |
silviosz | 1:a5ccd53612ea | 2526 | #if defined(SUPPORT_9342) |
silviosz | 1:a5ccd53612ea | 2527 | case 0x9342: |
silviosz | 1:a5ccd53612ea | 2528 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS | INVERT_GS | REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 2529 | static const uint8_t ILI9342_regValues_CPT24[] PROGMEM = { //CPT 2.4" |
silviosz | 1:a5ccd53612ea | 2530 | (0xB9), 3, 0xFF, 0x93, 0x42, //[00 00 00] |
silviosz | 1:a5ccd53612ea | 2531 | (0xC0), 2, 0x1D, 0x0A, //[26 09] |
silviosz | 1:a5ccd53612ea | 2532 | (0xC1), 1, 0x02, //[10] |
silviosz | 1:a5ccd53612ea | 2533 | (0xC5), 2, 0x2F, 0x2F, //[31 3C] |
silviosz | 1:a5ccd53612ea | 2534 | (0xC7), 1, 0xC3, //[C0] |
silviosz | 1:a5ccd53612ea | 2535 | (0xB8), 1, 0x0B, //[07] |
silviosz | 1:a5ccd53612ea | 2536 | (0xE0), 15, 0x0F, 0x33, 0x30, 0x0C, 0x0F, 0x08, 0x5D, 0x66, 0x4A, 0x07, 0x13, 0x05, 0x1B, 0x0E, 0x08, |
silviosz | 1:a5ccd53612ea | 2537 | (0xE1), 15, 0x08, 0x0E, 0x11, 0x02, 0x0E, 0x02, 0x24, 0x33, 0x37, 0x03, 0x0A, 0x09, 0x26, 0x33, 0x0F, |
silviosz | 1:a5ccd53612ea | 2538 | }; |
silviosz | 1:a5ccd53612ea | 2539 | static const uint8_t ILI9342_regValues_Tianma23[] PROGMEM = { //Tianma 2.3" |
silviosz | 1:a5ccd53612ea | 2540 | (0xB9), 3, 0xFF, 0x93, 0x42, |
silviosz | 1:a5ccd53612ea | 2541 | (0xC0), 2, 0x1D, 0x0A, |
silviosz | 1:a5ccd53612ea | 2542 | (0xC1), 1, 0x01, |
silviosz | 1:a5ccd53612ea | 2543 | (0xC5), 2, 0x2C, 0x2C, |
silviosz | 1:a5ccd53612ea | 2544 | (0xC7), 1, 0xC6, |
silviosz | 1:a5ccd53612ea | 2545 | (0xB8), 1, 0x09, |
silviosz | 1:a5ccd53612ea | 2546 | (0xE0), 15, 0x0F, 0x26, 0x21, 0x07, 0x0A, 0x03, 0x4E, 0x62, 0x3E, 0x0B, 0x11, 0x00, 0x08, 0x02, 0x00, |
silviosz | 1:a5ccd53612ea | 2547 | (0xE1), 15, 0x00, 0x19, 0x1E, 0x03, 0x0E, 0x03, 0x30, 0x23, 0x41, 0x03, 0x0B, 0x07, 0x2F, 0x36, 0x0F, |
silviosz | 1:a5ccd53612ea | 2548 | }; |
silviosz | 1:a5ccd53612ea | 2549 | static const uint8_t ILI9342_regValues_HSD23[] PROGMEM = { //HSD 2.3" |
silviosz | 1:a5ccd53612ea | 2550 | (0xB9), 3, 0xFF, 0x93, 0x42, |
silviosz | 1:a5ccd53612ea | 2551 | (0xC0), 2, 0x1D, 0x0A, |
silviosz | 1:a5ccd53612ea | 2552 | (0xC1), 1, 0x02, |
silviosz | 1:a5ccd53612ea | 2553 | (0xC5), 2, 0x2F, 0x27, |
silviosz | 1:a5ccd53612ea | 2554 | (0xC7), 1, 0xA4, |
silviosz | 1:a5ccd53612ea | 2555 | (0xB8), 1, 0x0B, |
silviosz | 1:a5ccd53612ea | 2556 | (0xE0), 15, 0x0F, 0x24, 0x21, 0x0C, 0x0F, 0x06, 0x50, 0x75, 0x3F, 0x07, 0x12, 0x05, 0x11, 0x0B, 0x08, |
silviosz | 1:a5ccd53612ea | 2557 | (0xE1), 15, 0x08, 0x1D, 0x20, 0x02, 0x0E, 0x04, 0x31, 0x24, 0x42, 0x03, 0x0B, 0x09, 0x30, 0x36, 0x0F, |
silviosz | 1:a5ccd53612ea | 2558 | }; |
silviosz | 1:a5ccd53612ea | 2559 | table8_ads = ILI9342_regValues_CPT24, table_size = sizeof(ILI9342_regValues_CPT24); // |
silviosz | 1:a5ccd53612ea | 2560 | // table8_ads = ILI9342_regValues_Tianma23, table_size = sizeof(ILI9342_regValues_Tianma23); // |
silviosz | 1:a5ccd53612ea | 2561 | // table8_ads = ILI9342_regValues_HSD23, table_size = sizeof(ILI9342_regValues_HSD23); // |
silviosz | 1:a5ccd53612ea | 2562 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2563 | *p16 = 240; |
silviosz | 1:a5ccd53612ea | 2564 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2565 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 2566 | break; |
silviosz | 1:a5ccd53612ea | 2567 | #endif |
silviosz | 1:a5ccd53612ea | 2568 | case 0x1581: //no BGR in MADCTL. set BGR in Panel Control |
silviosz | 1:a5ccd53612ea | 2569 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; //thanks zdravke |
silviosz | 1:a5ccd53612ea | 2570 | goto common_9481; |
silviosz | 1:a5ccd53612ea | 2571 | case 0x9481: |
silviosz | 1:a5ccd53612ea | 2572 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_BGR; |
silviosz | 1:a5ccd53612ea | 2573 | common_9481: |
silviosz | 1:a5ccd53612ea | 2574 | static const uint8_t ILI9481_regValues[] PROGMEM = { // Atmel MaxTouch |
silviosz | 1:a5ccd53612ea | 2575 | 0xB0, 1, 0x00, // unlocks E0, F0 |
silviosz | 1:a5ccd53612ea | 2576 | 0xB3, 4, 0x02, 0x00, 0x00, 0x00, //Frame Memory, interface [02 00 00 00] |
silviosz | 1:a5ccd53612ea | 2577 | 0xB4, 1, 0x00, // Frame mode [00] |
silviosz | 1:a5ccd53612ea | 2578 | 0xD0, 3, 0x07, 0x42, 0x18, // Set Power [00 43 18] x1.00, x6, x3 |
silviosz | 1:a5ccd53612ea | 2579 | 0xD1, 3, 0x00, 0x07, 0x10, // Set VCOM [00 00 00] x0.72, x1.02 |
silviosz | 1:a5ccd53612ea | 2580 | 0xD2, 2, 0x01, 0x02, // Set Power for Normal Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2581 | 0xD3, 2, 0x01, 0x02, // Set Power for Partial Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2582 | 0xD4, 2, 0x01, 0x02, // Set Power for Idle Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2583 | 0xC0, 5, 0x12, 0x3B, 0x00, 0x02, 0x11, //Panel Driving BGR for 1581 [10 3B 00 02 11] |
silviosz | 1:a5ccd53612ea | 2584 | 0xC1, 3, 0x10, 0x10, 0x88, // Display Timing Normal [10 10 88] |
silviosz | 1:a5ccd53612ea | 2585 | 0xC5, 1, 0x03, //Frame Rate [03] |
silviosz | 1:a5ccd53612ea | 2586 | 0xC6, 1, 0x02, //Interface Control [02] |
silviosz | 1:a5ccd53612ea | 2587 | 0xC8, 12, 0x00, 0x32, 0x36, 0x45, 0x06, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0C, 0x00, |
silviosz | 1:a5ccd53612ea | 2588 | 0xCC, 1, 0x00, //Panel Control [00] |
silviosz | 1:a5ccd53612ea | 2589 | }; |
silviosz | 1:a5ccd53612ea | 2590 | static const uint8_t ILI9481_CPT29_regValues[] PROGMEM = { // 320x430 |
silviosz | 1:a5ccd53612ea | 2591 | 0xB0, 1, 0x00, |
silviosz | 1:a5ccd53612ea | 2592 | 0xD0, 3, 0x07, 0x42, 0x1C, // Set Power [00 43 18] |
silviosz | 1:a5ccd53612ea | 2593 | 0xD1, 3, 0x00, 0x02, 0x0F, // Set VCOM [00 00 00] x0.695, x1.00 |
silviosz | 1:a5ccd53612ea | 2594 | 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2595 | 0xC0, 5, 0x10, 0x35, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] |
silviosz | 1:a5ccd53612ea | 2596 | 0xC5, 1, 0x03, //Frame Rate [03] |
silviosz | 1:a5ccd53612ea | 2597 | 0xC8, 12, 0x00, 0x30, 0x36, 0x45, 0x04, 0x16, 0x37, 0x75, 0x77, 0x54, 0x0F, 0x00, |
silviosz | 1:a5ccd53612ea | 2598 | 0xE4, 1, 0xA0, |
silviosz | 1:a5ccd53612ea | 2599 | 0xF0, 1, 0x01, |
silviosz | 1:a5ccd53612ea | 2600 | 0xF3, 2, 0x02, 0x1A, |
silviosz | 1:a5ccd53612ea | 2601 | }; |
silviosz | 1:a5ccd53612ea | 2602 | static const uint8_t ILI9481_PVI35_regValues[] PROGMEM = { // 320x480 |
silviosz | 1:a5ccd53612ea | 2603 | 0xB0, 1, 0x00, |
silviosz | 1:a5ccd53612ea | 2604 | 0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18] |
silviosz | 1:a5ccd53612ea | 2605 | 0xD1, 3, 0x00, 0x2B, 0x1F, // Set VCOM [00 00 00] x0.900, x1.32 |
silviosz | 1:a5ccd53612ea | 2606 | 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2607 | 0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] |
silviosz | 1:a5ccd53612ea | 2608 | 0xC5, 1, 0x03, //Frame Rate [03] |
silviosz | 1:a5ccd53612ea | 2609 | 0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00, |
silviosz | 1:a5ccd53612ea | 2610 | 0xE4, 1, 0xA0, |
silviosz | 1:a5ccd53612ea | 2611 | 0xF0, 1, 0x01, |
silviosz | 1:a5ccd53612ea | 2612 | 0xF3, 2, 0x40, 0x0A, |
silviosz | 1:a5ccd53612ea | 2613 | }; |
silviosz | 1:a5ccd53612ea | 2614 | static const uint8_t ILI9481_AUO317_regValues[] PROGMEM = { // 320x480 |
silviosz | 1:a5ccd53612ea | 2615 | 0xB0, 1, 0x00, |
silviosz | 1:a5ccd53612ea | 2616 | 0xD0, 3, 0x07, 0x40, 0x1D, // Set Power [00 43 18] |
silviosz | 1:a5ccd53612ea | 2617 | 0xD1, 3, 0x00, 0x18, 0x13, // Set VCOM [00 00 00] x0.805, x1.08 |
silviosz | 1:a5ccd53612ea | 2618 | 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2619 | 0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] |
silviosz | 1:a5ccd53612ea | 2620 | 0xC5, 1, 0x03, //Frame Rate [03] |
silviosz | 1:a5ccd53612ea | 2621 | 0xC8, 12, 0x00, 0x44, 0x06, 0x44, 0x0A, 0x08, 0x17, 0x33, 0x77, 0x44, 0x08, 0x0C, |
silviosz | 1:a5ccd53612ea | 2622 | 0xE4, 1, 0xA0, |
silviosz | 1:a5ccd53612ea | 2623 | 0xF0, 1, 0x01, |
silviosz | 1:a5ccd53612ea | 2624 | }; |
silviosz | 1:a5ccd53612ea | 2625 | static const uint8_t ILI9481_CMO35_regValues[] PROGMEM = { // 320480 |
silviosz | 1:a5ccd53612ea | 2626 | 0xB0, 1, 0x00, |
silviosz | 1:a5ccd53612ea | 2627 | 0xD0, 3, 0x07, 0x41, 0x1D, // Set Power [00 43 18] 07,41,1D |
silviosz | 1:a5ccd53612ea | 2628 | 0xD1, 3, 0x00, 0x1C, 0x1F, // Set VCOM [00 00 00] x0.825, x1.32 1C,1F |
silviosz | 1:a5ccd53612ea | 2629 | 0xD2, 2, 0x01, 0x11, // Set Power for Normal Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2630 | 0xC0, 5, 0x10, 0x3B, 0x00, 0x02, 0x11, //Set Panel Driving [10 3B 00 02 11] |
silviosz | 1:a5ccd53612ea | 2631 | 0xC5, 1, 0x03, //Frame Rate [03] |
silviosz | 1:a5ccd53612ea | 2632 | 0xC6, 1, 0x83, |
silviosz | 1:a5ccd53612ea | 2633 | 0xC8, 12, 0x00, 0x26, 0x21, 0x00, 0x00, 0x1F, 0x65, 0x23, 0x77, 0x00, 0x0F, 0x00, |
silviosz | 1:a5ccd53612ea | 2634 | 0xF0, 1, 0x01, //? |
silviosz | 1:a5ccd53612ea | 2635 | 0xE4, 1, 0xA0, //?SETCABC on Himax |
silviosz | 1:a5ccd53612ea | 2636 | 0x36, 1, 0x48, //Memory Access [00] |
silviosz | 1:a5ccd53612ea | 2637 | 0xB4, 1, 0x11, |
silviosz | 1:a5ccd53612ea | 2638 | }; |
silviosz | 1:a5ccd53612ea | 2639 | static const uint8_t ILI9481_RGB_regValues[] PROGMEM = { // 320x480 |
silviosz | 1:a5ccd53612ea | 2640 | 0xB0, 1, 0x00, |
silviosz | 1:a5ccd53612ea | 2641 | 0xD0, 3, 0x07, 0x41, 0x1D, // SETPOWER [00 43 18] |
silviosz | 1:a5ccd53612ea | 2642 | 0xD1, 3, 0x00, 0x2B, 0x1F, // SETVCOM [00 00 00] x0.900, x1.32 |
silviosz | 1:a5ccd53612ea | 2643 | 0xD2, 2, 0x01, 0x11, // SETNORPOW for Normal Mode [01 22] |
silviosz | 1:a5ccd53612ea | 2644 | 0xC0, 6, 0x10, 0x3B, 0x00, 0x02, 0x11, 0x00, //SETPANEL [10 3B 00 02 11] |
silviosz | 1:a5ccd53612ea | 2645 | 0xC5, 1, 0x03, //SETOSC Frame Rate [03] |
silviosz | 1:a5ccd53612ea | 2646 | 0xC6, 1, 0x80, //SETRGB interface control |
silviosz | 1:a5ccd53612ea | 2647 | 0xC8, 12, 0x00, 0x14, 0x33, 0x10, 0x00, 0x16, 0x44, 0x36, 0x77, 0x00, 0x0F, 0x00, |
silviosz | 1:a5ccd53612ea | 2648 | 0xF3, 2, 0x40, 0x0A, |
silviosz | 1:a5ccd53612ea | 2649 | 0xF0, 1, 0x08, |
silviosz | 1:a5ccd53612ea | 2650 | 0xF6, 1, 0x84, |
silviosz | 1:a5ccd53612ea | 2651 | 0xF7, 1, 0x80, |
silviosz | 1:a5ccd53612ea | 2652 | 0x0C, 2, 0x00, 0x55, //RDCOLMOD |
silviosz | 1:a5ccd53612ea | 2653 | 0xB4, 1, 0x00, //SETDISPLAY |
silviosz | 1:a5ccd53612ea | 2654 | // 0xB3, 4, 0x00, 0x01, 0x06, 0x01, //SETGRAM simple example |
silviosz | 1:a5ccd53612ea | 2655 | 0xB3, 4, 0x00, 0x01, 0x06, 0x30, //jpegs example |
silviosz | 1:a5ccd53612ea | 2656 | }; |
silviosz | 1:a5ccd53612ea | 2657 | table8_ads = ILI9481_regValues, table_size = sizeof(ILI9481_regValues); |
silviosz | 1:a5ccd53612ea | 2658 | // table8_ads = ILI9481_CPT29_regValues, table_size = sizeof(ILI9481_CPT29_regValues); |
silviosz | 1:a5ccd53612ea | 2659 | // table8_ads = ILI9481_PVI35_regValues, table_size = sizeof(ILI9481_PVI35_regValues); |
silviosz | 1:a5ccd53612ea | 2660 | // table8_ads = ILI9481_AUO317_regValues, table_size = sizeof(ILI9481_AUO317_regValues); |
silviosz | 1:a5ccd53612ea | 2661 | // table8_ads = ILI9481_CMO35_regValues, table_size = sizeof(ILI9481_CMO35_regValues); |
silviosz | 1:a5ccd53612ea | 2662 | // table8_ads = ILI9481_RGB_regValues, table_size = sizeof(ILI9481_RGB_regValues); |
silviosz | 1:a5ccd53612ea | 2663 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2664 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 2665 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2666 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 2667 | break; |
silviosz | 1:a5ccd53612ea | 2668 | case 0x9486: |
silviosz | 1:a5ccd53612ea | 2669 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //Red 3.5", Blue 3.5" |
silviosz | 1:a5ccd53612ea | 2670 | // _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | REV_SCREEN; //old Red 3.5" |
silviosz | 1:a5ccd53612ea | 2671 | static const uint8_t ILI9486_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2672 | /* |
silviosz | 1:a5ccd53612ea | 2673 | 0xF2, 9, 0x1C, 0xA3, 0x32, 0x02, 0xB2, 0x12, 0xFF, 0x12, 0x00, //f.k |
silviosz | 1:a5ccd53612ea | 2674 | 0xF1, 2, 0x36, 0xA4, // |
silviosz | 1:a5ccd53612ea | 2675 | 0xF8, 2, 0x21, 0x04, // |
silviosz | 1:a5ccd53612ea | 2676 | 0xF9, 2, 0x00, 0x08, // |
silviosz | 1:a5ccd53612ea | 2677 | */ |
silviosz | 1:a5ccd53612ea | 2678 | 0xC0, 2, 0x0d, 0x0d, //Power Control 1 [0E 0E] |
silviosz | 1:a5ccd53612ea | 2679 | 0xC1, 2, 0x43, 0x00, //Power Control 2 [43 00] |
silviosz | 1:a5ccd53612ea | 2680 | 0xC2, 1, 0x00, //Power Control 3 [33] |
silviosz | 1:a5ccd53612ea | 2681 | 0xC5, 4, 0x00, 0x48, 0x00, 0x48, //VCOM Control 1 [00 40 00 40] |
silviosz | 1:a5ccd53612ea | 2682 | 0xB4, 1, 0x00, //Inversion Control [00] |
silviosz | 1:a5ccd53612ea | 2683 | 0xB6, 3, 0x02, 0x02, 0x3B, // Display Function Control [02 02 3B] |
silviosz | 1:a5ccd53612ea | 2684 | #define GAMMA9486 4 |
silviosz | 1:a5ccd53612ea | 2685 | #if GAMMA9486 == 0 |
silviosz | 1:a5ccd53612ea | 2686 | // default GAMMA terrible |
silviosz | 1:a5ccd53612ea | 2687 | #elif GAMMA9486 == 1 |
silviosz | 1:a5ccd53612ea | 2688 | // GAMMA f.k. bad |
silviosz | 1:a5ccd53612ea | 2689 | 0xE0, 15, 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1, 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00, |
silviosz | 1:a5ccd53612ea | 2690 | 0xE1, 15, 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f, |
silviosz | 1:a5ccd53612ea | 2691 | #elif GAMMA9486 == 2 |
silviosz | 1:a5ccd53612ea | 2692 | // 1.2 CPT 3.5 Inch Initial Code not bad |
silviosz | 1:a5ccd53612ea | 2693 | 0xE0, 15, 0x0F, 0x1B, 0x18, 0x0B, 0x0E, 0x09, 0x47, 0x94, 0x35, 0x0A, 0x13, 0x05, 0x08, 0x03, 0x00, |
silviosz | 1:a5ccd53612ea | 2694 | 0xE1, 15, 0x0F, 0x3A, 0x37, 0x0B, 0x0C, 0x05, 0x4A, 0x24, 0x39, 0x07, 0x10, 0x04, 0x27, 0x25, 0x00, |
silviosz | 1:a5ccd53612ea | 2695 | #elif GAMMA9486 == 3 |
silviosz | 1:a5ccd53612ea | 2696 | // 2.2 HSD 3.5 Inch Initial Code not bad |
silviosz | 1:a5ccd53612ea | 2697 | 0xE0, 15, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98, 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00, |
silviosz | 1:a5ccd53612ea | 2698 | 0xE1, 15, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75, 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00, |
silviosz | 1:a5ccd53612ea | 2699 | #elif GAMMA9486 == 4 |
silviosz | 1:a5ccd53612ea | 2700 | // 3.2 TM 3.2 Inch Initial Code not bad |
silviosz | 1:a5ccd53612ea | 2701 | 0xE0, 15, 0x0F, 0x21, 0x1C, 0x0B, 0x0E, 0x08, 0x49, 0x98, 0x38, 0x09, 0x11, 0x03, 0x14, 0x10, 0x00, |
silviosz | 1:a5ccd53612ea | 2702 | 0xE1, 15, 0x0F, 0x2F, 0x2B, 0x0C, 0x0E, 0x06, 0x47, 0x76, 0x37, 0x07, 0x11, 0x04, 0x23, 0x1E, 0x00, |
silviosz | 1:a5ccd53612ea | 2703 | #elif GAMMA9486 == 5 |
silviosz | 1:a5ccd53612ea | 2704 | // 4.2 WTK 3.5 Inch Initial Code too white |
silviosz | 1:a5ccd53612ea | 2705 | 0xE0, 15, 0x0F, 0x10, 0x08, 0x05, 0x09, 0x05, 0x37, 0x98, 0x26, 0x07, 0x0F, 0x02, 0x09, 0x07, 0x00, |
silviosz | 1:a5ccd53612ea | 2706 | 0xE1, 15, 0x0F, 0x38, 0x36, 0x0D, 0x10, 0x08, 0x59, 0x76, 0x48, 0x0A, 0x16, 0x0A, 0x37, 0x2F, 0x00, |
silviosz | 1:a5ccd53612ea | 2707 | #endif |
silviosz | 1:a5ccd53612ea | 2708 | }; |
silviosz | 1:a5ccd53612ea | 2709 | table8_ads = ILI9486_regValues, table_size = sizeof(ILI9486_regValues); |
silviosz | 1:a5ccd53612ea | 2710 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2711 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 2712 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2713 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 2714 | break; |
silviosz | 1:a5ccd53612ea | 2715 | case 0x7796: |
silviosz | 1:a5ccd53612ea | 2716 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS; //thanks to safari1 |
silviosz | 1:a5ccd53612ea | 2717 | goto common_9488; |
silviosz | 1:a5ccd53612ea | 2718 | case 0x9487: //with thanks to Charlyf |
silviosz | 1:a5ccd53612ea | 2719 | case 0x9488: |
silviosz | 1:a5ccd53612ea | 2720 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 2721 | common_9488: |
silviosz | 1:a5ccd53612ea | 2722 | static const uint8_t ILI9488_regValues_max[] PROGMEM = { // Atmel MaxTouch |
silviosz | 1:a5ccd53612ea | 2723 | 0xC0, 2, 0x10, 0x10, //Power Control 1 [0E 0E] |
silviosz | 1:a5ccd53612ea | 2724 | 0xC1, 1, 0x41, //Power Control 2 [43] |
silviosz | 1:a5ccd53612ea | 2725 | 0xC5, 4, 0x00, 0x22, 0x80, 0x40, //VCOM Control 1 [00 40 00 40] |
silviosz | 1:a5ccd53612ea | 2726 | 0x36, 1, 0x68, //Memory Access [00] |
silviosz | 1:a5ccd53612ea | 2727 | 0xB0, 1, 0x00, //Interface [00] |
silviosz | 1:a5ccd53612ea | 2728 | 0xB1, 2, 0xB0, 0x11, //Frame Rate Control [B0 11] |
silviosz | 1:a5ccd53612ea | 2729 | 0xB4, 1, 0x02, //Inversion Control [02] |
silviosz | 1:a5ccd53612ea | 2730 | 0xB6, 3, 0x02, 0x02, 0x3B, // Display Function Control [02 02 3B] .kbv NL=480 |
silviosz | 1:a5ccd53612ea | 2731 | 0xB7, 1, 0xC6, //Entry Mode [06] |
silviosz | 1:a5ccd53612ea | 2732 | 0x3A, 1, 0x55, //Interlace Pixel Format [XX] |
silviosz | 1:a5ccd53612ea | 2733 | 0xF7, 4, 0xA9, 0x51, 0x2C, 0x82, //Adjustment Control 3 [A9 51 2C 82] |
silviosz | 1:a5ccd53612ea | 2734 | }; |
silviosz | 1:a5ccd53612ea | 2735 | table8_ads = ILI9488_regValues_max, table_size = sizeof(ILI9488_regValues_max); |
silviosz | 1:a5ccd53612ea | 2736 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2737 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 2738 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2739 | *p16 = 320; |
silviosz | 1:a5ccd53612ea | 2740 | break; |
silviosz | 1:a5ccd53612ea | 2741 | case 0xB505: //R61505V |
silviosz | 1:a5ccd53612ea | 2742 | case 0xC505: //R61505W |
silviosz | 1:a5ccd53612ea | 2743 | _lcd_capable = 0 | REV_SCREEN | READ_LOWHIGH; |
silviosz | 1:a5ccd53612ea | 2744 | static const uint16_t R61505V_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2745 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 2746 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 2747 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 2748 | 0x0000, 0x0001, |
silviosz | 1:a5ccd53612ea | 2749 | 0x00A4, 0x0001, //CALB=1 |
silviosz | 1:a5ccd53612ea | 2750 | TFTLCD_DELAY, 10, |
silviosz | 1:a5ccd53612ea | 2751 | 0x0060, 0x2700, //NL |
silviosz | 1:a5ccd53612ea | 2752 | 0x0008, 0x0808, //FP & BP |
silviosz | 1:a5ccd53612ea | 2753 | 0x0030, 0x0214, //Gamma settings |
silviosz | 1:a5ccd53612ea | 2754 | 0x0031, 0x3715, |
silviosz | 1:a5ccd53612ea | 2755 | 0x0032, 0x0604, |
silviosz | 1:a5ccd53612ea | 2756 | 0x0033, 0x0E16, |
silviosz | 1:a5ccd53612ea | 2757 | 0x0034, 0x2211, |
silviosz | 1:a5ccd53612ea | 2758 | 0x0035, 0x1500, |
silviosz | 1:a5ccd53612ea | 2759 | 0x0036, 0x8507, |
silviosz | 1:a5ccd53612ea | 2760 | 0x0037, 0x1407, |
silviosz | 1:a5ccd53612ea | 2761 | 0x0038, 0x1403, |
silviosz | 1:a5ccd53612ea | 2762 | 0x0039, 0x0020, |
silviosz | 1:a5ccd53612ea | 2763 | 0x0090, 0x0015, //DIVI & RTNI |
silviosz | 1:a5ccd53612ea | 2764 | 0x0010, 0x0410, //BT=4,AP=1 |
silviosz | 1:a5ccd53612ea | 2765 | 0x0011, 0x0237, //DC1=2,DC0=3, VC=7 |
silviosz | 1:a5ccd53612ea | 2766 | 0x0029, 0x0046, //VCM1=70 |
silviosz | 1:a5ccd53612ea | 2767 | 0x002A, 0x0046, //VCMSEL=0,VCM2=70 |
silviosz | 1:a5ccd53612ea | 2768 | // Sleep mode IN sequence |
silviosz | 1:a5ccd53612ea | 2769 | 0x0007, 0x0000, |
silviosz | 1:a5ccd53612ea | 2770 | //0x0012, 0x0000, //PSON=0,PON=0 |
silviosz | 1:a5ccd53612ea | 2771 | // Sleep mode EXIT sequence |
silviosz | 1:a5ccd53612ea | 2772 | 0x0012, 0x0189, //VCMR=1,PSON=0,PON=0,VRH=9 |
silviosz | 1:a5ccd53612ea | 2773 | 0x0013, 0x1100, //VDV=17 |
silviosz | 1:a5ccd53612ea | 2774 | TFTLCD_DELAY, 150, |
silviosz | 1:a5ccd53612ea | 2775 | 0x0012, 0x01B9, //VCMR=1,PSON=1,PON=1,VRH=9 [018F] |
silviosz | 1:a5ccd53612ea | 2776 | 0x0001, 0x0100, //SS=1 Other mode settings |
silviosz | 1:a5ccd53612ea | 2777 | 0x0002, 0x0200, //BC0=1--Line inversion |
silviosz | 1:a5ccd53612ea | 2778 | 0x0003, 0x1030, |
silviosz | 1:a5ccd53612ea | 2779 | 0x0009, 0x0001, //ISC=1 [0000] |
silviosz | 1:a5ccd53612ea | 2780 | 0x000A, 0x0000, // [0000] |
silviosz | 1:a5ccd53612ea | 2781 | // 0x000C, 0x0001, //RIM=1 [0000] |
silviosz | 1:a5ccd53612ea | 2782 | 0x000D, 0x0000, // [0000] |
silviosz | 1:a5ccd53612ea | 2783 | 0x000E, 0x0030, //VEM=3 VCOM equalize [0000] |
silviosz | 1:a5ccd53612ea | 2784 | 0x0061, 0x0001, |
silviosz | 1:a5ccd53612ea | 2785 | 0x006A, 0x0000, |
silviosz | 1:a5ccd53612ea | 2786 | 0x0080, 0x0000, |
silviosz | 1:a5ccd53612ea | 2787 | 0x0081, 0x0000, |
silviosz | 1:a5ccd53612ea | 2788 | 0x0082, 0x005F, |
silviosz | 1:a5ccd53612ea | 2789 | 0x0092, 0x0100, |
silviosz | 1:a5ccd53612ea | 2790 | 0x0093, 0x0701, |
silviosz | 1:a5ccd53612ea | 2791 | TFTLCD_DELAY, 80, |
silviosz | 1:a5ccd53612ea | 2792 | 0x0007, 0x0100, //BASEE=1--Display On |
silviosz | 1:a5ccd53612ea | 2793 | }; |
silviosz | 1:a5ccd53612ea | 2794 | init_table16(R61505V_regValues, sizeof(R61505V_regValues)); |
silviosz | 1:a5ccd53612ea | 2795 | break; |
silviosz | 1:a5ccd53612ea | 2796 | |
silviosz | 1:a5ccd53612ea | 2797 | #if defined(SUPPORT_B509_7793) |
silviosz | 1:a5ccd53612ea | 2798 | case 0x7793: |
silviosz | 1:a5ccd53612ea | 2799 | case 0xB509: |
silviosz | 1:a5ccd53612ea | 2800 | _lcd_capable = REV_SCREEN; |
silviosz | 1:a5ccd53612ea | 2801 | static const uint16_t R61509V_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2802 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 2803 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 2804 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 2805 | 0x0000, 0x0000, |
silviosz | 1:a5ccd53612ea | 2806 | TFTLCD_DELAY, 15, |
silviosz | 1:a5ccd53612ea | 2807 | 0x0400, 0x6200, //NL=0x31 (49) i.e. 400 rows |
silviosz | 1:a5ccd53612ea | 2808 | 0x0008, 0x0808, |
silviosz | 1:a5ccd53612ea | 2809 | //gamma |
silviosz | 1:a5ccd53612ea | 2810 | 0x0300, 0x0C00, |
silviosz | 1:a5ccd53612ea | 2811 | 0x0301, 0x5A0B, |
silviosz | 1:a5ccd53612ea | 2812 | 0x0302, 0x0906, |
silviosz | 1:a5ccd53612ea | 2813 | 0x0303, 0x1017, |
silviosz | 1:a5ccd53612ea | 2814 | 0x0304, 0x2300, |
silviosz | 1:a5ccd53612ea | 2815 | 0x0305, 0x1700, |
silviosz | 1:a5ccd53612ea | 2816 | 0x0306, 0x6309, |
silviosz | 1:a5ccd53612ea | 2817 | 0x0307, 0x0C09, |
silviosz | 1:a5ccd53612ea | 2818 | 0x0308, 0x100C, |
silviosz | 1:a5ccd53612ea | 2819 | 0x0309, 0x2232, |
silviosz | 1:a5ccd53612ea | 2820 | |
silviosz | 1:a5ccd53612ea | 2821 | 0x0010, 0x0016, //69.5Hz 0016 |
silviosz | 1:a5ccd53612ea | 2822 | 0x0011, 0x0101, |
silviosz | 1:a5ccd53612ea | 2823 | 0x0012, 0x0000, |
silviosz | 1:a5ccd53612ea | 2824 | 0x0013, 0x0001, |
silviosz | 1:a5ccd53612ea | 2825 | |
silviosz | 1:a5ccd53612ea | 2826 | 0x0100, 0x0330, //BT,AP |
silviosz | 1:a5ccd53612ea | 2827 | 0x0101, 0x0237, //DC0,DC1,VC |
silviosz | 1:a5ccd53612ea | 2828 | 0x0103, 0x0D00, //VDV |
silviosz | 1:a5ccd53612ea | 2829 | 0x0280, 0x6100, //VCM |
silviosz | 1:a5ccd53612ea | 2830 | 0x0102, 0xC1B0, //VRH,VCMR,PSON,PON |
silviosz | 1:a5ccd53612ea | 2831 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 2832 | |
silviosz | 1:a5ccd53612ea | 2833 | 0x0001, 0x0100, |
silviosz | 1:a5ccd53612ea | 2834 | 0x0002, 0x0100, |
silviosz | 1:a5ccd53612ea | 2835 | 0x0003, 0x1030, //1030 |
silviosz | 1:a5ccd53612ea | 2836 | 0x0009, 0x0001, |
silviosz | 1:a5ccd53612ea | 2837 | 0x000C, 0x0000, |
silviosz | 1:a5ccd53612ea | 2838 | 0x0090, 0x8000, |
silviosz | 1:a5ccd53612ea | 2839 | 0x000F, 0x0000, |
silviosz | 1:a5ccd53612ea | 2840 | |
silviosz | 1:a5ccd53612ea | 2841 | 0x0210, 0x0000, |
silviosz | 1:a5ccd53612ea | 2842 | 0x0211, 0x00EF, |
silviosz | 1:a5ccd53612ea | 2843 | 0x0212, 0x0000, |
silviosz | 1:a5ccd53612ea | 2844 | 0x0213, 0x018F, //432=01AF,400=018F |
silviosz | 1:a5ccd53612ea | 2845 | 0x0500, 0x0000, |
silviosz | 1:a5ccd53612ea | 2846 | 0x0501, 0x0000, |
silviosz | 1:a5ccd53612ea | 2847 | 0x0502, 0x005F, //??? |
silviosz | 1:a5ccd53612ea | 2848 | 0x0401, 0x0001, //REV=1 |
silviosz | 1:a5ccd53612ea | 2849 | 0x0404, 0x0000, |
silviosz | 1:a5ccd53612ea | 2850 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 2851 | |
silviosz | 1:a5ccd53612ea | 2852 | 0x0007, 0x0100, //BASEE |
silviosz | 1:a5ccd53612ea | 2853 | TFTLCD_DELAY, 50, |
silviosz | 1:a5ccd53612ea | 2854 | |
silviosz | 1:a5ccd53612ea | 2855 | 0x0200, 0x0000, |
silviosz | 1:a5ccd53612ea | 2856 | 0x0201, 0x0000, |
silviosz | 1:a5ccd53612ea | 2857 | }; |
silviosz | 1:a5ccd53612ea | 2858 | init_table16(R61509V_regValues, sizeof(R61509V_regValues)); |
silviosz | 1:a5ccd53612ea | 2859 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2860 | *p16 = 400; |
silviosz | 1:a5ccd53612ea | 2861 | break; |
silviosz | 1:a5ccd53612ea | 2862 | #endif |
silviosz | 1:a5ccd53612ea | 2863 | |
silviosz | 1:a5ccd53612ea | 2864 | #ifdef SUPPORT_9806 |
silviosz | 1:a5ccd53612ea | 2865 | case 0x9806: |
silviosz | 1:a5ccd53612ea | 2866 | _lcd_capable = AUTO_READINC | MIPI_DCS_REV1 | MV_AXIS | READ_24BITS; |
silviosz | 1:a5ccd53612ea | 2867 | // from ZinggJM |
silviosz | 1:a5ccd53612ea | 2868 | static const uint8_t ILI9806_regValues[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2869 | (0xFF), 3, /* EXTC Command Set enable register*/ 0xFF, 0x98, 0x06, |
silviosz | 1:a5ccd53612ea | 2870 | (0xBA), 1, /* SPI Interface Setting*/0xE0, |
silviosz | 1:a5ccd53612ea | 2871 | (0xBC), 21, /* GIP 1*/0x03, 0x0F, 0x63, 0x69, 0x01, 0x01, 0x1B, 0x11, 0x70, 0x73, 0xFF, 0xFF, 0x08, 0x09, 0x05, 0x00, 0xEE, 0xE2, 0x01, 0x00, 0xC1, |
silviosz | 1:a5ccd53612ea | 2872 | (0xBD), 8, /* GIP 2*/0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67, |
silviosz | 1:a5ccd53612ea | 2873 | (0xBE), 9, /* GIP 3*/0x00, 0x22, 0x27, 0x6A, 0xBC, 0xD8, 0x92, 0x22, 0x22, |
silviosz | 1:a5ccd53612ea | 2874 | (0xC7), 1, /* Vcom*/0x1E, |
silviosz | 1:a5ccd53612ea | 2875 | (0xED), 3, /* EN_volt_reg*/0x7F, 0x0F, 0x00, |
silviosz | 1:a5ccd53612ea | 2876 | (0xC0), 3, /* Power Control 1*/0xE3, 0x0B, 0x00, |
silviosz | 1:a5ccd53612ea | 2877 | (0xFC), 1, 0x08, |
silviosz | 1:a5ccd53612ea | 2878 | (0xDF), 6, /* Engineering Setting*/0x00, 0x00, 0x00, 0x00, 0x00, 0x02, |
silviosz | 1:a5ccd53612ea | 2879 | (0xF3), 1, /* DVDD Voltage Setting*/0x74, |
silviosz | 1:a5ccd53612ea | 2880 | (0xB4), 3, /* Display Inversion Control*/0x00, 0x00, 0x00, |
silviosz | 1:a5ccd53612ea | 2881 | (0xF7), 1, /* 480x854*/0x81, |
silviosz | 1:a5ccd53612ea | 2882 | (0xB1), 3, /* Frame Rate*/0x00, 0x10, 0x14, |
silviosz | 1:a5ccd53612ea | 2883 | (0xF1), 3, /* Panel Timing Control*/0x29, 0x8A, 0x07, |
silviosz | 1:a5ccd53612ea | 2884 | (0xF2), 4, /*Panel Timing Control*/0x40, 0xD2, 0x50, 0x28, |
silviosz | 1:a5ccd53612ea | 2885 | (0xC1), 4, /* Power Control 2*/0x17, 0x85, 0x85, 0x20, |
silviosz | 1:a5ccd53612ea | 2886 | (0xE0), 16, 0x00, 0x0C, 0x15, 0x0D, 0x0F, 0x0C, 0x07, 0x05, 0x07, 0x0B, 0x10, 0x10, 0x0D, 0x17, 0x0F, 0x00, |
silviosz | 1:a5ccd53612ea | 2887 | (0xE1), 16, 0x00, 0x0D, 0x15, 0x0E, 0x10, 0x0D, 0x08, 0x06, 0x07, 0x0C, 0x11, 0x11, 0x0E, 0x17, 0x0F, 0x00, |
silviosz | 1:a5ccd53612ea | 2888 | (0x35), 1, /*Tearing Effect ON*/0x00, |
silviosz | 1:a5ccd53612ea | 2889 | }; |
silviosz | 1:a5ccd53612ea | 2890 | table8_ads = ILI9806_regValues, table_size = sizeof(ILI9806_regValues); |
silviosz | 1:a5ccd53612ea | 2891 | p16 = (int16_t *) & HEIGHT; |
silviosz | 1:a5ccd53612ea | 2892 | *p16 = 480; |
silviosz | 1:a5ccd53612ea | 2893 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2894 | *p16 = 854; |
silviosz | 1:a5ccd53612ea | 2895 | break; |
silviosz | 1:a5ccd53612ea | 2896 | #endif |
silviosz | 1:a5ccd53612ea | 2897 | default: |
silviosz | 1:a5ccd53612ea | 2898 | p16 = (int16_t *) & WIDTH; |
silviosz | 1:a5ccd53612ea | 2899 | *p16 = 0; //error value for WIDTH |
silviosz | 1:a5ccd53612ea | 2900 | break; |
silviosz | 1:a5ccd53612ea | 2901 | } |
silviosz | 1:a5ccd53612ea | 2902 | _lcd_rev = ((_lcd_capable & REV_SCREEN) != 0); |
silviosz | 1:a5ccd53612ea | 2903 | if (table8_ads != NULL) { |
silviosz | 1:a5ccd53612ea | 2904 | static const uint8_t reset_off[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2905 | 0x01, 0, //Soft Reset |
silviosz | 1:a5ccd53612ea | 2906 | TFTLCD_DELAY8, 150, // .kbv will power up with ONLY reset, sleep out, display on |
silviosz | 1:a5ccd53612ea | 2907 | 0x28, 0, //Display Off |
silviosz | 1:a5ccd53612ea | 2908 | 0x3A, 1, 0x55, //Pixel read=565, write=565. |
silviosz | 1:a5ccd53612ea | 2909 | }; |
silviosz | 1:a5ccd53612ea | 2910 | static const uint8_t wake_on[] PROGMEM = { |
silviosz | 1:a5ccd53612ea | 2911 | 0x11, 0, //Sleep Out |
silviosz | 1:a5ccd53612ea | 2912 | TFTLCD_DELAY8, 150, |
silviosz | 1:a5ccd53612ea | 2913 | 0x29, 0, //Display On |
silviosz | 1:a5ccd53612ea | 2914 | }; |
silviosz | 1:a5ccd53612ea | 2915 | init_table(&reset_off, sizeof(reset_off)); |
silviosz | 1:a5ccd53612ea | 2916 | init_table(table8_ads, table_size); //can change PIXFMT |
silviosz | 1:a5ccd53612ea | 2917 | init_table(&wake_on, sizeof(wake_on)); |
silviosz | 1:a5ccd53612ea | 2918 | } |
silviosz | 1:a5ccd53612ea | 2919 | setRotation(0); //PORTRAIT |
silviosz | 1:a5ccd53612ea | 2920 | invertDisplay(false); |
silviosz | 1:a5ccd53612ea | 2921 | #if defined(SUPPORT_9488_555) |
silviosz | 1:a5ccd53612ea | 2922 | if (_lcd_ID == 0x9488) { |
silviosz | 1:a5ccd53612ea | 2923 | is555 = 0; |
silviosz | 1:a5ccd53612ea | 2924 | drawPixel(0, 0, 0xFFE0); |
silviosz | 1:a5ccd53612ea | 2925 | if (readPixel(0, 0) == 0xFF1F) { |
silviosz | 1:a5ccd53612ea | 2926 | uint8_t pixfmt = 0x06; |
silviosz | 1:a5ccd53612ea | 2927 | pushCommand(0x3A, &pixfmt, 1); |
silviosz | 1:a5ccd53612ea | 2928 | _lcd_capable &= ~READ_24BITS; |
silviosz | 1:a5ccd53612ea | 2929 | is555 = 1; |
silviosz | 1:a5ccd53612ea | 2930 | } |
silviosz | 1:a5ccd53612ea | 2931 | } |
silviosz | 1:a5ccd53612ea | 2932 | #endif |
silviosz | 1:a5ccd53612ea | 2933 | } |