Atsushi Hattori / Mbed 2 deprecated 20210627_Logger

hattori&ide

Dependencies:   mbed

ChaNFSUSB/USBHostLite/usbhost_lpc17xx.c@0:f77369cabd75, 21 months ago (annotated)

Committer:
hattori_atsushi
Date:
Sun Dec 18 08:16:01 2022 +0000
Revision:
0:f77369cabd75
hattori

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hattori_atsushi 0:f77369cabd75 1 /*
hattori_atsushi 0:f77369cabd75 2 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 3 * NXP USB Host Stack
hattori_atsushi 0:f77369cabd75 4 *
hattori_atsushi 0:f77369cabd75 5 * (c) Copyright 2008, NXP SemiConductors
hattori_atsushi 0:f77369cabd75 6 * (c) Copyright 2008, OnChip Technologies LLC
hattori_atsushi 0:f77369cabd75 7 * All Rights Reserved
hattori_atsushi 0:f77369cabd75 8 *
hattori_atsushi 0:f77369cabd75 9 * www.nxp.com
hattori_atsushi 0:f77369cabd75 10 * www.onchiptech.com
hattori_atsushi 0:f77369cabd75 11 *
hattori_atsushi 0:f77369cabd75 12 * File : usbhost_lpc17xx.c
hattori_atsushi 0:f77369cabd75 13 * Programmer(s) : Ravikanth.P
hattori_atsushi 0:f77369cabd75 14 * Version :
hattori_atsushi 0:f77369cabd75 15 *
hattori_atsushi 0:f77369cabd75 16 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 17 */
hattori_atsushi 0:f77369cabd75 18
hattori_atsushi 0:f77369cabd75 19 /*
hattori_atsushi 0:f77369cabd75 20 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 21 * INCLUDE HEADER FILES
hattori_atsushi 0:f77369cabd75 22 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 23 */
hattori_atsushi 0:f77369cabd75 24
hattori_atsushi 0:f77369cabd75 25 #include "usbhost_lpc17xx.h"
hattori_atsushi 0:f77369cabd75 26
hattori_atsushi 0:f77369cabd75 27 /*
hattori_atsushi 0:f77369cabd75 28 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 29 * GLOBAL VARIABLES
hattori_atsushi 0:f77369cabd75 30 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 31 */
hattori_atsushi 0:f77369cabd75 32 int gUSBConnected;
hattori_atsushi 0:f77369cabd75 33
hattori_atsushi 0:f77369cabd75 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
hattori_atsushi 0:f77369cabd75 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
hattori_atsushi 0:f77369cabd75 36 volatile USB_INT08U HOST_TDControlStatus = 0;
hattori_atsushi 0:f77369cabd75 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
hattori_atsushi 0:f77369cabd75 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
hattori_atsushi 0:f77369cabd75 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
hattori_atsushi 0:f77369cabd75 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
hattori_atsushi 0:f77369cabd75 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
hattori_atsushi 0:f77369cabd75 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
hattori_atsushi 0:f77369cabd75 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
hattori_atsushi 0:f77369cabd75 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
hattori_atsushi 0:f77369cabd75 45
hattori_atsushi 0:f77369cabd75 46 // USB host structures
hattori_atsushi 0:f77369cabd75 47 // AHB SRAM block 1
hattori_atsushi 0:f77369cabd75 48 #define HOSTBASEADDR 0x2007C000
hattori_atsushi 0:f77369cabd75 49 // reserve memory for the linker
hattori_atsushi 0:f77369cabd75 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
hattori_atsushi 0:f77369cabd75 51 /*
hattori_atsushi 0:f77369cabd75 52 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 53 * DELAY IN MILLI SECONDS
hattori_atsushi 0:f77369cabd75 54 *
hattori_atsushi 0:f77369cabd75 55 * Description: This function provides a delay in milli seconds
hattori_atsushi 0:f77369cabd75 56 *
hattori_atsushi 0:f77369cabd75 57 * Arguments : delay The delay required
hattori_atsushi 0:f77369cabd75 58 *
hattori_atsushi 0:f77369cabd75 59 * Returns : None
hattori_atsushi 0:f77369cabd75 60 *
hattori_atsushi 0:f77369cabd75 61 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 62 */
hattori_atsushi 0:f77369cabd75 63
hattori_atsushi 0:f77369cabd75 64 void Host_DelayMS (USB_INT32U delay)
hattori_atsushi 0:f77369cabd75 65 {
hattori_atsushi 0:f77369cabd75 66 volatile USB_INT32U i;
hattori_atsushi 0:f77369cabd75 67
hattori_atsushi 0:f77369cabd75 68
hattori_atsushi 0:f77369cabd75 69 for (i = 0; i < delay; i++) {
hattori_atsushi 0:f77369cabd75 70 Host_DelayUS(1000);
hattori_atsushi 0:f77369cabd75 71 }
hattori_atsushi 0:f77369cabd75 72 }
hattori_atsushi 0:f77369cabd75 73
hattori_atsushi 0:f77369cabd75 74 /*
hattori_atsushi 0:f77369cabd75 75 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 76 * DELAY IN MICRO SECONDS
hattori_atsushi 0:f77369cabd75 77 *
hattori_atsushi 0:f77369cabd75 78 * Description: This function provides a delay in micro seconds
hattori_atsushi 0:f77369cabd75 79 *
hattori_atsushi 0:f77369cabd75 80 * Arguments : delay The delay required
hattori_atsushi 0:f77369cabd75 81 *
hattori_atsushi 0:f77369cabd75 82 * Returns : None
hattori_atsushi 0:f77369cabd75 83 *
hattori_atsushi 0:f77369cabd75 84 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 85 */
hattori_atsushi 0:f77369cabd75 86
hattori_atsushi 0:f77369cabd75 87 void Host_DelayUS (USB_INT32U delay)
hattori_atsushi 0:f77369cabd75 88 {
hattori_atsushi 0:f77369cabd75 89 volatile USB_INT32U i;
hattori_atsushi 0:f77369cabd75 90
hattori_atsushi 0:f77369cabd75 91
hattori_atsushi 0:f77369cabd75 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
hattori_atsushi 0:f77369cabd75 93 ;
hattori_atsushi 0:f77369cabd75 94 }
hattori_atsushi 0:f77369cabd75 95 }
hattori_atsushi 0:f77369cabd75 96
hattori_atsushi 0:f77369cabd75 97 // bits of the USB/OTG clock control register
hattori_atsushi 0:f77369cabd75 98 #define HOST_CLK_EN (1<<0)
hattori_atsushi 0:f77369cabd75 99 #define DEV_CLK_EN (1<<1)
hattori_atsushi 0:f77369cabd75 100 #define PORTSEL_CLK_EN (1<<3)
hattori_atsushi 0:f77369cabd75 101 #define AHB_CLK_EN (1<<4)
hattori_atsushi 0:f77369cabd75 102
hattori_atsushi 0:f77369cabd75 103 // bits of the USB/OTG clock status register
hattori_atsushi 0:f77369cabd75 104 #define HOST_CLK_ON (1<<0)
hattori_atsushi 0:f77369cabd75 105 #define DEV_CLK_ON (1<<1)
hattori_atsushi 0:f77369cabd75 106 #define PORTSEL_CLK_ON (1<<3)
hattori_atsushi 0:f77369cabd75 107 #define AHB_CLK_ON (1<<4)
hattori_atsushi 0:f77369cabd75 108
hattori_atsushi 0:f77369cabd75 109 // we need host clock, OTG/portsel clock and AHB clock
hattori_atsushi 0:f77369cabd75 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
hattori_atsushi 0:f77369cabd75 111
hattori_atsushi 0:f77369cabd75 112 /*
hattori_atsushi 0:f77369cabd75 113 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 114 * INITIALIZE THE HOST CONTROLLER
hattori_atsushi 0:f77369cabd75 115 *
hattori_atsushi 0:f77369cabd75 116 * Description: This function initializes lpc17xx host controller
hattori_atsushi 0:f77369cabd75 117 *
hattori_atsushi 0:f77369cabd75 118 * Arguments : None
hattori_atsushi 0:f77369cabd75 119 *
hattori_atsushi 0:f77369cabd75 120 * Returns :
hattori_atsushi 0:f77369cabd75 121 *
hattori_atsushi 0:f77369cabd75 122 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 123 */
hattori_atsushi 0:f77369cabd75 124 void Host_Init (void)
hattori_atsushi 0:f77369cabd75 125 {
hattori_atsushi 0:f77369cabd75 126 PRINT_Log("In Host_Init\n");
hattori_atsushi 0:f77369cabd75 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
hattori_atsushi 0:f77369cabd75 128
hattori_atsushi 0:f77369cabd75 129 // turn on power for USB
hattori_atsushi 0:f77369cabd75 130 LPC_SC->PCONP |= (1UL<<31);
hattori_atsushi 0:f77369cabd75 131 // Enable USB host clock, port selection and AHB clock
hattori_atsushi 0:f77369cabd75 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
hattori_atsushi 0:f77369cabd75 133 // Wait for clocks to become available
hattori_atsushi 0:f77369cabd75 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
hattori_atsushi 0:f77369cabd75 135 ;
hattori_atsushi 0:f77369cabd75 136
hattori_atsushi 0:f77369cabd75 137 // it seems the bits[0:1] mean the following
hattori_atsushi 0:f77369cabd75 138 // 0: U1=device, U2=host
hattori_atsushi 0:f77369cabd75 139 // 1: U1=host, U2=host
hattori_atsushi 0:f77369cabd75 140 // 2: reserved
hattori_atsushi 0:f77369cabd75 141 // 3: U1=host, U2=device
hattori_atsushi 0:f77369cabd75 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
hattori_atsushi 0:f77369cabd75 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
hattori_atsushi 0:f77369cabd75 144 LPC_USB->OTGStCtrl |= 1;
hattori_atsushi 0:f77369cabd75 145
hattori_atsushi 0:f77369cabd75 146 // now that we've configured the ports, we can turn off the portsel clock
hattori_atsushi 0:f77369cabd75 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
hattori_atsushi 0:f77369cabd75 148
hattori_atsushi 0:f77369cabd75 149 // power pins are not connected on mbed, so we can skip them
hattori_atsushi 0:f77369cabd75 150 /* P1[18] = USB_UP_LED, 01 */
hattori_atsushi 0:f77369cabd75 151 /* P1[19] = /USB_PPWR, 10 */
hattori_atsushi 0:f77369cabd75 152 /* P1[22] = USB_PWRD, 10 */
hattori_atsushi 0:f77369cabd75 153 /* P1[27] = /USB_OVRCR, 10 */
hattori_atsushi 0:f77369cabd75 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
hattori_atsushi 0:f77369cabd75 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
hattori_atsushi 0:f77369cabd75 156 */
hattori_atsushi 0:f77369cabd75 157
hattori_atsushi 0:f77369cabd75 158 // configure USB D+/D- pins
hattori_atsushi 0:f77369cabd75 159 /* P0[29] = USB_D+, 01 */
hattori_atsushi 0:f77369cabd75 160 /* P0[30] = USB_D-, 01 */
hattori_atsushi 0:f77369cabd75 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
hattori_atsushi 0:f77369cabd75 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
hattori_atsushi 0:f77369cabd75 163
hattori_atsushi 0:f77369cabd75 164 PRINT_Log("Initializing Host Stack\n");
hattori_atsushi 0:f77369cabd75 165
hattori_atsushi 0:f77369cabd75 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
hattori_atsushi 0:f77369cabd75 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
hattori_atsushi 0:f77369cabd75 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
hattori_atsushi 0:f77369cabd75 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
hattori_atsushi 0:f77369cabd75 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
hattori_atsushi 0:f77369cabd75 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
hattori_atsushi 0:f77369cabd75 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
hattori_atsushi 0:f77369cabd75 173
hattori_atsushi 0:f77369cabd75 174 /* Initialize all the TDs, EDs and HCCA to 0 */
hattori_atsushi 0:f77369cabd75 175 Host_EDInit(EDCtrl);
hattori_atsushi 0:f77369cabd75 176 Host_EDInit(EDBulkIn);
hattori_atsushi 0:f77369cabd75 177 Host_EDInit(EDBulkOut);
hattori_atsushi 0:f77369cabd75 178 Host_TDInit(TDHead);
hattori_atsushi 0:f77369cabd75 179 Host_TDInit(TDTail);
hattori_atsushi 0:f77369cabd75 180 Host_HCCAInit(Hcca);
hattori_atsushi 0:f77369cabd75 181
hattori_atsushi 0:f77369cabd75 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
hattori_atsushi 0:f77369cabd75 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
hattori_atsushi 0:f77369cabd75 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
hattori_atsushi 0:f77369cabd75 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
hattori_atsushi 0:f77369cabd75 186
hattori_atsushi 0:f77369cabd75 187 /* SOFTWARE RESET */
hattori_atsushi 0:f77369cabd75 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
hattori_atsushi 0:f77369cabd75 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
hattori_atsushi 0:f77369cabd75 190
hattori_atsushi 0:f77369cabd75 191 /* Put HC in operational state */
hattori_atsushi 0:f77369cabd75 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
hattori_atsushi 0:f77369cabd75 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
hattori_atsushi 0:f77369cabd75 194
hattori_atsushi 0:f77369cabd75 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
hattori_atsushi 0:f77369cabd75 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
hattori_atsushi 0:f77369cabd75 197
hattori_atsushi 0:f77369cabd75 198
hattori_atsushi 0:f77369cabd75 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
hattori_atsushi 0:f77369cabd75 200 OR_INTR_ENABLE_WDH |
hattori_atsushi 0:f77369cabd75 201 OR_INTR_ENABLE_RHSC;
hattori_atsushi 0:f77369cabd75 202
hattori_atsushi 0:f77369cabd75 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
hattori_atsushi 0:f77369cabd75 204 /* Enable the USB Interrupt */
hattori_atsushi 0:f77369cabd75 205 NVIC_EnableIRQ(USB_IRQn);
hattori_atsushi 0:f77369cabd75 206 PRINT_Log("Host Initialized\n");
hattori_atsushi 0:f77369cabd75 207 }
hattori_atsushi 0:f77369cabd75 208
hattori_atsushi 0:f77369cabd75 209 /*
hattori_atsushi 0:f77369cabd75 210 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 211 * INTERRUPT SERVICE ROUTINE
hattori_atsushi 0:f77369cabd75 212 *
hattori_atsushi 0:f77369cabd75 213 * Description: This function services the interrupt caused by host controller
hattori_atsushi 0:f77369cabd75 214 *
hattori_atsushi 0:f77369cabd75 215 * Arguments : None
hattori_atsushi 0:f77369cabd75 216 *
hattori_atsushi 0:f77369cabd75 217 * Returns : None
hattori_atsushi 0:f77369cabd75 218 *
hattori_atsushi 0:f77369cabd75 219 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 220 */
hattori_atsushi 0:f77369cabd75 221
hattori_atsushi 0:f77369cabd75 222 void USB_IRQHandler (void) __irq
hattori_atsushi 0:f77369cabd75 223 {
hattori_atsushi 0:f77369cabd75 224 USB_INT32U int_status;
hattori_atsushi 0:f77369cabd75 225 USB_INT32U ie_status;
hattori_atsushi 0:f77369cabd75 226
hattori_atsushi 0:f77369cabd75 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
hattori_atsushi 0:f77369cabd75 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
hattori_atsushi 0:f77369cabd75 229
hattori_atsushi 0:f77369cabd75 230 if (!(int_status & ie_status)) {
hattori_atsushi 0:f77369cabd75 231 return;
hattori_atsushi 0:f77369cabd75 232 } else {
hattori_atsushi 0:f77369cabd75 233
hattori_atsushi 0:f77369cabd75 234 int_status = int_status & ie_status;
hattori_atsushi 0:f77369cabd75 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
hattori_atsushi 0:f77369cabd75 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
hattori_atsushi 0:f77369cabd75 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
hattori_atsushi 0:f77369cabd75 238 /*
hattori_atsushi 0:f77369cabd75 239 * When DRWE is on, Connect Status Change
hattori_atsushi 0:f77369cabd75 240 * means a remote wakeup event.
hattori_atsushi 0:f77369cabd75 241 */
hattori_atsushi 0:f77369cabd75 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
hattori_atsushi 0:f77369cabd75 243 }
hattori_atsushi 0:f77369cabd75 244 else {
hattori_atsushi 0:f77369cabd75 245 /*
hattori_atsushi 0:f77369cabd75 246 * When DRWE is off, Connect Status Change
hattori_atsushi 0:f77369cabd75 247 * is NOT a remote wakeup event
hattori_atsushi 0:f77369cabd75 248 */
hattori_atsushi 0:f77369cabd75 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
hattori_atsushi 0:f77369cabd75 250 if (!gUSBConnected) {
hattori_atsushi 0:f77369cabd75 251 HOST_TDControlStatus = 0;
hattori_atsushi 0:f77369cabd75 252 HOST_WdhIntr = 0;
hattori_atsushi 0:f77369cabd75 253 HOST_RhscIntr = 1;
hattori_atsushi 0:f77369cabd75 254 gUSBConnected = 1;
hattori_atsushi 0:f77369cabd75 255 }
hattori_atsushi 0:f77369cabd75 256 else
hattori_atsushi 0:f77369cabd75 257 PRINT_Log("Spurious status change (connected)?\n");
hattori_atsushi 0:f77369cabd75 258 } else {
hattori_atsushi 0:f77369cabd75 259 if (gUSBConnected) {
hattori_atsushi 0:f77369cabd75 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
hattori_atsushi 0:f77369cabd75 261 HOST_RhscIntr = 0;
hattori_atsushi 0:f77369cabd75 262 gUSBConnected = 0;
hattori_atsushi 0:f77369cabd75 263 }
hattori_atsushi 0:f77369cabd75 264 else
hattori_atsushi 0:f77369cabd75 265 PRINT_Log("Spurious status change (disconnected)?\n");
hattori_atsushi 0:f77369cabd75 266 }
hattori_atsushi 0:f77369cabd75 267 }
hattori_atsushi 0:f77369cabd75 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
hattori_atsushi 0:f77369cabd75 269 }
hattori_atsushi 0:f77369cabd75 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
hattori_atsushi 0:f77369cabd75 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
hattori_atsushi 0:f77369cabd75 272 }
hattori_atsushi 0:f77369cabd75 273 }
hattori_atsushi 0:f77369cabd75 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
hattori_atsushi 0:f77369cabd75 275 HOST_WdhIntr = 1;
hattori_atsushi 0:f77369cabd75 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
hattori_atsushi 0:f77369cabd75 277 }
hattori_atsushi 0:f77369cabd75 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
hattori_atsushi 0:f77369cabd75 279 }
hattori_atsushi 0:f77369cabd75 280 return;
hattori_atsushi 0:f77369cabd75 281 }
hattori_atsushi 0:f77369cabd75 282
hattori_atsushi 0:f77369cabd75 283 /*
hattori_atsushi 0:f77369cabd75 284 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 285 * PROCESS TRANSFER DESCRIPTOR
hattori_atsushi 0:f77369cabd75 286 *
hattori_atsushi 0:f77369cabd75 287 * Description: This function processes the transfer descriptor
hattori_atsushi 0:f77369cabd75 288 *
hattori_atsushi 0:f77369cabd75 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
hattori_atsushi 0:f77369cabd75 290 * token SETUP, IN, OUT
hattori_atsushi 0:f77369cabd75 291 * buffer Current Buffer Pointer of the transfer descriptor
hattori_atsushi 0:f77369cabd75 292 * buffer_len Length of the buffer
hattori_atsushi 0:f77369cabd75 293 *
hattori_atsushi 0:f77369cabd75 294 * Returns : OK if TD submission is successful
hattori_atsushi 0:f77369cabd75 295 * ERROR if TD submission fails
hattori_atsushi 0:f77369cabd75 296 *
hattori_atsushi 0:f77369cabd75 297 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 298 */
hattori_atsushi 0:f77369cabd75 299
hattori_atsushi 0:f77369cabd75 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
hattori_atsushi 0:f77369cabd75 301 volatile USB_INT32U token,
hattori_atsushi 0:f77369cabd75 302 volatile USB_INT08U *buffer,
hattori_atsushi 0:f77369cabd75 303 USB_INT32U buffer_len)
hattori_atsushi 0:f77369cabd75 304 {
hattori_atsushi 0:f77369cabd75 305 volatile USB_INT32U td_toggle;
hattori_atsushi 0:f77369cabd75 306
hattori_atsushi 0:f77369cabd75 307
hattori_atsushi 0:f77369cabd75 308 if (ed == EDCtrl) {
hattori_atsushi 0:f77369cabd75 309 if (token == TD_SETUP) {
hattori_atsushi 0:f77369cabd75 310 td_toggle = TD_TOGGLE_0;
hattori_atsushi 0:f77369cabd75 311 } else {
hattori_atsushi 0:f77369cabd75 312 td_toggle = TD_TOGGLE_1;
hattori_atsushi 0:f77369cabd75 313 }
hattori_atsushi 0:f77369cabd75 314 } else {
hattori_atsushi 0:f77369cabd75 315 td_toggle = 0;
hattori_atsushi 0:f77369cabd75 316 }
hattori_atsushi 0:f77369cabd75 317 TDHead->Control = (TD_ROUNDING |
hattori_atsushi 0:f77369cabd75 318 token |
hattori_atsushi 0:f77369cabd75 319 TD_DELAY_INT(0) |
hattori_atsushi 0:f77369cabd75 320 td_toggle |
hattori_atsushi 0:f77369cabd75 321 TD_CC);
hattori_atsushi 0:f77369cabd75 322 TDTail->Control = 0;
hattori_atsushi 0:f77369cabd75 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
hattori_atsushi 0:f77369cabd75 324 TDTail->CurrBufPtr = 0;
hattori_atsushi 0:f77369cabd75 325 TDHead->Next = (USB_INT32U) TDTail;
hattori_atsushi 0:f77369cabd75 326 TDTail->Next = 0;
hattori_atsushi 0:f77369cabd75 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
hattori_atsushi 0:f77369cabd75 328 TDTail->BufEnd = 0;
hattori_atsushi 0:f77369cabd75 329
hattori_atsushi 0:f77369cabd75 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
hattori_atsushi 0:f77369cabd75 331 ed->TailTd = (USB_INT32U)TDTail;
hattori_atsushi 0:f77369cabd75 332 ed->Next = 0;
hattori_atsushi 0:f77369cabd75 333
hattori_atsushi 0:f77369cabd75 334 if (ed == EDCtrl) {
hattori_atsushi 0:f77369cabd75 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
hattori_atsushi 0:f77369cabd75 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
hattori_atsushi 0:f77369cabd75 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
hattori_atsushi 0:f77369cabd75 338 } else {
hattori_atsushi 0:f77369cabd75 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
hattori_atsushi 0:f77369cabd75 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
hattori_atsushi 0:f77369cabd75 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
hattori_atsushi 0:f77369cabd75 342 }
hattori_atsushi 0:f77369cabd75 343
hattori_atsushi 0:f77369cabd75 344 Host_WDHWait();
hattori_atsushi 0:f77369cabd75 345
hattori_atsushi 0:f77369cabd75 346 // if (!(TDHead->Control & 0xF0000000)) {
hattori_atsushi 0:f77369cabd75 347 if (!HOST_TDControlStatus) {
hattori_atsushi 0:f77369cabd75 348 return (OK);
hattori_atsushi 0:f77369cabd75 349 } else {
hattori_atsushi 0:f77369cabd75 350 return (ERR_TD_FAIL);
hattori_atsushi 0:f77369cabd75 351 }
hattori_atsushi 0:f77369cabd75 352 }
hattori_atsushi 0:f77369cabd75 353
hattori_atsushi 0:f77369cabd75 354 /*
hattori_atsushi 0:f77369cabd75 355 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 356 * ENUMERATE THE DEVICE
hattori_atsushi 0:f77369cabd75 357 *
hattori_atsushi 0:f77369cabd75 358 * Description: This function is used to enumerate the device connected
hattori_atsushi 0:f77369cabd75 359 *
hattori_atsushi 0:f77369cabd75 360 * Arguments : None
hattori_atsushi 0:f77369cabd75 361 *
hattori_atsushi 0:f77369cabd75 362 * Returns : None
hattori_atsushi 0:f77369cabd75 363 *
hattori_atsushi 0:f77369cabd75 364 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 365 */
hattori_atsushi 0:f77369cabd75 366
hattori_atsushi 0:f77369cabd75 367 USB_INT32S Host_EnumDev (void)
hattori_atsushi 0:f77369cabd75 368 {
hattori_atsushi 0:f77369cabd75 369 USB_INT32S rc;
hattori_atsushi 0:f77369cabd75 370
hattori_atsushi 0:f77369cabd75 371 PRINT_Log("Connect a Mass Storage device\n");
hattori_atsushi 0:f77369cabd75 372 while (!HOST_RhscIntr)
hattori_atsushi 0:f77369cabd75 373 __WFI();
hattori_atsushi 0:f77369cabd75 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
hattori_atsushi 0:f77369cabd75 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
hattori_atsushi 0:f77369cabd75 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
hattori_atsushi 0:f77369cabd75 377 __WFI(); // Wait for port reset to complete...
hattori_atsushi 0:f77369cabd75 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
hattori_atsushi 0:f77369cabd75 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
hattori_atsushi 0:f77369cabd75 380
hattori_atsushi 0:f77369cabd75 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
hattori_atsushi 0:f77369cabd75 382 /* Read first 8 bytes of device desc */
hattori_atsushi 0:f77369cabd75 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
hattori_atsushi 0:f77369cabd75 384 if (rc != OK) {
hattori_atsushi 0:f77369cabd75 385 PRINT_Err(rc);
hattori_atsushi 0:f77369cabd75 386 return (rc);
hattori_atsushi 0:f77369cabd75 387 }
hattori_atsushi 0:f77369cabd75 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
hattori_atsushi 0:f77369cabd75 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
hattori_atsushi 0:f77369cabd75 390 if (rc != OK) {
hattori_atsushi 0:f77369cabd75 391 PRINT_Err(rc);
hattori_atsushi 0:f77369cabd75 392 return (rc);
hattori_atsushi 0:f77369cabd75 393 }
hattori_atsushi 0:f77369cabd75 394 Host_DelayMS(2);
hattori_atsushi 0:f77369cabd75 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
hattori_atsushi 0:f77369cabd75 396 /* Get the configuration descriptor */
hattori_atsushi 0:f77369cabd75 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
hattori_atsushi 0:f77369cabd75 398 if (rc != OK) {
hattori_atsushi 0:f77369cabd75 399 PRINT_Err(rc);
hattori_atsushi 0:f77369cabd75 400 return (rc);
hattori_atsushi 0:f77369cabd75 401 }
hattori_atsushi 0:f77369cabd75 402 /* Get the first configuration data */
hattori_atsushi 0:f77369cabd75 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
hattori_atsushi 0:f77369cabd75 404 if (rc != OK) {
hattori_atsushi 0:f77369cabd75 405 PRINT_Err(rc);
hattori_atsushi 0:f77369cabd75 406 return (rc);
hattori_atsushi 0:f77369cabd75 407 }
hattori_atsushi 0:f77369cabd75 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
hattori_atsushi 0:f77369cabd75 409 if (rc != OK) {
hattori_atsushi 0:f77369cabd75 410 PRINT_Err(rc);
hattori_atsushi 0:f77369cabd75 411 return (rc);
hattori_atsushi 0:f77369cabd75 412 }
hattori_atsushi 0:f77369cabd75 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
hattori_atsushi 0:f77369cabd75 414 if (rc != OK) {
hattori_atsushi 0:f77369cabd75 415 PRINT_Err(rc);
hattori_atsushi 0:f77369cabd75 416 }
hattori_atsushi 0:f77369cabd75 417 Host_DelayMS(100); /* Some devices may require this delay */
hattori_atsushi 0:f77369cabd75 418 return (rc);
hattori_atsushi 0:f77369cabd75 419 }
hattori_atsushi 0:f77369cabd75 420
hattori_atsushi 0:f77369cabd75 421 /*
hattori_atsushi 0:f77369cabd75 422 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 423 * RECEIVE THE CONTROL INFORMATION
hattori_atsushi 0:f77369cabd75 424 *
hattori_atsushi 0:f77369cabd75 425 * Description: This function is used to receive the control information
hattori_atsushi 0:f77369cabd75 426 *
hattori_atsushi 0:f77369cabd75 427 * Arguments : bm_request_type
hattori_atsushi 0:f77369cabd75 428 * b_request
hattori_atsushi 0:f77369cabd75 429 * w_value
hattori_atsushi 0:f77369cabd75 430 * w_index
hattori_atsushi 0:f77369cabd75 431 * w_length
hattori_atsushi 0:f77369cabd75 432 * buffer
hattori_atsushi 0:f77369cabd75 433 *
hattori_atsushi 0:f77369cabd75 434 * Returns : OK if Success
hattori_atsushi 0:f77369cabd75 435 * ERROR if Failed
hattori_atsushi 0:f77369cabd75 436 *
hattori_atsushi 0:f77369cabd75 437 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 438 */
hattori_atsushi 0:f77369cabd75 439
hattori_atsushi 0:f77369cabd75 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
hattori_atsushi 0:f77369cabd75 441 USB_INT08U b_request,
hattori_atsushi 0:f77369cabd75 442 USB_INT16U w_value,
hattori_atsushi 0:f77369cabd75 443 USB_INT16U w_index,
hattori_atsushi 0:f77369cabd75 444 USB_INT16U w_length,
hattori_atsushi 0:f77369cabd75 445 volatile USB_INT08U *buffer)
hattori_atsushi 0:f77369cabd75 446 {
hattori_atsushi 0:f77369cabd75 447 USB_INT32S rc;
hattori_atsushi 0:f77369cabd75 448
hattori_atsushi 0:f77369cabd75 449
hattori_atsushi 0:f77369cabd75 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
hattori_atsushi 0:f77369cabd75 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
hattori_atsushi 0:f77369cabd75 452 if (rc == OK) {
hattori_atsushi 0:f77369cabd75 453 if (w_length) {
hattori_atsushi 0:f77369cabd75 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
hattori_atsushi 0:f77369cabd75 455 }
hattori_atsushi 0:f77369cabd75 456 if (rc == OK) {
hattori_atsushi 0:f77369cabd75 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
hattori_atsushi 0:f77369cabd75 458 }
hattori_atsushi 0:f77369cabd75 459 }
hattori_atsushi 0:f77369cabd75 460 return (rc);
hattori_atsushi 0:f77369cabd75 461 }
hattori_atsushi 0:f77369cabd75 462
hattori_atsushi 0:f77369cabd75 463 /*
hattori_atsushi 0:f77369cabd75 464 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 465 * SEND THE CONTROL INFORMATION
hattori_atsushi 0:f77369cabd75 466 *
hattori_atsushi 0:f77369cabd75 467 * Description: This function is used to send the control information
hattori_atsushi 0:f77369cabd75 468 *
hattori_atsushi 0:f77369cabd75 469 * Arguments : None
hattori_atsushi 0:f77369cabd75 470 *
hattori_atsushi 0:f77369cabd75 471 * Returns : OK if Success
hattori_atsushi 0:f77369cabd75 472 * ERR_INVALID_BOOTSIG if Failed
hattori_atsushi 0:f77369cabd75 473 *
hattori_atsushi 0:f77369cabd75 474 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 475 */
hattori_atsushi 0:f77369cabd75 476
hattori_atsushi 0:f77369cabd75 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
hattori_atsushi 0:f77369cabd75 478 USB_INT08U b_request,
hattori_atsushi 0:f77369cabd75 479 USB_INT16U w_value,
hattori_atsushi 0:f77369cabd75 480 USB_INT16U w_index,
hattori_atsushi 0:f77369cabd75 481 USB_INT16U w_length,
hattori_atsushi 0:f77369cabd75 482 volatile USB_INT08U *buffer)
hattori_atsushi 0:f77369cabd75 483 {
hattori_atsushi 0:f77369cabd75 484 USB_INT32S rc;
hattori_atsushi 0:f77369cabd75 485
hattori_atsushi 0:f77369cabd75 486
hattori_atsushi 0:f77369cabd75 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
hattori_atsushi 0:f77369cabd75 488
hattori_atsushi 0:f77369cabd75 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
hattori_atsushi 0:f77369cabd75 490 if (rc == OK) {
hattori_atsushi 0:f77369cabd75 491 if (w_length) {
hattori_atsushi 0:f77369cabd75 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
hattori_atsushi 0:f77369cabd75 493 }
hattori_atsushi 0:f77369cabd75 494 if (rc == OK) {
hattori_atsushi 0:f77369cabd75 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
hattori_atsushi 0:f77369cabd75 496 }
hattori_atsushi 0:f77369cabd75 497 }
hattori_atsushi 0:f77369cabd75 498 return (rc);
hattori_atsushi 0:f77369cabd75 499 }
hattori_atsushi 0:f77369cabd75 500
hattori_atsushi 0:f77369cabd75 501 /*
hattori_atsushi 0:f77369cabd75 502 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 503 * FILL SETUP PACKET
hattori_atsushi 0:f77369cabd75 504 *
hattori_atsushi 0:f77369cabd75 505 * Description: This function is used to fill the setup packet
hattori_atsushi 0:f77369cabd75 506 *
hattori_atsushi 0:f77369cabd75 507 * Arguments : None
hattori_atsushi 0:f77369cabd75 508 *
hattori_atsushi 0:f77369cabd75 509 * Returns : OK if Success
hattori_atsushi 0:f77369cabd75 510 * ERR_INVALID_BOOTSIG if Failed
hattori_atsushi 0:f77369cabd75 511 *
hattori_atsushi 0:f77369cabd75 512 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 513 */
hattori_atsushi 0:f77369cabd75 514
hattori_atsushi 0:f77369cabd75 515 void Host_FillSetup (USB_INT08U bm_request_type,
hattori_atsushi 0:f77369cabd75 516 USB_INT08U b_request,
hattori_atsushi 0:f77369cabd75 517 USB_INT16U w_value,
hattori_atsushi 0:f77369cabd75 518 USB_INT16U w_index,
hattori_atsushi 0:f77369cabd75 519 USB_INT16U w_length)
hattori_atsushi 0:f77369cabd75 520 {
hattori_atsushi 0:f77369cabd75 521 int i;
hattori_atsushi 0:f77369cabd75 522 for (i=0;i<w_length;i++)
hattori_atsushi 0:f77369cabd75 523 TDBuffer[i] = 0;
hattori_atsushi 0:f77369cabd75 524
hattori_atsushi 0:f77369cabd75 525 TDBuffer[0] = bm_request_type;
hattori_atsushi 0:f77369cabd75 526 TDBuffer[1] = b_request;
hattori_atsushi 0:f77369cabd75 527 WriteLE16U(&TDBuffer[2], w_value);
hattori_atsushi 0:f77369cabd75 528 WriteLE16U(&TDBuffer[4], w_index);
hattori_atsushi 0:f77369cabd75 529 WriteLE16U(&TDBuffer[6], w_length);
hattori_atsushi 0:f77369cabd75 530 }
hattori_atsushi 0:f77369cabd75 531
hattori_atsushi 0:f77369cabd75 532
hattori_atsushi 0:f77369cabd75 533
hattori_atsushi 0:f77369cabd75 534 /*
hattori_atsushi 0:f77369cabd75 535 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 536 * INITIALIZE THE TRANSFER DESCRIPTOR
hattori_atsushi 0:f77369cabd75 537 *
hattori_atsushi 0:f77369cabd75 538 * Description: This function initializes transfer descriptor
hattori_atsushi 0:f77369cabd75 539 *
hattori_atsushi 0:f77369cabd75 540 * Arguments : Pointer to TD structure
hattori_atsushi 0:f77369cabd75 541 *
hattori_atsushi 0:f77369cabd75 542 * Returns : None
hattori_atsushi 0:f77369cabd75 543 *
hattori_atsushi 0:f77369cabd75 544 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 545 */
hattori_atsushi 0:f77369cabd75 546
hattori_atsushi 0:f77369cabd75 547 void Host_TDInit (volatile HCTD *td)
hattori_atsushi 0:f77369cabd75 548 {
hattori_atsushi 0:f77369cabd75 549
hattori_atsushi 0:f77369cabd75 550 td->Control = 0;
hattori_atsushi 0:f77369cabd75 551 td->CurrBufPtr = 0;
hattori_atsushi 0:f77369cabd75 552 td->Next = 0;
hattori_atsushi 0:f77369cabd75 553 td->BufEnd = 0;
hattori_atsushi 0:f77369cabd75 554 }
hattori_atsushi 0:f77369cabd75 555
hattori_atsushi 0:f77369cabd75 556 /*
hattori_atsushi 0:f77369cabd75 557 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
hattori_atsushi 0:f77369cabd75 559 *
hattori_atsushi 0:f77369cabd75 560 * Description: This function initializes endpoint descriptor
hattori_atsushi 0:f77369cabd75 561 *
hattori_atsushi 0:f77369cabd75 562 * Arguments : Pointer to ED strcuture
hattori_atsushi 0:f77369cabd75 563 *
hattori_atsushi 0:f77369cabd75 564 * Returns : None
hattori_atsushi 0:f77369cabd75 565 *
hattori_atsushi 0:f77369cabd75 566 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 567 */
hattori_atsushi 0:f77369cabd75 568
hattori_atsushi 0:f77369cabd75 569 void Host_EDInit (volatile HCED *ed)
hattori_atsushi 0:f77369cabd75 570 {
hattori_atsushi 0:f77369cabd75 571
hattori_atsushi 0:f77369cabd75 572 ed->Control = 0;
hattori_atsushi 0:f77369cabd75 573 ed->TailTd = 0;
hattori_atsushi 0:f77369cabd75 574 ed->HeadTd = 0;
hattori_atsushi 0:f77369cabd75 575 ed->Next = 0;
hattori_atsushi 0:f77369cabd75 576 }
hattori_atsushi 0:f77369cabd75 577
hattori_atsushi 0:f77369cabd75 578 /*
hattori_atsushi 0:f77369cabd75 579 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
hattori_atsushi 0:f77369cabd75 581 *
hattori_atsushi 0:f77369cabd75 582 * Description: This function initializes host controller communications area
hattori_atsushi 0:f77369cabd75 583 *
hattori_atsushi 0:f77369cabd75 584 * Arguments : Pointer to HCCA
hattori_atsushi 0:f77369cabd75 585 *
hattori_atsushi 0:f77369cabd75 586 * Returns :
hattori_atsushi 0:f77369cabd75 587 *
hattori_atsushi 0:f77369cabd75 588 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 589 */
hattori_atsushi 0:f77369cabd75 590
hattori_atsushi 0:f77369cabd75 591 void Host_HCCAInit (volatile HCCA *hcca)
hattori_atsushi 0:f77369cabd75 592 {
hattori_atsushi 0:f77369cabd75 593 USB_INT32U i;
hattori_atsushi 0:f77369cabd75 594
hattori_atsushi 0:f77369cabd75 595
hattori_atsushi 0:f77369cabd75 596 for (i = 0; i < 32; i++) {
hattori_atsushi 0:f77369cabd75 597
hattori_atsushi 0:f77369cabd75 598 hcca->IntTable[i] = 0;
hattori_atsushi 0:f77369cabd75 599 hcca->FrameNumber = 0;
hattori_atsushi 0:f77369cabd75 600 hcca->DoneHead = 0;
hattori_atsushi 0:f77369cabd75 601 }
hattori_atsushi 0:f77369cabd75 602
hattori_atsushi 0:f77369cabd75 603 }
hattori_atsushi 0:f77369cabd75 604
hattori_atsushi 0:f77369cabd75 605 /*
hattori_atsushi 0:f77369cabd75 606 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 607 * WAIT FOR WDH INTERRUPT
hattori_atsushi 0:f77369cabd75 608 *
hattori_atsushi 0:f77369cabd75 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
hattori_atsushi 0:f77369cabd75 610 *
hattori_atsushi 0:f77369cabd75 611 * Arguments : None
hattori_atsushi 0:f77369cabd75 612 *
hattori_atsushi 0:f77369cabd75 613 * Returns : None
hattori_atsushi 0:f77369cabd75 614 *
hattori_atsushi 0:f77369cabd75 615 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 616 */
hattori_atsushi 0:f77369cabd75 617
hattori_atsushi 0:f77369cabd75 618 void Host_WDHWait (void)
hattori_atsushi 0:f77369cabd75 619 {
hattori_atsushi 0:f77369cabd75 620 while (!HOST_WdhIntr)
hattori_atsushi 0:f77369cabd75 621 __WFI();
hattori_atsushi 0:f77369cabd75 622
hattori_atsushi 0:f77369cabd75 623 HOST_WdhIntr = 0;
hattori_atsushi 0:f77369cabd75 624 }
hattori_atsushi 0:f77369cabd75 625
hattori_atsushi 0:f77369cabd75 626 /*
hattori_atsushi 0:f77369cabd75 627 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 628 * READ LE 32U
hattori_atsushi 0:f77369cabd75 629 *
hattori_atsushi 0:f77369cabd75 630 * Description: This function is used to read an unsigned integer from a character buffer in the platform
hattori_atsushi 0:f77369cabd75 631 * containing little endian processor
hattori_atsushi 0:f77369cabd75 632 *
hattori_atsushi 0:f77369cabd75 633 * Arguments : pmem Pointer to the character buffer
hattori_atsushi 0:f77369cabd75 634 *
hattori_atsushi 0:f77369cabd75 635 * Returns : val Unsigned integer
hattori_atsushi 0:f77369cabd75 636 *
hattori_atsushi 0:f77369cabd75 637 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 638 */
hattori_atsushi 0:f77369cabd75 639
hattori_atsushi 0:f77369cabd75 640 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
hattori_atsushi 0:f77369cabd75 641 {
hattori_atsushi 0:f77369cabd75 642 USB_INT32U val = *(USB_INT32U*)pmem;
hattori_atsushi 0:f77369cabd75 643 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 644 return __REV(val);
hattori_atsushi 0:f77369cabd75 645 #else
hattori_atsushi 0:f77369cabd75 646 return val;
hattori_atsushi 0:f77369cabd75 647 #endif
hattori_atsushi 0:f77369cabd75 648 }
hattori_atsushi 0:f77369cabd75 649
hattori_atsushi 0:f77369cabd75 650 /*
hattori_atsushi 0:f77369cabd75 651 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 652 * WRITE LE 32U
hattori_atsushi 0:f77369cabd75 653 *
hattori_atsushi 0:f77369cabd75 654 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
hattori_atsushi 0:f77369cabd75 655 * containing little endian processor.
hattori_atsushi 0:f77369cabd75 656 *
hattori_atsushi 0:f77369cabd75 657 * Arguments : pmem Pointer to the charecter buffer
hattori_atsushi 0:f77369cabd75 658 * val Integer value to be placed in the charecter buffer
hattori_atsushi 0:f77369cabd75 659 *
hattori_atsushi 0:f77369cabd75 660 * Returns : None
hattori_atsushi 0:f77369cabd75 661 *
hattori_atsushi 0:f77369cabd75 662 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 663 */
hattori_atsushi 0:f77369cabd75 664
hattori_atsushi 0:f77369cabd75 665 void WriteLE32U (volatile USB_INT08U *pmem,
hattori_atsushi 0:f77369cabd75 666 USB_INT32U val)
hattori_atsushi 0:f77369cabd75 667 {
hattori_atsushi 0:f77369cabd75 668 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 669 *(USB_INT32U*)pmem = __REV(val);
hattori_atsushi 0:f77369cabd75 670 #else
hattori_atsushi 0:f77369cabd75 671 *(USB_INT32U*)pmem = val;
hattori_atsushi 0:f77369cabd75 672 #endif
hattori_atsushi 0:f77369cabd75 673 }
hattori_atsushi 0:f77369cabd75 674
hattori_atsushi 0:f77369cabd75 675 /*
hattori_atsushi 0:f77369cabd75 676 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 677 * READ LE 16U
hattori_atsushi 0:f77369cabd75 678 *
hattori_atsushi 0:f77369cabd75 679 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
hattori_atsushi 0:f77369cabd75 680 * containing little endian processor
hattori_atsushi 0:f77369cabd75 681 *
hattori_atsushi 0:f77369cabd75 682 * Arguments : pmem Pointer to the charecter buffer
hattori_atsushi 0:f77369cabd75 683 *
hattori_atsushi 0:f77369cabd75 684 * Returns : val Unsigned short integer
hattori_atsushi 0:f77369cabd75 685 *
hattori_atsushi 0:f77369cabd75 686 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 687 */
hattori_atsushi 0:f77369cabd75 688
hattori_atsushi 0:f77369cabd75 689 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
hattori_atsushi 0:f77369cabd75 690 {
hattori_atsushi 0:f77369cabd75 691 USB_INT16U val = *(USB_INT16U*)pmem;
hattori_atsushi 0:f77369cabd75 692 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 693 return __REV16(val);
hattori_atsushi 0:f77369cabd75 694 #else
hattori_atsushi 0:f77369cabd75 695 return val;
hattori_atsushi 0:f77369cabd75 696 #endif
hattori_atsushi 0:f77369cabd75 697 }
hattori_atsushi 0:f77369cabd75 698
hattori_atsushi 0:f77369cabd75 699 /*
hattori_atsushi 0:f77369cabd75 700 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 701 * WRITE LE 16U
hattori_atsushi 0:f77369cabd75 702 *
hattori_atsushi 0:f77369cabd75 703 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
hattori_atsushi 0:f77369cabd75 704 * platform containing little endian processor
hattori_atsushi 0:f77369cabd75 705 *
hattori_atsushi 0:f77369cabd75 706 * Arguments : pmem Pointer to the charecter buffer
hattori_atsushi 0:f77369cabd75 707 * val Value to be placed in the charecter buffer
hattori_atsushi 0:f77369cabd75 708 *
hattori_atsushi 0:f77369cabd75 709 * Returns : None
hattori_atsushi 0:f77369cabd75 710 *
hattori_atsushi 0:f77369cabd75 711 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 712 */
hattori_atsushi 0:f77369cabd75 713
hattori_atsushi 0:f77369cabd75 714 void WriteLE16U (volatile USB_INT08U *pmem,
hattori_atsushi 0:f77369cabd75 715 USB_INT16U val)
hattori_atsushi 0:f77369cabd75 716 {
hattori_atsushi 0:f77369cabd75 717 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 718 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
hattori_atsushi 0:f77369cabd75 719 #else
hattori_atsushi 0:f77369cabd75 720 *(USB_INT16U*)pmem = val;
hattori_atsushi 0:f77369cabd75 721 #endif
hattori_atsushi 0:f77369cabd75 722 }
hattori_atsushi 0:f77369cabd75 723
hattori_atsushi 0:f77369cabd75 724 /*
hattori_atsushi 0:f77369cabd75 725 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 726 * READ BE 32U
hattori_atsushi 0:f77369cabd75 727 *
hattori_atsushi 0:f77369cabd75 728 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
hattori_atsushi 0:f77369cabd75 729 * containing big endian processor
hattori_atsushi 0:f77369cabd75 730 *
hattori_atsushi 0:f77369cabd75 731 * Arguments : pmem Pointer to the charecter buffer
hattori_atsushi 0:f77369cabd75 732 *
hattori_atsushi 0:f77369cabd75 733 * Returns : val Unsigned integer
hattori_atsushi 0:f77369cabd75 734 *
hattori_atsushi 0:f77369cabd75 735 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 736 */
hattori_atsushi 0:f77369cabd75 737
hattori_atsushi 0:f77369cabd75 738 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
hattori_atsushi 0:f77369cabd75 739 {
hattori_atsushi 0:f77369cabd75 740 USB_INT32U val = *(USB_INT32U*)pmem;
hattori_atsushi 0:f77369cabd75 741 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 742 return val;
hattori_atsushi 0:f77369cabd75 743 #else
hattori_atsushi 0:f77369cabd75 744 return __REV(val);
hattori_atsushi 0:f77369cabd75 745 #endif
hattori_atsushi 0:f77369cabd75 746 }
hattori_atsushi 0:f77369cabd75 747
hattori_atsushi 0:f77369cabd75 748 /*
hattori_atsushi 0:f77369cabd75 749 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 750 * WRITE BE 32U
hattori_atsushi 0:f77369cabd75 751 *
hattori_atsushi 0:f77369cabd75 752 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
hattori_atsushi 0:f77369cabd75 753 * containing big endian processor
hattori_atsushi 0:f77369cabd75 754 *
hattori_atsushi 0:f77369cabd75 755 * Arguments : pmem Pointer to the charecter buffer
hattori_atsushi 0:f77369cabd75 756 * val Value to be placed in the charecter buffer
hattori_atsushi 0:f77369cabd75 757 *
hattori_atsushi 0:f77369cabd75 758 * Returns : None
hattori_atsushi 0:f77369cabd75 759 *
hattori_atsushi 0:f77369cabd75 760 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 761 */
hattori_atsushi 0:f77369cabd75 762
hattori_atsushi 0:f77369cabd75 763 void WriteBE32U (volatile USB_INT08U *pmem,
hattori_atsushi 0:f77369cabd75 764 USB_INT32U val)
hattori_atsushi 0:f77369cabd75 765 {
hattori_atsushi 0:f77369cabd75 766 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 767 *(USB_INT32U*)pmem = val;
hattori_atsushi 0:f77369cabd75 768 #else
hattori_atsushi 0:f77369cabd75 769 *(USB_INT32U*)pmem = __REV(val);
hattori_atsushi 0:f77369cabd75 770 #endif
hattori_atsushi 0:f77369cabd75 771 }
hattori_atsushi 0:f77369cabd75 772
hattori_atsushi 0:f77369cabd75 773 /*
hattori_atsushi 0:f77369cabd75 774 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 775 * READ BE 16U
hattori_atsushi 0:f77369cabd75 776 *
hattori_atsushi 0:f77369cabd75 777 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
hattori_atsushi 0:f77369cabd75 778 * containing big endian processor
hattori_atsushi 0:f77369cabd75 779 *
hattori_atsushi 0:f77369cabd75 780 * Arguments : pmem Pointer to the charecter buffer
hattori_atsushi 0:f77369cabd75 781 *
hattori_atsushi 0:f77369cabd75 782 * Returns : val Unsigned short integer
hattori_atsushi 0:f77369cabd75 783 *
hattori_atsushi 0:f77369cabd75 784 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 785 */
hattori_atsushi 0:f77369cabd75 786
hattori_atsushi 0:f77369cabd75 787 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
hattori_atsushi 0:f77369cabd75 788 {
hattori_atsushi 0:f77369cabd75 789 USB_INT16U val = *(USB_INT16U*)pmem;
hattori_atsushi 0:f77369cabd75 790 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 791 return val;
hattori_atsushi 0:f77369cabd75 792 #else
hattori_atsushi 0:f77369cabd75 793 return __REV16(val);
hattori_atsushi 0:f77369cabd75 794 #endif
hattori_atsushi 0:f77369cabd75 795 }
hattori_atsushi 0:f77369cabd75 796
hattori_atsushi 0:f77369cabd75 797 /*
hattori_atsushi 0:f77369cabd75 798 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 799 * WRITE BE 16U
hattori_atsushi 0:f77369cabd75 800 *
hattori_atsushi 0:f77369cabd75 801 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
hattori_atsushi 0:f77369cabd75 802 * platform containing big endian processor
hattori_atsushi 0:f77369cabd75 803 *
hattori_atsushi 0:f77369cabd75 804 * Arguments : pmem Pointer to the charecter buffer
hattori_atsushi 0:f77369cabd75 805 * val Value to be placed in the charecter buffer
hattori_atsushi 0:f77369cabd75 806 *
hattori_atsushi 0:f77369cabd75 807 * Returns : None
hattori_atsushi 0:f77369cabd75 808 *
hattori_atsushi 0:f77369cabd75 809 **************************************************************************************************************
hattori_atsushi 0:f77369cabd75 810 */
hattori_atsushi 0:f77369cabd75 811
hattori_atsushi 0:f77369cabd75 812 void WriteBE16U (volatile USB_INT08U *pmem,
hattori_atsushi 0:f77369cabd75 813 USB_INT16U val)
hattori_atsushi 0:f77369cabd75 814 {
hattori_atsushi 0:f77369cabd75 815 #ifdef __BIG_ENDIAN
hattori_atsushi 0:f77369cabd75 816 *(USB_INT16U*)pmem = val;
hattori_atsushi 0:f77369cabd75 817 #else
hattori_atsushi 0:f77369cabd75 818 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
hattori_atsushi 0:f77369cabd75 819 #endif
hattori_atsushi 0:f77369cabd75 820 }