BAE RTOS..working hopefully

Dependencies:   mbed-rtos mbed

Committer:
harshit_felicity
Date:
Thu Jul 10 11:37:47 2014 +0000
Revision:
1:37fa1c3eba16
Parent:
0:cbe0ea884289
BAE RTOS..Working hopefully

Who changed what in which revision?

UserRevisionLine numberNew contents of line
harshit_felicity 0:cbe0ea884289 1 #include "ShortBeacon.h"
harshit_felicity 0:cbe0ea884289 2 ShortBeacon Shortbeacon;
harshit_felicity 0:cbe0ea884289 3 Serial rosh(USBTX, USBRX); // tx, rx
harshit_felicity 0:cbe0ea884289 4 SPI spi(p5, p6, p7); // mosi, miso, sclk
harshit_felicity 0:cbe0ea884289 5 DigitalOut cs(p8); //slave select or chip select
harshit_felicity 0:cbe0ea884289 6
harshit_felicity 0:cbe0ea884289 7 int j = 0; //for hk[]
harshit_felicity 0:cbe0ea884289 8 int n = 0; //for bit number
harshit_felicity 0:cbe0ea884289 9 uint8_t hk[HK_DATA_LEN_SHORT];
harshit_felicity 0:cbe0ea884289 10
harshit_felicity 0:cbe0ea884289 11 unsigned char mask_table[] = { 0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01 }; //to extract individual bits from MSB to LSB
harshit_felicity 0:cbe0ea884289 12
harshit_felicity 0:cbe0ea884289 13 uint8_t const callsign[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E }; //without bitstuffing, additional zero at end!
harshit_felicity 0:cbe0ea884289 14
harshit_felicity 0:cbe0ea884289 15 void writereg(uint8_t reg,uint8_t val) //function to initialize RFM69 registers
harshit_felicity 0:cbe0ea884289 16 {
harshit_felicity 0:cbe0ea884289 17 cs = 0;
harshit_felicity 0:cbe0ea884289 18 __disable_irq();
harshit_felicity 0:cbe0ea884289 19 spi.write(reg | 0x80);
harshit_felicity 0:cbe0ea884289 20 spi.write(val);
harshit_felicity 0:cbe0ea884289 21 __enable_irq();
harshit_felicity 0:cbe0ea884289 22 cs = 1;
harshit_felicity 0:cbe0ea884289 23 }
harshit_felicity 0:cbe0ea884289 24
harshit_felicity 0:cbe0ea884289 25 uint8_t readreg(uint8_t reg) //function to read from RFM69 registers
harshit_felicity 0:cbe0ea884289 26 {
harshit_felicity 0:cbe0ea884289 27 int val;
harshit_felicity 0:cbe0ea884289 28 cs = 0;
harshit_felicity 0:cbe0ea884289 29 __disable_irq();
harshit_felicity 0:cbe0ea884289 30 spi.write(reg & ~0x80);
harshit_felicity 0:cbe0ea884289 31 val = spi.write(0);
harshit_felicity 0:cbe0ea884289 32 __enable_irq();
harshit_felicity 0:cbe0ea884289 33 cs = 1;
harshit_felicity 0:cbe0ea884289 34 return val;
harshit_felicity 0:cbe0ea884289 35 }
harshit_felicity 0:cbe0ea884289 36
harshit_felicity 0:cbe0ea884289 37 void bitstuffinghk(uint8_t byte) //function to repeat each bit of hk[] 16 times
harshit_felicity 0:cbe0ea884289 38 {
harshit_felicity 0:cbe0ea884289 39 bool bit_n;
harshit_felicity 0:cbe0ea884289 40 for(n=0; n<8; n++)
harshit_felicity 0:cbe0ea884289 41 {
harshit_felicity 0:cbe0ea884289 42 bit_n = ( byte & mask_table[ n ] ) != 0x00;
harshit_felicity 0:cbe0ea884289 43 if(bit_n!=0)
harshit_felicity 0:cbe0ea884289 44 {
harshit_felicity 0:cbe0ea884289 45 hk[j]= 0xFF;
harshit_felicity 0:cbe0ea884289 46 hk[j+1]= 0xFF;
harshit_felicity 0:cbe0ea884289 47 }
harshit_felicity 0:cbe0ea884289 48 else
harshit_felicity 0:cbe0ea884289 49 {
harshit_felicity 0:cbe0ea884289 50 hk[j]= 0x00;
harshit_felicity 0:cbe0ea884289 51 hk[j+1]= 0x00;
harshit_felicity 0:cbe0ea884289 52 }
harshit_felicity 0:cbe0ea884289 53 j=j+2;
harshit_felicity 0:cbe0ea884289 54 }
harshit_felicity 0:cbe0ea884289 55 }
harshit_felicity 0:cbe0ea884289 56
harshit_felicity 0:cbe0ea884289 57 void FUNC_SHORTBEACON()
harshit_felicity 0:cbe0ea884289 58 {
harshit_felicity 0:cbe0ea884289 59 wait(0.5);
harshit_felicity 0:cbe0ea884289 60 uint8_t fifo_full = 0x00,fifo_thresh;
harshit_felicity 0:cbe0ea884289 61 int i = 0; //for callsign[]
harshit_felicity 0:cbe0ea884289 62 int u = 0; //universal count for hk array
harshit_felicity 0:cbe0ea884289 63 int bar = 0;
harshit_felicity 0:cbe0ea884289 64 uint8_t rval=0x00;
harshit_felicity 0:cbe0ea884289 65 cs = 1; // Chip must be deselected
harshit_felicity 0:cbe0ea884289 66
harshit_felicity 0:cbe0ea884289 67 spi.format(8,0); //8 bits taken at a time
harshit_felicity 0:cbe0ea884289 68 spi.frequency(10000000); //10MHz SCLK frequency (Maximum possible for RFM69HCW)
harshit_felicity 0:cbe0ea884289 69
harshit_felicity 0:cbe0ea884289 70 //initialization
harshit_felicity 0:cbe0ea884289 71
harshit_felicity 0:cbe0ea884289 72 //Common configuration registers
harshit_felicity 0:cbe0ea884289 73 writereg(0x01,0x04); //Sequencer off, Standby mode
harshit_felicity 0:cbe0ea884289 74 writereg(0x02,0x08); //Packet Mode, OOK Modulation, No DC Free Mechanism
harshit_felicity 0:cbe0ea884289 75 writereg(0x03,0x68); //Signalling Rate = 1200bps
harshit_felicity 0:cbe0ea884289 76 writereg(0x04,0x2B); //Signalling Rate = 1200bps
harshit_felicity 0:cbe0ea884289 77 writereg(0x07,0x6C); //6C D0 0B for 435 MHz
harshit_felicity 0:cbe0ea884289 78 writereg(0x08,0xD0); //435 MHz
harshit_felicity 0:cbe0ea884289 79 writereg(0x09,0x0B); //435 MHz
harshit_felicity 0:cbe0ea884289 80
harshit_felicity 0:cbe0ea884289 81 //Packet Engine Registers
harshit_felicity 0:cbe0ea884289 82 writereg(0x2C,0x00); //set Preamble length to 0
harshit_felicity 0:cbe0ea884289 83 writereg(0x2D,0x00); //set Preamble length to 0
harshit_felicity 0:cbe0ea884289 84 writereg(0x2E,0x08); //SyncWord off
harshit_felicity 0:cbe0ea884289 85 writereg(0x37,0x00); //Fixed Length, CRC and SyncAddress off
harshit_felicity 0:cbe0ea884289 86 writereg(0x38,0xF0); //payload length = 240 bytes
harshit_felicity 0:cbe0ea884289 87 writereg(0x3C,0x28); //Fifothresh = 40 bytes
harshit_felicity 0:cbe0ea884289 88
harshit_felicity 0:cbe0ea884289 89 //Initialization of Registers complete
harshit_felicity 0:cbe0ea884289 90
harshit_felicity 0:cbe0ea884289 91 //Bitstuffing of HK Parameters, appending to hk[]
harshit_felicity 0:cbe0ea884289 92
harshit_felicity 0:cbe0ea884289 93 for(i=0;i<UNSTUFFED_CALLSIGN_LEN;i++)
harshit_felicity 0:cbe0ea884289 94 {
harshit_felicity 0:cbe0ea884289 95 bitstuffinghk(callsign[i]);
harshit_felicity 0:cbe0ea884289 96 }
harshit_felicity 0:cbe0ea884289 97
harshit_felicity 0:cbe0ea884289 98 bitstuffinghk(Shortbeacon.Voltage[0]);
harshit_felicity 0:cbe0ea884289 99 bitstuffinghk(Shortbeacon.AngularSpeed[0]);
harshit_felicity 0:cbe0ea884289 100 bitstuffinghk(Shortbeacon.AngularSpeed[1]);
harshit_felicity 0:cbe0ea884289 101 bitstuffinghk(Shortbeacon.SubsystemStatus[0]);
harshit_felicity 0:cbe0ea884289 102 bitstuffinghk(Shortbeacon.Temp[0]);
harshit_felicity 0:cbe0ea884289 103 bitstuffinghk(Shortbeacon.Temp[1]);
harshit_felicity 0:cbe0ea884289 104 bitstuffinghk(Shortbeacon.Temp[2]);
harshit_felicity 0:cbe0ea884289 105 bitstuffinghk(Shortbeacon.ErrorFlag[0]);
harshit_felicity 0:cbe0ea884289 106
harshit_felicity 0:cbe0ea884289 107 //Filling Data into FIFO (first 66 bytes)
harshit_felicity 0:cbe0ea884289 108
harshit_felicity 0:cbe0ea884289 109 cs = 0;
harshit_felicity 0:cbe0ea884289 110 __disable_irq();
harshit_felicity 0:cbe0ea884289 111 spi.write(0x80); //fifo write access
harshit_felicity 0:cbe0ea884289 112 __enable_irq();
harshit_felicity 0:cbe0ea884289 113
harshit_felicity 0:cbe0ea884289 114 for(i=0;i<66;i++)
harshit_felicity 0:cbe0ea884289 115 {
harshit_felicity 0:cbe0ea884289 116 __disable_irq();
harshit_felicity 0:cbe0ea884289 117 spi.write(hk[i]);
harshit_felicity 0:cbe0ea884289 118 __enable_irq();
harshit_felicity 0:cbe0ea884289 119 }
harshit_felicity 0:cbe0ea884289 120
harshit_felicity 0:cbe0ea884289 121 u=i;
harshit_felicity 0:cbe0ea884289 122 cs = 1;
harshit_felicity 0:cbe0ea884289 123
harshit_felicity 0:cbe0ea884289 124 //check for fifofull
harshit_felicity 0:cbe0ea884289 125 while(fifo_full != 0x80)
harshit_felicity 0:cbe0ea884289 126 {
harshit_felicity 0:cbe0ea884289 127 fifo_full = readreg(0x28);
harshit_felicity 0:cbe0ea884289 128 fifo_full = fifo_full & 0x80;
harshit_felicity 0:cbe0ea884289 129 }
harshit_felicity 0:cbe0ea884289 130
harshit_felicity 0:cbe0ea884289 131 //Set to Tx mode
harshit_felicity 0:cbe0ea884289 132 writereg(0x01,0x0C); //Transmit mode set after FIFO is full
harshit_felicity 0:cbe0ea884289 133
harshit_felicity 0:cbe0ea884289 134 //Highpower settings
harshit_felicity 0:cbe0ea884289 135 writereg(0x11,0x7F); //RegPalevel (20db)
harshit_felicity 0:cbe0ea884289 136 writereg(0x13,0x0F); //RegOCP
harshit_felicity 0:cbe0ea884289 137 writereg(0x5A,0x5D); //RegTestPa1
harshit_felicity 0:cbe0ea884289 138 writereg(0x5C,0x7C); //RegTestPa2
harshit_felicity 0:cbe0ea884289 139
harshit_felicity 0:cbe0ea884289 140 //Check for fifoThresh
harshit_felicity 0:cbe0ea884289 141 fifo_thresh = 0x08;
harshit_felicity 0:cbe0ea884289 142 while(fifo_thresh != 0x00)
harshit_felicity 0:cbe0ea884289 143 {
harshit_felicity 0:cbe0ea884289 144 fifo_thresh = readreg(0x28);
harshit_felicity 0:cbe0ea884289 145 fifo_thresh = fifo_thresh & 0x20; //5th bit
harshit_felicity 0:cbe0ea884289 146 }
harshit_felicity 0:cbe0ea884289 147
harshit_felicity 0:cbe0ea884289 148 while(u<=HK_DATA_LEN_SHORT)
harshit_felicity 0:cbe0ea884289 149 {
harshit_felicity 0:cbe0ea884289 150
harshit_felicity 0:cbe0ea884289 151 if((HK_DATA_LEN_SHORT - u) > TIMES)
harshit_felicity 0:cbe0ea884289 152 bar = TIMES;
harshit_felicity 0:cbe0ea884289 153
harshit_felicity 0:cbe0ea884289 154 else
harshit_felicity 0:cbe0ea884289 155 bar = (HK_DATA_LEN_SHORT - u)%TIMES;
harshit_felicity 0:cbe0ea884289 156
harshit_felicity 0:cbe0ea884289 157 //writing again
harshit_felicity 0:cbe0ea884289 158 cs = 0;
harshit_felicity 0:cbe0ea884289 159 __disable_irq();
harshit_felicity 0:cbe0ea884289 160 spi.write(0x80);
harshit_felicity 0:cbe0ea884289 161 __enable_irq();
harshit_felicity 0:cbe0ea884289 162
harshit_felicity 0:cbe0ea884289 163 for(i=0; i<bar;i++) //write 20 bytes of hk[] each time FIFO gets emptied below FifoThresh
harshit_felicity 0:cbe0ea884289 164 {
harshit_felicity 0:cbe0ea884289 165 __disable_irq();
harshit_felicity 0:cbe0ea884289 166 spi.write(hk[u + i]);
harshit_felicity 0:cbe0ea884289 167 __enable_irq();
harshit_felicity 0:cbe0ea884289 168 }
harshit_felicity 0:cbe0ea884289 169
harshit_felicity 0:cbe0ea884289 170 u = u + i;
harshit_felicity 0:cbe0ea884289 171 cs = 1;
harshit_felicity 0:cbe0ea884289 172
harshit_felicity 0:cbe0ea884289 173 //Check for fifoThresh
harshit_felicity 0:cbe0ea884289 174 fifo_thresh = 0x08;
harshit_felicity 0:cbe0ea884289 175 while(fifo_thresh != 0x00)
harshit_felicity 0:cbe0ea884289 176 {
harshit_felicity 0:cbe0ea884289 177 fifo_thresh = readreg(0x28);
harshit_felicity 0:cbe0ea884289 178 fifo_thresh = fifo_thresh & 0x20; //5th bit
harshit_felicity 0:cbe0ea884289 179 }
harshit_felicity 0:cbe0ea884289 180 }
harshit_felicity 0:cbe0ea884289 181
harshit_felicity 0:cbe0ea884289 182 //Checking if PacketSent goes high
harshit_felicity 0:cbe0ea884289 183
harshit_felicity 0:cbe0ea884289 184 while(rval != 0x08)
harshit_felicity 0:cbe0ea884289 185 {
harshit_felicity 0:cbe0ea884289 186 rval = readreg(0x28);
harshit_felicity 0:cbe0ea884289 187 rval = rval & 0x08;
harshit_felicity 0:cbe0ea884289 188 rosh.printf("sending... \n");
harshit_felicity 0:cbe0ea884289 189 }
harshit_felicity 0:cbe0ea884289 190
harshit_felicity 0:cbe0ea884289 191 rval = 0;
harshit_felicity 0:cbe0ea884289 192 rosh.printf("packet sent!!! \n");
harshit_felicity 0:cbe0ea884289 193 rosh.printf("%d",u);
harshit_felicity 0:cbe0ea884289 194
harshit_felicity 0:cbe0ea884289 195 //Switch back to Standby Mode
harshit_felicity 0:cbe0ea884289 196 writereg(0x01,0x04);
harshit_felicity 0:cbe0ea884289 197 wait(5);
harshit_felicity 0:cbe0ea884289 198 }