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Fork of nRF51822 by
nordic-sdk/components/drivers_nrf/hal/nrf_gpio.h@374:d57070489710, 2015-07-06 (annotated)
- Committer:
- rgrover1
- Date:
- Mon Jul 06 10:21:01 2015 +0100
- Revision:
- 374:d57070489710
- Parent:
- source/nordic-sdk/components/drivers_nrf/hal/nrf_gpio.h@372:758e9a3a346a
Synchronized with git rev 3d87035e
Author: Rohit Grover
fix #16: hide duplicate symbol definitions in ble_types.h
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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rgrover1 | 371:8f7d2137727a | 1 | /* |
rgrover1 | 371:8f7d2137727a | 2 | * Copyright (c) Nordic Semiconductor ASA |
rgrover1 | 371:8f7d2137727a | 3 | * All rights reserved. |
rgrover1 | 371:8f7d2137727a | 4 | * |
rgrover1 | 371:8f7d2137727a | 5 | * Redistribution and use in source and binary forms, with or without modification, |
rgrover1 | 371:8f7d2137727a | 6 | * are permitted provided that the following conditions are met: |
rgrover1 | 371:8f7d2137727a | 7 | * |
rgrover1 | 371:8f7d2137727a | 8 | * 1. Redistributions of source code must retain the above copyright notice, this |
rgrover1 | 371:8f7d2137727a | 9 | * list of conditions and the following disclaimer. |
rgrover1 | 371:8f7d2137727a | 10 | * |
rgrover1 | 371:8f7d2137727a | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, this |
rgrover1 | 371:8f7d2137727a | 12 | * list of conditions and the following disclaimer in the documentation and/or |
rgrover1 | 371:8f7d2137727a | 13 | * other materials provided with the distribution. |
rgrover1 | 371:8f7d2137727a | 14 | * |
rgrover1 | 371:8f7d2137727a | 15 | * 3. Neither the name of Nordic Semiconductor ASA nor the names of other |
rgrover1 | 371:8f7d2137727a | 16 | * contributors to this software may be used to endorse or promote products |
rgrover1 | 371:8f7d2137727a | 17 | * derived from this software without specific prior written permission. |
rgrover1 | 371:8f7d2137727a | 18 | * |
rgrover1 | 371:8f7d2137727a | 19 | * |
rgrover1 | 371:8f7d2137727a | 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
rgrover1 | 371:8f7d2137727a | 21 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
rgrover1 | 371:8f7d2137727a | 22 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
rgrover1 | 371:8f7d2137727a | 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
rgrover1 | 371:8f7d2137727a | 24 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
rgrover1 | 371:8f7d2137727a | 25 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
rgrover1 | 371:8f7d2137727a | 26 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
rgrover1 | 371:8f7d2137727a | 27 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
rgrover1 | 371:8f7d2137727a | 28 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
rgrover1 | 371:8f7d2137727a | 29 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
rgrover1 | 371:8f7d2137727a | 30 | * |
rgrover1 | 371:8f7d2137727a | 31 | */ |
rgrover1 | 371:8f7d2137727a | 32 | |
rgrover1 | 371:8f7d2137727a | 33 | #ifndef NRF_GPIO_H__ |
rgrover1 | 371:8f7d2137727a | 34 | #define NRF_GPIO_H__ |
rgrover1 | 371:8f7d2137727a | 35 | |
rgrover1 | 371:8f7d2137727a | 36 | #include "nrf51.h" |
rgrover1 | 371:8f7d2137727a | 37 | #include "nrf51_bitfields.h" |
rgrover1 | 371:8f7d2137727a | 38 | |
rgrover1 | 371:8f7d2137727a | 39 | /** |
rgrover1 | 371:8f7d2137727a | 40 | * @defgroup nrf_gpio GPIO abstraction |
rgrover1 | 371:8f7d2137727a | 41 | * @{ |
rgrover1 | 371:8f7d2137727a | 42 | * @ingroup nrf_drivers |
rgrover1 | 371:8f7d2137727a | 43 | * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports. |
rgrover1 | 371:8f7d2137727a | 44 | * |
rgrover1 | 371:8f7d2137727a | 45 | * Here, the GPIO ports are defined as follows: |
rgrover1 | 371:8f7d2137727a | 46 | * - Port 0 -> pin 0-7 |
rgrover1 | 371:8f7d2137727a | 47 | * - Port 1 -> pin 8-15 |
rgrover1 | 371:8f7d2137727a | 48 | * - Port 2 -> pin 16-23 |
rgrover1 | 371:8f7d2137727a | 49 | * - Port 3 -> pin 24-31 |
rgrover1 | 371:8f7d2137727a | 50 | */ |
rgrover1 | 371:8f7d2137727a | 51 | |
rgrover1 | 371:8f7d2137727a | 52 | /** |
rgrover1 | 371:8f7d2137727a | 53 | * @enum nrf_gpio_port_dir_t |
rgrover1 | 371:8f7d2137727a | 54 | * @brief Enumerator used for setting the direction of a GPIO port. |
rgrover1 | 371:8f7d2137727a | 55 | */ |
rgrover1 | 371:8f7d2137727a | 56 | typedef enum |
rgrover1 | 371:8f7d2137727a | 57 | { |
rgrover1 | 371:8f7d2137727a | 58 | NRF_GPIO_PORT_DIR_OUTPUT, ///< Output |
rgrover1 | 371:8f7d2137727a | 59 | NRF_GPIO_PORT_DIR_INPUT ///< Input |
rgrover1 | 371:8f7d2137727a | 60 | } nrf_gpio_port_dir_t; |
rgrover1 | 371:8f7d2137727a | 61 | |
rgrover1 | 371:8f7d2137727a | 62 | /** |
rgrover1 | 371:8f7d2137727a | 63 | * @enum nrf_gpio_pin_dir_t |
rgrover1 | 371:8f7d2137727a | 64 | * Pin direction definitions. |
rgrover1 | 371:8f7d2137727a | 65 | */ |
rgrover1 | 371:8f7d2137727a | 66 | typedef enum |
rgrover1 | 371:8f7d2137727a | 67 | { |
rgrover1 | 371:8f7d2137727a | 68 | NRF_GPIO_PIN_DIR_INPUT, ///< Input |
rgrover1 | 371:8f7d2137727a | 69 | NRF_GPIO_PIN_DIR_OUTPUT ///< Output |
rgrover1 | 371:8f7d2137727a | 70 | } nrf_gpio_pin_dir_t; |
rgrover1 | 371:8f7d2137727a | 71 | |
rgrover1 | 371:8f7d2137727a | 72 | /** |
rgrover1 | 371:8f7d2137727a | 73 | * @enum nrf_gpio_port_select_t |
rgrover1 | 371:8f7d2137727a | 74 | * @brief Enumerator used for selecting between port 0 - 3. |
rgrover1 | 371:8f7d2137727a | 75 | */ |
rgrover1 | 371:8f7d2137727a | 76 | typedef enum |
rgrover1 | 371:8f7d2137727a | 77 | { |
rgrover1 | 371:8f7d2137727a | 78 | NRF_GPIO_PORT_SELECT_PORT0 = 0, ///< Port 0 (GPIO pin 0-7) |
rgrover1 | 371:8f7d2137727a | 79 | NRF_GPIO_PORT_SELECT_PORT1, ///< Port 1 (GPIO pin 8-15) |
rgrover1 | 371:8f7d2137727a | 80 | NRF_GPIO_PORT_SELECT_PORT2, ///< Port 2 (GPIO pin 16-23) |
rgrover1 | 371:8f7d2137727a | 81 | NRF_GPIO_PORT_SELECT_PORT3, ///< Port 3 (GPIO pin 24-31) |
rgrover1 | 371:8f7d2137727a | 82 | } nrf_gpio_port_select_t; |
rgrover1 | 371:8f7d2137727a | 83 | |
rgrover1 | 371:8f7d2137727a | 84 | /** |
rgrover1 | 371:8f7d2137727a | 85 | * @enum nrf_gpio_pin_pull_t |
rgrover1 | 371:8f7d2137727a | 86 | * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration |
rgrover1 | 371:8f7d2137727a | 87 | */ |
rgrover1 | 371:8f7d2137727a | 88 | typedef enum |
rgrover1 | 371:8f7d2137727a | 89 | { |
rgrover1 | 371:8f7d2137727a | 90 | NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pullup resistor disabled |
rgrover1 | 371:8f7d2137727a | 91 | NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pulldown resistor enabled |
rgrover1 | 371:8f7d2137727a | 92 | NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pullup resistor enabled |
rgrover1 | 371:8f7d2137727a | 93 | } nrf_gpio_pin_pull_t; |
rgrover1 | 371:8f7d2137727a | 94 | |
rgrover1 | 371:8f7d2137727a | 95 | /** |
rgrover1 | 371:8f7d2137727a | 96 | * @enum nrf_gpio_pin_sense_t |
rgrover1 | 371:8f7d2137727a | 97 | * @brief Enumerator used for selecting the pin to sense high or low level on the pin input. |
rgrover1 | 371:8f7d2137727a | 98 | */ |
rgrover1 | 371:8f7d2137727a | 99 | typedef enum |
rgrover1 | 371:8f7d2137727a | 100 | { |
rgrover1 | 371:8f7d2137727a | 101 | NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled. |
rgrover1 | 371:8f7d2137727a | 102 | NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level. |
rgrover1 | 371:8f7d2137727a | 103 | NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level. |
rgrover1 | 371:8f7d2137727a | 104 | } nrf_gpio_pin_sense_t; |
rgrover1 | 371:8f7d2137727a | 105 | |
rgrover1 | 371:8f7d2137727a | 106 | /** |
rgrover1 | 371:8f7d2137727a | 107 | * @brief Function for configuring the GPIO pin range as outputs with normal drive strength. |
rgrover1 | 371:8f7d2137727a | 108 | * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). |
rgrover1 | 371:8f7d2137727a | 109 | * |
rgrover1 | 371:8f7d2137727a | 110 | * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30) |
rgrover1 | 371:8f7d2137727a | 111 | * |
rgrover1 | 371:8f7d2137727a | 112 | * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30) |
rgrover1 | 371:8f7d2137727a | 113 | * |
rgrover1 | 371:8f7d2137727a | 114 | * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output |
rgrover1 | 371:8f7d2137727a | 115 | * Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output. |
rgrover1 | 371:8f7d2137727a | 116 | */ |
rgrover1 | 371:8f7d2137727a | 117 | static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end) |
rgrover1 | 371:8f7d2137727a | 118 | { |
rgrover1 | 371:8f7d2137727a | 119 | /*lint -e{845} // A zero has been given as right argument to operator '|'" */ |
rgrover1 | 371:8f7d2137727a | 120 | for (; pin_range_start <= pin_range_end; pin_range_start++) |
rgrover1 | 371:8f7d2137727a | 121 | { |
rgrover1 | 371:8f7d2137727a | 122 | NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
rgrover1 | 371:8f7d2137727a | 123 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
rgrover1 | 371:8f7d2137727a | 124 | | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
rgrover1 | 371:8f7d2137727a | 125 | | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
rgrover1 | 371:8f7d2137727a | 126 | | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); |
rgrover1 | 371:8f7d2137727a | 127 | } |
rgrover1 | 371:8f7d2137727a | 128 | } |
rgrover1 | 371:8f7d2137727a | 129 | |
rgrover1 | 371:8f7d2137727a | 130 | /** |
rgrover1 | 371:8f7d2137727a | 131 | * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details. |
rgrover1 | 371:8f7d2137727a | 132 | * This function can be used to configure pin range as simple input. |
rgrover1 | 371:8f7d2137727a | 133 | * |
rgrover1 | 371:8f7d2137727a | 134 | * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30) |
rgrover1 | 371:8f7d2137727a | 135 | * |
rgrover1 | 371:8f7d2137727a | 136 | * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30) |
rgrover1 | 371:8f7d2137727a | 137 | * |
rgrover1 | 371:8f7d2137727a | 138 | * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high) |
rgrover1 | 371:8f7d2137727a | 139 | * |
rgrover1 | 371:8f7d2137727a | 140 | * @note For configuring only one pin as input use @ref nrf_gpio_cfg_input |
rgrover1 | 371:8f7d2137727a | 141 | * Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable |
rgrover1 | 371:8f7d2137727a | 142 | */ |
rgrover1 | 371:8f7d2137727a | 143 | static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config) |
rgrover1 | 371:8f7d2137727a | 144 | { |
rgrover1 | 371:8f7d2137727a | 145 | /*lint -e{845} // A zero has been given as right argument to operator '|'" */ |
rgrover1 | 371:8f7d2137727a | 146 | for (; pin_range_start <= pin_range_end; pin_range_start++) |
rgrover1 | 371:8f7d2137727a | 147 | { |
rgrover1 | 371:8f7d2137727a | 148 | NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
rgrover1 | 371:8f7d2137727a | 149 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
rgrover1 | 371:8f7d2137727a | 150 | | (pull_config << GPIO_PIN_CNF_PULL_Pos) |
rgrover1 | 371:8f7d2137727a | 151 | | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
rgrover1 | 371:8f7d2137727a | 152 | | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); |
rgrover1 | 371:8f7d2137727a | 153 | } |
rgrover1 | 371:8f7d2137727a | 154 | } |
rgrover1 | 371:8f7d2137727a | 155 | |
rgrover1 | 371:8f7d2137727a | 156 | /** |
rgrover1 | 371:8f7d2137727a | 157 | * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details. |
rgrover1 | 371:8f7d2137727a | 158 | * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). |
rgrover1 | 371:8f7d2137727a | 159 | * |
rgrover1 | 371:8f7d2137727a | 160 | * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30) |
rgrover1 | 371:8f7d2137727a | 161 | * |
rgrover1 | 371:8f7d2137727a | 162 | * @note Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output. |
rgrover1 | 371:8f7d2137727a | 163 | */ |
rgrover1 | 371:8f7d2137727a | 164 | static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number) |
rgrover1 | 371:8f7d2137727a | 165 | { |
rgrover1 | 371:8f7d2137727a | 166 | /*lint -e{845} // A zero has been given as right argument to operator '|'" */ |
rgrover1 | 371:8f7d2137727a | 167 | NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
rgrover1 | 371:8f7d2137727a | 168 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
rgrover1 | 371:8f7d2137727a | 169 | | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
rgrover1 | 371:8f7d2137727a | 170 | | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
rgrover1 | 371:8f7d2137727a | 171 | | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); |
rgrover1 | 371:8f7d2137727a | 172 | } |
rgrover1 | 371:8f7d2137727a | 173 | |
rgrover1 | 371:8f7d2137727a | 174 | /** |
rgrover1 | 371:8f7d2137727a | 175 | * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details. |
rgrover1 | 371:8f7d2137727a | 176 | * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). |
rgrover1 | 371:8f7d2137727a | 177 | * |
rgrover1 | 371:8f7d2137727a | 178 | * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30) |
rgrover1 | 371:8f7d2137727a | 179 | * |
rgrover1 | 371:8f7d2137727a | 180 | * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high) |
rgrover1 | 371:8f7d2137727a | 181 | * |
rgrover1 | 371:8f7d2137727a | 182 | * @note Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable |
rgrover1 | 371:8f7d2137727a | 183 | */ |
rgrover1 | 371:8f7d2137727a | 184 | static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config) |
rgrover1 | 371:8f7d2137727a | 185 | { |
rgrover1 | 371:8f7d2137727a | 186 | /*lint -e{845} // A zero has been given as right argument to operator '|'" */ |
rgrover1 | 371:8f7d2137727a | 187 | NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
rgrover1 | 371:8f7d2137727a | 188 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
rgrover1 | 371:8f7d2137727a | 189 | | (pull_config << GPIO_PIN_CNF_PULL_Pos) |
rgrover1 | 371:8f7d2137727a | 190 | | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
rgrover1 | 371:8f7d2137727a | 191 | | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); |
rgrover1 | 371:8f7d2137727a | 192 | } |
rgrover1 | 371:8f7d2137727a | 193 | |
rgrover1 | 371:8f7d2137727a | 194 | /** |
rgrover1 | 371:8f7d2137727a | 195 | * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details. |
rgrover1 | 371:8f7d2137727a | 196 | * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases). |
rgrover1 | 371:8f7d2137727a | 197 | * Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable. |
rgrover1 | 371:8f7d2137727a | 198 | * |
rgrover1 | 371:8f7d2137727a | 199 | * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30). |
rgrover1 | 371:8f7d2137727a | 200 | * |
rgrover1 | 371:8f7d2137727a | 201 | * @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high). |
rgrover1 | 371:8f7d2137727a | 202 | * |
rgrover1 | 371:8f7d2137727a | 203 | * @param sense_config sense level of the pin (no sense, sense low or sense high). |
rgrover1 | 371:8f7d2137727a | 204 | */ |
rgrover1 | 371:8f7d2137727a | 205 | static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config) |
rgrover1 | 371:8f7d2137727a | 206 | { |
rgrover1 | 371:8f7d2137727a | 207 | /*lint -e{845} // A zero has been given as right argument to operator '|'" */ |
rgrover1 | 371:8f7d2137727a | 208 | NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos) |
rgrover1 | 371:8f7d2137727a | 209 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
rgrover1 | 371:8f7d2137727a | 210 | | (pull_config << GPIO_PIN_CNF_PULL_Pos) |
rgrover1 | 371:8f7d2137727a | 211 | | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
rgrover1 | 371:8f7d2137727a | 212 | | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); |
rgrover1 | 371:8f7d2137727a | 213 | } |
rgrover1 | 371:8f7d2137727a | 214 | |
rgrover1 | 371:8f7d2137727a | 215 | /** |
rgrover1 | 371:8f7d2137727a | 216 | * @brief Function for setting the direction for a GPIO pin. |
rgrover1 | 371:8f7d2137727a | 217 | * |
rgrover1 | 371:8f7d2137727a | 218 | * @param pin_number specifies the pin number [0:31] for which to |
rgrover1 | 371:8f7d2137727a | 219 | * set the direction. |
rgrover1 | 371:8f7d2137727a | 220 | * |
rgrover1 | 371:8f7d2137727a | 221 | * @param direction specifies the direction |
rgrover1 | 371:8f7d2137727a | 222 | */ |
rgrover1 | 371:8f7d2137727a | 223 | static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction) |
rgrover1 | 371:8f7d2137727a | 224 | { |
rgrover1 | 371:8f7d2137727a | 225 | if(direction == NRF_GPIO_PIN_DIR_INPUT) |
rgrover1 | 371:8f7d2137727a | 226 | { |
rgrover1 | 371:8f7d2137727a | 227 | NRF_GPIO->PIN_CNF[pin_number] = |
rgrover1 | 371:8f7d2137727a | 228 | (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) |
rgrover1 | 371:8f7d2137727a | 229 | | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) |
rgrover1 | 371:8f7d2137727a | 230 | | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
rgrover1 | 371:8f7d2137727a | 231 | | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
rgrover1 | 371:8f7d2137727a | 232 | | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); |
rgrover1 | 371:8f7d2137727a | 233 | } |
rgrover1 | 371:8f7d2137727a | 234 | else |
rgrover1 | 371:8f7d2137727a | 235 | { |
rgrover1 | 371:8f7d2137727a | 236 | NRF_GPIO->DIRSET = (1UL << pin_number); |
rgrover1 | 371:8f7d2137727a | 237 | } |
rgrover1 | 371:8f7d2137727a | 238 | } |
rgrover1 | 371:8f7d2137727a | 239 | |
rgrover1 | 371:8f7d2137727a | 240 | /** |
rgrover1 | 371:8f7d2137727a | 241 | * @brief Function for setting a GPIO pin. |
rgrover1 | 371:8f7d2137727a | 242 | * |
rgrover1 | 371:8f7d2137727a | 243 | * Note that the pin must be configured as an output for this |
rgrover1 | 371:8f7d2137727a | 244 | * function to have any effect. |
rgrover1 | 371:8f7d2137727a | 245 | * |
rgrover1 | 371:8f7d2137727a | 246 | * @param pin_number specifies the pin number [0:31] to |
rgrover1 | 371:8f7d2137727a | 247 | * set. |
rgrover1 | 371:8f7d2137727a | 248 | */ |
rgrover1 | 371:8f7d2137727a | 249 | static __INLINE void nrf_gpio_pin_set(uint32_t pin_number) |
rgrover1 | 371:8f7d2137727a | 250 | { |
rgrover1 | 371:8f7d2137727a | 251 | NRF_GPIO->OUTSET = (1UL << pin_number); |
rgrover1 | 371:8f7d2137727a | 252 | } |
rgrover1 | 371:8f7d2137727a | 253 | |
rgrover1 | 371:8f7d2137727a | 254 | /** |
rgrover1 | 371:8f7d2137727a | 255 | * @brief Function for clearing a GPIO pin. |
rgrover1 | 371:8f7d2137727a | 256 | * |
rgrover1 | 371:8f7d2137727a | 257 | * Note that the pin must be configured as an output for this |
rgrover1 | 371:8f7d2137727a | 258 | * function to have any effect. |
rgrover1 | 371:8f7d2137727a | 259 | * |
rgrover1 | 371:8f7d2137727a | 260 | * @param pin_number specifies the pin number [0:31] to |
rgrover1 | 371:8f7d2137727a | 261 | * clear. |
rgrover1 | 371:8f7d2137727a | 262 | */ |
rgrover1 | 371:8f7d2137727a | 263 | static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number) |
rgrover1 | 371:8f7d2137727a | 264 | { |
rgrover1 | 371:8f7d2137727a | 265 | NRF_GPIO->OUTCLR = (1UL << pin_number); |
rgrover1 | 371:8f7d2137727a | 266 | } |
rgrover1 | 371:8f7d2137727a | 267 | |
rgrover1 | 371:8f7d2137727a | 268 | /** |
rgrover1 | 371:8f7d2137727a | 269 | * @brief Function for toggling a GPIO pin. |
rgrover1 | 371:8f7d2137727a | 270 | * |
rgrover1 | 371:8f7d2137727a | 271 | * Note that the pin must be configured as an output for this |
rgrover1 | 371:8f7d2137727a | 272 | * function to have any effect. |
rgrover1 | 371:8f7d2137727a | 273 | * |
rgrover1 | 371:8f7d2137727a | 274 | * @param pin_number specifies the pin number [0:31] to |
rgrover1 | 371:8f7d2137727a | 275 | * toggle. |
rgrover1 | 371:8f7d2137727a | 276 | */ |
rgrover1 | 371:8f7d2137727a | 277 | static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number) |
rgrover1 | 371:8f7d2137727a | 278 | { |
rgrover1 | 371:8f7d2137727a | 279 | const uint32_t pin_bit = 1UL << pin_number; |
rgrover1 | 371:8f7d2137727a | 280 | const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL); |
rgrover1 | 371:8f7d2137727a | 281 | |
rgrover1 | 371:8f7d2137727a | 282 | if (pin_state == 0) |
rgrover1 | 371:8f7d2137727a | 283 | { |
rgrover1 | 371:8f7d2137727a | 284 | // Current state low, set high. |
rgrover1 | 371:8f7d2137727a | 285 | NRF_GPIO->OUTSET = pin_bit; |
rgrover1 | 371:8f7d2137727a | 286 | } |
rgrover1 | 371:8f7d2137727a | 287 | else |
rgrover1 | 371:8f7d2137727a | 288 | { |
rgrover1 | 371:8f7d2137727a | 289 | // Current state high, set low. |
rgrover1 | 371:8f7d2137727a | 290 | NRF_GPIO->OUTCLR = pin_bit; |
rgrover1 | 371:8f7d2137727a | 291 | } |
rgrover1 | 371:8f7d2137727a | 292 | } |
rgrover1 | 371:8f7d2137727a | 293 | |
rgrover1 | 371:8f7d2137727a | 294 | /** |
rgrover1 | 371:8f7d2137727a | 295 | * @brief Function for writing a value to a GPIO pin. |
rgrover1 | 371:8f7d2137727a | 296 | * |
rgrover1 | 371:8f7d2137727a | 297 | * Note that the pin must be configured as an output for this |
rgrover1 | 371:8f7d2137727a | 298 | * function to have any effect. |
rgrover1 | 371:8f7d2137727a | 299 | * |
rgrover1 | 371:8f7d2137727a | 300 | * @param pin_number specifies the pin number [0:31] to |
rgrover1 | 371:8f7d2137727a | 301 | * write. |
rgrover1 | 371:8f7d2137727a | 302 | * |
rgrover1 | 371:8f7d2137727a | 303 | * @param value specifies the value to be written to the pin. |
rgrover1 | 371:8f7d2137727a | 304 | * @arg 0 clears the pin |
rgrover1 | 371:8f7d2137727a | 305 | * @arg >=1 sets the pin. |
rgrover1 | 371:8f7d2137727a | 306 | */ |
rgrover1 | 371:8f7d2137727a | 307 | static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value) |
rgrover1 | 371:8f7d2137727a | 308 | { |
rgrover1 | 371:8f7d2137727a | 309 | if (value == 0) |
rgrover1 | 371:8f7d2137727a | 310 | { |
rgrover1 | 371:8f7d2137727a | 311 | nrf_gpio_pin_clear(pin_number); |
rgrover1 | 371:8f7d2137727a | 312 | } |
rgrover1 | 371:8f7d2137727a | 313 | else |
rgrover1 | 371:8f7d2137727a | 314 | { |
rgrover1 | 371:8f7d2137727a | 315 | nrf_gpio_pin_set(pin_number); |
rgrover1 | 371:8f7d2137727a | 316 | } |
rgrover1 | 371:8f7d2137727a | 317 | } |
rgrover1 | 371:8f7d2137727a | 318 | |
rgrover1 | 371:8f7d2137727a | 319 | /** |
rgrover1 | 371:8f7d2137727a | 320 | * @brief Function for reading the input level of a GPIO pin. |
rgrover1 | 371:8f7d2137727a | 321 | * |
rgrover1 | 371:8f7d2137727a | 322 | * Note that the pin must have input connected for the value |
rgrover1 | 371:8f7d2137727a | 323 | * returned from this function to be valid. |
rgrover1 | 371:8f7d2137727a | 324 | * |
rgrover1 | 371:8f7d2137727a | 325 | * @param pin_number specifies the pin number [0:31] to |
rgrover1 | 371:8f7d2137727a | 326 | * read. |
rgrover1 | 371:8f7d2137727a | 327 | * |
rgrover1 | 371:8f7d2137727a | 328 | * @return |
rgrover1 | 371:8f7d2137727a | 329 | * @retval 0 if the pin input level is low. |
rgrover1 | 371:8f7d2137727a | 330 | * @retval 1 if the pin input level is high. |
rgrover1 | 371:8f7d2137727a | 331 | * @retval > 1 should never occur. |
rgrover1 | 371:8f7d2137727a | 332 | */ |
rgrover1 | 371:8f7d2137727a | 333 | static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number) |
rgrover1 | 371:8f7d2137727a | 334 | { |
rgrover1 | 371:8f7d2137727a | 335 | return ((NRF_GPIO->IN >> pin_number) & 1UL); |
rgrover1 | 371:8f7d2137727a | 336 | } |
rgrover1 | 371:8f7d2137727a | 337 | |
rgrover1 | 371:8f7d2137727a | 338 | /** |
rgrover1 | 371:8f7d2137727a | 339 | * @brief Generic function for writing a single byte of a 32 bit word at a given |
rgrover1 | 371:8f7d2137727a | 340 | * address. |
rgrover1 | 371:8f7d2137727a | 341 | * |
rgrover1 | 371:8f7d2137727a | 342 | * This function should not be called from outside the nrf_gpio |
rgrover1 | 371:8f7d2137727a | 343 | * abstraction layer. |
rgrover1 | 371:8f7d2137727a | 344 | * |
rgrover1 | 371:8f7d2137727a | 345 | * @param word_address is the address of the word to be written. |
rgrover1 | 371:8f7d2137727a | 346 | * |
rgrover1 | 371:8f7d2137727a | 347 | * @param byte_no is the the word byte number (0-3) to be written. |
rgrover1 | 371:8f7d2137727a | 348 | * |
rgrover1 | 371:8f7d2137727a | 349 | * @param value is the value to be written to byte "byte_no" of word |
rgrover1 | 371:8f7d2137727a | 350 | * at address "word_address" |
rgrover1 | 371:8f7d2137727a | 351 | */ |
rgrover1 | 371:8f7d2137727a | 352 | static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value) |
rgrover1 | 371:8f7d2137727a | 353 | { |
rgrover1 | 371:8f7d2137727a | 354 | *((volatile uint8_t*)(word_address) + byte_no) = value; |
rgrover1 | 371:8f7d2137727a | 355 | } |
rgrover1 | 371:8f7d2137727a | 356 | |
rgrover1 | 371:8f7d2137727a | 357 | /** |
rgrover1 | 371:8f7d2137727a | 358 | * @brief Generic function for reading a single byte of a 32 bit word at a given |
rgrover1 | 371:8f7d2137727a | 359 | * address. |
rgrover1 | 371:8f7d2137727a | 360 | * |
rgrover1 | 371:8f7d2137727a | 361 | * This function should not be called from outside the nrf_gpio |
rgrover1 | 371:8f7d2137727a | 362 | * abstraction layer. |
rgrover1 | 371:8f7d2137727a | 363 | * |
rgrover1 | 371:8f7d2137727a | 364 | * @param word_address is the address of the word to be read. |
rgrover1 | 371:8f7d2137727a | 365 | * |
rgrover1 | 371:8f7d2137727a | 366 | * @param byte_no is the the byte number (0-3) of the word to be read. |
rgrover1 | 371:8f7d2137727a | 367 | * |
rgrover1 | 371:8f7d2137727a | 368 | * @return byte "byte_no" of word at address "word_address". |
rgrover1 | 371:8f7d2137727a | 369 | */ |
rgrover1 | 371:8f7d2137727a | 370 | static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no) |
rgrover1 | 371:8f7d2137727a | 371 | { |
rgrover1 | 371:8f7d2137727a | 372 | return (*((const volatile uint8_t*)(word_address) + byte_no)); |
rgrover1 | 371:8f7d2137727a | 373 | } |
rgrover1 | 371:8f7d2137727a | 374 | |
rgrover1 | 371:8f7d2137727a | 375 | /** |
rgrover1 | 371:8f7d2137727a | 376 | * @brief Function for setting the direction of a port. |
rgrover1 | 371:8f7d2137727a | 377 | * |
rgrover1 | 371:8f7d2137727a | 378 | * @param port is the port for which to set the direction. |
rgrover1 | 371:8f7d2137727a | 379 | * |
rgrover1 | 371:8f7d2137727a | 380 | * @param dir direction to be set for this port. |
rgrover1 | 371:8f7d2137727a | 381 | */ |
rgrover1 | 371:8f7d2137727a | 382 | static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir) |
rgrover1 | 371:8f7d2137727a | 383 | { |
rgrover1 | 371:8f7d2137727a | 384 | if (dir == NRF_GPIO_PORT_DIR_OUTPUT) |
rgrover1 | 371:8f7d2137727a | 385 | { |
rgrover1 | 371:8f7d2137727a | 386 | nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF); |
rgrover1 | 371:8f7d2137727a | 387 | } |
rgrover1 | 371:8f7d2137727a | 388 | else |
rgrover1 | 371:8f7d2137727a | 389 | { |
rgrover1 | 371:8f7d2137727a | 390 | nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL); |
rgrover1 | 371:8f7d2137727a | 391 | } |
rgrover1 | 371:8f7d2137727a | 392 | } |
rgrover1 | 371:8f7d2137727a | 393 | |
rgrover1 | 371:8f7d2137727a | 394 | /** |
rgrover1 | 371:8f7d2137727a | 395 | * @brief Function for reading a GPIO port. |
rgrover1 | 371:8f7d2137727a | 396 | * |
rgrover1 | 371:8f7d2137727a | 397 | * @param port is the port to read. |
rgrover1 | 371:8f7d2137727a | 398 | * |
rgrover1 | 371:8f7d2137727a | 399 | * @return the input value on this port. |
rgrover1 | 371:8f7d2137727a | 400 | */ |
rgrover1 | 371:8f7d2137727a | 401 | static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port) |
rgrover1 | 371:8f7d2137727a | 402 | { |
rgrover1 | 371:8f7d2137727a | 403 | return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port); |
rgrover1 | 371:8f7d2137727a | 404 | } |
rgrover1 | 371:8f7d2137727a | 405 | |
rgrover1 | 371:8f7d2137727a | 406 | /** |
rgrover1 | 371:8f7d2137727a | 407 | * @brief Function for writing to a GPIO port. |
rgrover1 | 371:8f7d2137727a | 408 | * |
rgrover1 | 371:8f7d2137727a | 409 | * @param port is the port to write. |
rgrover1 | 371:8f7d2137727a | 410 | * |
rgrover1 | 371:8f7d2137727a | 411 | * @param value is the value to write to this port. |
rgrover1 | 371:8f7d2137727a | 412 | * |
rgrover1 | 371:8f7d2137727a | 413 | * @sa nrf_gpio_port_dir_set() |
rgrover1 | 371:8f7d2137727a | 414 | */ |
rgrover1 | 371:8f7d2137727a | 415 | static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value) |
rgrover1 | 371:8f7d2137727a | 416 | { |
rgrover1 | 371:8f7d2137727a | 417 | nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value); |
rgrover1 | 371:8f7d2137727a | 418 | } |
rgrover1 | 371:8f7d2137727a | 419 | |
rgrover1 | 371:8f7d2137727a | 420 | /** |
rgrover1 | 371:8f7d2137727a | 421 | * @brief Function for setting individual pins on GPIO port. |
rgrover1 | 371:8f7d2137727a | 422 | * |
rgrover1 | 371:8f7d2137727a | 423 | * @param port is the port for which to set the pins. |
rgrover1 | 371:8f7d2137727a | 424 | * |
rgrover1 | 371:8f7d2137727a | 425 | * @param set_mask is a mask specifying which pins to set. A bit |
rgrover1 | 371:8f7d2137727a | 426 | * set to 1 indicates that the corresponding port pin shall be |
rgrover1 | 371:8f7d2137727a | 427 | * set. |
rgrover1 | 371:8f7d2137727a | 428 | * |
rgrover1 | 371:8f7d2137727a | 429 | * @sa nrf_gpio_port_dir_set() |
rgrover1 | 371:8f7d2137727a | 430 | */ |
rgrover1 | 371:8f7d2137727a | 431 | static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask) |
rgrover1 | 371:8f7d2137727a | 432 | { |
rgrover1 | 371:8f7d2137727a | 433 | nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask); |
rgrover1 | 371:8f7d2137727a | 434 | } |
rgrover1 | 371:8f7d2137727a | 435 | |
rgrover1 | 371:8f7d2137727a | 436 | /** |
rgrover1 | 371:8f7d2137727a | 437 | * @brief Function for clearing individual pins on GPIO port. |
rgrover1 | 371:8f7d2137727a | 438 | * |
rgrover1 | 371:8f7d2137727a | 439 | * @param port is the port for which to clear the pins. |
rgrover1 | 371:8f7d2137727a | 440 | * |
rgrover1 | 371:8f7d2137727a | 441 | * @param clr_mask is a mask specifying which pins to clear. A bit |
rgrover1 | 371:8f7d2137727a | 442 | * set to 1 indicates that the corresponding port pin shall be |
rgrover1 | 371:8f7d2137727a | 443 | * cleared. |
rgrover1 | 371:8f7d2137727a | 444 | * |
rgrover1 | 371:8f7d2137727a | 445 | * @sa nrf_gpio_port_dir_set() |
rgrover1 | 371:8f7d2137727a | 446 | */ |
rgrover1 | 371:8f7d2137727a | 447 | static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask) |
rgrover1 | 371:8f7d2137727a | 448 | { |
rgrover1 | 371:8f7d2137727a | 449 | nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask); |
rgrover1 | 371:8f7d2137727a | 450 | } |
rgrover1 | 371:8f7d2137727a | 451 | |
rgrover1 | 371:8f7d2137727a | 452 | /** @} */ |
rgrover1 | 371:8f7d2137727a | 453 | |
rgrover1 | 371:8f7d2137727a | 454 | #endif |