1

Fork of nRF51822 by Nordic Semiconductor

Committer:
rgrover1
Date:
Fri Jun 19 15:55:34 2015 +0100
Revision:
343:6675661fa600
Parent:
103:138bdc859cc9
Child:
345:dfde56236c36
Synchronized with git rev 6d1bf116
Author: Rohit Grover
fix #1: update license headers for all sources obtained from nordic-SDK using a new template obtained from Nordic.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rgrover1 343:6675661fa600 1 /*
rgrover1 343:6675661fa600 2 * Copyright (c) Nordic Semiconductor ASA
rgrover1 343:6675661fa600 3 * All rights reserved.
rgrover1 343:6675661fa600 4 *
rgrover1 343:6675661fa600 5 * Redistribution and use in source and binary forms, with or without modification,
rgrover1 343:6675661fa600 6 * are permitted provided that the following conditions are met:
rgrover1 343:6675661fa600 7 *
rgrover1 343:6675661fa600 8 * 1. Redistributions of source code must retain the above copyright notice, this
rgrover1 343:6675661fa600 9 * list of conditions and the following disclaimer.
rgrover1 343:6675661fa600 10 *
rgrover1 343:6675661fa600 11 * 2. Redistributions in binary form must reproduce the above copyright notice, this
rgrover1 343:6675661fa600 12 * list of conditions and the following disclaimer in the documentation and/or
rgrover1 343:6675661fa600 13 * other materials provided with the distribution.
rgrover1 343:6675661fa600 14 *
rgrover1 343:6675661fa600 15 * 3. Neither the name of Nordic Semiconductor ASA nor the names of other
rgrover1 343:6675661fa600 16 * contributors to this software may be used to endorse or promote products
rgrover1 343:6675661fa600 17 * derived from this software without specific prior written permission.
rgrover1 343:6675661fa600 18 *
rgrover1 343:6675661fa600 19 *
rgrover1 343:6675661fa600 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
rgrover1 343:6675661fa600 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
rgrover1 343:6675661fa600 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
rgrover1 343:6675661fa600 23 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
rgrover1 343:6675661fa600 24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
rgrover1 343:6675661fa600 25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
rgrover1 343:6675661fa600 26 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
rgrover1 343:6675661fa600 27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
rgrover1 343:6675661fa600 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
rgrover1 343:6675661fa600 29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
rgrover1 343:6675661fa600 30 *
rgrover1 343:6675661fa600 31 */
rgrover1 343:6675661fa600 32
rgrover1 343:6675661fa600 33 #ifndef NRF_GPIO_H__
rgrover1 343:6675661fa600 34 #define NRF_GPIO_H__
rgrover1 343:6675661fa600 35
rgrover1 343:6675661fa600 36 #include "nrf51.h"
rgrover1 343:6675661fa600 37 #include "nrf51_bitfields.h"
rgrover1 343:6675661fa600 38
rgrover1 343:6675661fa600 39 /**
rgrover1 343:6675661fa600 40 * @defgroup nrf_gpio GPIO abstraction
rgrover1 343:6675661fa600 41 * @{
rgrover1 343:6675661fa600 42 * @ingroup nrf_drivers
rgrover1 343:6675661fa600 43 * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
rgrover1 343:6675661fa600 44 *
rgrover1 343:6675661fa600 45 * Here, the GPIO ports are defined as follows:
rgrover1 343:6675661fa600 46 * - Port 0 -> pin 0-7
rgrover1 343:6675661fa600 47 * - Port 1 -> pin 8-15
rgrover1 343:6675661fa600 48 * - Port 2 -> pin 16-23
rgrover1 343:6675661fa600 49 * - Port 3 -> pin 24-31
rgrover1 343:6675661fa600 50 */
rgrover1 343:6675661fa600 51
rgrover1 343:6675661fa600 52 /**
rgrover1 343:6675661fa600 53 * @enum nrf_gpio_port_dir_t
rgrover1 343:6675661fa600 54 * @brief Enumerator used for setting the direction of a GPIO port.
rgrover1 343:6675661fa600 55 */
rgrover1 343:6675661fa600 56 typedef enum
rgrover1 343:6675661fa600 57 {
rgrover1 343:6675661fa600 58 NRF_GPIO_PORT_DIR_OUTPUT, ///< Output
rgrover1 343:6675661fa600 59 NRF_GPIO_PORT_DIR_INPUT ///< Input
rgrover1 343:6675661fa600 60 } nrf_gpio_port_dir_t;
rgrover1 343:6675661fa600 61
rgrover1 343:6675661fa600 62 /**
rgrover1 343:6675661fa600 63 * @enum nrf_gpio_pin_dir_t
rgrover1 343:6675661fa600 64 * Pin direction definitions.
rgrover1 343:6675661fa600 65 */
rgrover1 343:6675661fa600 66 typedef enum
rgrover1 343:6675661fa600 67 {
rgrover1 343:6675661fa600 68 NRF_GPIO_PIN_DIR_INPUT, ///< Input
rgrover1 343:6675661fa600 69 NRF_GPIO_PIN_DIR_OUTPUT ///< Output
rgrover1 343:6675661fa600 70 } nrf_gpio_pin_dir_t;
rgrover1 343:6675661fa600 71
rgrover1 343:6675661fa600 72 /**
rgrover1 343:6675661fa600 73 * @enum nrf_gpio_port_select_t
rgrover1 343:6675661fa600 74 * @brief Enumerator used for selecting between port 0 - 3.
rgrover1 343:6675661fa600 75 */
rgrover1 343:6675661fa600 76 typedef enum
rgrover1 343:6675661fa600 77 {
rgrover1 343:6675661fa600 78 NRF_GPIO_PORT_SELECT_PORT0 = 0, ///< Port 0 (GPIO pin 0-7)
rgrover1 343:6675661fa600 79 NRF_GPIO_PORT_SELECT_PORT1, ///< Port 1 (GPIO pin 8-15)
rgrover1 343:6675661fa600 80 NRF_GPIO_PORT_SELECT_PORT2, ///< Port 2 (GPIO pin 16-23)
rgrover1 343:6675661fa600 81 NRF_GPIO_PORT_SELECT_PORT3, ///< Port 3 (GPIO pin 24-31)
rgrover1 343:6675661fa600 82 } nrf_gpio_port_select_t;
rgrover1 343:6675661fa600 83
rgrover1 343:6675661fa600 84 /**
rgrover1 343:6675661fa600 85 * @enum nrf_gpio_pin_pull_t
rgrover1 343:6675661fa600 86 * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
rgrover1 343:6675661fa600 87 */
rgrover1 343:6675661fa600 88 typedef enum
rgrover1 343:6675661fa600 89 {
rgrover1 343:6675661fa600 90 NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pullup resistor disabled
rgrover1 343:6675661fa600 91 NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pulldown resistor enabled
rgrover1 343:6675661fa600 92 NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pullup resistor enabled
rgrover1 343:6675661fa600 93 } nrf_gpio_pin_pull_t;
rgrover1 343:6675661fa600 94
rgrover1 343:6675661fa600 95 /**
rgrover1 343:6675661fa600 96 * @enum nrf_gpio_pin_sense_t
rgrover1 343:6675661fa600 97 * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
rgrover1 343:6675661fa600 98 */
rgrover1 343:6675661fa600 99 typedef enum
rgrover1 343:6675661fa600 100 {
rgrover1 343:6675661fa600 101 NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
rgrover1 343:6675661fa600 102 NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
rgrover1 343:6675661fa600 103 NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
rgrover1 343:6675661fa600 104 } nrf_gpio_pin_sense_t;
rgrover1 343:6675661fa600 105
rgrover1 343:6675661fa600 106 /**
rgrover1 343:6675661fa600 107 * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
rgrover1 343:6675661fa600 108 * This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 343:6675661fa600 109 *
rgrover1 343:6675661fa600 110 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 343:6675661fa600 111 *
rgrover1 343:6675661fa600 112 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 343:6675661fa600 113 *
rgrover1 343:6675661fa600 114 * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
rgrover1 343:6675661fa600 115 * Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 343:6675661fa600 116 */
rgrover1 343:6675661fa600 117 static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
rgrover1 343:6675661fa600 118 {
rgrover1 343:6675661fa600 119 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 343:6675661fa600 120 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 343:6675661fa600 121 {
rgrover1 343:6675661fa600 122 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 343:6675661fa600 123 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 343:6675661fa600 124 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 343:6675661fa600 125 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 343:6675661fa600 126 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 343:6675661fa600 127 }
rgrover1 343:6675661fa600 128 }
rgrover1 343:6675661fa600 129
rgrover1 343:6675661fa600 130 /**
rgrover1 343:6675661fa600 131 * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
rgrover1 343:6675661fa600 132 * This function can be used to configure pin range as simple input.
rgrover1 343:6675661fa600 133 *
rgrover1 343:6675661fa600 134 * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 343:6675661fa600 135 *
rgrover1 343:6675661fa600 136 * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
rgrover1 343:6675661fa600 137 *
rgrover1 343:6675661fa600 138 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 343:6675661fa600 139 *
rgrover1 343:6675661fa600 140 * @note For configuring only one pin as input use @ref nrf_gpio_cfg_input
rgrover1 343:6675661fa600 141 * Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 343:6675661fa600 142 */
rgrover1 343:6675661fa600 143 static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
rgrover1 343:6675661fa600 144 {
rgrover1 343:6675661fa600 145 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 343:6675661fa600 146 for (; pin_range_start <= pin_range_end; pin_range_start++)
rgrover1 343:6675661fa600 147 {
rgrover1 343:6675661fa600 148 NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 343:6675661fa600 149 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 343:6675661fa600 150 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 343:6675661fa600 151 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 343:6675661fa600 152 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 343:6675661fa600 153 }
rgrover1 343:6675661fa600 154 }
rgrover1 343:6675661fa600 155
rgrover1 343:6675661fa600 156 /**
rgrover1 343:6675661fa600 157 * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
rgrover1 343:6675661fa600 158 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 343:6675661fa600 159 *
rgrover1 343:6675661fa600 160 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 343:6675661fa600 161 *
rgrover1 343:6675661fa600 162 * @note Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
rgrover1 343:6675661fa600 163 */
rgrover1 343:6675661fa600 164 static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
rgrover1 343:6675661fa600 165 {
rgrover1 343:6675661fa600 166 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 343:6675661fa600 167 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 343:6675661fa600 168 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 343:6675661fa600 169 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 343:6675661fa600 170 | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 343:6675661fa600 171 | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
rgrover1 343:6675661fa600 172 }
rgrover1 343:6675661fa600 173
rgrover1 343:6675661fa600 174 /**
rgrover1 343:6675661fa600 175 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 343:6675661fa600 176 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 343:6675661fa600 177 *
rgrover1 343:6675661fa600 178 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
rgrover1 343:6675661fa600 179 *
rgrover1 343:6675661fa600 180 * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
rgrover1 343:6675661fa600 181 *
rgrover1 343:6675661fa600 182 * @note Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
rgrover1 343:6675661fa600 183 */
rgrover1 343:6675661fa600 184 static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
rgrover1 343:6675661fa600 185 {
rgrover1 343:6675661fa600 186 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 343:6675661fa600 187 NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 343:6675661fa600 188 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 343:6675661fa600 189 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 343:6675661fa600 190 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 343:6675661fa600 191 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 343:6675661fa600 192 }
rgrover1 343:6675661fa600 193
rgrover1 343:6675661fa600 194 /**
rgrover1 343:6675661fa600 195 * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
rgrover1 343:6675661fa600 196 * This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
rgrover1 343:6675661fa600 197 * Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
rgrover1 343:6675661fa600 198 *
rgrover1 343:6675661fa600 199 * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
rgrover1 343:6675661fa600 200 *
rgrover1 343:6675661fa600 201 * @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high).
rgrover1 343:6675661fa600 202 *
rgrover1 343:6675661fa600 203 * @param sense_config sense level of the pin (no sense, sense low or sense high).
rgrover1 343:6675661fa600 204 */
rgrover1 343:6675661fa600 205 static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
rgrover1 343:6675661fa600 206 {
rgrover1 343:6675661fa600 207 /*lint -e{845} // A zero has been given as right argument to operator '|'" */
rgrover1 343:6675661fa600 208 NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 343:6675661fa600 209 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 343:6675661fa600 210 | (pull_config << GPIO_PIN_CNF_PULL_Pos)
rgrover1 343:6675661fa600 211 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 343:6675661fa600 212 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 343:6675661fa600 213 }
rgrover1 343:6675661fa600 214
rgrover1 343:6675661fa600 215 /**
rgrover1 343:6675661fa600 216 * @brief Function for setting the direction for a GPIO pin.
rgrover1 343:6675661fa600 217 *
rgrover1 343:6675661fa600 218 * @param pin_number specifies the pin number [0:31] for which to
rgrover1 343:6675661fa600 219 * set the direction.
rgrover1 343:6675661fa600 220 *
rgrover1 343:6675661fa600 221 * @param direction specifies the direction
rgrover1 343:6675661fa600 222 */
rgrover1 343:6675661fa600 223 static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
rgrover1 343:6675661fa600 224 {
rgrover1 343:6675661fa600 225 if(direction == NRF_GPIO_PIN_DIR_INPUT)
rgrover1 343:6675661fa600 226 {
rgrover1 343:6675661fa600 227 NRF_GPIO->PIN_CNF[pin_number] =
rgrover1 343:6675661fa600 228 (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
rgrover1 343:6675661fa600 229 | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
rgrover1 343:6675661fa600 230 | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
rgrover1 343:6675661fa600 231 | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
rgrover1 343:6675661fa600 232 | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
rgrover1 343:6675661fa600 233 }
rgrover1 343:6675661fa600 234 else
rgrover1 343:6675661fa600 235 {
rgrover1 343:6675661fa600 236 NRF_GPIO->DIRSET = (1UL << pin_number);
rgrover1 343:6675661fa600 237 }
rgrover1 343:6675661fa600 238 }
rgrover1 343:6675661fa600 239
rgrover1 343:6675661fa600 240 /**
rgrover1 343:6675661fa600 241 * @brief Function for setting a GPIO pin.
rgrover1 343:6675661fa600 242 *
rgrover1 343:6675661fa600 243 * Note that the pin must be configured as an output for this
rgrover1 343:6675661fa600 244 * function to have any effect.
rgrover1 343:6675661fa600 245 *
rgrover1 343:6675661fa600 246 * @param pin_number specifies the pin number [0:31] to
rgrover1 343:6675661fa600 247 * set.
rgrover1 343:6675661fa600 248 */
rgrover1 343:6675661fa600 249 static __INLINE void nrf_gpio_pin_set(uint32_t pin_number)
rgrover1 343:6675661fa600 250 {
rgrover1 343:6675661fa600 251 NRF_GPIO->OUTSET = (1UL << pin_number);
rgrover1 343:6675661fa600 252 }
rgrover1 343:6675661fa600 253
rgrover1 343:6675661fa600 254 /**
rgrover1 343:6675661fa600 255 * @brief Function for clearing a GPIO pin.
rgrover1 343:6675661fa600 256 *
rgrover1 343:6675661fa600 257 * Note that the pin must be configured as an output for this
rgrover1 343:6675661fa600 258 * function to have any effect.
rgrover1 343:6675661fa600 259 *
rgrover1 343:6675661fa600 260 * @param pin_number specifies the pin number [0:31] to
rgrover1 343:6675661fa600 261 * clear.
rgrover1 343:6675661fa600 262 */
rgrover1 343:6675661fa600 263 static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
rgrover1 343:6675661fa600 264 {
rgrover1 343:6675661fa600 265 NRF_GPIO->OUTCLR = (1UL << pin_number);
rgrover1 343:6675661fa600 266 }
rgrover1 343:6675661fa600 267
rgrover1 343:6675661fa600 268 /**
rgrover1 343:6675661fa600 269 * @brief Function for toggling a GPIO pin.
rgrover1 343:6675661fa600 270 *
rgrover1 343:6675661fa600 271 * Note that the pin must be configured as an output for this
rgrover1 343:6675661fa600 272 * function to have any effect.
rgrover1 343:6675661fa600 273 *
rgrover1 343:6675661fa600 274 * @param pin_number specifies the pin number [0:31] to
rgrover1 343:6675661fa600 275 * toggle.
rgrover1 343:6675661fa600 276 */
rgrover1 343:6675661fa600 277 static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
rgrover1 343:6675661fa600 278 {
rgrover1 343:6675661fa600 279 const uint32_t pin_bit = 1UL << pin_number;
rgrover1 343:6675661fa600 280 const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL);
rgrover1 343:6675661fa600 281
rgrover1 343:6675661fa600 282 if (pin_state == 0)
rgrover1 343:6675661fa600 283 {
rgrover1 343:6675661fa600 284 // Current state low, set high.
rgrover1 343:6675661fa600 285 NRF_GPIO->OUTSET = pin_bit;
rgrover1 343:6675661fa600 286 }
rgrover1 343:6675661fa600 287 else
rgrover1 343:6675661fa600 288 {
rgrover1 343:6675661fa600 289 // Current state high, set low.
rgrover1 343:6675661fa600 290 NRF_GPIO->OUTCLR = pin_bit;
rgrover1 343:6675661fa600 291 }
rgrover1 343:6675661fa600 292 }
rgrover1 343:6675661fa600 293
rgrover1 343:6675661fa600 294 /**
rgrover1 343:6675661fa600 295 * @brief Function for writing a value to a GPIO pin.
rgrover1 343:6675661fa600 296 *
rgrover1 343:6675661fa600 297 * Note that the pin must be configured as an output for this
rgrover1 343:6675661fa600 298 * function to have any effect.
rgrover1 343:6675661fa600 299 *
rgrover1 343:6675661fa600 300 * @param pin_number specifies the pin number [0:31] to
rgrover1 343:6675661fa600 301 * write.
rgrover1 343:6675661fa600 302 *
rgrover1 343:6675661fa600 303 * @param value specifies the value to be written to the pin.
rgrover1 343:6675661fa600 304 * @arg 0 clears the pin
rgrover1 343:6675661fa600 305 * @arg >=1 sets the pin.
rgrover1 343:6675661fa600 306 */
rgrover1 343:6675661fa600 307 static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
rgrover1 343:6675661fa600 308 {
rgrover1 343:6675661fa600 309 if (value == 0)
rgrover1 343:6675661fa600 310 {
rgrover1 343:6675661fa600 311 nrf_gpio_pin_clear(pin_number);
rgrover1 343:6675661fa600 312 }
rgrover1 343:6675661fa600 313 else
rgrover1 343:6675661fa600 314 {
rgrover1 343:6675661fa600 315 nrf_gpio_pin_set(pin_number);
rgrover1 343:6675661fa600 316 }
rgrover1 343:6675661fa600 317 }
rgrover1 343:6675661fa600 318
rgrover1 343:6675661fa600 319 /**
rgrover1 343:6675661fa600 320 * @brief Function for reading the input level of a GPIO pin.
rgrover1 343:6675661fa600 321 *
rgrover1 343:6675661fa600 322 * Note that the pin must have input connected for the value
rgrover1 343:6675661fa600 323 * returned from this function to be valid.
rgrover1 343:6675661fa600 324 *
rgrover1 343:6675661fa600 325 * @param pin_number specifies the pin number [0:31] to
rgrover1 343:6675661fa600 326 * read.
rgrover1 343:6675661fa600 327 *
rgrover1 343:6675661fa600 328 * @return
rgrover1 343:6675661fa600 329 * @retval 0 if the pin input level is low.
rgrover1 343:6675661fa600 330 * @retval 1 if the pin input level is high.
rgrover1 343:6675661fa600 331 * @retval > 1 should never occur.
rgrover1 343:6675661fa600 332 */
rgrover1 343:6675661fa600 333 static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
rgrover1 343:6675661fa600 334 {
rgrover1 343:6675661fa600 335 return ((NRF_GPIO->IN >> pin_number) & 1UL);
rgrover1 343:6675661fa600 336 }
rgrover1 343:6675661fa600 337
rgrover1 343:6675661fa600 338 /**
rgrover1 343:6675661fa600 339 * @brief Generic function for writing a single byte of a 32 bit word at a given
rgrover1 343:6675661fa600 340 * address.
rgrover1 343:6675661fa600 341 *
rgrover1 343:6675661fa600 342 * This function should not be called from outside the nrf_gpio
rgrover1 343:6675661fa600 343 * abstraction layer.
rgrover1 343:6675661fa600 344 *
rgrover1 343:6675661fa600 345 * @param word_address is the address of the word to be written.
rgrover1 343:6675661fa600 346 *
rgrover1 343:6675661fa600 347 * @param byte_no is the the word byte number (0-3) to be written.
rgrover1 343:6675661fa600 348 *
rgrover1 343:6675661fa600 349 * @param value is the value to be written to byte "byte_no" of word
rgrover1 343:6675661fa600 350 * at address "word_address"
rgrover1 343:6675661fa600 351 */
rgrover1 343:6675661fa600 352 static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
rgrover1 343:6675661fa600 353 {
rgrover1 343:6675661fa600 354 *((volatile uint8_t*)(word_address) + byte_no) = value;
rgrover1 343:6675661fa600 355 }
rgrover1 343:6675661fa600 356
rgrover1 343:6675661fa600 357 /**
rgrover1 343:6675661fa600 358 * @brief Generic function for reading a single byte of a 32 bit word at a given
rgrover1 343:6675661fa600 359 * address.
rgrover1 343:6675661fa600 360 *
rgrover1 343:6675661fa600 361 * This function should not be called from outside the nrf_gpio
rgrover1 343:6675661fa600 362 * abstraction layer.
rgrover1 343:6675661fa600 363 *
rgrover1 343:6675661fa600 364 * @param word_address is the address of the word to be read.
rgrover1 343:6675661fa600 365 *
rgrover1 343:6675661fa600 366 * @param byte_no is the the byte number (0-3) of the word to be read.
rgrover1 343:6675661fa600 367 *
rgrover1 343:6675661fa600 368 * @return byte "byte_no" of word at address "word_address".
rgrover1 343:6675661fa600 369 */
rgrover1 343:6675661fa600 370 static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
rgrover1 343:6675661fa600 371 {
rgrover1 343:6675661fa600 372 return (*((const volatile uint8_t*)(word_address) + byte_no));
rgrover1 343:6675661fa600 373 }
rgrover1 343:6675661fa600 374
rgrover1 343:6675661fa600 375 /**
rgrover1 343:6675661fa600 376 * @brief Function for setting the direction of a port.
rgrover1 343:6675661fa600 377 *
rgrover1 343:6675661fa600 378 * @param port is the port for which to set the direction.
rgrover1 343:6675661fa600 379 *
rgrover1 343:6675661fa600 380 * @param dir direction to be set for this port.
rgrover1 343:6675661fa600 381 */
rgrover1 343:6675661fa600 382 static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
rgrover1 343:6675661fa600 383 {
rgrover1 343:6675661fa600 384 if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
rgrover1 343:6675661fa600 385 {
rgrover1 343:6675661fa600 386 nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
rgrover1 343:6675661fa600 387 }
rgrover1 343:6675661fa600 388 else
rgrover1 343:6675661fa600 389 {
rgrover1 343:6675661fa600 390 nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
rgrover1 343:6675661fa600 391 }
rgrover1 343:6675661fa600 392 }
rgrover1 343:6675661fa600 393
rgrover1 343:6675661fa600 394 /**
rgrover1 343:6675661fa600 395 * @brief Function for reading a GPIO port.
rgrover1 343:6675661fa600 396 *
rgrover1 343:6675661fa600 397 * @param port is the port to read.
rgrover1 343:6675661fa600 398 *
rgrover1 343:6675661fa600 399 * @return the input value on this port.
rgrover1 343:6675661fa600 400 */
rgrover1 343:6675661fa600 401 static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
rgrover1 343:6675661fa600 402 {
rgrover1 343:6675661fa600 403 return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
rgrover1 343:6675661fa600 404 }
rgrover1 343:6675661fa600 405
rgrover1 343:6675661fa600 406 /**
rgrover1 343:6675661fa600 407 * @brief Function for writing to a GPIO port.
rgrover1 343:6675661fa600 408 *
rgrover1 343:6675661fa600 409 * @param port is the port to write.
rgrover1 343:6675661fa600 410 *
rgrover1 343:6675661fa600 411 * @param value is the value to write to this port.
rgrover1 343:6675661fa600 412 *
rgrover1 343:6675661fa600 413 * @sa nrf_gpio_port_dir_set()
rgrover1 343:6675661fa600 414 */
rgrover1 343:6675661fa600 415 static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
rgrover1 343:6675661fa600 416 {
rgrover1 343:6675661fa600 417 nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
rgrover1 343:6675661fa600 418 }
rgrover1 343:6675661fa600 419
rgrover1 343:6675661fa600 420 /**
rgrover1 343:6675661fa600 421 * @brief Function for setting individual pins on GPIO port.
rgrover1 343:6675661fa600 422 *
rgrover1 343:6675661fa600 423 * @param port is the port for which to set the pins.
rgrover1 343:6675661fa600 424 *
rgrover1 343:6675661fa600 425 * @param set_mask is a mask specifying which pins to set. A bit
rgrover1 343:6675661fa600 426 * set to 1 indicates that the corresponding port pin shall be
rgrover1 343:6675661fa600 427 * set.
rgrover1 343:6675661fa600 428 *
rgrover1 343:6675661fa600 429 * @sa nrf_gpio_port_dir_set()
rgrover1 343:6675661fa600 430 */
rgrover1 343:6675661fa600 431 static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
rgrover1 343:6675661fa600 432 {
rgrover1 343:6675661fa600 433 nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
rgrover1 343:6675661fa600 434 }
rgrover1 343:6675661fa600 435
rgrover1 343:6675661fa600 436 /**
rgrover1 343:6675661fa600 437 * @brief Function for clearing individual pins on GPIO port.
rgrover1 343:6675661fa600 438 *
rgrover1 343:6675661fa600 439 * @param port is the port for which to clear the pins.
rgrover1 343:6675661fa600 440 *
rgrover1 343:6675661fa600 441 * @param clr_mask is a mask specifying which pins to clear. A bit
rgrover1 343:6675661fa600 442 * set to 1 indicates that the corresponding port pin shall be
rgrover1 343:6675661fa600 443 * cleared.
rgrover1 343:6675661fa600 444 *
rgrover1 343:6675661fa600 445 * @sa nrf_gpio_port_dir_set()
rgrover1 343:6675661fa600 446 */
rgrover1 343:6675661fa600 447 static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
rgrover1 343:6675661fa600 448 {
rgrover1 343:6675661fa600 449 nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
rgrover1 343:6675661fa600 450 }
rgrover1 343:6675661fa600 451
rgrover1 343:6675661fa600 452 /** @} */
rgrover1 343:6675661fa600 453
rgrover1 343:6675661fa600 454 #endif