David Lowe / Nucleo_Hello_Encoder

Hello World example for interfacing up to four rotary encoders to the STM32's timer/counter hardware, without interrupts.

Dependencies:   mbed-dev

Encoder/EncoderMspInitL1.cpp@1:cd7b42c99ff8, 2015-10-04 (annotated)

Committer:
gregeric
Date:
Sun Oct 04 11:58:58 2015 +0000
Revision:
1:cd7b42c99ff8
Added more targets, use HAL macros to read counter value & direction.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gregeric 1:cd7b42c99ff8 1 #include "mbed.h"
gregeric 1:cd7b42c99ff8 2 /*
gregeric 1:cd7b42c99ff8 3 * HAL_TIM_Encoder_MspInit()
gregeric 1:cd7b42c99ff8 4 * Overrides the __weak function stub in stm32l4xx_hal_tim.h
gregeric 1:cd7b42c99ff8 5 *
gregeric 1:cd7b42c99ff8 6 * Edit the below for your preferred pin wiring & pullup/down
gregeric 1:cd7b42c99ff8 7 * I have encoder common at 3V3, using GPIO_PULLDOWN on inputs.
gregeric 1:cd7b42c99ff8 8 * Encoder A&B outputs connected directly to GPIOs.
gregeric 1:cd7b42c99ff8 9 *
gregeric 1:cd7b42c99ff8 10 * http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00098321.pdf
gregeric 1:cd7b42c99ff8 11 * Table 9 has GPIO alternate function pinout mappings.
gregeric 1:cd7b42c99ff8 12 *
gregeric 1:cd7b42c99ff8 13 * TIM2_CH1: AF1 @ PA_0, PA_5, PA_15, PE_9
gregeric 1:cd7b42c99ff8 14 * TIM2_CH2: AF1 @ PA_1, PB_3, PE_10
gregeric 1:cd7b42c99ff8 15 *
gregeric 1:cd7b42c99ff8 16 * TIM3_CH1: AF2 @ PA_6, PB_4, PC_6, PE_3
gregeric 1:cd7b42c99ff8 17 * TIM3_CH2: AF2 @ PA_7, PB_5, PC_7, PE_4
gregeric 1:cd7b42c99ff8 18 *
gregeric 1:cd7b42c99ff8 19 * TIM4_CH1: AF2 @ PB_6, PD_12
gregeric 1:cd7b42c99ff8 20 * TIM4_CH2: AF2 @ PB_7, PD_13
gregeric 1:cd7b42c99ff8 21 *
gregeric 1:cd7b42c99ff8 22 * TIM5_CH1: AF2 @ PA_0* *TIM5 used by mbed system ticker so unavailable
gregeric 1:cd7b42c99ff8 23 * TIM5_CH2: AF2 @ PA_1*
gregeric 1:cd7b42c99ff8 24 *
gregeric 1:cd7b42c99ff8 25 */
gregeric 1:cd7b42c99ff8 26
gregeric 1:cd7b42c99ff8 27 #ifdef TARGET_STM32L1
gregeric 1:cd7b42c99ff8 28 void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
gregeric 1:cd7b42c99ff8 29 {
gregeric 1:cd7b42c99ff8 30 GPIO_InitTypeDef GPIO_InitStruct;
gregeric 1:cd7b42c99ff8 31
gregeric 1:cd7b42c99ff8 32 if (htim->Instance == TIM2) { //PA0 PA1 = Nucleo A0 A1
gregeric 1:cd7b42c99ff8 33 __TIM2_CLK_ENABLE();
gregeric 1:cd7b42c99ff8 34 __GPIOA_CLK_ENABLE();
gregeric 1:cd7b42c99ff8 35 GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
gregeric 1:cd7b42c99ff8 36 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
gregeric 1:cd7b42c99ff8 37 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
gregeric 1:cd7b42c99ff8 38 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
gregeric 1:cd7b42c99ff8 39 GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
gregeric 1:cd7b42c99ff8 40 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
gregeric 1:cd7b42c99ff8 41 }
gregeric 1:cd7b42c99ff8 42 else if (htim->Instance == TIM3) { //PB4 PB5 = Nucleo D5 D4
gregeric 1:cd7b42c99ff8 43 __TIM3_CLK_ENABLE();
gregeric 1:cd7b42c99ff8 44 __GPIOB_CLK_ENABLE();
gregeric 1:cd7b42c99ff8 45 GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5;
gregeric 1:cd7b42c99ff8 46 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
gregeric 1:cd7b42c99ff8 47 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
gregeric 1:cd7b42c99ff8 48 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
gregeric 1:cd7b42c99ff8 49 GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
gregeric 1:cd7b42c99ff8 50 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
gregeric 1:cd7b42c99ff8 51 }
gregeric 1:cd7b42c99ff8 52 else if (htim->Instance == TIM4) { // PB6 PB7 = Nucleo D10 MORPHO_PB7
gregeric 1:cd7b42c99ff8 53 __TIM4_CLK_ENABLE();
gregeric 1:cd7b42c99ff8 54 __GPIOB_CLK_ENABLE();
gregeric 1:cd7b42c99ff8 55 GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_7;
gregeric 1:cd7b42c99ff8 56 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
gregeric 1:cd7b42c99ff8 57 GPIO_InitStruct.Pull = GPIO_PULLDOWN;
gregeric 1:cd7b42c99ff8 58 GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
gregeric 1:cd7b42c99ff8 59 GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
gregeric 1:cd7b42c99ff8 60 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
gregeric 1:cd7b42c99ff8 61 }
gregeric 1:cd7b42c99ff8 62 }
gregeric 1:cd7b42c99ff8 63 #endif