David Lowe
X-CUBE-SPN1-20150128 example source code for one motor compiled under mbed. Tested OK on Nucleo F401. l6474.cpp is modified from original with defines in l6474_target_config.h to select the original behaviour (motor de-energised when halted), or new mode to continue powering with a (reduced) current in the coils (braking/position hold capability). On F401 avoid using mbed's InterruptIn on pins 10-15 (any port). Beware of other conflicts! L0 & F0 are included but untested.
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stm32f0xx_nucleo_ihm01a1.h
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f0xx_nucleo_ihm01a1.h 00004 * @author IPC Rennes 00005 * @version V1.5.0 00006 * @date November 12, 2014 00007 * @brief Header for BSP driver for x-nucleo-ihm01a1 Nucleo extension board 00008 * (based on L6474) 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> 00013 * 00014 * Redistribution and use in source and binary forms, with or without modification, 00015 * are permitted provided that the following conditions are met: 00016 * 1. Redistributions of source code must retain the above copyright notice, 00017 * this list of conditions and the following disclaimer. 00018 * 2. Redistributions in binary form must reproduce the above copyright notice, 00019 * this list of conditions and the following disclaimer in the documentation 00020 * and/or other materials provided with the distribution. 00021 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00022 * may be used to endorse or promote products derived from this software 00023 * without specific prior written permission. 00024 * 00025 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00026 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00027 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00028 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00029 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00030 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00031 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00032 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00033 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00034 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00035 * 00036 ****************************************************************************** 00037 */ 00038 00039 /* Define to prevent recursive inclusion -------------------------------------*/ 00040 #ifndef __STM32F0XX_NUCLEO_IHM01A1_H 00041 #define __STM32F0XX_NUCLEO_IHM01A1_H 00042 00043 #ifdef __cplusplus 00044 extern "C" { 00045 #endif 00046 00047 #define BSP_MOTOR_CONTROL_BOARD_USE_SPI2 00048 00049 /* Includes ------------------------------------------------------------------*/ 00050 //mbed #include "stm32f0xx_nucleo.h" 00051 00052 /** @addtogroup BSP 00053 * @{ 00054 */ 00055 00056 /** @defgroup IHM01A1_Board_Private_Function_Prototypes 00057 * @{ 00058 */ 00059 00060 void BSP_MotorControlBoard_Delay(uint32_t delay); //Delay of the requested number of milliseconds 00061 void BSP_MotorControlBoard_DisableIrq(void); //Disable Irq 00062 void BSP_MotorControlBoard_EnableIrq(void); //Enable Irq 00063 void BSP_MotorControlBoard_GpioInit(uint8_t nbDevices); //Initialise GPIOs used for L6474s 00064 void BSP_MotorControlBoard_Pwm1SetFreq(uint16_t newFreq); //Set PWM1 frequency and start it 00065 void BSP_MotorControlBoard_Pwm2SetFreq(uint16_t newFreq); //Set PWM2 frequency and start it 00066 void BSP_MotorControlBoard_Pwm3SetFreq(uint16_t newFreq); //Set PWM3 frequency and start it 00067 void BSP_MotorControlBoard_PwmInit(uint8_t deviceId); //Init the PWM of the specified device 00068 void BSP_MotorControlBoard_PwmStop(uint8_t deviceId); //Stop the PWM of the specified device 00069 void BSP_MotorControlBoard_ReleaseReset(void); //Reset the L6474 reset pin 00070 void BSP_MotorControlBoard_Reset(void); //Set the L6474 reset pin 00071 void BSP_MotorControlBoard_SetDirectionGpio(uint8_t deviceId, uint8_t gpioState); //Set direction GPIO 00072 uint8_t BSP_MotorControlBoard_SpiInit(void); //Initialise the SPI used for L6474s 00073 uint8_t BSP_MotorControlBoard_SpiWriteBytes(uint8_t *pByteToTransmit, uint8_t *pReceivedByte, uint8_t nbDevices); //Write bytes to the L6474s via SPI 00074 00075 /** @addtogroup STM32F0XX_NUCLEO_IHM01A1 00076 * @{ 00077 */ 00078 00079 00080 /* Exported Constants --------------------------------------------------------*/ 00081 00082 /** @defgroup IHM01A1_Exported_Constants 00083 * @{ 00084 */ 00085 00086 /******************************************************************************/ 00087 /* USE_STM32F0XX_NUCLEO */ 00088 /******************************************************************************/ 00089 00090 /** @defgroup Constants_For_STM32F0XX_NUCLEO 00091 * @{ 00092 */ 00093 ///Define BUTTON KEY 00094 #define BUTTON_KEY (BUTTON_USER) 00095 00096 /// Interrupt line used for L6474 FLAG 00097 #define EXTI_MCU_LINE_IRQn (EXTI4_15_IRQn) 00098 00099 /// Timer used for PWM1 00100 #define BSP_MOTOR_CONTROL_BOARD_TIMER_PWM1 (TIM3) 00101 00102 /// Timer used for PWM2 00103 #define BSP_MOTOR_CONTROL_BOARD_TIMER_PWM2 (TIM14) 00104 00105 /// Timer used for PWM3 00106 #define BSP_MOTOR_CONTROL_BOARD_TIMER_PWM3 (TIM15) 00107 00108 /// Channel Timer used for PWM1 00109 #define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_PWM1 (TIM_CHANNEL_2) 00110 00111 /// Channel Timer used for PWM2 00112 #define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_PWM2 (TIM_CHANNEL_1) 00113 00114 /// Channel Timer used for PWM3 00115 #define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_PWM3 (TIM_CHANNEL_1) 00116 00117 /// HAL Active Channel Timer used for PWM1 00118 #define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_PWM1 (HAL_TIM_ACTIVE_CHANNEL_2) 00119 00120 /// HAL Active Channel Timer used for PWM2 00121 #define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_PWM2 (HAL_TIM_ACTIVE_CHANNEL_1) 00122 00123 /// HAL Active Channel Timer used for PWM3 00124 #define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_PWM3 (HAL_TIM_ACTIVE_CHANNEL_1) 00125 00126 /// Timer Clock Enable for PWM1 00127 #define __BSP_MOTOR_CONTROL_BOARD_TIMER_PWM1_CLCK_ENABLE() __TIM3_CLK_ENABLE() 00128 00129 /// Timer Clock Enable for PWM2 00130 #define __BSP_MOTOR_CONTROL_BOARD_TIMER_PWM2_CLCK_ENABLE() __TIM14_CLK_ENABLE() 00131 00132 /// Timer Clock Enable for PWM1 00133 #define __BSP_MOTOR_CONTROL_BOARD_TIMER_PWM3_CLCK_ENABLE() __TIM15_CLK_ENABLE() 00134 00135 /// Timer Clock Disable for PWM1 00136 #define __BSP_MOTOR_CONTROL_BOARD_TIMER_PWM1_CLCK_DISABLE() __TIM3_CLK_DISABLE() 00137 00138 /// Timer Clock Disable for PWM2 00139 #define __BSP_MOTOR_CONTROL_BOARD_TIMER_PWM2_CLCK_DISABLE() __TIM14_CLK_DISABLE() 00140 00141 /// Timer Clock Disable for PWM3 00142 #define __BSP_MOTOR_CONTROL_BOARD_TIMER_PWM3_CLCK_DISABLE() __TIM15_CLK_DISABLE() 00143 00144 /// PWM1 global interrupt 00145 #define BSP_MOTOR_CONTROL_BOARD_PWM1_IRQn (TIM3_IRQn) 00146 00147 /// PWM2 global interrupt 00148 #define BSP_MOTOR_CONTROL_BOARD_PWM2_IRQn (TIM14_IRQn) 00149 00150 /// PWM3 global interrupt 00151 #define BSP_MOTOR_CONTROL_BOARD_PWM3_IRQn (TIM15_IRQn) 00152 00153 /// PWM1 GPIO alternate function 00154 #define BSP_MOTOR_CONTROL_BOARD_AFx_TIMx_PWM1 (GPIO_AF1_TIM3) 00155 00156 #ifndef BSP_MOTOR_CONTROL_BOARD_USE_SPI2 00157 /// SPI SCK AF 00158 //mbed (NUCLEO_SPIx_MISO_MOSI_AF) 00159 #define SPIx_SCK_AF (GPIO_AF0_SPI1) 00160 #else /* #ifndef BSP_MOTOR_CONTROL_BOARD_USE_SPI2 */ 00161 /// SPI SCK AF 00162 #define SPIx_SCK_AF (GPIO_AF0_SPI2) 00163 #endif /* #ifndef BSP_MOTOR_CONTROL_BOARD_USE_SPI2 */ 00164 00165 /// PWM1 frequency rescaler (1 for HW PWM, 2 for SW PWM) 00166 #define BSP_MOTOR_CONTROL_BOARD_PWM1_FREQ_RESCALER (1) 00167 /// PWM2 frequency rescaler (1 for HW PWM, 2 for SW PWM) 00168 #define BSP_MOTOR_CONTROL_BOARD_PWM2_FREQ_RESCALER (2) 00169 /// PWM3 frequency rescaler (1 for HW PWM, 2 for SW PWM) 00170 #define BSP_MOTOR_CONTROL_BOARD_PWM3_FREQ_RESCALER (2) 00171 00172 /** 00173 * @} 00174 */ 00175 00176 /******************************************************************************/ 00177 /* Independent plateform definitions */ 00178 /******************************************************************************/ 00179 00180 /** @defgroup Constants_For_All_Nucleo_Platforms 00181 * @{ 00182 */ 00183 00184 /// GPIO Pin used for the L6474 flag pin 00185 #define BSP_MOTOR_CONTROL_BOARD_FLAG_PIN (GPIO_PIN_10) 00186 /// GPIO port used for the L6474 flag pin 00187 #define BSP_MOTOR_CONTROL_BOARD_FLAG_PORT (GPIOA) 00188 00189 /// GPIO Pin used for the L6474 step clock pin of device 0 00190 #define BSP_MOTOR_CONTROL_BOARD_PWM_1_PIN (GPIO_PIN_7) 00191 /// GPIO Port used for the L6474 step clock pin of device 0 00192 #define BSP_MOTOR_CONTROL_BOARD_PWM_1_PORT (GPIOC) 00193 00194 /// GPIO Pin used for the L6474 step clock pin of device 1 00195 #define BSP_MOTOR_CONTROL_BOARD_PWM_2_PIN (GPIO_PIN_3) 00196 /// GPIO port used for the L6474 step clock pin of device 1 00197 #define BSP_MOTOR_CONTROL_BOARD_PWM_2_PORT (GPIOB) 00198 00199 /// GPIO Pin used for the L6474 step clock pin of device 2 00200 #define BSP_MOTOR_CONTROL_BOARD_PWM_3_PIN (GPIO_PIN_10) 00201 /// GPIO port used for the L6474 step clock pin of device 2 00202 #define BSP_MOTOR_CONTROL_BOARD_PWM_3_PORT (GPIOB) 00203 00204 /// GPIO Pin used for the L6474 direction pin of device 0 00205 #define BSP_MOTOR_CONTROL_BOARD_DIR_1_PIN (GPIO_PIN_8) 00206 /// GPIO port used for the L6474 direction pin of device 0 00207 #define BSP_MOTOR_CONTROL_BOARD_DIR_1_PORT (GPIOA) 00208 00209 /// GPIO Pin used for the L6474 direction pin of device 1 00210 #define BSP_MOTOR_CONTROL_BOARD_DIR_2_PIN (GPIO_PIN_5) 00211 /// GPIO port used for the L6474 direction pin of device 1 00212 #define BSP_MOTOR_CONTROL_BOARD_DIR_2_PORT (GPIOB) 00213 00214 /// GPIO Pin used for the L6474 direction pin of device 2 00215 #define BSP_MOTOR_CONTROL_BOARD_DIR_3_PIN (GPIO_PIN_4) 00216 /// GPIO port used for the L6474 direction pin of device 2 00217 #define BSP_MOTOR_CONTROL_BOARD_DIR_3_PORT (GPIOB) 00218 00219 /// GPIO Pin used for the L6474 reset pin 00220 #define BSP_MOTOR_CONTROL_BOARD_RESET_PIN (GPIO_PIN_9) 00221 /// GPIO port used for the L6474 reset pin 00222 #define BSP_MOTOR_CONTROL_BOARD_RESET_PORT (GPIOA) 00223 00224 /// GPIO Pin used for the L6474 SPI chip select pin 00225 #define BSP_MOTOR_CONTROL_BOARD_CS_PIN (GPIO_PIN_6) 00226 /// GPIO port used for the L6474 SPI chip select pin 00227 #define BSP_MOTOR_CONTROL_BOARD_CS_PORT (GPIOB) 00228 00229 /* Definition for SPIx clock resources */ 00230 00231 #ifndef BSP_MOTOR_CONTROL_BOARD_USE_SPI2 00232 /* Default SPI is SPI1 */ 00233 00234 /// Used SPI 00235 #define SPIx (SPI1) 00236 00237 /// SPI clock enable 00238 #define SPIx_CLK_ENABLE() __SPI1_CLK_ENABLE() 00239 00240 /// SPI SCK enable 00241 #define SPIx_SCK_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00242 00243 /// SPI MISO enable 00244 #define SPIx_MISO_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00245 00246 /// SPI MOSI enable 00247 #define SPIx_MOSI_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00248 00249 /// SPI Force reset 00250 #define SPIx_FORCE_RESET() __SPI1_FORCE_RESET() 00251 00252 /// SPI Release reset 00253 #define SPIx_RELEASE_RESET() __SPI1_RELEASE_RESET() 00254 00255 /// SPI SCK pin 00256 #define SPIx_SCK_PIN (GPIO_PIN_5) 00257 00258 /// SPI SCK port 00259 #define SPIx_SCK_GPIO_PORT (GPIOA) 00260 00261 00262 /// SPI MISO pin 00263 #define SPIx_MISO_PIN (GPIO_PIN_6) 00264 00265 /// SPI MISO port 00266 #define SPIx_MISO_GPIO_PORT (GPIOA) 00267 00268 /// SPI MOSI pin 00269 #define SPIx_MOSI_PIN (GPIO_PIN_7) 00270 00271 /// SPI MOSI port 00272 #define SPIx_MOSI_GPIO_PORT (GPIOA) 00273 00274 #else /* USE SPI2 */ 00275 00276 /// Used SPI 00277 #define SPIx (SPI2) 00278 00279 /// SPI clock enable 00280 #define SPIx_CLK_ENABLE() __SPI2_CLK_ENABLE() 00281 00282 /// SPI SCK enable 00283 #define SPIx_SCK_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE() 00284 00285 /// SPI MISO enable 00286 #define SPIx_MISO_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE() 00287 00288 /// SPI MOSI enable 00289 #define SPIx_MOSI_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE() 00290 00291 /// SPI Force reset 00292 #define SPIx_FORCE_RESET() __SPI2_FORCE_RESET() 00293 00294 /// SPI Release reset 00295 #define SPIx_RELEASE_RESET() __SPI2_RELEASE_RESET() 00296 00297 /// SPI SCK pin 00298 #define SPIx_SCK_PIN (GPIO_PIN_13) 00299 00300 /// SPI SCK port 00301 #define SPIx_SCK_GPIO_PORT (GPIOB) 00302 00303 /// SPI MISO pin 00304 #define SPIx_MISO_PIN (GPIO_PIN_14) 00305 00306 /// SPI MISO port 00307 #define SPIx_MISO_GPIO_PORT (GPIOB) 00308 00309 /// SPI MISO AF 00310 #define SPIx_MISO_AF (SPIx_SCK_AF) 00311 00312 /// SPI MOSI pin 00313 #define SPIx_MOSI_PIN (GPIO_PIN_15) 00314 00315 /// SPI MOSI port 00316 #define SPIx_MOSI_GPIO_PORT (GPIOB) 00317 00318 #endif 00319 00320 /// SPI MISO AF 00321 #define SPIx_MISO_AF (SPIx_SCK_AF) 00322 00323 /// SPI MOSI AF 00324 #define SPIx_MOSI_AF (SPIx_SCK_AF) 00325 00326 /** 00327 * @} 00328 */ 00329 00330 /** 00331 * @} 00332 */ 00333 00334 #ifdef __cplusplus 00335 } 00336 #endif 00337 00338 #endif /* __STM32F0XX_NUCLEO_IHM01A1_H */ 00339 00340 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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