Gian Paolo Donnarumma
/
LPS22HH
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LPS22HH.cpp
00001 #include "LPS22HH.h" 00002 00003 int32_t lps22hh_write_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len); 00004 int32_t lps22hh_read_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len); 00005 00006 int32_t lps22hh_data_rate_set(lps22hh_ctx_t *ctx, lps22hh_odr_t val); 00007 int32_t lps22hh_data_rate_get(lps22hh_ctx_t *ctx, lps22hh_odr_t *val); 00008 00009 int32_t lps22hh_lp_bandwidth_set(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t val); 00010 int32_t lps22hh_lp_bandwidth_get(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t *val); 00011 00012 int32_t lps22hh_block_data_update_set(lps22hh_ctx_t *ctx, uint8_t val); 00013 int32_t lps22hh_auto_increment_set(lps22hh_ctx_t *ctx, uint8_t val); 00014 00015 int32_t lps22hh_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff); 00016 int32_t lps22hh_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff); 00017 00018 int32_t lps22hh_press_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val); 00019 int32_t lps22hh_temp_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val); 00020 00021 int32_t lps22hh_fifo_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff); 00022 int32_t lps22hh_fifo_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff); 00023 int32_t lps22hh_fifo_wtm_flag_get(lps22hh_ctx_t *ctx, uint8_t *val); 00024 int32_t lps22hh_fifo_ovr_flag_get(lps22hh_ctx_t *ctx, uint8_t *val); 00025 int32_t lps22hh_fifo_full_flag_get(lps22hh_ctx_t *ctx, uint8_t *val); 00026 int32_t lps22hh_fifo_src_get(lps22hh_ctx_t *ctx, lps22hh_fifo_status2_t *val); 00027 int32_t lps22hh_fifo_data_level_get(lps22hh_ctx_t *ctx, uint8_t *buff); 00028 int32_t lps22hh_fifo_threshold_on_int_set(lps22hh_ctx_t *ctx, uint8_t val); 00029 int32_t lps22hh_fifo_full_on_int_set(lps22hh_ctx_t *ctx, uint8_t val); 00030 int32_t lps22hh_fifo_ovr_on_int_set(lps22hh_ctx_t *ctx, uint8_t val); 00031 int32_t lps22hh_fifo_stop_on_wtm_set(lps22hh_ctx_t *ctx, uint8_t val); 00032 int32_t lps22hh_fifo_mode_get(lps22hh_ctx_t *ctx, lps22hh_f_mode_t *val); 00033 int32_t lps22hh_fifo_mode_set(lps22hh_ctx_t *ctx, lps22hh_f_mode_t val); 00034 int32_t lps22hh_fifo_watermark_set(lps22hh_ctx_t *ctx, uint8_t val); 00035 00036 /* Class Implementation ------------------------------------------------------*/ 00037 00038 /** Constructor 00039 * @param i2c object of an helper class which handles the I2C peripheral 00040 * @param address the address of the component's instance 00041 */ 00042 LPS22HH::LPS22HH(PinName sda, PinName scl) : _i2c(sda, scl) 00043 { 00044 address=LPS22HH_I2C_ADD_H; 00045 reg_ctx.write_reg = LPS22HH_io_write; 00046 reg_ctx.read_reg = LPS22HH_io_read; 00047 reg_ctx.handle = (void *)this; 00048 enabled = 0; 00049 } 00050 00051 /** Constructor 00052 * @param spi object of an helper class which handles the SPI peripheral 00053 * @param cs_pin the chip select pin 00054 * @param spi_speed the SPI speed 00055 00056 LPS22HH::LPS22HH(SPIClass *spi, int cs_pin, uint32_t spi_speed) : dev_spi(spi), cs_pin(cs_pin), spi_speed(spi_speed) 00057 { 00058 reg_ctx.write_reg = LPS22HH_io_write; 00059 reg_ctx.read_reg = LPS22HH_io_read; 00060 reg_ctx.handle = (void *)this; 00061 dev_i2c = NULL; 00062 address = 0; 00063 enabled = 0; 00064 } 00065 */ 00066 00067 /** 00068 * @brief Configure the sensor in order to be used 00069 * @retval 0 in case of success, an error code otherwise 00070 */ 00071 LPS22HHStatusTypeDef LPS22HH::begin() 00072 { 00073 00074 /* Power down the device, set Low Noise Enable (bit 5), clear One Shot (bit 4) */ 00075 if (lps22hh_data_rate_set(®_ctx, (lps22hh_odr_t)(LPS22HH_POWER_DOWN | 0x10)) != LPS22HH_OK) 00076 { 00077 return LPS22HH_ERROR; 00078 } 00079 00080 /* Disable low-pass filter on LPS22HH pressure data */ 00081 if (lps22hh_lp_bandwidth_set(®_ctx, LPS22HH_LPF_ODR_DIV_2) != LPS22HH_OK) 00082 { 00083 return LPS22HH_ERROR; 00084 } 00085 00086 /* Set block data update mode */ 00087 if (lps22hh_block_data_update_set(®_ctx, PROPERTY_ENABLE) != LPS22HH_OK) 00088 { 00089 return LPS22HH_ERROR; 00090 } 00091 00092 /* Set autoincrement for multi-byte read/write */ 00093 if (lps22hh_auto_increment_set(®_ctx, PROPERTY_ENABLE) != LPS22HH_OK) 00094 { 00095 return LPS22HH_ERROR; 00096 } 00097 00098 last_odr = LPS22HH_25_Hz; 00099 enabled = 0; 00100 00101 return LPS22HH_OK; 00102 } 00103 00104 /** 00105 * @brief Disable the sensor and relative resources 00106 * @retval 0 in case of success, an error code otherwise 00107 */ 00108 LPS22HHStatusTypeDef LPS22HH::end() 00109 { 00110 /* Disable pressure and temperature sensor */ 00111 if (Disable() != LPS22HH_OK) 00112 { 00113 return LPS22HH_ERROR; 00114 } 00115 00116 00117 return LPS22HH_OK; 00118 } 00119 00120 /** 00121 * @brief Get WHO_AM_I value 00122 * @param Id the WHO_AM_I value 00123 * @retval 0 in case of success, an error code otherwise 00124 */ 00125 LPS22HHStatusTypeDef LPS22HH::ReadID(uint8_t *Id) 00126 { 00127 00128 //lps22hh_device_id_get(lps22hh_ctx_t *ctx, uint8_t *buff) 00129 int32_t ret; 00130 ret = lps22hh_read_reg(®_ctx, LPS22HH_WHO_AM_I, Id, 1); 00131 00132 00133 if (ret != LPS22HH_OK) 00134 { 00135 return LPS22HH_ERROR; 00136 } 00137 00138 return LPS22HH_OK; 00139 } 00140 00141 /** 00142 * @brief Enable the LPS22HH pressure sensor 00143 * @retval 0 in case of success, an error code otherwise 00144 */ 00145 LPS22HHStatusTypeDef LPS22HH::Enable() 00146 { 00147 /* Check if the component is already enabled */ 00148 if (enabled == 1U) 00149 { 00150 return LPS22HH_OK; 00151 } 00152 00153 /* Output data rate selection. */ 00154 if (lps22hh_data_rate_set(®_ctx, last_odr) != LPS22HH_OK) 00155 { 00156 return LPS22HH_ERROR; 00157 } 00158 00159 enabled = 1; 00160 00161 return LPS22HH_OK; 00162 } 00163 00164 /** 00165 * @brief Disable the LPS22HH pressure sensor 00166 * @retval 0 in case of success, an error code otherwise 00167 */ 00168 LPS22HHStatusTypeDef LPS22HH::Disable() 00169 { 00170 /* Check if the component is already disabled */ 00171 if (enabled == 0U) 00172 { 00173 return LPS22HH_OK; 00174 } 00175 00176 lps22hh_ctrl_reg1_t ctrl_reg1; 00177 lps22hh_ctrl_reg2_t ctrl_reg2; 00178 int32_t ret; 00179 00180 //lps22hh_data_rate_get(®_ctx, &last_odr) 00181 00182 ret = lps22hh_read_reg(®_ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); 00183 if (ret == 0) { 00184 ret = lps22hh_read_reg(®_ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 00185 } 00186 if (ret == 0) { 00187 ret = lps22hh_read_reg(®_ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 00188 switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) + 00189 ctrl_reg1.odr )) { 00190 case LPS22HH_POWER_DOWN: 00191 last_odr = LPS22HH_POWER_DOWN; 00192 break; 00193 case LPS22HH_ONE_SHOOT: 00194 last_odr = LPS22HH_ONE_SHOOT; 00195 break; 00196 case LPS22HH_1_Hz: 00197 last_odr = LPS22HH_1_Hz; 00198 break; 00199 case LPS22HH_10_Hz: 00200 last_odr = LPS22HH_10_Hz; 00201 break; 00202 case LPS22HH_25_Hz: 00203 last_odr = LPS22HH_25_Hz; 00204 break; 00205 case LPS22HH_50_Hz: 00206 last_odr = LPS22HH_50_Hz; 00207 break; 00208 case LPS22HH_75_Hz: 00209 last_odr = LPS22HH_75_Hz; 00210 break; 00211 case LPS22HH_1_Hz_LOW_NOISE: 00212 last_odr = LPS22HH_1_Hz_LOW_NOISE; 00213 break; 00214 case LPS22HH_10_Hz_LOW_NOISE: 00215 last_odr = LPS22HH_10_Hz_LOW_NOISE; 00216 break; 00217 case LPS22HH_25_Hz_LOW_NOISE: 00218 last_odr = LPS22HH_25_Hz_LOW_NOISE; 00219 break; 00220 case LPS22HH_50_Hz_LOW_NOISE: 00221 last_odr = LPS22HH_50_Hz_LOW_NOISE; 00222 break; 00223 case LPS22HH_75_Hz_LOW_NOISE: 00224 last_odr = LPS22HH_75_Hz_LOW_NOISE; 00225 break; 00226 case LPS22HH_100_Hz: 00227 last_odr = LPS22HH_100_Hz; 00228 break; 00229 case LPS22HH_200_Hz: 00230 last_odr = LPS22HH_200_Hz; 00231 break; 00232 default: 00233 last_odr = LPS22HH_POWER_DOWN; 00234 break; 00235 } 00236 } 00237 00238 00239 /* Get current output data rate. */ 00240 if (ret != LPS22HH_OK) 00241 { 00242 return LPS22HH_ERROR; 00243 } 00244 /* Output data rate selection - power down. */ 00245 if (lps22hh_data_rate_set(®_ctx, LPS22HH_POWER_DOWN) != LPS22HH_OK) 00246 { 00247 return LPS22HH_ERROR; 00248 } 00249 00250 00251 enabled = 0; 00252 00253 return LPS22HH_OK; 00254 } 00255 00256 00257 /** 00258 * @brief Get output data rate 00259 * @param Odr the output data rate value 00260 * @retval 0 in case of success, an error code otherwise 00261 */ 00262 LPS22HHStatusTypeDef LPS22HH::GetOutputDataRate(float *Odr) 00263 { 00264 LPS22HHStatusTypeDef result = LPS22HH_OK; 00265 lps22hh_odr_t odr_low_level; 00266 00267 lps22hh_ctrl_reg1_t ctrl_reg1; 00268 lps22hh_ctrl_reg2_t ctrl_reg2; 00269 int32_t ret; 00270 00271 ret = lps22hh_read_reg(®_ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); 00272 if (ret == 0) { 00273 ret = lps22hh_read_reg(®_ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 00274 } 00275 if (ret == 0) { 00276 ret = lps22hh_read_reg(®_ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 00277 switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) + 00278 ctrl_reg1.odr )) { 00279 case LPS22HH_POWER_DOWN: 00280 odr_low_level = LPS22HH_POWER_DOWN; 00281 break; 00282 case LPS22HH_ONE_SHOOT: 00283 odr_low_level = LPS22HH_ONE_SHOOT; 00284 break; 00285 case LPS22HH_1_Hz: 00286 odr_low_level = LPS22HH_1_Hz; 00287 break; 00288 case LPS22HH_10_Hz: 00289 odr_low_level = LPS22HH_10_Hz; 00290 break; 00291 case LPS22HH_25_Hz: 00292 odr_low_level = LPS22HH_25_Hz; 00293 break; 00294 case LPS22HH_50_Hz: 00295 odr_low_level = LPS22HH_50_Hz; 00296 break; 00297 case LPS22HH_75_Hz: 00298 odr_low_level = LPS22HH_75_Hz; 00299 break; 00300 case LPS22HH_1_Hz_LOW_NOISE: 00301 odr_low_level = LPS22HH_1_Hz_LOW_NOISE; 00302 break; 00303 case LPS22HH_10_Hz_LOW_NOISE: 00304 odr_low_level = LPS22HH_10_Hz_LOW_NOISE; 00305 break; 00306 case LPS22HH_25_Hz_LOW_NOISE: 00307 odr_low_level = LPS22HH_25_Hz_LOW_NOISE; 00308 break; 00309 case LPS22HH_50_Hz_LOW_NOISE: 00310 odr_low_level = LPS22HH_50_Hz_LOW_NOISE; 00311 break; 00312 case LPS22HH_75_Hz_LOW_NOISE: 00313 odr_low_level = LPS22HH_75_Hz_LOW_NOISE; 00314 break; 00315 case LPS22HH_100_Hz: 00316 odr_low_level = LPS22HH_100_Hz; 00317 break; 00318 case LPS22HH_200_Hz: 00319 odr_low_level = LPS22HH_200_Hz; 00320 break; 00321 default: 00322 odr_low_level = LPS22HH_POWER_DOWN; 00323 break; 00324 } 00325 } 00326 00327 if (ret != LPS22HH_OK) 00328 { 00329 return LPS22HH_ERROR; 00330 } 00331 00332 switch (odr_low_level) 00333 { 00334 case LPS22HH_POWER_DOWN: 00335 *Odr = 0.0f; 00336 break; 00337 00338 case LPS22HH_1_Hz: 00339 *Odr = 1.0f; 00340 break; 00341 00342 case LPS22HH_10_Hz: 00343 *Odr = 10.0f; 00344 break; 00345 00346 case LPS22HH_25_Hz: 00347 *Odr = 25.0f; 00348 break; 00349 00350 case LPS22HH_50_Hz: 00351 *Odr = 50.0f; 00352 break; 00353 00354 case LPS22HH_75_Hz: 00355 *Odr = 75.0f; 00356 break; 00357 00358 case LPS22HH_100_Hz: 00359 *Odr = 100.0f; 00360 break; 00361 00362 case LPS22HH_200_Hz: 00363 *Odr = 200.0f; 00364 break; 00365 00366 default: 00367 result = LPS22HH_ERROR; 00368 break; 00369 } 00370 00371 return result; 00372 } 00373 00374 /** 00375 * @brief Set the LPS22HH pressure sensor output data rate 00376 * @param Odr the output data rate value to be set 00377 * @retval 0 in case of success, an error code otherwise 00378 */ 00379 LPS22HHStatusTypeDef LPS22HH::SetOutputDataRate(float Odr) 00380 { 00381 /* Check if the component is enabled */ 00382 if (enabled == 1U) 00383 { 00384 return SetOutputDataRate_When_Enabled(Odr); 00385 } 00386 else 00387 { 00388 return SetOutputDataRate_When_Disabled(Odr); 00389 } 00390 } 00391 00392 00393 /** 00394 * @brief Set output data rate 00395 * @param Odr the output data rate value to be set 00396 * @retval 0 in case of success, an error code otherwise 00397 */ 00398 LPS22HHStatusTypeDef LPS22HH::SetOutputDataRate_When_Enabled(float Odr) 00399 { 00400 lps22hh_odr_t new_odr; 00401 00402 new_odr = (Odr <= 1.0f) ? LPS22HH_1_Hz 00403 : (Odr <= 10.0f) ? LPS22HH_10_Hz 00404 : (Odr <= 25.0f) ? LPS22HH_25_Hz 00405 : (Odr <= 50.0f) ? LPS22HH_50_Hz 00406 : (Odr <= 75.0f) ? LPS22HH_75_Hz 00407 : (Odr <= 100.0f) ? LPS22HH_100_Hz 00408 : LPS22HH_200_Hz; 00409 00410 if (lps22hh_data_rate_set(®_ctx, new_odr) != LPS22HH_OK) 00411 { 00412 return LPS22HH_ERROR; 00413 } 00414 00415 if (lps22hh_data_rate_get(®_ctx, &last_odr) != LPS22HH_OK) 00416 { 00417 return LPS22HH_ERROR; 00418 } 00419 00420 return LPS22HH_OK; 00421 } 00422 00423 /** 00424 * @brief Set output data rate when disabled 00425 * @param Odr the output data rate value to be set 00426 * @retval 0 in case of success, an error code otherwise 00427 */ 00428 LPS22HHStatusTypeDef LPS22HH::SetOutputDataRate_When_Disabled(float Odr) 00429 { 00430 last_odr = (Odr <= 1.0f) ? LPS22HH_1_Hz 00431 : (Odr <= 10.0f) ? LPS22HH_10_Hz 00432 : (Odr <= 25.0f) ? LPS22HH_25_Hz 00433 : (Odr <= 50.0f) ? LPS22HH_50_Hz 00434 : (Odr <= 75.0f) ? LPS22HH_75_Hz 00435 : (Odr <= 100.0f) ? LPS22HH_100_Hz 00436 : LPS22HH_200_Hz; 00437 00438 return LPS22HH_OK; 00439 } 00440 00441 /** 00442 * @brief Get the LPS22HH pressure value 00443 * @param Value pointer where the pressure value is written 00444 * @retval 0 in case of success, an error code otherwise 00445 */ 00446 ////LPS22HHStatusTypeDef LPS22HH::GetPressure(float *Value) 00447 float LPS22HH::GetPressure() 00448 { 00449 axis1bit32_t data_raw_pressure; 00450 00451 (void)memset(data_raw_pressure.u8bit, 0x00, sizeof(int32_t)); 00452 if (lps22hh_pressure_raw_get(®_ctx, data_raw_pressure.u8bit) != LPS22HH_OK) 00453 { 00454 return LPS22HH_ERROR; 00455 } 00456 00457 ////*Value = LPS22HH_FROM_LSB_TO_hPa((float)(data_raw_pressure.i32bit)); 00458 return LPS22HH_FROM_LSB_TO_hPa((float)(data_raw_pressure.i32bit)); 00459 00460 ////return LPS22HH_OK; 00461 } 00462 00463 /** 00464 * @brief Get the LPS22HH pressure data ready bit value 00465 * @param Status the status of data ready bit 00466 * @retval 0 in case of success, an error code otherwise 00467 */ 00468 LPS22HHStatusTypeDef LPS22HH::Get_PRESS_DRDY_Status(uint8_t *Status) 00469 { 00470 if (lps22hh_press_flag_data_ready_get(®_ctx, Status) != LPS22HH_OK) 00471 { 00472 return LPS22HH_ERROR; 00473 } 00474 00475 return LPS22HH_OK; 00476 } 00477 00478 /** 00479 * @brief Get the LPS22HH temperature value 00480 * @param Value pointer where the temperature value is written 00481 * @retval 0 in case of success, an error code otherwise 00482 */ 00483 LPS22HHStatusTypeDef LPS22HH::GetTemperature(float *Value) 00484 { 00485 axis1bit16_t data_raw_temperature; 00486 00487 (void)memset(data_raw_temperature.u8bit, 0x00, sizeof(int16_t)); 00488 if (lps22hh_temperature_raw_get(®_ctx, data_raw_temperature.u8bit) != LPS22HH_OK) 00489 { 00490 return LPS22HH_ERROR; 00491 } 00492 00493 *Value = LPS22HH_FROM_LSB_TO_degC((float)(data_raw_temperature.i16bit)); 00494 00495 return LPS22HH_OK; 00496 } 00497 00498 /** 00499 * @brief Get the LPS22HH temperature data ready bit value 00500 * @param Status the status of data ready bit 00501 * @retval 0 in case of success, an error code otherwise 00502 */ 00503 LPS22HHStatusTypeDef LPS22HH::Get_TEMP_DRDY_Status(uint8_t *Status) 00504 { 00505 if (lps22hh_temp_flag_data_ready_get(®_ctx, Status) != LPS22HH_OK) 00506 { 00507 return LPS22HH_ERROR; 00508 } 00509 00510 return LPS22HH_OK; 00511 } 00512 00513 /** 00514 * @brief Get the LPS22HH register value 00515 * @param Reg address to be written 00516 * @param Data value to be written 00517 * @retval 0 in case of success, an error code otherwise 00518 */ 00519 LPS22HHStatusTypeDef LPS22HH::Read_Reg(uint8_t Reg, uint8_t *Data) 00520 { 00521 if (lps22hh_read_reg(®_ctx, Reg, Data, 1) != LPS22HH_OK) 00522 { 00523 return LPS22HH_ERROR; 00524 } 00525 00526 return LPS22HH_OK; 00527 } 00528 00529 /** 00530 * @brief Set the LPS22HH register value 00531 * @param pObj the device pObj 00532 * @param Reg address to be written 00533 * @param Data value to be written 00534 * @retval 0 in case of success, an error code otherwise 00535 */ 00536 LPS22HHStatusTypeDef LPS22HH::Write_Reg(uint8_t Reg, uint8_t Data) 00537 { 00538 if (lps22hh_write_reg(®_ctx, Reg, &Data, 1) != LPS22HH_OK) 00539 { 00540 return LPS22HH_ERROR; 00541 } 00542 00543 return LPS22HH_OK; 00544 } 00545 00546 /** 00547 * @brief Get the LPS22HH FIFO data level 00548 * @param Status the status of data ready bit 00549 * @retval 0 in case of success, an error code otherwise 00550 */ 00551 LPS22HHStatusTypeDef LPS22HH::Get_FIFO_Data(float *Press, float *Temp) 00552 { 00553 axis1bit32_t data_raw_pressure; 00554 axis1bit16_t data_raw_temperature; 00555 00556 (void)memset(data_raw_pressure.u8bit, 0x00, sizeof(int32_t)); 00557 if (lps22hh_fifo_pressure_raw_get(®_ctx, data_raw_pressure.u8bit) != LPS22HH_OK) 00558 { 00559 return LPS22HH_ERROR; 00560 } 00561 00562 *Press = LPS22HH_FROM_LSB_TO_hPa((float)(data_raw_pressure.i32bit)); 00563 00564 (void)memset(data_raw_temperature.u8bit, 0x00, sizeof(int16_t)); 00565 if (lps22hh_fifo_temperature_raw_get(®_ctx, data_raw_temperature.u8bit) != LPS22HH_OK) 00566 { 00567 return LPS22HH_ERROR; 00568 } 00569 00570 *Temp = LPS22HH_FROM_LSB_TO_degC((float)(data_raw_temperature.i16bit)); 00571 00572 return LPS22HH_OK; 00573 } 00574 00575 /** 00576 * @brief Get the LPS22HH FIFO threshold 00577 * @param Status the status of data ready bit 00578 * @retval 0 in case of success, an error code otherwise 00579 */ 00580 LPS22HHStatusTypeDef LPS22HH::Get_FIFO_FTh_Status(uint8_t *Status) 00581 { 00582 if (lps22hh_fifo_wtm_flag_get(®_ctx, Status) != LPS22HH_OK) 00583 { 00584 return LPS22HH_ERROR; 00585 } 00586 00587 return LPS22HH_OK; 00588 } 00589 00590 /** 00591 * @brief Get the LPS22HH FIFO full status 00592 * @param Status the status of data ready bit 00593 * @retval 0 in case of success, an error code otherwise 00594 */ 00595 LPS22HHStatusTypeDef LPS22HH::Get_FIFO_Full_Status(uint8_t *Status) 00596 { 00597 if (lps22hh_fifo_full_flag_get(®_ctx, Status) != LPS22HH_OK) 00598 { 00599 return LPS22HH_ERROR; 00600 } 00601 00602 return LPS22HH_OK; 00603 } 00604 00605 /** 00606 * @brief Get the LPS22HH FIFO OVR status 00607 * @param Status the status of data ready bit 00608 * @retval 0 in case of success, an error code otherwise 00609 */ 00610 LPS22HHStatusTypeDef LPS22HH::Get_FIFO_Ovr_Status(uint8_t *Status) 00611 { 00612 if (lps22hh_fifo_ovr_flag_get(®_ctx, Status) != LPS22HH_OK) 00613 { 00614 return LPS22HH_ERROR; 00615 } 00616 00617 return LPS22HH_OK; 00618 } 00619 00620 /** 00621 * @brief Get the LPS22HH FIFO data level 00622 * @param Status the status of data ready bit 00623 * @retval 0 in case of success, an error code otherwise 00624 */ 00625 LPS22HHStatusTypeDef LPS22HH::Get_FIFO_Level(uint8_t *Status) 00626 { 00627 if (lps22hh_fifo_data_level_get(®_ctx, Status) != LPS22HH_OK) 00628 { 00629 return LPS22HH_ERROR; 00630 } 00631 00632 return LPS22HH_OK; 00633 } 00634 00635 /** 00636 * @brief Reset the FIFO interrupt 00637 * @param interrupt The FIFO interrupt to be reset; values: 0 = FTH; 1 = FULL; 2 = OVR 00638 * @retval 0 in case of success, an error code otherwise 00639 */ 00640 LPS22HHStatusTypeDef LPS22HH::Reset_FIFO_Interrupt(uint8_t interrupt) 00641 { 00642 switch (interrupt) 00643 { 00644 case 0: 00645 if (lps22hh_fifo_threshold_on_int_set(®_ctx, PROPERTY_DISABLE) != LPS22HH_OK) 00646 { 00647 return LPS22HH_ERROR; 00648 } 00649 break; 00650 case 1: 00651 if (lps22hh_fifo_full_on_int_set(®_ctx, PROPERTY_DISABLE) != LPS22HH_OK) 00652 { 00653 return LPS22HH_ERROR; 00654 } 00655 break; 00656 case 2: 00657 if (lps22hh_fifo_ovr_on_int_set(®_ctx, PROPERTY_DISABLE) != LPS22HH_OK) 00658 { 00659 return LPS22HH_ERROR; 00660 } 00661 break; 00662 default: 00663 return LPS22HH_ERROR; 00664 } 00665 00666 return LPS22HH_OK; 00667 } 00668 00669 /** 00670 * @brief Set the FIFO interrupt 00671 * @param interrupt The FIFO interrupt to be reset; values: 0 = FTH; 1 = FULL; 2 = OVR 00672 * @retval 0 in case of success, an error code otherwise 00673 */ 00674 LPS22HHStatusTypeDef LPS22HH::Set_FIFO_Interrupt(uint8_t interrupt) 00675 { 00676 switch (interrupt) 00677 { 00678 case 0: 00679 if (lps22hh_fifo_threshold_on_int_set(®_ctx, PROPERTY_ENABLE) != LPS22HH_OK) 00680 { 00681 return LPS22HH_ERROR; 00682 } 00683 break; 00684 case 1: 00685 if (lps22hh_fifo_full_on_int_set(®_ctx, PROPERTY_ENABLE) != LPS22HH_OK) 00686 { 00687 return LPS22HH_ERROR; 00688 } 00689 break; 00690 case 2: 00691 if (lps22hh_fifo_ovr_on_int_set(®_ctx, PROPERTY_ENABLE) != LPS22HH_OK) 00692 { 00693 return LPS22HH_ERROR; 00694 } 00695 break; 00696 default: 00697 return LPS22HH_ERROR; 00698 } 00699 00700 return LPS22HH_OK; 00701 } 00702 00703 /** 00704 * @brief Set the FIFO mode 00705 * @param Mode the FIFO mode to be set 00706 * @retval 0 in case of success, an error code otherwise 00707 */ 00708 LPS22HHStatusTypeDef LPS22HH::Set_FIFO_Mode(uint8_t Mode) 00709 { 00710 /* Verify that the passed parameter contains one of the valid values */ 00711 switch ((lps22hh_f_mode_t)Mode) 00712 { 00713 case LPS22HH_BYPASS_MODE: 00714 case LPS22HH_FIFO_MODE: 00715 case LPS22HH_STREAM_MODE: 00716 case LPS22HH_STREAM_TO_FIFO_MODE: 00717 case LPS22HH_BYPASS_TO_STREAM_MODE: 00718 case LPS22HH_BYPASS_TO_FIFO_MODE: 00719 break; 00720 default: 00721 return LPS22HH_ERROR; 00722 } 00723 00724 if (lps22hh_fifo_mode_set(®_ctx, (lps22hh_f_mode_t)Mode) != LPS22HH_OK) 00725 { 00726 return LPS22HH_ERROR; 00727 } 00728 00729 return LPS22HH_OK; 00730 } 00731 00732 /** 00733 * @brief Set the LPS22HH FIFO data level 00734 * @param Status the status of data ready bit 00735 * @retval 0 in case of success, an error code otherwise 00736 */ 00737 LPS22HHStatusTypeDef LPS22HH::Set_FIFO_Watermark_Level(uint8_t Watermark) 00738 { 00739 if (lps22hh_fifo_watermark_set(®_ctx, Watermark) != LPS22HH_OK) 00740 { 00741 return LPS22HH_ERROR; 00742 } 00743 00744 return LPS22HH_OK; 00745 } 00746 00747 /** 00748 * @brief Set the LPS22HH stop on watermark function 00749 * @param Stop the state of stop on watermark function 00750 * @retval 0 in case of success, an error code otherwise 00751 */ 00752 LPS22HHStatusTypeDef LPS22HH::Stop_FIFO_On_Watermark(uint8_t Stop) 00753 { 00754 if (lps22hh_fifo_stop_on_wtm_set(®_ctx, Stop) != LPS22HH_OK) 00755 { 00756 return LPS22HH_ERROR; 00757 } 00758 00759 return LPS22HH_OK; 00760 } 00761 00762 /** 00763 * @brief Set the LPS22HH One Shot Mode 00764 * @retval 0 in case of success, an error code otherwise 00765 */ 00766 LPS22HHStatusTypeDef LPS22HH::Set_One_Shot() 00767 { 00768 /* Start One Shot Measurement */ 00769 if(lps22hh_data_rate_set(®_ctx, LPS22HH_ONE_SHOOT) != LPS22HH_OK) 00770 { 00771 return LPS22HH_ERROR; 00772 } 00773 00774 return LPS22HH_OK; 00775 } 00776 00777 /** 00778 * @brief Get the LPS22HH One Shot Status 00779 * @param Status pointer to the one shot status (1 means measurements available, 0 means measurements not available yet) 00780 * @retval 0 in case of success, an error code otherwise 00781 */ 00782 LPS22HHStatusTypeDef LPS22HH::Get_One_Shot_Status(uint8_t *Status) 00783 { 00784 uint8_t p_da; 00785 uint8_t t_da; 00786 00787 /* Get DataReady for pressure */ 00788 if(lps22hh_press_flag_data_ready_get(®_ctx, &p_da) != LPS22HH_OK) 00789 { 00790 return LPS22HH_ERROR; 00791 } 00792 00793 /* Get DataReady for temperature */ 00794 if(lps22hh_temp_flag_data_ready_get(®_ctx, &t_da) != LPS22HH_OK) 00795 { 00796 return LPS22HH_ERROR; 00797 } 00798 00799 if(p_da && t_da) 00800 { 00801 *Status = 1; 00802 } 00803 else 00804 { 00805 *Status = 0; 00806 } 00807 00808 return LPS22HH_OK; 00809 } 00810 00811 int32_t LPS22HH_io_write(void *handle, uint8_t WriteAddr, uint8_t *pBuffer, uint16_t nBytesToWrite) 00812 { 00813 return ((LPS22HH *)handle)->IO_Write(pBuffer, WriteAddr, nBytesToWrite); 00814 } 00815 00816 int32_t LPS22HH_io_read(void *handle, uint8_t ReadAddr, uint8_t *pBuffer, uint16_t nBytesToRead) 00817 { 00818 return ((LPS22HH *)handle)->IO_Read(pBuffer, ReadAddr, nBytesToRead); 00819 } 00820 00821 // *********************************** ***************************************** 00822 00823 00824 00825 /** 00826 * @brief Read generic device register 00827 * 00828 * @param ctx read / write interface definitions(ptr) 00829 * @param reg register to read 00830 * @param data pointer to buffer that store the data read(ptr) 00831 * @param len number of consecutive register to read 00832 * @retval interface status (MANDATORY: return 0 -> no Error) 00833 * 00834 */ 00835 int32_t lps22hh_read_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len) 00836 { 00837 int32_t ret; 00838 ret = ctx->read_reg(ctx->handle, reg, data, len); 00839 return ret; 00840 } 00841 00842 /** 00843 * @brief Write generic device register 00844 * 00845 * @param ctx read / write interface definitions(ptr) 00846 * @param reg register to write 00847 * @param data pointer to data to write in register reg(ptr) 00848 * @param len number of consecutive register to write 00849 * @retval interface status (MANDATORY: return 0 -> no Error) 00850 * 00851 */ 00852 int32_t lps22hh_write_reg(lps22hh_ctx_t* ctx, uint8_t reg, uint8_t* data, uint16_t len) 00853 { 00854 int32_t ret; 00855 ret = ctx->write_reg(ctx->handle, reg, data, len); 00856 return ret; 00857 } 00858 00859 // ************ *************** ************** ************ ************ 00860 // ************ *************** ************** ************ ************ 00861 // ************ *************** ************** ************ ************ 00862 00863 int32_t lps22hh_data_rate_set(lps22hh_ctx_t *ctx, lps22hh_odr_t val) 00864 { 00865 lps22hh_ctrl_reg1_t ctrl_reg1; 00866 lps22hh_ctrl_reg2_t ctrl_reg2; 00867 int32_t ret; 00868 00869 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); 00870 if (ret == 0) { 00871 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 00872 } 00873 if (ret == 0) { 00874 ctrl_reg1.odr = (uint8_t)val & 0x07U; 00875 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); 00876 } 00877 if (ret == 0) { 00878 ctrl_reg2.low_noise_en = ((uint8_t)val & 0x10U) >> 4; 00879 ctrl_reg2.one_shot = ((uint8_t)val & 0x08U) >> 3; 00880 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 00881 } 00882 return ret; 00883 } 00884 00885 /** 00886 * @brief Low-pass bandwidth selection.[set] 00887 * 00888 * @param ctx read / write interface definitions 00889 * @param val change the values of lpfp_cfg in reg CTRL_REG1 00890 * @retval interface status (MANDATORY: return 0 -> no Error) 00891 * 00892 */ 00893 int32_t lps22hh_lp_bandwidth_set(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t val) 00894 { 00895 lps22hh_ctrl_reg1_t reg; 00896 int32_t ret; 00897 00898 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); 00899 if (ret == 0) { 00900 reg.lpfp_cfg = (uint8_t)val; 00901 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); 00902 } 00903 return ret; 00904 } 00905 00906 /** 00907 * @brief Low-pass bandwidth selection.[get] 00908 * 00909 * @param ctx read / write interface definitions 00910 * @param val Get the values of lpfp_cfg in reg CTRL_REG1 00911 * @retval interface status (MANDATORY: return 0 -> no Error) 00912 * 00913 */ 00914 int32_t lps22hh_lp_bandwidth_get(lps22hh_ctx_t *ctx, lps22hh_lpfp_cfg_t *val) 00915 { 00916 lps22hh_ctrl_reg1_t reg; 00917 int32_t ret; 00918 00919 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); 00920 switch (reg.lpfp_cfg) { 00921 case LPS22HH_LPF_ODR_DIV_2: 00922 *val = LPS22HH_LPF_ODR_DIV_2; 00923 break; 00924 case LPS22HH_LPF_ODR_DIV_9: 00925 *val = LPS22HH_LPF_ODR_DIV_9; 00926 break; 00927 case LPS22HH_LPF_ODR_DIV_20: 00928 *val = LPS22HH_LPF_ODR_DIV_20; 00929 break; 00930 default: 00931 *val = LPS22HH_LPF_ODR_DIV_2; 00932 break; 00933 } 00934 00935 return ret; 00936 } 00937 00938 /** 00939 * @brief Block Data Update.[set] 00940 * 00941 * @param ctx read / write interface definitions 00942 * @param val change the values of bdu in reg CTRL_REG1 00943 * @retval interface status (MANDATORY: return 0 -> no Error) 00944 * 00945 */ 00946 int32_t lps22hh_block_data_update_set(lps22hh_ctx_t *ctx, uint8_t val) 00947 { 00948 lps22hh_ctrl_reg1_t reg; 00949 int32_t ret; 00950 00951 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); 00952 if (ret == 0) { 00953 reg.bdu = val; 00954 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*) ®, 1); 00955 } 00956 return ret; 00957 } 00958 00959 /** 00960 * @brief Register address automatically 00961 * incremented during a multiple byte access 00962 * with a serial interface.[set] 00963 * 00964 * @param ctx read / write interface definitions 00965 * @param val change the values of if_add_inc in reg CTRL_REG2 00966 * @retval interface status (MANDATORY: return 0 -> no Error) 00967 * 00968 */ 00969 int32_t lps22hh_auto_increment_set(lps22hh_ctx_t *ctx, uint8_t val) 00970 { 00971 lps22hh_ctrl_reg2_t reg; 00972 int32_t ret; 00973 00974 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); 00975 if (ret == 0) { 00976 reg.if_add_inc = val; 00977 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*) ®, 1); 00978 } 00979 return ret; 00980 } 00981 00982 /** 00983 * @brief Output data rate selection.[get] 00984 * 00985 * @param ctx read / write interface definitions 00986 * @param val Get the values of odr in reg CTRL_REG1 00987 * @retval interface status (MANDATORY: return 0 -> no Error) 00988 * 00989 */ 00990 int32_t lps22hh_data_rate_get(lps22hh_ctx_t *ctx, lps22hh_odr_t *val) 00991 { 00992 lps22hh_ctrl_reg1_t ctrl_reg1; 00993 lps22hh_ctrl_reg2_t ctrl_reg2; 00994 int32_t ret; 00995 00996 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG1, (uint8_t*)&ctrl_reg1, 1); 00997 if (ret == 0) { 00998 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 00999 } 01000 if (ret == 0) { 01001 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG2, (uint8_t*)&ctrl_reg2, 1); 01002 switch (((ctrl_reg2.low_noise_en << 4) + (ctrl_reg2.one_shot << 3) + 01003 ctrl_reg1.odr )) { 01004 case LPS22HH_POWER_DOWN: 01005 *val = LPS22HH_POWER_DOWN; 01006 break; 01007 case LPS22HH_ONE_SHOOT: 01008 *val = LPS22HH_ONE_SHOOT; 01009 break; 01010 case LPS22HH_1_Hz: 01011 *val = LPS22HH_1_Hz; 01012 break; 01013 case LPS22HH_10_Hz: 01014 *val = LPS22HH_10_Hz; 01015 break; 01016 case LPS22HH_25_Hz: 01017 *val = LPS22HH_25_Hz; 01018 break; 01019 case LPS22HH_50_Hz: 01020 *val = LPS22HH_50_Hz; 01021 break; 01022 case LPS22HH_75_Hz: 01023 *val = LPS22HH_75_Hz; 01024 break; 01025 case LPS22HH_1_Hz_LOW_NOISE: 01026 *val = LPS22HH_1_Hz_LOW_NOISE; 01027 break; 01028 case LPS22HH_10_Hz_LOW_NOISE: 01029 *val = LPS22HH_10_Hz_LOW_NOISE; 01030 break; 01031 case LPS22HH_25_Hz_LOW_NOISE: 01032 *val = LPS22HH_25_Hz_LOW_NOISE; 01033 break; 01034 case LPS22HH_50_Hz_LOW_NOISE: 01035 *val = LPS22HH_50_Hz_LOW_NOISE; 01036 break; 01037 case LPS22HH_75_Hz_LOW_NOISE: 01038 *val = LPS22HH_75_Hz_LOW_NOISE; 01039 break; 01040 case LPS22HH_100_Hz: 01041 *val = LPS22HH_100_Hz; 01042 break; 01043 case LPS22HH_200_Hz: 01044 *val = LPS22HH_200_Hz; 01045 break; 01046 default: 01047 *val = LPS22HH_POWER_DOWN; 01048 break; 01049 } 01050 } 01051 return ret; 01052 } 01053 01054 /** 01055 * @brief Pressure output value.[get] 01056 * 01057 * @param ctx read / write interface definitions 01058 * @param buff buffer that stores data read 01059 * @retval interface status (MANDATORY: return 0 -> no Error) 01060 * 01061 */ 01062 int32_t lps22hh_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) 01063 { 01064 int32_t ret; 01065 ret = lps22hh_read_reg(ctx, LPS22HH_PRESSURE_OUT_XL, buff, 3); 01066 return ret; 01067 } 01068 01069 /** 01070 * @brief Temperature output value.[get] 01071 * 01072 * @param ctx read / write interface definitions 01073 * @param buff buffer that stores data read 01074 * @retval interface status (MANDATORY: return 0 -> no Error) 01075 * 01076 */ 01077 int32_t lps22hh_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) 01078 { 01079 int32_t ret; 01080 ret = lps22hh_read_reg(ctx, LPS22HH_TEMP_OUT_L, buff, 2); 01081 return ret; 01082 } 01083 01084 /** 01085 * @brief Pressure new data available.[get] 01086 * 01087 * @param ctx read / write interface definitions 01088 * @param val change the values of p_da in reg STATUS 01089 * @retval interface status (MANDATORY: return 0 -> no Error) 01090 * 01091 */ 01092 int32_t lps22hh_press_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val) 01093 { 01094 lps22hh_status_t reg; 01095 int32_t ret; 01096 01097 ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) ®, 1); 01098 *val = reg.p_da; 01099 01100 return ret; 01101 } 01102 01103 /** 01104 * @brief Temperature data available.[get] 01105 * 01106 * @param ctx read / write interface definitions 01107 * @param val change the values of t_da in reg STATUS 01108 * @retval interface status (MANDATORY: return 0 -> no Error) 01109 * 01110 */ 01111 int32_t lps22hh_temp_flag_data_ready_get(lps22hh_ctx_t *ctx, uint8_t *val) 01112 { 01113 lps22hh_status_t reg; 01114 int32_t ret; 01115 01116 ret = lps22hh_read_reg(ctx, LPS22HH_STATUS, (uint8_t*) ®, 1); 01117 *val = reg.t_da; 01118 01119 return ret; 01120 } 01121 01122 /** 01123 * @brief Pressure output from FIFO value.[get] 01124 * 01125 * @param ctx read / write interface definitions 01126 * @param buff buffer that stores data read 01127 * @retval interface status (MANDATORY: return 0 -> no Error) 01128 * 01129 */ 01130 int32_t lps22hh_fifo_pressure_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) 01131 { 01132 int32_t ret; 01133 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_PRESS_XL, buff, 3); 01134 return ret; 01135 } 01136 01137 /** 01138 * @brief Temperature output from FIFO value.[get] 01139 * 01140 * @param ctx read / write interface definitions 01141 * @param buff buffer that stores data read 01142 * @retval interface status (MANDATORY: return 0 -> no Error) 01143 * 01144 */ 01145 int32_t lps22hh_fifo_temperature_raw_get(lps22hh_ctx_t *ctx, uint8_t *buff) 01146 { 01147 int32_t ret; 01148 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_DATA_OUT_TEMP_L, buff, 2); 01149 return ret; 01150 } 01151 01152 /** 01153 * @brief FIFO watermark status.[get] 01154 * 01155 * @param ctx read / write interface definitions 01156 * @param val change the values of fifo_wtm_ia in reg FIFO_STATUS2 01157 * @retval interface status (MANDATORY: return 0 -> no Error) 01158 * 01159 */ 01160 int32_t lps22hh_fifo_wtm_flag_get(lps22hh_ctx_t *ctx, uint8_t *val) 01161 { 01162 lps22hh_fifo_status2_t reg; 01163 int32_t ret; 01164 01165 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1); 01166 *val = reg.fifo_wtm_ia; 01167 01168 return ret; 01169 } 01170 01171 /** 01172 * @brief Read all the FIFO status flag of the device.[get] 01173 * 01174 * @param ctx read / write interface definitions 01175 * @param val registers FIFO_STATUS2 01176 * @retval interface status (MANDATORY: return 0 -> no Error) 01177 * 01178 */ 01179 int32_t lps22hh_fifo_src_get(lps22hh_ctx_t *ctx, lps22hh_fifo_status2_t *val) 01180 { 01181 int32_t ret; 01182 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) val, 1); 01183 return ret; 01184 } 01185 01186 /** 01187 * @brief Smart FIFO full status.[get] 01188 * 01189 * @param ctx read / write interface definitions 01190 * @param val change the values of fifo_full_ia in reg FIFO_STATUS2 01191 * @retval interface status (MANDATORY: return 0 -> no Error) 01192 * 01193 */ 01194 int32_t lps22hh_fifo_full_flag_get(lps22hh_ctx_t *ctx, uint8_t *val) 01195 { 01196 lps22hh_fifo_status2_t reg; 01197 int32_t ret; 01198 01199 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1); 01200 *val = reg.fifo_full_ia; 01201 01202 return ret; 01203 } 01204 01205 /** 01206 * @brief FIFO overrun status.[get] 01207 * 01208 * @param ctx read / write interface definitions 01209 * @param val change the values of fifo_ovr_ia in reg FIFO_STATUS2 01210 * @retval interface status (MANDATORY: return 0 -> no Error) 01211 * 01212 */ 01213 int32_t lps22hh_fifo_ovr_flag_get(lps22hh_ctx_t *ctx, uint8_t *val) 01214 { 01215 lps22hh_fifo_status2_t reg; 01216 int32_t ret; 01217 01218 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS2, (uint8_t*) ®, 1); 01219 *val = reg.fifo_ovr_ia; 01220 01221 return ret; 01222 } 01223 01224 /** 01225 * @brief FIFO stored data level.[get] 01226 * 01227 * @param ctx read / write interface definitions 01228 * @param buff buffer that stores data read 01229 * @retval interface status (MANDATORY: return 0 -> no Error) 01230 * 01231 */ 01232 int32_t lps22hh_fifo_data_level_get(lps22hh_ctx_t *ctx, uint8_t *buff) 01233 { 01234 int32_t ret; 01235 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_STATUS1, buff, 1); 01236 return ret; 01237 } 01238 01239 /** 01240 * @brief FIFO watermark status on INT_DRDY pin.[set] 01241 * 01242 * @param lps22hh_ctx_t *ctx: read / write interface definitions 01243 * @param uint8_t val: change the values of f_fth in reg CTRL_REG3 01244 * 01245 */ 01246 int32_t lps22hh_fifo_threshold_on_int_set(lps22hh_ctx_t *ctx, uint8_t val) 01247 { 01248 lps22hh_reg_t reg; 01249 int32_t ret; 01250 01251 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); 01252 reg.ctrl_reg3.int_f_wtm = val; 01253 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); 01254 01255 return ret; 01256 } 01257 01258 /** 01259 * @brief FIFO full flag on INT_DRDY pin.[set] 01260 * 01261 * @param lps22hh_ctx_t *ctx: read / write interface definitions 01262 * @param uint8_t val: change the values of f_fss5 in reg CTRL_REG3 01263 * 01264 */ 01265 int32_t lps22hh_fifo_full_on_int_set(lps22hh_ctx_t *ctx, uint8_t val) 01266 { 01267 lps22hh_reg_t reg; 01268 int32_t ret; 01269 01270 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); 01271 reg.ctrl_reg3.int_f_full = val; 01272 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); 01273 01274 return ret; 01275 } 01276 01277 /** 01278 * @brief FIFO overrun interrupt on INT_DRDY pin.[set] 01279 * 01280 * @param lps22hh_ctx_t *ctx: read / write interface definitions 01281 * @param uint8_t val: change the values of f_ovr in reg CTRL_REG3 01282 * 01283 */ 01284 int32_t lps22hh_fifo_ovr_on_int_set(lps22hh_ctx_t *ctx, uint8_t val) 01285 { 01286 lps22hh_reg_t reg; 01287 int32_t ret; 01288 01289 ret = lps22hh_read_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); 01290 reg.ctrl_reg3.int_f_ovr = val; 01291 ret = lps22hh_write_reg(ctx, LPS22HH_CTRL_REG3, &(reg.byte), 1); 01292 01293 return ret; 01294 } 01295 01296 /** 01297 * @brief Fifo Mode selection.[set] 01298 * 01299 * @param ctx read / write interface definitions 01300 * @param val change the values of f_mode in reg FIFO_CTRL 01301 * @retval interface status (MANDATORY: return 0 -> no Error) 01302 * 01303 */ 01304 01305 int32_t lps22hh_fifo_mode_set(lps22hh_ctx_t *ctx, lps22hh_f_mode_t val) 01306 { 01307 lps22hh_fifo_ctrl_t reg; 01308 int32_t ret; 01309 01310 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); 01311 if (ret == 0) { 01312 reg.f_mode = (uint8_t)val; 01313 ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); 01314 } 01315 return ret; 01316 } 01317 01318 /** 01319 * @brief Fifo Mode selection.[get] 01320 * 01321 * @param ctx read / write interface definitions 01322 * @param val Get the values of f_mode in reg FIFO_CTRL 01323 * @retval interface status (MANDATORY: return 0 -> no Error) 01324 * 01325 */ 01326 01327 int32_t lps22hh_fifo_mode_get(lps22hh_ctx_t *ctx, lps22hh_f_mode_t *val) 01328 { 01329 lps22hh_fifo_ctrl_t reg; 01330 int32_t ret; 01331 01332 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); 01333 01334 switch (reg.f_mode) { 01335 case LPS22HH_BYPASS_MODE: 01336 *val = LPS22HH_BYPASS_MODE; 01337 break; 01338 case LPS22HH_FIFO_MODE: 01339 *val = LPS22HH_FIFO_MODE; 01340 break; 01341 case LPS22HH_STREAM_MODE: 01342 *val = LPS22HH_STREAM_MODE; 01343 break; 01344 case LPS22HH_DYNAMIC_STREAM_MODE: 01345 *val = LPS22HH_DYNAMIC_STREAM_MODE; 01346 break; 01347 case LPS22HH_BYPASS_TO_FIFO_MODE: 01348 *val = LPS22HH_BYPASS_TO_FIFO_MODE; 01349 break; 01350 case LPS22HH_BYPASS_TO_STREAM_MODE: 01351 *val = LPS22HH_BYPASS_TO_STREAM_MODE; 01352 break; 01353 case LPS22HH_STREAM_TO_FIFO_MODE: 01354 *val = LPS22HH_STREAM_TO_FIFO_MODE; 01355 break; 01356 default: 01357 *val = LPS22HH_BYPASS_MODE; 01358 break; 01359 } 01360 01361 return ret; 01362 } 01363 01364 /** 01365 * @brief Sensing chain FIFO stop values memorization at 01366 * threshold level.[set] 01367 * 01368 * @param ctx read / write interface definitions 01369 * @param val change the values of stop_on_wtm in reg FIFO_CTRL 01370 * @retval interface status (MANDATORY: return 0 -> no Error) 01371 * 01372 */ 01373 int32_t lps22hh_fifo_stop_on_wtm_set(lps22hh_ctx_t *ctx, uint8_t val) 01374 { 01375 lps22hh_fifo_ctrl_t reg; 01376 int32_t ret; 01377 01378 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); 01379 if (ret == 0) { 01380 reg.stop_on_wtm = val; 01381 ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_CTRL, (uint8_t*) ®, 1); 01382 } 01383 return ret; 01384 } 01385 01386 /** 01387 * @brief FIFO watermark level selection.[set] 01388 * 01389 * @param ctx read / write interface definitions 01390 * @param val change the values of wtm in reg FIFO_WTM 01391 * @retval interface status (MANDATORY: return 0 -> no Error) 01392 * 01393 */ 01394 int32_t lps22hh_fifo_watermark_set(lps22hh_ctx_t *ctx, uint8_t val) 01395 { 01396 lps22hh_fifo_wtm_t reg; 01397 int32_t ret; 01398 01399 ret = lps22hh_read_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1); 01400 if (ret == 0) { 01401 reg.wtm = val; 01402 ret = lps22hh_write_reg(ctx, LPS22HH_FIFO_WTM, (uint8_t*) ®, 1); 01403 } 01404 return ret; 01405 }
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