Beacon code

Dependencies:   mbed

Committer:
gkumar
Date:
Thu May 14 13:51:23 2015 +0000
Revision:
0:a3fc5d243904
Beacon

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gkumar 0:a3fc5d243904 1 /*#include "beacon.h"
gkumar 0:a3fc5d243904 2 #include "HK.h"
gkumar 0:a3fc5d243904 3 Serial chavan(USBTX, USBRX); // tx, rx
gkumar 0:a3fc5d243904 4 SPI spi(PTD6,PTD7,PTD5); // mosi, miso, sclk
gkumar 0:a3fc5d243904 5 DigitalOut cs(PTC11); //slave select or chip select
gkumar 0:a3fc5d243904 6
gkumar 0:a3fc5d243904 7 extern ShortBeacy Shortbeacon;*/
gkumar 0:a3fc5d243904 8 #include "beacon.h"
gkumar 0:a3fc5d243904 9 Serial pc(USBTX, USBRX); // tx, rx
gkumar 0:a3fc5d243904 10 SPI spi(D11, D12, D13); // mosi, miso, sclk
gkumar 0:a3fc5d243904 11 DigitalOut cs(D10); //slave select or chip select
gkumar 0:a3fc5d243904 12 Serial chavan(USBTX, USBRX); // tx, rx
gkumar 0:a3fc5d243904 13
gkumar 0:a3fc5d243904 14 void writereg(uint8_t reg,uint8_t val)
gkumar 0:a3fc5d243904 15 {
gkumar 0:a3fc5d243904 16 cs = 0;__disable_irq();spi.write(reg | 0x80);spi.write(val);__enable_irq();cs = 1;
gkumar 0:a3fc5d243904 17 }
gkumar 0:a3fc5d243904 18 uint8_t readreg(uint8_t reg)
gkumar 0:a3fc5d243904 19 {
gkumar 0:a3fc5d243904 20 int val;cs = 0;__disable_irq();spi.write(reg & ~0x80);val = spi.write(0);__enable_irq();cs = 1;return val;
gkumar 0:a3fc5d243904 21 }
gkumar 0:a3fc5d243904 22 void clearTxBuf()
gkumar 0:a3fc5d243904 23 {
gkumar 0:a3fc5d243904 24 writereg(RF22_REG_08_OPERATING_MODE2,0x01);
gkumar 0:a3fc5d243904 25 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
gkumar 0:a3fc5d243904 26 }
gkumar 0:a3fc5d243904 27 void clearRxBuf()
gkumar 0:a3fc5d243904 28 {
gkumar 0:a3fc5d243904 29 writereg(RF22_REG_08_OPERATING_MODE2,0x02);
gkumar 0:a3fc5d243904 30 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
gkumar 0:a3fc5d243904 31 }
gkumar 0:a3fc5d243904 32 int setFrequency(float centre,float afcPullInRange)
gkumar 0:a3fc5d243904 33 {
gkumar 0:a3fc5d243904 34 //freq setting begins
gkumar 0:a3fc5d243904 35 uint8_t fbsel = 0x40;
gkumar 0:a3fc5d243904 36 uint8_t afclimiter;
gkumar 0:a3fc5d243904 37 if (centre >= 480.0) {
gkumar 0:a3fc5d243904 38 centre /= 2;
gkumar 0:a3fc5d243904 39 fbsel |= 0x20;
gkumar 0:a3fc5d243904 40 afclimiter = afcPullInRange * 1000000.0 / 1250.0;
gkumar 0:a3fc5d243904 41 } else {
gkumar 0:a3fc5d243904 42 if (afcPullInRange < 0.0 || afcPullInRange > 0.159375)
gkumar 0:a3fc5d243904 43 return false;
gkumar 0:a3fc5d243904 44 afclimiter = afcPullInRange * 1000000.0 / 625.0;
gkumar 0:a3fc5d243904 45 }
gkumar 0:a3fc5d243904 46 centre /= 10.0;
gkumar 0:a3fc5d243904 47 float integerPart = floor(centre);
gkumar 0:a3fc5d243904 48 float fractionalPart = centre - integerPart;
gkumar 0:a3fc5d243904 49
gkumar 0:a3fc5d243904 50 uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23
gkumar 0:a3fc5d243904 51 fbsel |= fb;
gkumar 0:a3fc5d243904 52 uint16_t fc = fractionalPart * 64000;
gkumar 0:a3fc5d243904 53 writereg(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT
gkumar 0:a3fc5d243904 54 writereg(RF22_REG_74_FREQUENCY_OFFSET2, 0);
gkumar 0:a3fc5d243904 55 writereg(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel);
gkumar 0:a3fc5d243904 56 writereg(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8);
gkumar 0:a3fc5d243904 57 writereg(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff);
gkumar 0:a3fc5d243904 58 writereg(RF22_REG_2A_AFC_LIMITER, afclimiter);
gkumar 0:a3fc5d243904 59 return 0;
gkumar 0:a3fc5d243904 60 }
gkumar 0:a3fc5d243904 61
gkumar 0:a3fc5d243904 62 void init()
gkumar 0:a3fc5d243904 63 {
gkumar 0:a3fc5d243904 64 //reset()
gkumar 0:a3fc5d243904 65 writereg(RF22_REG_07_OPERATING_MODE1,0x80); //sw_reset
gkumar 0:a3fc5d243904 66 wait(1); //takes time to reset
gkumar 0:a3fc5d243904 67
gkumar 0:a3fc5d243904 68 clearTxBuf();
gkumar 0:a3fc5d243904 69 clearRxBuf();
gkumar 0:a3fc5d243904 70 //txfifoalmostempty
gkumar 0:a3fc5d243904 71 writereg(RF22_REG_7D_TX_FIFO_CONTROL2,5);
gkumar 0:a3fc5d243904 72 //rxfifoalmostfull
gkumar 0:a3fc5d243904 73 writereg(RF22_REG_7E_RX_FIFO_CONTROL,20);
gkumar 0:a3fc5d243904 74 //Packet-engine registers
gkumar 0:a3fc5d243904 75 writereg(RF22_REG_30_DATA_ACCESS_CONTROL,0x8E); //RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM
gkumar 0:a3fc5d243904 76 //&0x77 = diasable packet rx-tx handling
gkumar 0:a3fc5d243904 77 writereg(RF22_REG_32_HEADER_CONTROL1,0x88); //RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3
gkumar 0:a3fc5d243904 78 writereg(RF22_REG_33_HEADER_CONTROL2,0x42); //RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2
gkumar 0:a3fc5d243904 79 writereg(RF22_REG_34_PREAMBLE_LENGTH,8); //RF22_REG_34_PREAMBLE_LENGTH, nibbles); preamble length = 8;
gkumar 0:a3fc5d243904 80 writereg(RF22_REG_36_SYNC_WORD3,0x2D); //syncword3=2D
gkumar 0:a3fc5d243904 81 writereg(RF22_REG_37_SYNC_WORD2,0xD4); //syncword2=D4
gkumar 0:a3fc5d243904 82 writereg(RF22_REG_3F_CHECK_HEADER3,0); //RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS
gkumar 0:a3fc5d243904 83 writereg(RF22_REG_3A_TRANSMIT_HEADER3,0xab); //header_to
gkumar 0:a3fc5d243904 84 writereg(RF22_REG_3B_TRANSMIT_HEADER2,0xbc); //header_from
gkumar 0:a3fc5d243904 85 writereg(RF22_REG_3C_TRANSMIT_HEADER1,0xcd); //header_ids
gkumar 0:a3fc5d243904 86 writereg(RF22_REG_3D_TRANSMIT_HEADER0,0xde); //header_flags
gkumar 0:a3fc5d243904 87 writereg(RF22_REG_3F_CHECK_HEADER3,0xab);
gkumar 0:a3fc5d243904 88 writereg(RF22_REG_40_CHECK_HEADER2,0xbc);
gkumar 0:a3fc5d243904 89 writereg(RF22_REG_41_CHECK_HEADER1,0xcd);
gkumar 0:a3fc5d243904 90 writereg(RF22_REG_42_CHECK_HEADER0,0xde);
gkumar 0:a3fc5d243904 91
gkumar 0:a3fc5d243904 92 //RSSI threshold for clear channel indicator
gkumar 0:a3fc5d243904 93 writereg(RF22_REG_27_RSSI_THRESHOLD,0xA5); //55 for -80dBm, 2D for -100dBm, 7D for -60dBm, A5 for -40dBm, CD for -20 dBm
gkumar 0:a3fc5d243904 94
gkumar 0:a3fc5d243904 95 writereg(RF22_REG_0B_GPIO_CONFIGURATION0,0x15); // TX state ??
gkumar 0:a3fc5d243904 96 writereg(RF22_REG_0C_GPIO_CONFIGURATION1,0x12); // RX state ??
gkumar 0:a3fc5d243904 97
gkumar 0:a3fc5d243904 98 //interrupts
gkumar 0:a3fc5d243904 99 // spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM |RF22_ENRXFFAFULL | RF22_ENPKSENT |RF22_ENPKVALID| RF22_ENCRCERROR);
gkumar 0:a3fc5d243904 100 // spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL);
gkumar 0:a3fc5d243904 101
gkumar 0:a3fc5d243904 102 setFrequency(435.0, 0.05);
gkumar 0:a3fc5d243904 103
gkumar 0:a3fc5d243904 104 //return !(statusRead() & RF22_FREQERR);
gkumar 0:a3fc5d243904 105 if((readreg(RF22_REG_02_DEVICE_STATUS)& 0x08)!= 0x00)
gkumar 0:a3fc5d243904 106 pc.printf("frequency not set properly\n");
gkumar 0:a3fc5d243904 107 //frequency set
gkumar 0:a3fc5d243904 108
gkumar 0:a3fc5d243904 109 //setModemConfig(FSK_Rb2_4Fd36); FSK_Rb2_4Fd36, ///< FSK, No Manchester, Rb = 2.4kbs, Fd = 36kHz
gkumar 0:a3fc5d243904 110 //setmodemregisters
gkumar 0:a3fc5d243904 111 //0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a = FSK_RB2_4FD36
gkumar 0:a3fc5d243904 112 //0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 = OOK,2.4, 335
gkumar 0:a3fc5d243904 113 writereg(RF22_REG_1C_IF_FILTER_BANDWIDTH,0x2B);
gkumar 0:a3fc5d243904 114 writereg(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE,0x03);
gkumar 0:a3fc5d243904 115 writereg(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE,0x41);
gkumar 0:a3fc5d243904 116 writereg(RF22_REG_21_CLOCK_RECOVERY_OFFSET2,0x60);
gkumar 0:a3fc5d243904 117 writereg(RF22_REG_22_CLOCK_RECOVERY_OFFSET1,0x27); //updated 20 to 25 reg values from excel sheet for 1.2 Khz freq. deviation,fsk
gkumar 0:a3fc5d243904 118 writereg(RF22_REG_23_CLOCK_RECOVERY_OFFSET0,0x52);
gkumar 0:a3fc5d243904 119 writereg(RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1,0x00);
gkumar 0:a3fc5d243904 120 writereg(RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0,0x51);
gkumar 0:a3fc5d243904 121 /*writereg(RF22_REG_2C_OOK_COUNTER_VALUE_1,0x2a);
gkumar 0:a3fc5d243904 122 writereg(RF22_REG_2D_OOK_COUNTER_VALUE_2,0x08);*/ //not required for fsk (OOK counter value)
gkumar 0:a3fc5d243904 123 writereg(RF22_REG_2E_SLICER_PEAK_HOLD,0x1e); //??
gkumar 0:a3fc5d243904 124 writereg(RF22_REG_58,0x80);
gkumar 0:a3fc5d243904 125 writereg(RF22_REG_69_AGC_OVERRIDE1,0x60);
gkumar 0:a3fc5d243904 126 writereg(RF22_REG_6E_TX_DATA_RATE1,0x09);
gkumar 0:a3fc5d243904 127 writereg(RF22_REG_6F_TX_DATA_RATE0,0xd5);
gkumar 0:a3fc5d243904 128 writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c);
gkumar 0:a3fc5d243904 129 writereg(RF22_REG_71_MODULATION_CONTROL2,0x22);//ook = 0x21 //fsk = 0x22
gkumar 0:a3fc5d243904 130 writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x02);
gkumar 0:a3fc5d243904 131 //set tx power
gkumar 0:a3fc5d243904 132 writereg(RF22_REG_6D_TX_POWER,0x07); //20dbm
gkumar 0:a3fc5d243904 133 writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA); //packet length
gkumar 0:a3fc5d243904 134 }
gkumar 0:a3fc5d243904 135 int main()
gkumar 0:a3fc5d243904 136 {
gkumar 0:a3fc5d243904 137 printf("\nBeacon function entered\n");
gkumar 0:a3fc5d243904 138 wait(1); // wait for POR to complete //change the timing later
gkumar 0:a3fc5d243904 139 cs=1; // chip must be deselected
gkumar 0:a3fc5d243904 140 wait(1); //change the time later
gkumar 0:a3fc5d243904 141 spi.format(8,0);
gkumar 0:a3fc5d243904 142 spi.frequency(10000000); //10MHz SCLK
gkumar 0:a3fc5d243904 143 if (readreg(RF22_REG_00_DEVICE_TYPE) == 0x08) pc.printf("spi connection valid\n");
gkumar 0:a3fc5d243904 144 else pc.printf("error in spi connection\n");
gkumar 0:a3fc5d243904 145
gkumar 0:a3fc5d243904 146 init();
gkumar 0:a3fc5d243904 147
gkumar 0:a3fc5d243904 148 //********
gkumar 0:a3fc5d243904 149 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
gkumar 0:a3fc5d243904 150 wait(0.02); // pl. update this value or even avoid it!!!
gkumar 0:a3fc5d243904 151 //extract values from short_beacon[]
gkumar 0:a3fc5d243904 152 uint8_t byte_counter = 0;
gkumar 0:a3fc5d243904 153 struct Short_beacon{
gkumar 0:a3fc5d243904 154 uint8_t Voltage[1];
gkumar 0:a3fc5d243904 155 uint8_t AngularSpeed[2];
gkumar 0:a3fc5d243904 156 uint8_t SubsystemStatus[1];
gkumar 0:a3fc5d243904 157 uint8_t Temp[3];
gkumar 0:a3fc5d243904 158 uint8_t ErrorFlag[1];
gkumar 0:a3fc5d243904 159 }Shortbeacon = { {0x88}, {0x99, 0xAA} , {0xAA},{0xAA,0xDD,0xEE}, {0x00} };
gkumar 0:a3fc5d243904 160
gkumar 0:a3fc5d243904 161 //filling hk data
gkumar 0:a3fc5d243904 162 uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]};
gkumar 0:a3fc5d243904 163
gkumar 0:a3fc5d243904 164 for(int i = 0; i < 15 ; i++)
gkumar 0:a3fc5d243904 165 {
gkumar 0:a3fc5d243904 166 chavan.printf("0x%X\n",(short_beacon[i]));
gkumar 0:a3fc5d243904 167 }
gkumar 0:a3fc5d243904 168 //tx settings begin
gkumar 0:a3fc5d243904 169 //setModeIdle();
gkumar 0:a3fc5d243904 170 writereg(RF22_REG_07_OPERATING_MODE1,0x01); //ready mode
gkumar 0:a3fc5d243904 171 //fillTxBuf(data, len);
gkumar 0:a3fc5d243904 172 clearTxBuf();
gkumar 0:a3fc5d243904 173
gkumar 0:a3fc5d243904 174 //Set to Tx mode
gkumar 0:a3fc5d243904 175 writereg(RF22_REG_07_OPERATING_MODE1,0x09);
gkumar 0:a3fc5d243904 176
gkumar 0:a3fc5d243904 177 while(byte_counter!=15){
gkumar 0:a3fc5d243904 178 //Check for fifoThresh
gkumar 0:a3fc5d243904 179 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20);
gkumar 0:a3fc5d243904 180 //writing again
gkumar 0:a3fc5d243904 181 cs = 0;
gkumar 0:a3fc5d243904 182 spi.write(0xFF);
gkumar 0:a3fc5d243904 183 for(int i=7; i>=0 ;i--)
gkumar 0:a3fc5d243904 184 {
gkumar 0:a3fc5d243904 185 //pc.printf("%d\n",byte_counter);
gkumar 0:a3fc5d243904 186 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
gkumar 0:a3fc5d243904 187 {
gkumar 0:a3fc5d243904 188 spi.write(0xFF);
gkumar 0:a3fc5d243904 189 spi.write(0xFF);
gkumar 0:a3fc5d243904 190 }
gkumar 0:a3fc5d243904 191 else
gkumar 0:a3fc5d243904 192 {
gkumar 0:a3fc5d243904 193 spi.write(0x00);
gkumar 0:a3fc5d243904 194 spi.write(0x00);
gkumar 0:a3fc5d243904 195
gkumar 0:a3fc5d243904 196 }
gkumar 0:a3fc5d243904 197 }
gkumar 0:a3fc5d243904 198 cs = 1;
gkumar 0:a3fc5d243904 199 byte_counter++;
gkumar 0:a3fc5d243904 200
gkumar 0:a3fc5d243904 201 }
gkumar 0:a3fc5d243904 202 //rf22.waitPacketSent();
gkumar 0:a3fc5d243904 203 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) != 0x04)pc.printf(" chck pkt sent!\n");
gkumar 0:a3fc5d243904 204 printf("\nBeacon function exiting\n");
gkumar 0:a3fc5d243904 205
gkumar 0:a3fc5d243904 206 }