George Roussos / BLE_iBeacon_Exercise

Birkbeck College Mobile and Ubiquitous Computing IoT Lab Exercise 2

Dependencies:   BLE_API_Native_blog

mbed/TARGET_NRF51822/nrf_soc.h@0:e8fdba0ed044, 2015-03-07 (annotated)

Committer:
gkroussos
Date:
Sat Mar 07 16:34:53 2015 +0000
Revision:
0:e8fdba0ed044
MUC IoT Workshop v1.0

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gkroussos 0:e8fdba0ed044 1 /* Copyright (c) 2011 Nordic Semiconductor. All Rights Reserved.
gkroussos 0:e8fdba0ed044 2 *
gkroussos 0:e8fdba0ed044 3 * The information contained herein is confidential property of Nordic Semiconductor. The use,
gkroussos 0:e8fdba0ed044 4 * copying, transfer or disclosure of such information is prohibited except by express written
gkroussos 0:e8fdba0ed044 5 * agreement with Nordic Semiconductor.
gkroussos 0:e8fdba0ed044 6 *
gkroussos 0:e8fdba0ed044 7 */
gkroussos 0:e8fdba0ed044 8
gkroussos 0:e8fdba0ed044 9 /**
gkroussos 0:e8fdba0ed044 10 @defgroup nrf_soc_api SoC Library API
gkroussos 0:e8fdba0ed044 11 @{
gkroussos 0:e8fdba0ed044 12
gkroussos 0:e8fdba0ed044 13 @brief APIs for the SoC library.
gkroussos 0:e8fdba0ed044 14
gkroussos 0:e8fdba0ed044 15 */
gkroussos 0:e8fdba0ed044 16
gkroussos 0:e8fdba0ed044 17 #ifndef NRF_SOC_H__
gkroussos 0:e8fdba0ed044 18 #define NRF_SOC_H__
gkroussos 0:e8fdba0ed044 19
gkroussos 0:e8fdba0ed044 20 #include <stdint.h>
gkroussos 0:e8fdba0ed044 21 #include <stdbool.h>
gkroussos 0:e8fdba0ed044 22 #include "nrf_svc.h"
gkroussos 0:e8fdba0ed044 23 #include "nrf51.h"
gkroussos 0:e8fdba0ed044 24 #include "nrf51_bitfields.h"
gkroussos 0:e8fdba0ed044 25 #include "nrf_error_soc.h"
gkroussos 0:e8fdba0ed044 26
gkroussos 0:e8fdba0ed044 27 /** @addtogroup NRF_SOC_DEFINES Defines
gkroussos 0:e8fdba0ed044 28 * @{ */
gkroussos 0:e8fdba0ed044 29
gkroussos 0:e8fdba0ed044 30 /**@brief The number of the lowest SVC number reserved for the SoC library. */
gkroussos 0:e8fdba0ed044 31 #define SOC_SVC_BASE 0x20
gkroussos 0:e8fdba0ed044 32
gkroussos 0:e8fdba0ed044 33 /**@brief Guranteed time for application to process radio inactive notification. */
gkroussos 0:e8fdba0ed044 34 #define NRF_RADIO_NOTIFICATION_INACTIVE_GUARANTEED_TIME_US (62)
gkroussos 0:e8fdba0ed044 35
gkroussos 0:e8fdba0ed044 36 #define SOC_ECB_KEY_LENGTH (16) /**< ECB key length. */
gkroussos 0:e8fdba0ed044 37 #define SOC_ECB_CLEARTEXT_LENGTH (16) /**< ECB cleartext length. */
gkroussos 0:e8fdba0ed044 38 #define SOC_ECB_CIPHERTEXT_LENGTH (SOC_ECB_CLEARTEXT_LENGTH) /**< ECB ciphertext length. */
gkroussos 0:e8fdba0ed044 39
gkroussos 0:e8fdba0ed044 40 #define SD_EVT_IRQn (SWI2_IRQn) /**< SoftDevice Event IRQ number. Used for both protocol events and SoC events. */
gkroussos 0:e8fdba0ed044 41 #define SD_EVT_IRQHandler (SWI2_IRQHandler) /**< SoftDevice Event IRQ handler. Used for both protocol events and SoC events. */
gkroussos 0:e8fdba0ed044 42 #define RADIO_NOTIFICATION_IRQn (SWI1_IRQn) /**< The radio notification IRQ number. */
gkroussos 0:e8fdba0ed044 43 #define RADIO_NOTIFICATION_IRQHandler (SWI1_IRQHandler) /**< The radio notification IRQ handler. */
gkroussos 0:e8fdba0ed044 44
gkroussos 0:e8fdba0ed044 45 /** @} */
gkroussos 0:e8fdba0ed044 46
gkroussos 0:e8fdba0ed044 47 /** @addtogroup NRF_SOC_TYPES Types
gkroussos 0:e8fdba0ed044 48 * @{ */
gkroussos 0:e8fdba0ed044 49
gkroussos 0:e8fdba0ed044 50 /**@brief The SVC numbers used by the SVC functions in the SoC library. */
gkroussos 0:e8fdba0ed044 51 enum NRF_SOC_SVCS
gkroussos 0:e8fdba0ed044 52 {
gkroussos 0:e8fdba0ed044 53 SD_MUTEX_NEW = SOC_SVC_BASE,
gkroussos 0:e8fdba0ed044 54 SD_MUTEX_ACQUIRE,
gkroussos 0:e8fdba0ed044 55 SD_MUTEX_RELEASE,
gkroussos 0:e8fdba0ed044 56 SD_NVIC_ENABLEIRQ,
gkroussos 0:e8fdba0ed044 57 SD_NVIC_DISABLEIRQ,
gkroussos 0:e8fdba0ed044 58 SD_NVIC_GETPENDINGIRQ,
gkroussos 0:e8fdba0ed044 59 SD_NVIC_SETPENDINGIRQ,
gkroussos 0:e8fdba0ed044 60 SD_NVIC_CLEARPENDINGIRQ,
gkroussos 0:e8fdba0ed044 61 SD_NVIC_SETPRIORITY,
gkroussos 0:e8fdba0ed044 62 SD_NVIC_GETPRIORITY,
gkroussos 0:e8fdba0ed044 63 SD_NVIC_SYSTEMRESET,
gkroussos 0:e8fdba0ed044 64 SD_NVIC_CRITICAL_REGION_ENTER,
gkroussos 0:e8fdba0ed044 65 SD_NVIC_CRITICAL_REGION_EXIT,
gkroussos 0:e8fdba0ed044 66 SD_RAND_APPLICATION_POOL_CAPACITY,
gkroussos 0:e8fdba0ed044 67 SD_RAND_APPLICATION_BYTES_AVAILABLE,
gkroussos 0:e8fdba0ed044 68 SD_RAND_APPLICATION_GET_VECTOR,
gkroussos 0:e8fdba0ed044 69 SD_POWER_MODE_SET,
gkroussos 0:e8fdba0ed044 70 SD_POWER_SYSTEM_OFF,
gkroussos 0:e8fdba0ed044 71 SD_POWER_RESET_REASON_GET,
gkroussos 0:e8fdba0ed044 72 SD_POWER_RESET_REASON_CLR,
gkroussos 0:e8fdba0ed044 73 SD_POWER_POF_ENABLE,
gkroussos 0:e8fdba0ed044 74 SD_POWER_POF_THRESHOLD_SET,
gkroussos 0:e8fdba0ed044 75 SD_POWER_RAMON_SET,
gkroussos 0:e8fdba0ed044 76 SD_POWER_RAMON_CLR,
gkroussos 0:e8fdba0ed044 77 SD_POWER_RAMON_GET,
gkroussos 0:e8fdba0ed044 78 SD_POWER_GPREGRET_SET,
gkroussos 0:e8fdba0ed044 79 SD_POWER_GPREGRET_CLR,
gkroussos 0:e8fdba0ed044 80 SD_POWER_GPREGRET_GET,
gkroussos 0:e8fdba0ed044 81 SD_POWER_DCDC_MODE_SET,
gkroussos 0:e8fdba0ed044 82 SD_APP_EVT_WAIT,
gkroussos 0:e8fdba0ed044 83 SD_CLOCK_HFCLK_REQUEST,
gkroussos 0:e8fdba0ed044 84 SD_CLOCK_HFCLK_RELEASE,
gkroussos 0:e8fdba0ed044 85 SD_CLOCK_HFCLK_IS_RUNNING,
gkroussos 0:e8fdba0ed044 86 SD_PPI_CHANNEL_ENABLE_GET,
gkroussos 0:e8fdba0ed044 87 SD_PPI_CHANNEL_ENABLE_SET,
gkroussos 0:e8fdba0ed044 88 SD_PPI_CHANNEL_ENABLE_CLR,
gkroussos 0:e8fdba0ed044 89 SD_PPI_CHANNEL_ASSIGN,
gkroussos 0:e8fdba0ed044 90 SD_PPI_GROUP_TASK_ENABLE,
gkroussos 0:e8fdba0ed044 91 SD_PPI_GROUP_TASK_DISABLE,
gkroussos 0:e8fdba0ed044 92 SD_PPI_GROUP_ASSIGN,
gkroussos 0:e8fdba0ed044 93 SD_PPI_GROUP_GET,
gkroussos 0:e8fdba0ed044 94 SD_RADIO_NOTIFICATION_CFG_SET,
gkroussos 0:e8fdba0ed044 95 SD_ECB_BLOCK_ENCRYPT,
gkroussos 0:e8fdba0ed044 96 SD_RESERVED1,
gkroussos 0:e8fdba0ed044 97 SD_RESERVED2,
gkroussos 0:e8fdba0ed044 98 SD_RESERVED3,
gkroussos 0:e8fdba0ed044 99 SD_EVT_GET,
gkroussos 0:e8fdba0ed044 100 SD_TEMP_GET,
gkroussos 0:e8fdba0ed044 101 SD_FLASH_ERASE_PAGE,
gkroussos 0:e8fdba0ed044 102 SD_FLASH_WRITE,
gkroussos 0:e8fdba0ed044 103 SD_FLASH_PROTECT,
gkroussos 0:e8fdba0ed044 104 SVC_SOC_LAST
gkroussos 0:e8fdba0ed044 105 };
gkroussos 0:e8fdba0ed044 106
gkroussos 0:e8fdba0ed044 107 /**@brief Possible values of a ::nrf_mutex_t. */
gkroussos 0:e8fdba0ed044 108 enum NRF_MUTEX_VALUES
gkroussos 0:e8fdba0ed044 109 {
gkroussos 0:e8fdba0ed044 110 NRF_MUTEX_FREE,
gkroussos 0:e8fdba0ed044 111 NRF_MUTEX_TAKEN
gkroussos 0:e8fdba0ed044 112 };
gkroussos 0:e8fdba0ed044 113
gkroussos 0:e8fdba0ed044 114 /**@brief Possible values of ::nrf_app_irq_priority_t. */
gkroussos 0:e8fdba0ed044 115 enum NRF_APP_PRIORITIES
gkroussos 0:e8fdba0ed044 116 {
gkroussos 0:e8fdba0ed044 117 NRF_APP_PRIORITY_HIGH = 1,
gkroussos 0:e8fdba0ed044 118 NRF_APP_PRIORITY_LOW = 3
gkroussos 0:e8fdba0ed044 119 };
gkroussos 0:e8fdba0ed044 120
gkroussos 0:e8fdba0ed044 121 /**@brief Possible values of ::nrf_power_mode_t. */
gkroussos 0:e8fdba0ed044 122 enum NRF_POWER_MODES
gkroussos 0:e8fdba0ed044 123 {
gkroussos 0:e8fdba0ed044 124 NRF_POWER_MODE_CONSTLAT, /**< Constant latency mode. See power management in the reference manual. */
gkroussos 0:e8fdba0ed044 125 NRF_POWER_MODE_LOWPWR /**< Low power mode. See power management in the reference manual. */
gkroussos 0:e8fdba0ed044 126 };
gkroussos 0:e8fdba0ed044 127
gkroussos 0:e8fdba0ed044 128
gkroussos 0:e8fdba0ed044 129 /**@brief Possible values of ::nrf_power_failure_threshold_t */
gkroussos 0:e8fdba0ed044 130 enum NRF_POWER_THRESHOLDS
gkroussos 0:e8fdba0ed044 131 {
gkroussos 0:e8fdba0ed044 132 NRF_POWER_THRESHOLD_V21, /**< 2.1 Volts power failure threshold. */
gkroussos 0:e8fdba0ed044 133 NRF_POWER_THRESHOLD_V23, /**< 2.3 Volts power failure threshold. */
gkroussos 0:e8fdba0ed044 134 NRF_POWER_THRESHOLD_V25, /**< 2.5 Volts power failure threshold. */
gkroussos 0:e8fdba0ed044 135 NRF_POWER_THRESHOLD_V27 /**< 2.7 Volts power failure threshold. */
gkroussos 0:e8fdba0ed044 136 };
gkroussos 0:e8fdba0ed044 137
gkroussos 0:e8fdba0ed044 138
gkroussos 0:e8fdba0ed044 139 /**@brief Possible values of ::nrf_power_dcdc_mode_t. */
gkroussos 0:e8fdba0ed044 140 enum NRF_POWER_DCDC_MODES
gkroussos 0:e8fdba0ed044 141 {
gkroussos 0:e8fdba0ed044 142 NRF_POWER_DCDC_MODE_OFF, /**< The DCDC is always off. */
gkroussos 0:e8fdba0ed044 143 NRF_POWER_DCDC_MODE_ON, /**< The DCDC is always on. */
gkroussos 0:e8fdba0ed044 144 NRF_POWER_DCDC_MODE_AUTOMATIC /**< The DCDC is automatically managed. */
gkroussos 0:e8fdba0ed044 145 };
gkroussos 0:e8fdba0ed044 146
gkroussos 0:e8fdba0ed044 147 /**@brief Possible values of ::nrf_radio_notification_distance_t. */
gkroussos 0:e8fdba0ed044 148 enum NRF_RADIO_NOTIFICATION_DISTANCES
gkroussos 0:e8fdba0ed044 149 {
gkroussos 0:e8fdba0ed044 150 NRF_RADIO_NOTIFICATION_DISTANCE_NONE = 0, /**< The event does not have a notification. */
gkroussos 0:e8fdba0ed044 151 NRF_RADIO_NOTIFICATION_DISTANCE_800US, /**< The distance from the active notification to start of radio activity. */
gkroussos 0:e8fdba0ed044 152 NRF_RADIO_NOTIFICATION_DISTANCE_1740US, /**< The distance from the active notification to start of radio activity. */
gkroussos 0:e8fdba0ed044 153 NRF_RADIO_NOTIFICATION_DISTANCE_2680US, /**< The distance from the active notification to start of radio activity. */
gkroussos 0:e8fdba0ed044 154 NRF_RADIO_NOTIFICATION_DISTANCE_3620US, /**< The distance from the active notification to start of radio activity. */
gkroussos 0:e8fdba0ed044 155 NRF_RADIO_NOTIFICATION_DISTANCE_4560US, /**< The distance from the active notification to start of radio activity. */
gkroussos 0:e8fdba0ed044 156 NRF_RADIO_NOTIFICATION_DISTANCE_5500US /**< The distance from the active notification to start of radio activity. */
gkroussos 0:e8fdba0ed044 157 };
gkroussos 0:e8fdba0ed044 158
gkroussos 0:e8fdba0ed044 159
gkroussos 0:e8fdba0ed044 160 /**@brief Possible values of ::nrf_radio_notification_type_t. */
gkroussos 0:e8fdba0ed044 161 enum NRF_RADIO_NOTIFICATION_TYPES
gkroussos 0:e8fdba0ed044 162 {
gkroussos 0:e8fdba0ed044 163 NRF_RADIO_NOTIFICATION_TYPE_NONE = 0, /**< The event does not have a radio notification signal. */
gkroussos 0:e8fdba0ed044 164 NRF_RADIO_NOTIFICATION_TYPE_INT_ON_ACTIVE, /**< Using interrupt for notification when the radio will be enabled. */
gkroussos 0:e8fdba0ed044 165 NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE, /**< Using interrupt for notification when the radio has been disabled. */
gkroussos 0:e8fdba0ed044 166 NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, /**< Using interrupt for notification both when the radio will be enabled and disabled. */
gkroussos 0:e8fdba0ed044 167 };
gkroussos 0:e8fdba0ed044 168
gkroussos 0:e8fdba0ed044 169 /**@brief SoC Events. */
gkroussos 0:e8fdba0ed044 170 enum NRF_SOC_EVTS
gkroussos 0:e8fdba0ed044 171 {
gkroussos 0:e8fdba0ed044 172 NRF_EVT_HFCLKSTARTED, /**< Event indicating that the HFCLK has started. */
gkroussos 0:e8fdba0ed044 173 NRF_EVT_POWER_FAILURE_WARNING, /**< Event indicating that a power failure warning has occurred. */
gkroussos 0:e8fdba0ed044 174 NRF_EVT_FLASH_OPERATION_SUCCESS, /**< Event indicating that the ongoing flash operation has completed successfully. */
gkroussos 0:e8fdba0ed044 175 NRF_EVT_FLASH_OPERATION_ERROR, /**< Event indicating that the ongoing flash operation has timed out with an error. */
gkroussos 0:e8fdba0ed044 176 NRF_EVT_RESERVED1,
gkroussos 0:e8fdba0ed044 177 NRF_EVT_RESERVED2,
gkroussos 0:e8fdba0ed044 178 NRF_EVT_RESERVED3,
gkroussos 0:e8fdba0ed044 179 NRF_EVT_RESERVED4,
gkroussos 0:e8fdba0ed044 180 NRF_EVT_RESERVED5,
gkroussos 0:e8fdba0ed044 181 NRF_EVT_NUMBER_OF_EVTS
gkroussos 0:e8fdba0ed044 182 };
gkroussos 0:e8fdba0ed044 183
gkroussos 0:e8fdba0ed044 184 /** @} */
gkroussos 0:e8fdba0ed044 185
gkroussos 0:e8fdba0ed044 186 /** @addtogroup NRF_SOC_TYPES Types
gkroussos 0:e8fdba0ed044 187 * @{ */
gkroussos 0:e8fdba0ed044 188
gkroussos 0:e8fdba0ed044 189 /**@brief Represents a mutex for use with the nrf_mutex functions.
gkroussos 0:e8fdba0ed044 190 * @note Accessing the value directly is not safe, use the mutex functions!
gkroussos 0:e8fdba0ed044 191 */
gkroussos 0:e8fdba0ed044 192 typedef volatile uint8_t nrf_mutex_t;
gkroussos 0:e8fdba0ed044 193
gkroussos 0:e8fdba0ed044 194 /**@brief The interrupt priorities available to the application while the softdevice is active. */
gkroussos 0:e8fdba0ed044 195 typedef uint8_t nrf_app_irq_priority_t;
gkroussos 0:e8fdba0ed044 196
gkroussos 0:e8fdba0ed044 197 /**@brief Represents a power mode, used in power mode functions */
gkroussos 0:e8fdba0ed044 198 typedef uint8_t nrf_power_mode_t;
gkroussos 0:e8fdba0ed044 199
gkroussos 0:e8fdba0ed044 200 /**@brief Represents a power failure threshold value. */
gkroussos 0:e8fdba0ed044 201 typedef uint8_t nrf_power_failure_threshold_t;
gkroussos 0:e8fdba0ed044 202
gkroussos 0:e8fdba0ed044 203 /**@brief Represents a DCDC mode value. */
gkroussos 0:e8fdba0ed044 204 typedef uint32_t nrf_power_dcdc_mode_t;
gkroussos 0:e8fdba0ed044 205
gkroussos 0:e8fdba0ed044 206 /**@brief Radio notification distances. */
gkroussos 0:e8fdba0ed044 207 typedef uint8_t nrf_radio_notification_distance_t;
gkroussos 0:e8fdba0ed044 208
gkroussos 0:e8fdba0ed044 209 /**@brief Radio notification types. */
gkroussos 0:e8fdba0ed044 210 typedef uint8_t nrf_radio_notification_type_t;
gkroussos 0:e8fdba0ed044 211
gkroussos 0:e8fdba0ed044 212
gkroussos 0:e8fdba0ed044 213 /**@brief AES ECB data structure */
gkroussos 0:e8fdba0ed044 214 typedef struct
gkroussos 0:e8fdba0ed044 215 {
gkroussos 0:e8fdba0ed044 216 uint8_t key[SOC_ECB_KEY_LENGTH]; /**< Encryption key. */
gkroussos 0:e8fdba0ed044 217 uint8_t cleartext[SOC_ECB_CLEARTEXT_LENGTH]; /**< Clear Text data. */
gkroussos 0:e8fdba0ed044 218 uint8_t ciphertext[SOC_ECB_CIPHERTEXT_LENGTH]; /**< Cipher Text data. */
gkroussos 0:e8fdba0ed044 219 } nrf_ecb_hal_data_t;
gkroussos 0:e8fdba0ed044 220
gkroussos 0:e8fdba0ed044 221 /** @} */
gkroussos 0:e8fdba0ed044 222
gkroussos 0:e8fdba0ed044 223 /** @addtogroup NRF_SOC_FUNCTIONS Functions
gkroussos 0:e8fdba0ed044 224 * @{ */
gkroussos 0:e8fdba0ed044 225
gkroussos 0:e8fdba0ed044 226 /**@brief Initialize a mutex.
gkroussos 0:e8fdba0ed044 227 *
gkroussos 0:e8fdba0ed044 228 * @param[in] p_mutex Pointer to the mutex to initialize.
gkroussos 0:e8fdba0ed044 229 *
gkroussos 0:e8fdba0ed044 230 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 231 */
gkroussos 0:e8fdba0ed044 232 SVCALL(SD_MUTEX_NEW, uint32_t, sd_mutex_new(nrf_mutex_t * p_mutex));
gkroussos 0:e8fdba0ed044 233
gkroussos 0:e8fdba0ed044 234 /**@brief Attempt to acquire a mutex.
gkroussos 0:e8fdba0ed044 235 *
gkroussos 0:e8fdba0ed044 236 * @param[in] p_mutex Pointer to the mutex to acquire.
gkroussos 0:e8fdba0ed044 237 *
gkroussos 0:e8fdba0ed044 238 * @retval ::NRF_SUCCESS The mutex was successfully acquired.
gkroussos 0:e8fdba0ed044 239 * @retval ::NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN The mutex could not be acquired.
gkroussos 0:e8fdba0ed044 240 */
gkroussos 0:e8fdba0ed044 241 SVCALL(SD_MUTEX_ACQUIRE, uint32_t, sd_mutex_acquire(nrf_mutex_t * p_mutex));
gkroussos 0:e8fdba0ed044 242
gkroussos 0:e8fdba0ed044 243 /**@brief Release a mutex.
gkroussos 0:e8fdba0ed044 244 *
gkroussos 0:e8fdba0ed044 245 * @param[in] p_mutex Pointer to the mutex to release.
gkroussos 0:e8fdba0ed044 246 *
gkroussos 0:e8fdba0ed044 247 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 248 */
gkroussos 0:e8fdba0ed044 249 SVCALL(SD_MUTEX_RELEASE, uint32_t, sd_mutex_release(nrf_mutex_t * p_mutex));
gkroussos 0:e8fdba0ed044 250
gkroussos 0:e8fdba0ed044 251 /**@brief Enable External Interrupt.
gkroussos 0:e8fdba0ed044 252 * @note Corresponds to NVIC_EnableIRQ in CMSIS.
gkroussos 0:e8fdba0ed044 253 *
gkroussos 0:e8fdba0ed044 254 * @pre{IRQn is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 255 *
gkroussos 0:e8fdba0ed044 256 * @param[in] IRQn See the NVIC_EnableIRQ documentation in CMSIS.
gkroussos 0:e8fdba0ed044 257 *
gkroussos 0:e8fdba0ed044 258 * @retval ::NRF_SUCCESS The interrupt was enabled.
gkroussos 0:e8fdba0ed044 259 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
gkroussos 0:e8fdba0ed044 260 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt has a priority not available for the application.
gkroussos 0:e8fdba0ed044 261 */
gkroussos 0:e8fdba0ed044 262 SVCALL(SD_NVIC_ENABLEIRQ, uint32_t, sd_nvic_EnableIRQ(IRQn_Type IRQn));
gkroussos 0:e8fdba0ed044 263
gkroussos 0:e8fdba0ed044 264 /**@brief Disable External Interrupt.
gkroussos 0:e8fdba0ed044 265 * @note Corresponds to NVIC_DisableIRQ in CMSIS.
gkroussos 0:e8fdba0ed044 266 *
gkroussos 0:e8fdba0ed044 267 * @pre{IRQn is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 268 *
gkroussos 0:e8fdba0ed044 269 * @param[in] IRQn See the NVIC_DisableIRQ documentation in CMSIS
gkroussos 0:e8fdba0ed044 270 *
gkroussos 0:e8fdba0ed044 271 * @retval ::NRF_SUCCESS The interrupt was disabled.
gkroussos 0:e8fdba0ed044 272 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE The interrupt is not available for the application.
gkroussos 0:e8fdba0ed044 273 */
gkroussos 0:e8fdba0ed044 274 SVCALL(SD_NVIC_DISABLEIRQ, uint32_t, sd_nvic_DisableIRQ(IRQn_Type IRQn));
gkroussos 0:e8fdba0ed044 275
gkroussos 0:e8fdba0ed044 276 /**@brief Get Pending Interrupt.
gkroussos 0:e8fdba0ed044 277 * @note Corresponds to NVIC_GetPendingIRQ in CMSIS.
gkroussos 0:e8fdba0ed044 278 *
gkroussos 0:e8fdba0ed044 279 * @pre{IRQn is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 280 *
gkroussos 0:e8fdba0ed044 281 * @param[in] IRQn See the NVIC_GetPendingIRQ documentation in CMSIS.
gkroussos 0:e8fdba0ed044 282 * @param[out] p_pending_irq Return value from NVIC_GetPendingIRQ.
gkroussos 0:e8fdba0ed044 283 *
gkroussos 0:e8fdba0ed044 284 * @retval ::NRF_SUCCESS The interrupt is available for the application.
gkroussos 0:e8fdba0ed044 285 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
gkroussos 0:e8fdba0ed044 286 */
gkroussos 0:e8fdba0ed044 287 SVCALL(SD_NVIC_GETPENDINGIRQ, uint32_t, sd_nvic_GetPendingIRQ(IRQn_Type IRQn, uint32_t * p_pending_irq));
gkroussos 0:e8fdba0ed044 288
gkroussos 0:e8fdba0ed044 289 /**@brief Set Pending Interrupt.
gkroussos 0:e8fdba0ed044 290 * @note Corresponds to NVIC_SetPendingIRQ in CMSIS.
gkroussos 0:e8fdba0ed044 291 *
gkroussos 0:e8fdba0ed044 292 * @pre{IRQn is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 293 *
gkroussos 0:e8fdba0ed044 294 * @param[in] IRQn See the NVIC_SetPendingIRQ documentation in CMSIS.
gkroussos 0:e8fdba0ed044 295 *
gkroussos 0:e8fdba0ed044 296 * @retval ::NRF_SUCCESS The interrupt is set pending.
gkroussos 0:e8fdba0ed044 297 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
gkroussos 0:e8fdba0ed044 298 */
gkroussos 0:e8fdba0ed044 299 SVCALL(SD_NVIC_SETPENDINGIRQ, uint32_t, sd_nvic_SetPendingIRQ(IRQn_Type IRQn));
gkroussos 0:e8fdba0ed044 300
gkroussos 0:e8fdba0ed044 301 /**@brief Clear Pending Interrupt.
gkroussos 0:e8fdba0ed044 302 * @note Corresponds to NVIC_ClearPendingIRQ in CMSIS.
gkroussos 0:e8fdba0ed044 303 *
gkroussos 0:e8fdba0ed044 304 * @pre{IRQn is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 305 *
gkroussos 0:e8fdba0ed044 306 * @param[in] IRQn See the NVIC_ClearPendingIRQ documentation in CMSIS.
gkroussos 0:e8fdba0ed044 307 *
gkroussos 0:e8fdba0ed044 308 * @retval ::NRF_SUCCESS The interrupt pending flag is cleared.
gkroussos 0:e8fdba0ed044 309 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
gkroussos 0:e8fdba0ed044 310 */
gkroussos 0:e8fdba0ed044 311 SVCALL(SD_NVIC_CLEARPENDINGIRQ, uint32_t, sd_nvic_ClearPendingIRQ(IRQn_Type IRQn));
gkroussos 0:e8fdba0ed044 312
gkroussos 0:e8fdba0ed044 313 /**@brief Set Interrupt Priority.
gkroussos 0:e8fdba0ed044 314 * @note Corresponds to NVIC_SetPriority in CMSIS.
gkroussos 0:e8fdba0ed044 315 *
gkroussos 0:e8fdba0ed044 316 * @pre{IRQn is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 317 * @pre{priority is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 318 *
gkroussos 0:e8fdba0ed044 319 * @param[in] IRQn See the NVIC_SetPriority documentation in CMSIS.
gkroussos 0:e8fdba0ed044 320 * @param[in] priority A valid IRQ priority for use by the application.
gkroussos 0:e8fdba0ed044 321 *
gkroussos 0:e8fdba0ed044 322 * @retval ::NRF_SUCCESS The interrupt and priority level is available for the application.
gkroussos 0:e8fdba0ed044 323 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE IRQn is not available for the application.
gkroussos 0:e8fdba0ed044 324 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_PRIORITY_NOT_ALLOWED The interrupt priority is not available for the application.
gkroussos 0:e8fdba0ed044 325 */
gkroussos 0:e8fdba0ed044 326 SVCALL(SD_NVIC_SETPRIORITY, uint32_t, sd_nvic_SetPriority(IRQn_Type IRQn, nrf_app_irq_priority_t priority));
gkroussos 0:e8fdba0ed044 327
gkroussos 0:e8fdba0ed044 328 /**@brief Get Interrupt Priority.
gkroussos 0:e8fdba0ed044 329 * @note Corresponds to NVIC_GetPriority in CMSIS.
gkroussos 0:e8fdba0ed044 330 *
gkroussos 0:e8fdba0ed044 331 * @pre{IRQn is valid and not reserved by the stack}
gkroussos 0:e8fdba0ed044 332 *
gkroussos 0:e8fdba0ed044 333 * @param[in] IRQn See the NVIC_GetPriority documentation in CMSIS.
gkroussos 0:e8fdba0ed044 334 * @param[out] p_priority Return value from NVIC_GetPriority.
gkroussos 0:e8fdba0ed044 335 *
gkroussos 0:e8fdba0ed044 336 * @retval ::NRF_SUCCESS The interrupt priority is returned in p_priority.
gkroussos 0:e8fdba0ed044 337 * @retval ::NRF_ERROR_SOC_NVIC_INTERRUPT_NOT_AVAILABLE - IRQn is not available for the application.
gkroussos 0:e8fdba0ed044 338 */
gkroussos 0:e8fdba0ed044 339 SVCALL(SD_NVIC_GETPRIORITY, uint32_t, sd_nvic_GetPriority(IRQn_Type IRQn, nrf_app_irq_priority_t * p_priority));
gkroussos 0:e8fdba0ed044 340
gkroussos 0:e8fdba0ed044 341 /**@brief System Reset.
gkroussos 0:e8fdba0ed044 342 * @note Corresponds to NVIC_SystemReset in CMSIS.
gkroussos 0:e8fdba0ed044 343 *
gkroussos 0:e8fdba0ed044 344 * @retval ::NRF_ERROR_SOC_NVIC_SHOULD_NOT_RETURN
gkroussos 0:e8fdba0ed044 345 */
gkroussos 0:e8fdba0ed044 346 SVCALL(SD_NVIC_SYSTEMRESET, uint32_t, sd_nvic_SystemReset(void));
gkroussos 0:e8fdba0ed044 347
gkroussos 0:e8fdba0ed044 348 /**@brief Enters critical region.
gkroussos 0:e8fdba0ed044 349 *
gkroussos 0:e8fdba0ed044 350 * @post Application interrupts will be disabled.
gkroussos 0:e8fdba0ed044 351 * @sa sd_nvic_critical_region_exit
gkroussos 0:e8fdba0ed044 352 *
gkroussos 0:e8fdba0ed044 353 * @param[out] p_is_nested_critical_region 1: If in a nested critical region.
gkroussos 0:e8fdba0ed044 354 * 0: Otherwise.
gkroussos 0:e8fdba0ed044 355 *
gkroussos 0:e8fdba0ed044 356 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 357 */
gkroussos 0:e8fdba0ed044 358 SVCALL(SD_NVIC_CRITICAL_REGION_ENTER, uint32_t, sd_nvic_critical_region_enter(uint8_t * p_is_nested_critical_region));
gkroussos 0:e8fdba0ed044 359
gkroussos 0:e8fdba0ed044 360 /**@brief Exit critical region.
gkroussos 0:e8fdba0ed044 361 *
gkroussos 0:e8fdba0ed044 362 * @pre Application has entered a critical region using ::sd_nvic_critical_region_enter.
gkroussos 0:e8fdba0ed044 363 * @post If not in a nested critical region, the application interrupts will restored to the state before ::sd_nvic_critical_region_enter was called.
gkroussos 0:e8fdba0ed044 364 *
gkroussos 0:e8fdba0ed044 365 * @param[in] is_nested_critical_region If this is set to 1, the critical region won't be exited. @sa sd_nvic_critical_region_enter.
gkroussos 0:e8fdba0ed044 366 *
gkroussos 0:e8fdba0ed044 367 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 368 */
gkroussos 0:e8fdba0ed044 369 SVCALL(SD_NVIC_CRITICAL_REGION_EXIT, uint32_t, sd_nvic_critical_region_exit(uint8_t is_nested_critical_region));
gkroussos 0:e8fdba0ed044 370
gkroussos 0:e8fdba0ed044 371 /**@brief Query the capacity of the application random pool.
gkroussos 0:e8fdba0ed044 372 *
gkroussos 0:e8fdba0ed044 373 * @param[out] p_pool_capacity The capacity of the pool.
gkroussos 0:e8fdba0ed044 374 *
gkroussos 0:e8fdba0ed044 375 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 376 */
gkroussos 0:e8fdba0ed044 377 SVCALL(SD_RAND_APPLICATION_POOL_CAPACITY, uint32_t, sd_rand_application_pool_capacity_get(uint8_t * p_pool_capacity));
gkroussos 0:e8fdba0ed044 378
gkroussos 0:e8fdba0ed044 379 /**@brief Get number of random bytes available to the application.
gkroussos 0:e8fdba0ed044 380 *
gkroussos 0:e8fdba0ed044 381 * @param[out] p_bytes_available The number of bytes currently available in the pool.
gkroussos 0:e8fdba0ed044 382 *
gkroussos 0:e8fdba0ed044 383 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 384 */
gkroussos 0:e8fdba0ed044 385 SVCALL(SD_RAND_APPLICATION_BYTES_AVAILABLE, uint32_t, sd_rand_application_bytes_available_get(uint8_t * p_bytes_available));
gkroussos 0:e8fdba0ed044 386
gkroussos 0:e8fdba0ed044 387 /**@brief Get random bytes from the application pool.
gkroussos 0:e8fdba0ed044 388
gkroussos 0:e8fdba0ed044 389 @param[out] p_buff Pointer to unit8_t buffer for storing the bytes.
gkroussos 0:e8fdba0ed044 390 @param[in] length Number of bytes to take from pool and place in p_buff.
gkroussos 0:e8fdba0ed044 391
gkroussos 0:e8fdba0ed044 392 @retval ::NRF_SUCCESS The requested bytes were written to p_buff.
gkroussos 0:e8fdba0ed044 393 @retval ::NRF_ERROR_SOC_RAND_NOT_ENOUGH_VALUES No bytes were written to the buffer, because there were not enough bytes available.
gkroussos 0:e8fdba0ed044 394 */
gkroussos 0:e8fdba0ed044 395 SVCALL(SD_RAND_APPLICATION_GET_VECTOR, uint32_t, sd_rand_application_vector_get(uint8_t * p_buff, uint8_t length));
gkroussos 0:e8fdba0ed044 396
gkroussos 0:e8fdba0ed044 397 /**@brief Gets the reset reason register.
gkroussos 0:e8fdba0ed044 398 *
gkroussos 0:e8fdba0ed044 399 * @param[out] p_reset_reason Contents of the NRF_POWER->RESETREAS register.
gkroussos 0:e8fdba0ed044 400 *
gkroussos 0:e8fdba0ed044 401 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 402 */
gkroussos 0:e8fdba0ed044 403 SVCALL(SD_POWER_RESET_REASON_GET, uint32_t, sd_power_reset_reason_get(uint32_t * p_reset_reason));
gkroussos 0:e8fdba0ed044 404
gkroussos 0:e8fdba0ed044 405 /**@brief Clears the bits of the reset reason register.
gkroussos 0:e8fdba0ed044 406 *
gkroussos 0:e8fdba0ed044 407 * @param[in] reset_reason_clr_msk Contains the bits to clear from the reset reason register.
gkroussos 0:e8fdba0ed044 408 *
gkroussos 0:e8fdba0ed044 409 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 410 */
gkroussos 0:e8fdba0ed044 411 SVCALL(SD_POWER_RESET_REASON_CLR, uint32_t, sd_power_reset_reason_clr(uint32_t reset_reason_clr_msk));
gkroussos 0:e8fdba0ed044 412
gkroussos 0:e8fdba0ed044 413 /**@brief Sets the power mode when in CPU sleep.
gkroussos 0:e8fdba0ed044 414 *
gkroussos 0:e8fdba0ed044 415 * @param[in] power_mode The power mode to use when in CPU sleep. @sa sd_app_evt_wait
gkroussos 0:e8fdba0ed044 416 *
gkroussos 0:e8fdba0ed044 417 * @retval ::NRF_SUCCESS The power mode was set.
gkroussos 0:e8fdba0ed044 418 * @retval ::NRF_ERROR_SOC_POWER_MODE_UNKNOWN The power mode was unknown.
gkroussos 0:e8fdba0ed044 419 */
gkroussos 0:e8fdba0ed044 420 SVCALL(SD_POWER_MODE_SET, uint32_t, sd_power_mode_set(nrf_power_mode_t power_mode));
gkroussos 0:e8fdba0ed044 421
gkroussos 0:e8fdba0ed044 422 /**@brief Puts the chip in System OFF mode.
gkroussos 0:e8fdba0ed044 423 *
gkroussos 0:e8fdba0ed044 424 * @retval ::NRF_ERROR_SOC_POWER_OFF_SHOULD_NOT_RETURN
gkroussos 0:e8fdba0ed044 425 */
gkroussos 0:e8fdba0ed044 426 SVCALL(SD_POWER_SYSTEM_OFF, uint32_t, sd_power_system_off(void));
gkroussos 0:e8fdba0ed044 427
gkroussos 0:e8fdba0ed044 428 /**@brief Enables or disables the power-fail comparator.
gkroussos 0:e8fdba0ed044 429 *
gkroussos 0:e8fdba0ed044 430 * Enabling this will give a softdevice event (NRF_EVT_POWER_FAILURE_WARNING) when the power failure warning occurs.
gkroussos 0:e8fdba0ed044 431 * The event can be retrieved with sd_evt_get();
gkroussos 0:e8fdba0ed044 432 *
gkroussos 0:e8fdba0ed044 433 * @param[in] pof_enable True if the power-fail comparator should be enabled, false if it should be disabled.
gkroussos 0:e8fdba0ed044 434 *
gkroussos 0:e8fdba0ed044 435 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 436 */
gkroussos 0:e8fdba0ed044 437 SVCALL(SD_POWER_POF_ENABLE, uint32_t, sd_power_pof_enable(uint8_t pof_enable));
gkroussos 0:e8fdba0ed044 438
gkroussos 0:e8fdba0ed044 439 /**@brief Sets the power-fail threshold value.
gkroussos 0:e8fdba0ed044 440 *
gkroussos 0:e8fdba0ed044 441 * @param[in] threshold The power-fail threshold value to use.
gkroussos 0:e8fdba0ed044 442 *
gkroussos 0:e8fdba0ed044 443 * @retval ::NRF_SUCCESS The power failure threshold was set.
gkroussos 0:e8fdba0ed044 444 * @retval ::NRF_ERROR_SOC_POWER_POF_THRESHOLD_UNKNOWN The power failure threshold is unknown.
gkroussos 0:e8fdba0ed044 445 */
gkroussos 0:e8fdba0ed044 446 SVCALL(SD_POWER_POF_THRESHOLD_SET, uint32_t, sd_power_pof_threshold_set(nrf_power_failure_threshold_t threshold));
gkroussos 0:e8fdba0ed044 447
gkroussos 0:e8fdba0ed044 448 /**@brief Sets bits in the NRF_POWER->RAMON register.
gkroussos 0:e8fdba0ed044 449 *
gkroussos 0:e8fdba0ed044 450 * @param[in] ramon Contains the bits needed to be set in the NRF_POWER->RAMON register.
gkroussos 0:e8fdba0ed044 451 *
gkroussos 0:e8fdba0ed044 452 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 453 */
gkroussos 0:e8fdba0ed044 454 SVCALL(SD_POWER_RAMON_SET, uint32_t, sd_power_ramon_set(uint32_t ramon));
gkroussos 0:e8fdba0ed044 455
gkroussos 0:e8fdba0ed044 456 /** @brief Clears bits in the NRF_POWER->RAMON register.
gkroussos 0:e8fdba0ed044 457 *
gkroussos 0:e8fdba0ed044 458 * @param ramon Contains the bits needed to be cleared in the NRF_POWER->RAMON register.
gkroussos 0:e8fdba0ed044 459 *
gkroussos 0:e8fdba0ed044 460 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 461 */
gkroussos 0:e8fdba0ed044 462 SVCALL(SD_POWER_RAMON_CLR, uint32_t, sd_power_ramon_clr(uint32_t ramon));
gkroussos 0:e8fdba0ed044 463
gkroussos 0:e8fdba0ed044 464 /**@brief Get contents of NRF_POWER->RAMON register, indicates power status of ram blocks.
gkroussos 0:e8fdba0ed044 465 *
gkroussos 0:e8fdba0ed044 466 * @param[out] p_ramon Content of NRF_POWER->RAMON register.
gkroussos 0:e8fdba0ed044 467 *
gkroussos 0:e8fdba0ed044 468 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 469 */
gkroussos 0:e8fdba0ed044 470 SVCALL(SD_POWER_RAMON_GET, uint32_t, sd_power_ramon_get(uint32_t * p_ramon));
gkroussos 0:e8fdba0ed044 471
gkroussos 0:e8fdba0ed044 472 /**@brief Set bits in the NRF_POWER->GPREGRET register.
gkroussos 0:e8fdba0ed044 473 *
gkroussos 0:e8fdba0ed044 474 * @param[in] gpregret_msk Bits to be set in the GPREGRET register.
gkroussos 0:e8fdba0ed044 475 *
gkroussos 0:e8fdba0ed044 476 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 477 */
gkroussos 0:e8fdba0ed044 478 SVCALL(SD_POWER_GPREGRET_SET, uint32_t, sd_power_gpregret_set(uint32_t gpregret_msk));
gkroussos 0:e8fdba0ed044 479
gkroussos 0:e8fdba0ed044 480 /**@brief Clear bits in the NRF_POWER->GPREGRET register.
gkroussos 0:e8fdba0ed044 481 *
gkroussos 0:e8fdba0ed044 482 * @param[in] gpregret_msk Bits to be clear in the GPREGRET register.
gkroussos 0:e8fdba0ed044 483 *
gkroussos 0:e8fdba0ed044 484 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 485 */
gkroussos 0:e8fdba0ed044 486 SVCALL(SD_POWER_GPREGRET_CLR, uint32_t, sd_power_gpregret_clr(uint32_t gpregret_msk));
gkroussos 0:e8fdba0ed044 487
gkroussos 0:e8fdba0ed044 488 /**@brief Get contents of the NRF_POWER->GPREGRET register.
gkroussos 0:e8fdba0ed044 489 *
gkroussos 0:e8fdba0ed044 490 * @param[out] p_gpregret Contents of the GPREGRET register.
gkroussos 0:e8fdba0ed044 491 *
gkroussos 0:e8fdba0ed044 492 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 493 */
gkroussos 0:e8fdba0ed044 494 SVCALL(SD_POWER_GPREGRET_GET, uint32_t, sd_power_gpregret_get(uint32_t *p_gpregret));
gkroussos 0:e8fdba0ed044 495
gkroussos 0:e8fdba0ed044 496 /**@brief Sets the DCDC mode.
gkroussos 0:e8fdba0ed044 497 *
gkroussos 0:e8fdba0ed044 498 * Depending on the internal state of the SoftDevice, the mode change may not happen immediately.
gkroussos 0:e8fdba0ed044 499 * The DCDC mode switch will be blocked when occurring in close proximity to radio transmissions. When
gkroussos 0:e8fdba0ed044 500 * the radio transmission is done, the last mode will be used.
gkroussos 0:e8fdba0ed044 501 *
gkroussos 0:e8fdba0ed044 502 * @param[in] dcdc_mode The mode of the DCDC.
gkroussos 0:e8fdba0ed044 503 *
gkroussos 0:e8fdba0ed044 504 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 505 * @retval ::NRF_ERROR_INVALID_PARAM The DCDC mode is invalid.
gkroussos 0:e8fdba0ed044 506 */
gkroussos 0:e8fdba0ed044 507 SVCALL(SD_POWER_DCDC_MODE_SET, uint32_t, sd_power_dcdc_mode_set(nrf_power_dcdc_mode_t dcdc_mode));
gkroussos 0:e8fdba0ed044 508
gkroussos 0:e8fdba0ed044 509 /**@brief Request the high frequency crystal oscillator.
gkroussos 0:e8fdba0ed044 510 *
gkroussos 0:e8fdba0ed044 511 * Will start the high frequency crystal oscillator, the startup time of the crystal varies
gkroussos 0:e8fdba0ed044 512 * and the ::sd_clock_hfclk_is_running function can be polled to check if it has started.
gkroussos 0:e8fdba0ed044 513 *
gkroussos 0:e8fdba0ed044 514 * @see sd_clock_hfclk_is_running
gkroussos 0:e8fdba0ed044 515 * @see sd_clock_hfclk_release
gkroussos 0:e8fdba0ed044 516 *
gkroussos 0:e8fdba0ed044 517 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 518 */
gkroussos 0:e8fdba0ed044 519 SVCALL(SD_CLOCK_HFCLK_REQUEST, uint32_t, sd_clock_hfclk_request(void));
gkroussos 0:e8fdba0ed044 520
gkroussos 0:e8fdba0ed044 521 /**@brief Releases the high frequency crystal oscillator.
gkroussos 0:e8fdba0ed044 522 *
gkroussos 0:e8fdba0ed044 523 * Will stop the high frequency crystal oscillator, this happens immediately.
gkroussos 0:e8fdba0ed044 524 *
gkroussos 0:e8fdba0ed044 525 * @see sd_clock_hfclk_is_running
gkroussos 0:e8fdba0ed044 526 * @see sd_clock_hfclk_request
gkroussos 0:e8fdba0ed044 527 *
gkroussos 0:e8fdba0ed044 528 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 529 */
gkroussos 0:e8fdba0ed044 530 SVCALL(SD_CLOCK_HFCLK_RELEASE, uint32_t, sd_clock_hfclk_release(void));
gkroussos 0:e8fdba0ed044 531
gkroussos 0:e8fdba0ed044 532 /**@brief Checks if the high frequency crystal oscillator is running.
gkroussos 0:e8fdba0ed044 533 *
gkroussos 0:e8fdba0ed044 534 * @see sd_clock_hfclk_request
gkroussos 0:e8fdba0ed044 535 * @see sd_clock_hfclk_release
gkroussos 0:e8fdba0ed044 536 *
gkroussos 0:e8fdba0ed044 537 * @param[out] p_is_running 1 if the external crystal oscillator is running, 0 if not.
gkroussos 0:e8fdba0ed044 538 *
gkroussos 0:e8fdba0ed044 539 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 540 */
gkroussos 0:e8fdba0ed044 541 SVCALL(SD_CLOCK_HFCLK_IS_RUNNING, uint32_t, sd_clock_hfclk_is_running(uint32_t * p_is_running));
gkroussos 0:e8fdba0ed044 542
gkroussos 0:e8fdba0ed044 543 /**@brief Waits for an application event.
gkroussos 0:e8fdba0ed044 544 *
gkroussos 0:e8fdba0ed044 545 * An application event is either an application interrupt or a pended interrupt when the
gkroussos 0:e8fdba0ed044 546 * interrupt is disabled. When the interrupt is enabled it will be taken immediately since
gkroussos 0:e8fdba0ed044 547 * this function will wait in thread mode, then the execution will return in the application's
gkroussos 0:e8fdba0ed044 548 * main thread. When an interrupt is disabled and gets pended it will return to the application's
gkroussos 0:e8fdba0ed044 549 * thread main. The application must ensure that the pended flag is cleared using
gkroussos 0:e8fdba0ed044 550 * ::sd_nvic_ClearPendingIRQ in order to sleep using this function. This is only necessary for
gkroussos 0:e8fdba0ed044 551 * disabled interrupts, as the interrupt handler will clear the pending flag automatically for
gkroussos 0:e8fdba0ed044 552 * enabled interrupts.
gkroussos 0:e8fdba0ed044 553 *
gkroussos 0:e8fdba0ed044 554 * In order to wake up from disabled interrupts, the SEVONPEND flag has to be set in the Cortex-M0
gkroussos 0:e8fdba0ed044 555 * System Control Register (SCR). @sa CMSIS_SCB
gkroussos 0:e8fdba0ed044 556 *
gkroussos 0:e8fdba0ed044 557 * @note If an application interrupt has happened since the last time sd_app_evt_wait was
gkroussos 0:e8fdba0ed044 558 * called this function will return immediately and not go to sleep. This is to avoid race
gkroussos 0:e8fdba0ed044 559 * conditions that can occur when a flag is updated in the interrupt handler and processed
gkroussos 0:e8fdba0ed044 560 * in the main loop.
gkroussos 0:e8fdba0ed044 561 *
gkroussos 0:e8fdba0ed044 562 * @post An application interrupt has happened or a interrupt pending flag is set.
gkroussos 0:e8fdba0ed044 563 *
gkroussos 0:e8fdba0ed044 564 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 565 */
gkroussos 0:e8fdba0ed044 566 SVCALL(SD_APP_EVT_WAIT, uint32_t, sd_app_evt_wait(void));
gkroussos 0:e8fdba0ed044 567
gkroussos 0:e8fdba0ed044 568 /**@brief Get PPI channel enable register contents.
gkroussos 0:e8fdba0ed044 569 *
gkroussos 0:e8fdba0ed044 570 * @param[out] p_channel_enable The contents of the PPI CHEN register.
gkroussos 0:e8fdba0ed044 571 *
gkroussos 0:e8fdba0ed044 572 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 573 */
gkroussos 0:e8fdba0ed044 574 SVCALL(SD_PPI_CHANNEL_ENABLE_GET, uint32_t, sd_ppi_channel_enable_get(uint32_t * p_channel_enable));
gkroussos 0:e8fdba0ed044 575
gkroussos 0:e8fdba0ed044 576 /**@brief Set PPI channel enable register.
gkroussos 0:e8fdba0ed044 577 *
gkroussos 0:e8fdba0ed044 578 * @param[in] channel_enable_set_msk Mask containing the bits to set in the PPI CHEN register.
gkroussos 0:e8fdba0ed044 579 *
gkroussos 0:e8fdba0ed044 580 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 581 */
gkroussos 0:e8fdba0ed044 582 SVCALL(SD_PPI_CHANNEL_ENABLE_SET, uint32_t, sd_ppi_channel_enable_set(uint32_t channel_enable_set_msk));
gkroussos 0:e8fdba0ed044 583
gkroussos 0:e8fdba0ed044 584 /**@brief Clear PPI channel enable register.
gkroussos 0:e8fdba0ed044 585 *
gkroussos 0:e8fdba0ed044 586 * @param[in] channel_enable_clr_msk Mask containing the bits to clear in the PPI CHEN register.
gkroussos 0:e8fdba0ed044 587 *
gkroussos 0:e8fdba0ed044 588 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 589 */
gkroussos 0:e8fdba0ed044 590 SVCALL(SD_PPI_CHANNEL_ENABLE_CLR, uint32_t, sd_ppi_channel_enable_clr(uint32_t channel_enable_clr_msk));
gkroussos 0:e8fdba0ed044 591
gkroussos 0:e8fdba0ed044 592 /**@brief Assign endpoints to a PPI channel.
gkroussos 0:e8fdba0ed044 593 *
gkroussos 0:e8fdba0ed044 594 * @param[in] channel_num Number of the PPI channel to assign.
gkroussos 0:e8fdba0ed044 595 * @param[in] evt_endpoint Event endpoint of the PPI channel.
gkroussos 0:e8fdba0ed044 596 * @param[in] task_endpoint Task endpoint of the PPI channel.
gkroussos 0:e8fdba0ed044 597 *
gkroussos 0:e8fdba0ed044 598 * @retval ::NRF_ERROR_SOC_PPI_INVALID_CHANNEL The channel number is invalid.
gkroussos 0:e8fdba0ed044 599 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 600 */
gkroussos 0:e8fdba0ed044 601 SVCALL(SD_PPI_CHANNEL_ASSIGN, uint32_t, sd_ppi_channel_assign(uint8_t channel_num, const volatile void * evt_endpoint, const volatile void * task_endpoint));
gkroussos 0:e8fdba0ed044 602
gkroussos 0:e8fdba0ed044 603 /**@brief Task to enable a channel group.
gkroussos 0:e8fdba0ed044 604 *
gkroussos 0:e8fdba0ed044 605 * @param[in] group_num Number of the channel group.
gkroussos 0:e8fdba0ed044 606 *
gkroussos 0:e8fdba0ed044 607 * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid
gkroussos 0:e8fdba0ed044 608 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 609 */
gkroussos 0:e8fdba0ed044 610 SVCALL(SD_PPI_GROUP_TASK_ENABLE, uint32_t, sd_ppi_group_task_enable(uint8_t group_num));
gkroussos 0:e8fdba0ed044 611
gkroussos 0:e8fdba0ed044 612 /**@brief Task to disable a channel group.
gkroussos 0:e8fdba0ed044 613 *
gkroussos 0:e8fdba0ed044 614 * @param[in] group_num Number of the PPI group.
gkroussos 0:e8fdba0ed044 615 *
gkroussos 0:e8fdba0ed044 616 * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid.
gkroussos 0:e8fdba0ed044 617 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 618 */
gkroussos 0:e8fdba0ed044 619 SVCALL(SD_PPI_GROUP_TASK_DISABLE, uint32_t, sd_ppi_group_task_disable(uint8_t group_num));
gkroussos 0:e8fdba0ed044 620
gkroussos 0:e8fdba0ed044 621 /**@brief Assign PPI channels to a channel group.
gkroussos 0:e8fdba0ed044 622 *
gkroussos 0:e8fdba0ed044 623 * @param[in] group_num Number of the channel group.
gkroussos 0:e8fdba0ed044 624 * @param[in] channel_msk Mask of the channels to assign to the group.
gkroussos 0:e8fdba0ed044 625 *
gkroussos 0:e8fdba0ed044 626 * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid.
gkroussos 0:e8fdba0ed044 627 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 628 */
gkroussos 0:e8fdba0ed044 629 SVCALL(SD_PPI_GROUP_ASSIGN, uint32_t, sd_ppi_group_assign(uint8_t group_num, uint32_t channel_msk));
gkroussos 0:e8fdba0ed044 630
gkroussos 0:e8fdba0ed044 631 /**@brief Gets the PPI channels of a channel group.
gkroussos 0:e8fdba0ed044 632 *
gkroussos 0:e8fdba0ed044 633 * @param[in] group_num Number of the channel group.
gkroussos 0:e8fdba0ed044 634 * @param[out] p_channel_msk Mask of the channels assigned to the group.
gkroussos 0:e8fdba0ed044 635 *
gkroussos 0:e8fdba0ed044 636 * @retval ::NRF_ERROR_SOC_PPI_INVALID_GROUP The group number is invalid.
gkroussos 0:e8fdba0ed044 637 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 638 */
gkroussos 0:e8fdba0ed044 639 SVCALL(SD_PPI_GROUP_GET, uint32_t, sd_ppi_group_get(uint8_t group_num, uint32_t * p_channel_msk));
gkroussos 0:e8fdba0ed044 640
gkroussos 0:e8fdba0ed044 641 /**@brief Configures the Radio Notification signal.
gkroussos 0:e8fdba0ed044 642 *
gkroussos 0:e8fdba0ed044 643 * @note
gkroussos 0:e8fdba0ed044 644 * - The notification signal latency depends on the interrupt priority settings of SWI used
gkroussos 0:e8fdba0ed044 645 * for notification signal.
gkroussos 0:e8fdba0ed044 646 * - In the period between the ACTIVE signal and the start of the Radio Event, the SoftDevice
gkroussos 0:e8fdba0ed044 647 * will interrupt the application to do Radio Event preparation.
gkroussos 0:e8fdba0ed044 648 * - Using the Radio Notification feature may limit the bandwidth, as the SoftDevice may have
gkroussos 0:e8fdba0ed044 649 * to shorten the connection events to have time for the Radio Notification signals.
gkroussos 0:e8fdba0ed044 650 *
gkroussos 0:e8fdba0ed044 651 * @param[in] type Type of notification signal.
gkroussos 0:e8fdba0ed044 652 * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE shall be used to turn off radio
gkroussos 0:e8fdba0ed044 653 * notification. Using @ref NRF_RADIO_NOTIFICATION_DISTANCE_NONE is
gkroussos 0:e8fdba0ed044 654 * recommended (but not required) to be used with
gkroussos 0:e8fdba0ed044 655 * @ref NRF_RADIO_NOTIFICATION_TYPE_NONE.
gkroussos 0:e8fdba0ed044 656 *
gkroussos 0:e8fdba0ed044 657 * @param[in] distance Distance between the notification signal and start of radio activity.
gkroussos 0:e8fdba0ed044 658 * This parameter is ignored when @ref NRF_RADIO_NOTIFICATION_TYPE_NONE or
gkroussos 0:e8fdba0ed044 659 * @ref NRF_RADIO_NOTIFICATION_TYPE_INT_ON_INACTIVE is used.
gkroussos 0:e8fdba0ed044 660 *
gkroussos 0:e8fdba0ed044 661 * @retval ::NRF_ERROR_INVALID_PARAM The group number is invalid.
gkroussos 0:e8fdba0ed044 662 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 663 */
gkroussos 0:e8fdba0ed044 664 SVCALL(SD_RADIO_NOTIFICATION_CFG_SET, uint32_t, sd_radio_notification_cfg_set(nrf_radio_notification_type_t type, nrf_radio_notification_distance_t distance));
gkroussos 0:e8fdba0ed044 665
gkroussos 0:e8fdba0ed044 666 /**@brief Encrypts a block according to the specified parameters.
gkroussos 0:e8fdba0ed044 667 *
gkroussos 0:e8fdba0ed044 668 * 128-bit AES encryption.
gkroussos 0:e8fdba0ed044 669 *
gkroussos 0:e8fdba0ed044 670 * @param[in, out] p_ecb_data Pointer to the ECB parameters' struct (two input
gkroussos 0:e8fdba0ed044 671 * parameters and one output parameter).
gkroussos 0:e8fdba0ed044 672 *
gkroussos 0:e8fdba0ed044 673 * @retval ::NRF_SUCCESS
gkroussos 0:e8fdba0ed044 674 */
gkroussos 0:e8fdba0ed044 675 SVCALL(SD_ECB_BLOCK_ENCRYPT, uint32_t, sd_ecb_block_encrypt(nrf_ecb_hal_data_t * p_ecb_data));
gkroussos 0:e8fdba0ed044 676
gkroussos 0:e8fdba0ed044 677 /**@brief Gets any pending events generated by the SoC API.
gkroussos 0:e8fdba0ed044 678 *
gkroussos 0:e8fdba0ed044 679 * The application should keep calling this function to get events, until ::NRF_ERROR_NOT_FOUND is returned.
gkroussos 0:e8fdba0ed044 680 *
gkroussos 0:e8fdba0ed044 681 * @param[out] p_evt_id Set to one of the values in @ref NRF_SOC_EVTS, if any events are pending.
gkroussos 0:e8fdba0ed044 682 *
gkroussos 0:e8fdba0ed044 683 * @retval ::NRF_SUCCESS An event was pending. The event id is written in the p_evt_id parameter.
gkroussos 0:e8fdba0ed044 684 * @retval ::NRF_ERROR_NOT_FOUND No pending events.
gkroussos 0:e8fdba0ed044 685 */
gkroussos 0:e8fdba0ed044 686 SVCALL(SD_EVT_GET, uint32_t, sd_evt_get(uint32_t * p_evt_id));
gkroussos 0:e8fdba0ed044 687
gkroussos 0:e8fdba0ed044 688 /**@brief Get the temperature measured on the chip
gkroussos 0:e8fdba0ed044 689 *
gkroussos 0:e8fdba0ed044 690 * This function will block until the temperature measurement is done.
gkroussos 0:e8fdba0ed044 691 * It takes around 50us from call to return.
gkroussos 0:e8fdba0ed044 692 *
gkroussos 0:e8fdba0ed044 693 * @note Pan #28 in PAN-028 v 1.6 "Negative measured values are not represented correctly" is corrected by this function.
gkroussos 0:e8fdba0ed044 694 *
gkroussos 0:e8fdba0ed044 695 * @param[out] p_temp Result of temperature measurement. Die temperature in 0.25 degrees celsius.
gkroussos 0:e8fdba0ed044 696 *
gkroussos 0:e8fdba0ed044 697 * @retval ::NRF_SUCCESS A temperature measurement was done, and the temperature was written to temp
gkroussos 0:e8fdba0ed044 698 */
gkroussos 0:e8fdba0ed044 699 SVCALL(SD_TEMP_GET, uint32_t, sd_temp_get(int32_t * p_temp));
gkroussos 0:e8fdba0ed044 700
gkroussos 0:e8fdba0ed044 701 /**@brief Flash Write
gkroussos 0:e8fdba0ed044 702 *
gkroussos 0:e8fdba0ed044 703 * Commands to write a buffer to flash
gkroussos 0:e8fdba0ed044 704 *
gkroussos 0:e8fdba0ed044 705 * This call initiates the flash access command, and its completion will be communicated to the
gkroussos 0:e8fdba0ed044 706 * application with exactly one of the following events:
gkroussos 0:e8fdba0ed044 707 * - NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed.
gkroussos 0:e8fdba0ed044 708 * - NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started.
gkroussos 0:e8fdba0ed044 709 *
gkroussos 0:e8fdba0ed044 710 * @note
gkroussos 0:e8fdba0ed044 711 * - This call takes control over the radio and the CPU during flash erase and write to make sure that
gkroussos 0:e8fdba0ed044 712 * they will not interfere with the flash access. This means that all interrupts will be blocked
gkroussos 0:e8fdba0ed044 713 * for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual
gkroussos 0:e8fdba0ed044 714 * and the command parameters).
gkroussos 0:e8fdba0ed044 715 *
gkroussos 0:e8fdba0ed044 716 *
gkroussos 0:e8fdba0ed044 717 * @param[in] p_dst Pointer to start of flash location to be written.
gkroussos 0:e8fdba0ed044 718 * @param[in] p_src Pointer to buffer with data to be written
gkroussos 0:e8fdba0ed044 719 * @param[in] size Number of 32-bit words to write. Maximum size is 256 32bit words.
gkroussos 0:e8fdba0ed044 720 *
gkroussos 0:e8fdba0ed044 721 * @retval ::NRF_ERROR_INVALID_ADDR Tried to write to a non existing flash address, or p_dst or p_src was unaligned.
gkroussos 0:e8fdba0ed044 722 * @retval ::NRF_ERROR_BUSY The previous command has not yet completed.
gkroussos 0:e8fdba0ed044 723 * @retval ::NRF_ERROR_INVALID_LENGTH Size was 0, or more than 256 words.
gkroussos 0:e8fdba0ed044 724 * @retval ::NRF_ERROR_FORBIDDEN Tried to write to or read from protected location.
gkroussos 0:e8fdba0ed044 725 * @retval ::NRF_SUCCESS The command was accepted.
gkroussos 0:e8fdba0ed044 726 */
gkroussos 0:e8fdba0ed044 727 SVCALL(SD_FLASH_WRITE, uint32_t, sd_flash_write(uint32_t * const p_dst, uint32_t const * const p_src, uint32_t size));
gkroussos 0:e8fdba0ed044 728
gkroussos 0:e8fdba0ed044 729
gkroussos 0:e8fdba0ed044 730 /**@brief Flash Erase page
gkroussos 0:e8fdba0ed044 731 *
gkroussos 0:e8fdba0ed044 732 * Commands to erase a flash page
gkroussos 0:e8fdba0ed044 733 *
gkroussos 0:e8fdba0ed044 734 * This call initiates the flash access command, and its completion will be communicated to the
gkroussos 0:e8fdba0ed044 735 * application with exactly one of the following events:
gkroussos 0:e8fdba0ed044 736 * - NRF_EVT_FLASH_OPERATION_SUCCESS - The command was successfully completed.
gkroussos 0:e8fdba0ed044 737 * - NRF_EVT_FLASH_OPERATION_ERROR - The command could not be started.
gkroussos 0:e8fdba0ed044 738 *
gkroussos 0:e8fdba0ed044 739 * @note
gkroussos 0:e8fdba0ed044 740 * - This call takes control over the radio and the CPU during flash erase and write to make sure that
gkroussos 0:e8fdba0ed044 741 * they will not interfere with the flash access. This means that all interrupts will be blocked
gkroussos 0:e8fdba0ed044 742 * for a predictable time (depending on the NVMC specification in nRF51 Series Reference Manual
gkroussos 0:e8fdba0ed044 743 * and the command parameters).
gkroussos 0:e8fdba0ed044 744 *
gkroussos 0:e8fdba0ed044 745 *
gkroussos 0:e8fdba0ed044 746 * @param[in] page_number Pagenumber of the page to erase
gkroussos 0:e8fdba0ed044 747 * @retval ::NRF_ERROR_INTERNAL If a new session could not be opened due to an internal error.
gkroussos 0:e8fdba0ed044 748 * @retval ::NRF_ERROR_INVALID_ADDR Tried to erase to a non existing flash page.
gkroussos 0:e8fdba0ed044 749 * @retval ::NRF_ERROR_BUSY The previous command has not yet completed.
gkroussos 0:e8fdba0ed044 750 * @retval ::NRF_ERROR_FORBIDDEN Tried to erase a protected page.
gkroussos 0:e8fdba0ed044 751 * @retval ::NRF_SUCCESS The command was accepted.
gkroussos 0:e8fdba0ed044 752 */
gkroussos 0:e8fdba0ed044 753 SVCALL(SD_FLASH_ERASE_PAGE, uint32_t, sd_flash_page_erase(uint32_t page_number));
gkroussos 0:e8fdba0ed044 754
gkroussos 0:e8fdba0ed044 755
gkroussos 0:e8fdba0ed044 756 /**@brief Flash Protection set
gkroussos 0:e8fdba0ed044 757 *
gkroussos 0:e8fdba0ed044 758 * Commands to set the flash protection registers PROTENSETx
gkroussos 0:e8fdba0ed044 759 *
gkroussos 0:e8fdba0ed044 760 * @note To read the values in PROTENSETx you can read them directly. They are only write-protected.
gkroussos 0:e8fdba0ed044 761 *
gkroussos 0:e8fdba0ed044 762 * @param[in] protenset0 Value to be written to PROTENSET0
gkroussos 0:e8fdba0ed044 763 * @param[in] protenset1 Value to be written to PROTENSET1
gkroussos 0:e8fdba0ed044 764 *
gkroussos 0:e8fdba0ed044 765 * @retval ::NRF_ERROR_FORBIDDEN Tried to protect the SoftDevice
gkroussos 0:e8fdba0ed044 766 * @retval ::NRF_SUCCESS Values successfully written to PROTENSETx
gkroussos 0:e8fdba0ed044 767 */
gkroussos 0:e8fdba0ed044 768 SVCALL(SD_FLASH_PROTECT, uint32_t, sd_flash_protect(uint32_t protenset0, uint32_t protenset1));
gkroussos 0:e8fdba0ed044 769
gkroussos 0:e8fdba0ed044 770
gkroussos 0:e8fdba0ed044 771 /** @} */
gkroussos 0:e8fdba0ed044 772
gkroussos 0:e8fdba0ed044 773 #endif // NRF_SOC_H__
gkroussos 0:e8fdba0ed044 774
gkroussos 0:e8fdba0ed044 775 /**
gkroussos 0:e8fdba0ed044 776 @}
gkroussos 0:e8fdba0ed044 777 */