George Roussos / BLE_iBeacon_Exercise

Birkbeck College Mobile and Ubiquitous Computing IoT Lab Exercise 2

Dependencies:   BLE_API_Native_blog

mbed/TARGET_NRF51822/core_cmInstr.h@0:e8fdba0ed044, 2015-03-07 (annotated)

Committer:
gkroussos
Date:
Sat Mar 07 16:34:53 2015 +0000
Revision:
0:e8fdba0ed044
MUC IoT Workshop v1.0

Who changed what in which revision?

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gkroussos 0:e8fdba0ed044 1 /**************************************************************************//**
gkroussos 0:e8fdba0ed044 2 * @file core_cmInstr.h
gkroussos 0:e8fdba0ed044 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
gkroussos 0:e8fdba0ed044 4 * @version V3.20
gkroussos 0:e8fdba0ed044 5 * @date 05. March 2013
gkroussos 0:e8fdba0ed044 6 *
gkroussos 0:e8fdba0ed044 7 * @note
gkroussos 0:e8fdba0ed044 8 *
gkroussos 0:e8fdba0ed044 9 ******************************************************************************/
gkroussos 0:e8fdba0ed044 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
gkroussos 0:e8fdba0ed044 11
gkroussos 0:e8fdba0ed044 12 All rights reserved.
gkroussos 0:e8fdba0ed044 13 Redistribution and use in source and binary forms, with or without
gkroussos 0:e8fdba0ed044 14 modification, are permitted provided that the following conditions are met:
gkroussos 0:e8fdba0ed044 15 - Redistributions of source code must retain the above copyright
gkroussos 0:e8fdba0ed044 16 notice, this list of conditions and the following disclaimer.
gkroussos 0:e8fdba0ed044 17 - Redistributions in binary form must reproduce the above copyright
gkroussos 0:e8fdba0ed044 18 notice, this list of conditions and the following disclaimer in the
gkroussos 0:e8fdba0ed044 19 documentation and/or other materials provided with the distribution.
gkroussos 0:e8fdba0ed044 20 - Neither the name of ARM nor the names of its contributors may be used
gkroussos 0:e8fdba0ed044 21 to endorse or promote products derived from this software without
gkroussos 0:e8fdba0ed044 22 specific prior written permission.
gkroussos 0:e8fdba0ed044 23 *
gkroussos 0:e8fdba0ed044 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
gkroussos 0:e8fdba0ed044 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
gkroussos 0:e8fdba0ed044 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
gkroussos 0:e8fdba0ed044 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
gkroussos 0:e8fdba0ed044 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
gkroussos 0:e8fdba0ed044 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
gkroussos 0:e8fdba0ed044 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
gkroussos 0:e8fdba0ed044 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
gkroussos 0:e8fdba0ed044 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
gkroussos 0:e8fdba0ed044 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
gkroussos 0:e8fdba0ed044 34 POSSIBILITY OF SUCH DAMAGE.
gkroussos 0:e8fdba0ed044 35 ---------------------------------------------------------------------------*/
gkroussos 0:e8fdba0ed044 36
gkroussos 0:e8fdba0ed044 37
gkroussos 0:e8fdba0ed044 38 #ifndef __CORE_CMINSTR_H
gkroussos 0:e8fdba0ed044 39 #define __CORE_CMINSTR_H
gkroussos 0:e8fdba0ed044 40
gkroussos 0:e8fdba0ed044 41
gkroussos 0:e8fdba0ed044 42 /* ########################## Core Instruction Access ######################### */
gkroussos 0:e8fdba0ed044 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
gkroussos 0:e8fdba0ed044 44 Access to dedicated instructions
gkroussos 0:e8fdba0ed044 45 @{
gkroussos 0:e8fdba0ed044 46 */
gkroussos 0:e8fdba0ed044 47
gkroussos 0:e8fdba0ed044 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
gkroussos 0:e8fdba0ed044 49 /* ARM armcc specific functions */
gkroussos 0:e8fdba0ed044 50
gkroussos 0:e8fdba0ed044 51 #if (__ARMCC_VERSION < 400677)
gkroussos 0:e8fdba0ed044 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
gkroussos 0:e8fdba0ed044 53 #endif
gkroussos 0:e8fdba0ed044 54
gkroussos 0:e8fdba0ed044 55
gkroussos 0:e8fdba0ed044 56 /** \brief No Operation
gkroussos 0:e8fdba0ed044 57
gkroussos 0:e8fdba0ed044 58 No Operation does nothing. This instruction can be used for code alignment purposes.
gkroussos 0:e8fdba0ed044 59 */
gkroussos 0:e8fdba0ed044 60 #define __NOP __nop
gkroussos 0:e8fdba0ed044 61
gkroussos 0:e8fdba0ed044 62
gkroussos 0:e8fdba0ed044 63 /** \brief Wait For Interrupt
gkroussos 0:e8fdba0ed044 64
gkroussos 0:e8fdba0ed044 65 Wait For Interrupt is a hint instruction that suspends execution
gkroussos 0:e8fdba0ed044 66 until one of a number of events occurs.
gkroussos 0:e8fdba0ed044 67 */
gkroussos 0:e8fdba0ed044 68 #define __WFI __wfi
gkroussos 0:e8fdba0ed044 69
gkroussos 0:e8fdba0ed044 70
gkroussos 0:e8fdba0ed044 71 /** \brief Wait For Event
gkroussos 0:e8fdba0ed044 72
gkroussos 0:e8fdba0ed044 73 Wait For Event is a hint instruction that permits the processor to enter
gkroussos 0:e8fdba0ed044 74 a low-power state until one of a number of events occurs.
gkroussos 0:e8fdba0ed044 75 */
gkroussos 0:e8fdba0ed044 76 #define __WFE __wfe
gkroussos 0:e8fdba0ed044 77
gkroussos 0:e8fdba0ed044 78
gkroussos 0:e8fdba0ed044 79 /** \brief Send Event
gkroussos 0:e8fdba0ed044 80
gkroussos 0:e8fdba0ed044 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
gkroussos 0:e8fdba0ed044 82 */
gkroussos 0:e8fdba0ed044 83 #define __SEV __sev
gkroussos 0:e8fdba0ed044 84
gkroussos 0:e8fdba0ed044 85
gkroussos 0:e8fdba0ed044 86 /** \brief Instruction Synchronization Barrier
gkroussos 0:e8fdba0ed044 87
gkroussos 0:e8fdba0ed044 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
gkroussos 0:e8fdba0ed044 89 so that all instructions following the ISB are fetched from cache or
gkroussos 0:e8fdba0ed044 90 memory, after the instruction has been completed.
gkroussos 0:e8fdba0ed044 91 */
gkroussos 0:e8fdba0ed044 92 #define __ISB() __isb(0xF)
gkroussos 0:e8fdba0ed044 93
gkroussos 0:e8fdba0ed044 94
gkroussos 0:e8fdba0ed044 95 /** \brief Data Synchronization Barrier
gkroussos 0:e8fdba0ed044 96
gkroussos 0:e8fdba0ed044 97 This function acts as a special kind of Data Memory Barrier.
gkroussos 0:e8fdba0ed044 98 It completes when all explicit memory accesses before this instruction complete.
gkroussos 0:e8fdba0ed044 99 */
gkroussos 0:e8fdba0ed044 100 #define __DSB() __dsb(0xF)
gkroussos 0:e8fdba0ed044 101
gkroussos 0:e8fdba0ed044 102
gkroussos 0:e8fdba0ed044 103 /** \brief Data Memory Barrier
gkroussos 0:e8fdba0ed044 104
gkroussos 0:e8fdba0ed044 105 This function ensures the apparent order of the explicit memory operations before
gkroussos 0:e8fdba0ed044 106 and after the instruction, without ensuring their completion.
gkroussos 0:e8fdba0ed044 107 */
gkroussos 0:e8fdba0ed044 108 #define __DMB() __dmb(0xF)
gkroussos 0:e8fdba0ed044 109
gkroussos 0:e8fdba0ed044 110
gkroussos 0:e8fdba0ed044 111 /** \brief Reverse byte order (32 bit)
gkroussos 0:e8fdba0ed044 112
gkroussos 0:e8fdba0ed044 113 This function reverses the byte order in integer value.
gkroussos 0:e8fdba0ed044 114
gkroussos 0:e8fdba0ed044 115 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 116 \return Reversed value
gkroussos 0:e8fdba0ed044 117 */
gkroussos 0:e8fdba0ed044 118 #define __REV __rev
gkroussos 0:e8fdba0ed044 119
gkroussos 0:e8fdba0ed044 120
gkroussos 0:e8fdba0ed044 121 /** \brief Reverse byte order (16 bit)
gkroussos 0:e8fdba0ed044 122
gkroussos 0:e8fdba0ed044 123 This function reverses the byte order in two unsigned short values.
gkroussos 0:e8fdba0ed044 124
gkroussos 0:e8fdba0ed044 125 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 126 \return Reversed value
gkroussos 0:e8fdba0ed044 127 */
gkroussos 0:e8fdba0ed044 128 #ifndef __NO_EMBEDDED_ASM
gkroussos 0:e8fdba0ed044 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
gkroussos 0:e8fdba0ed044 130 {
gkroussos 0:e8fdba0ed044 131 rev16 r0, r0
gkroussos 0:e8fdba0ed044 132 bx lr
gkroussos 0:e8fdba0ed044 133 }
gkroussos 0:e8fdba0ed044 134 #endif
gkroussos 0:e8fdba0ed044 135
gkroussos 0:e8fdba0ed044 136 /** \brief Reverse byte order in signed short value
gkroussos 0:e8fdba0ed044 137
gkroussos 0:e8fdba0ed044 138 This function reverses the byte order in a signed short value with sign extension to integer.
gkroussos 0:e8fdba0ed044 139
gkroussos 0:e8fdba0ed044 140 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 141 \return Reversed value
gkroussos 0:e8fdba0ed044 142 */
gkroussos 0:e8fdba0ed044 143 #ifndef __NO_EMBEDDED_ASM
gkroussos 0:e8fdba0ed044 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
gkroussos 0:e8fdba0ed044 145 {
gkroussos 0:e8fdba0ed044 146 revsh r0, r0
gkroussos 0:e8fdba0ed044 147 bx lr
gkroussos 0:e8fdba0ed044 148 }
gkroussos 0:e8fdba0ed044 149 #endif
gkroussos 0:e8fdba0ed044 150
gkroussos 0:e8fdba0ed044 151
gkroussos 0:e8fdba0ed044 152 /** \brief Rotate Right in unsigned value (32 bit)
gkroussos 0:e8fdba0ed044 153
gkroussos 0:e8fdba0ed044 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
gkroussos 0:e8fdba0ed044 155
gkroussos 0:e8fdba0ed044 156 \param [in] value Value to rotate
gkroussos 0:e8fdba0ed044 157 \param [in] value Number of Bits to rotate
gkroussos 0:e8fdba0ed044 158 \return Rotated value
gkroussos 0:e8fdba0ed044 159 */
gkroussos 0:e8fdba0ed044 160 #define __ROR __ror
gkroussos 0:e8fdba0ed044 161
gkroussos 0:e8fdba0ed044 162
gkroussos 0:e8fdba0ed044 163 /** \brief Breakpoint
gkroussos 0:e8fdba0ed044 164
gkroussos 0:e8fdba0ed044 165 This function causes the processor to enter Debug state.
gkroussos 0:e8fdba0ed044 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
gkroussos 0:e8fdba0ed044 167
gkroussos 0:e8fdba0ed044 168 \param [in] value is ignored by the processor.
gkroussos 0:e8fdba0ed044 169 If required, a debugger can use it to store additional information about the breakpoint.
gkroussos 0:e8fdba0ed044 170 */
gkroussos 0:e8fdba0ed044 171 #define __BKPT(value) __breakpoint(value)
gkroussos 0:e8fdba0ed044 172
gkroussos 0:e8fdba0ed044 173
gkroussos 0:e8fdba0ed044 174 #if (__CORTEX_M >= 0x03)
gkroussos 0:e8fdba0ed044 175
gkroussos 0:e8fdba0ed044 176 /** \brief Reverse bit order of value
gkroussos 0:e8fdba0ed044 177
gkroussos 0:e8fdba0ed044 178 This function reverses the bit order of the given value.
gkroussos 0:e8fdba0ed044 179
gkroussos 0:e8fdba0ed044 180 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 181 \return Reversed value
gkroussos 0:e8fdba0ed044 182 */
gkroussos 0:e8fdba0ed044 183 #define __RBIT __rbit
gkroussos 0:e8fdba0ed044 184
gkroussos 0:e8fdba0ed044 185
gkroussos 0:e8fdba0ed044 186 /** \brief LDR Exclusive (8 bit)
gkroussos 0:e8fdba0ed044 187
gkroussos 0:e8fdba0ed044 188 This function performs a exclusive LDR command for 8 bit value.
gkroussos 0:e8fdba0ed044 189
gkroussos 0:e8fdba0ed044 190 \param [in] ptr Pointer to data
gkroussos 0:e8fdba0ed044 191 \return value of type uint8_t at (*ptr)
gkroussos 0:e8fdba0ed044 192 */
gkroussos 0:e8fdba0ed044 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
gkroussos 0:e8fdba0ed044 194
gkroussos 0:e8fdba0ed044 195
gkroussos 0:e8fdba0ed044 196 /** \brief LDR Exclusive (16 bit)
gkroussos 0:e8fdba0ed044 197
gkroussos 0:e8fdba0ed044 198 This function performs a exclusive LDR command for 16 bit values.
gkroussos 0:e8fdba0ed044 199
gkroussos 0:e8fdba0ed044 200 \param [in] ptr Pointer to data
gkroussos 0:e8fdba0ed044 201 \return value of type uint16_t at (*ptr)
gkroussos 0:e8fdba0ed044 202 */
gkroussos 0:e8fdba0ed044 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
gkroussos 0:e8fdba0ed044 204
gkroussos 0:e8fdba0ed044 205
gkroussos 0:e8fdba0ed044 206 /** \brief LDR Exclusive (32 bit)
gkroussos 0:e8fdba0ed044 207
gkroussos 0:e8fdba0ed044 208 This function performs a exclusive LDR command for 32 bit values.
gkroussos 0:e8fdba0ed044 209
gkroussos 0:e8fdba0ed044 210 \param [in] ptr Pointer to data
gkroussos 0:e8fdba0ed044 211 \return value of type uint32_t at (*ptr)
gkroussos 0:e8fdba0ed044 212 */
gkroussos 0:e8fdba0ed044 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
gkroussos 0:e8fdba0ed044 214
gkroussos 0:e8fdba0ed044 215
gkroussos 0:e8fdba0ed044 216 /** \brief STR Exclusive (8 bit)
gkroussos 0:e8fdba0ed044 217
gkroussos 0:e8fdba0ed044 218 This function performs a exclusive STR command for 8 bit values.
gkroussos 0:e8fdba0ed044 219
gkroussos 0:e8fdba0ed044 220 \param [in] value Value to store
gkroussos 0:e8fdba0ed044 221 \param [in] ptr Pointer to location
gkroussos 0:e8fdba0ed044 222 \return 0 Function succeeded
gkroussos 0:e8fdba0ed044 223 \return 1 Function failed
gkroussos 0:e8fdba0ed044 224 */
gkroussos 0:e8fdba0ed044 225 #define __STREXB(value, ptr) __strex(value, ptr)
gkroussos 0:e8fdba0ed044 226
gkroussos 0:e8fdba0ed044 227
gkroussos 0:e8fdba0ed044 228 /** \brief STR Exclusive (16 bit)
gkroussos 0:e8fdba0ed044 229
gkroussos 0:e8fdba0ed044 230 This function performs a exclusive STR command for 16 bit values.
gkroussos 0:e8fdba0ed044 231
gkroussos 0:e8fdba0ed044 232 \param [in] value Value to store
gkroussos 0:e8fdba0ed044 233 \param [in] ptr Pointer to location
gkroussos 0:e8fdba0ed044 234 \return 0 Function succeeded
gkroussos 0:e8fdba0ed044 235 \return 1 Function failed
gkroussos 0:e8fdba0ed044 236 */
gkroussos 0:e8fdba0ed044 237 #define __STREXH(value, ptr) __strex(value, ptr)
gkroussos 0:e8fdba0ed044 238
gkroussos 0:e8fdba0ed044 239
gkroussos 0:e8fdba0ed044 240 /** \brief STR Exclusive (32 bit)
gkroussos 0:e8fdba0ed044 241
gkroussos 0:e8fdba0ed044 242 This function performs a exclusive STR command for 32 bit values.
gkroussos 0:e8fdba0ed044 243
gkroussos 0:e8fdba0ed044 244 \param [in] value Value to store
gkroussos 0:e8fdba0ed044 245 \param [in] ptr Pointer to location
gkroussos 0:e8fdba0ed044 246 \return 0 Function succeeded
gkroussos 0:e8fdba0ed044 247 \return 1 Function failed
gkroussos 0:e8fdba0ed044 248 */
gkroussos 0:e8fdba0ed044 249 #define __STREXW(value, ptr) __strex(value, ptr)
gkroussos 0:e8fdba0ed044 250
gkroussos 0:e8fdba0ed044 251
gkroussos 0:e8fdba0ed044 252 /** \brief Remove the exclusive lock
gkroussos 0:e8fdba0ed044 253
gkroussos 0:e8fdba0ed044 254 This function removes the exclusive lock which is created by LDREX.
gkroussos 0:e8fdba0ed044 255
gkroussos 0:e8fdba0ed044 256 */
gkroussos 0:e8fdba0ed044 257 #define __CLREX __clrex
gkroussos 0:e8fdba0ed044 258
gkroussos 0:e8fdba0ed044 259
gkroussos 0:e8fdba0ed044 260 /** \brief Signed Saturate
gkroussos 0:e8fdba0ed044 261
gkroussos 0:e8fdba0ed044 262 This function saturates a signed value.
gkroussos 0:e8fdba0ed044 263
gkroussos 0:e8fdba0ed044 264 \param [in] value Value to be saturated
gkroussos 0:e8fdba0ed044 265 \param [in] sat Bit position to saturate to (1..32)
gkroussos 0:e8fdba0ed044 266 \return Saturated value
gkroussos 0:e8fdba0ed044 267 */
gkroussos 0:e8fdba0ed044 268 #define __SSAT __ssat
gkroussos 0:e8fdba0ed044 269
gkroussos 0:e8fdba0ed044 270
gkroussos 0:e8fdba0ed044 271 /** \brief Unsigned Saturate
gkroussos 0:e8fdba0ed044 272
gkroussos 0:e8fdba0ed044 273 This function saturates an unsigned value.
gkroussos 0:e8fdba0ed044 274
gkroussos 0:e8fdba0ed044 275 \param [in] value Value to be saturated
gkroussos 0:e8fdba0ed044 276 \param [in] sat Bit position to saturate to (0..31)
gkroussos 0:e8fdba0ed044 277 \return Saturated value
gkroussos 0:e8fdba0ed044 278 */
gkroussos 0:e8fdba0ed044 279 #define __USAT __usat
gkroussos 0:e8fdba0ed044 280
gkroussos 0:e8fdba0ed044 281
gkroussos 0:e8fdba0ed044 282 /** \brief Count leading zeros
gkroussos 0:e8fdba0ed044 283
gkroussos 0:e8fdba0ed044 284 This function counts the number of leading zeros of a data value.
gkroussos 0:e8fdba0ed044 285
gkroussos 0:e8fdba0ed044 286 \param [in] value Value to count the leading zeros
gkroussos 0:e8fdba0ed044 287 \return number of leading zeros in value
gkroussos 0:e8fdba0ed044 288 */
gkroussos 0:e8fdba0ed044 289 #define __CLZ __clz
gkroussos 0:e8fdba0ed044 290
gkroussos 0:e8fdba0ed044 291 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:e8fdba0ed044 292
gkroussos 0:e8fdba0ed044 293
gkroussos 0:e8fdba0ed044 294
gkroussos 0:e8fdba0ed044 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
gkroussos 0:e8fdba0ed044 296 /* IAR iccarm specific functions */
gkroussos 0:e8fdba0ed044 297
gkroussos 0:e8fdba0ed044 298 #include <cmsis_iar.h>
gkroussos 0:e8fdba0ed044 299
gkroussos 0:e8fdba0ed044 300
gkroussos 0:e8fdba0ed044 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
gkroussos 0:e8fdba0ed044 302 /* TI CCS specific functions */
gkroussos 0:e8fdba0ed044 303
gkroussos 0:e8fdba0ed044 304 #include <cmsis_ccs.h>
gkroussos 0:e8fdba0ed044 305
gkroussos 0:e8fdba0ed044 306
gkroussos 0:e8fdba0ed044 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
gkroussos 0:e8fdba0ed044 308 /* GNU gcc specific functions */
gkroussos 0:e8fdba0ed044 309
gkroussos 0:e8fdba0ed044 310 /* Define macros for porting to both thumb1 and thumb2.
gkroussos 0:e8fdba0ed044 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
gkroussos 0:e8fdba0ed044 312 * Otherwise, use general registers, specified by constrant "r" */
gkroussos 0:e8fdba0ed044 313 #if defined (__thumb__) && !defined (__thumb2__)
gkroussos 0:e8fdba0ed044 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
gkroussos 0:e8fdba0ed044 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
gkroussos 0:e8fdba0ed044 316 #else
gkroussos 0:e8fdba0ed044 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
gkroussos 0:e8fdba0ed044 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
gkroussos 0:e8fdba0ed044 319 #endif
gkroussos 0:e8fdba0ed044 320
gkroussos 0:e8fdba0ed044 321 /** \brief No Operation
gkroussos 0:e8fdba0ed044 322
gkroussos 0:e8fdba0ed044 323 No Operation does nothing. This instruction can be used for code alignment purposes.
gkroussos 0:e8fdba0ed044 324 */
gkroussos 0:e8fdba0ed044 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
gkroussos 0:e8fdba0ed044 326 {
gkroussos 0:e8fdba0ed044 327 __ASM volatile ("nop");
gkroussos 0:e8fdba0ed044 328 }
gkroussos 0:e8fdba0ed044 329
gkroussos 0:e8fdba0ed044 330
gkroussos 0:e8fdba0ed044 331 /** \brief Wait For Interrupt
gkroussos 0:e8fdba0ed044 332
gkroussos 0:e8fdba0ed044 333 Wait For Interrupt is a hint instruction that suspends execution
gkroussos 0:e8fdba0ed044 334 until one of a number of events occurs.
gkroussos 0:e8fdba0ed044 335 */
gkroussos 0:e8fdba0ed044 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
gkroussos 0:e8fdba0ed044 337 {
gkroussos 0:e8fdba0ed044 338 __ASM volatile ("wfi");
gkroussos 0:e8fdba0ed044 339 }
gkroussos 0:e8fdba0ed044 340
gkroussos 0:e8fdba0ed044 341
gkroussos 0:e8fdba0ed044 342 /** \brief Wait For Event
gkroussos 0:e8fdba0ed044 343
gkroussos 0:e8fdba0ed044 344 Wait For Event is a hint instruction that permits the processor to enter
gkroussos 0:e8fdba0ed044 345 a low-power state until one of a number of events occurs.
gkroussos 0:e8fdba0ed044 346 */
gkroussos 0:e8fdba0ed044 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
gkroussos 0:e8fdba0ed044 348 {
gkroussos 0:e8fdba0ed044 349 __ASM volatile ("wfe");
gkroussos 0:e8fdba0ed044 350 }
gkroussos 0:e8fdba0ed044 351
gkroussos 0:e8fdba0ed044 352
gkroussos 0:e8fdba0ed044 353 /** \brief Send Event
gkroussos 0:e8fdba0ed044 354
gkroussos 0:e8fdba0ed044 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
gkroussos 0:e8fdba0ed044 356 */
gkroussos 0:e8fdba0ed044 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
gkroussos 0:e8fdba0ed044 358 {
gkroussos 0:e8fdba0ed044 359 __ASM volatile ("sev");
gkroussos 0:e8fdba0ed044 360 }
gkroussos 0:e8fdba0ed044 361
gkroussos 0:e8fdba0ed044 362
gkroussos 0:e8fdba0ed044 363 /** \brief Instruction Synchronization Barrier
gkroussos 0:e8fdba0ed044 364
gkroussos 0:e8fdba0ed044 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
gkroussos 0:e8fdba0ed044 366 so that all instructions following the ISB are fetched from cache or
gkroussos 0:e8fdba0ed044 367 memory, after the instruction has been completed.
gkroussos 0:e8fdba0ed044 368 */
gkroussos 0:e8fdba0ed044 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
gkroussos 0:e8fdba0ed044 370 {
gkroussos 0:e8fdba0ed044 371 __ASM volatile ("isb");
gkroussos 0:e8fdba0ed044 372 }
gkroussos 0:e8fdba0ed044 373
gkroussos 0:e8fdba0ed044 374
gkroussos 0:e8fdba0ed044 375 /** \brief Data Synchronization Barrier
gkroussos 0:e8fdba0ed044 376
gkroussos 0:e8fdba0ed044 377 This function acts as a special kind of Data Memory Barrier.
gkroussos 0:e8fdba0ed044 378 It completes when all explicit memory accesses before this instruction complete.
gkroussos 0:e8fdba0ed044 379 */
gkroussos 0:e8fdba0ed044 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
gkroussos 0:e8fdba0ed044 381 {
gkroussos 0:e8fdba0ed044 382 __ASM volatile ("dsb");
gkroussos 0:e8fdba0ed044 383 }
gkroussos 0:e8fdba0ed044 384
gkroussos 0:e8fdba0ed044 385
gkroussos 0:e8fdba0ed044 386 /** \brief Data Memory Barrier
gkroussos 0:e8fdba0ed044 387
gkroussos 0:e8fdba0ed044 388 This function ensures the apparent order of the explicit memory operations before
gkroussos 0:e8fdba0ed044 389 and after the instruction, without ensuring their completion.
gkroussos 0:e8fdba0ed044 390 */
gkroussos 0:e8fdba0ed044 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
gkroussos 0:e8fdba0ed044 392 {
gkroussos 0:e8fdba0ed044 393 __ASM volatile ("dmb");
gkroussos 0:e8fdba0ed044 394 }
gkroussos 0:e8fdba0ed044 395
gkroussos 0:e8fdba0ed044 396
gkroussos 0:e8fdba0ed044 397 /** \brief Reverse byte order (32 bit)
gkroussos 0:e8fdba0ed044 398
gkroussos 0:e8fdba0ed044 399 This function reverses the byte order in integer value.
gkroussos 0:e8fdba0ed044 400
gkroussos 0:e8fdba0ed044 401 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 402 \return Reversed value
gkroussos 0:e8fdba0ed044 403 */
gkroussos 0:e8fdba0ed044 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
gkroussos 0:e8fdba0ed044 405 {
gkroussos 0:e8fdba0ed044 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
gkroussos 0:e8fdba0ed044 407 return __builtin_bswap32(value);
gkroussos 0:e8fdba0ed044 408 #else
gkroussos 0:e8fdba0ed044 409 uint32_t result;
gkroussos 0:e8fdba0ed044 410
gkroussos 0:e8fdba0ed044 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
gkroussos 0:e8fdba0ed044 412 return(result);
gkroussos 0:e8fdba0ed044 413 #endif
gkroussos 0:e8fdba0ed044 414 }
gkroussos 0:e8fdba0ed044 415
gkroussos 0:e8fdba0ed044 416
gkroussos 0:e8fdba0ed044 417 /** \brief Reverse byte order (16 bit)
gkroussos 0:e8fdba0ed044 418
gkroussos 0:e8fdba0ed044 419 This function reverses the byte order in two unsigned short values.
gkroussos 0:e8fdba0ed044 420
gkroussos 0:e8fdba0ed044 421 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 422 \return Reversed value
gkroussos 0:e8fdba0ed044 423 */
gkroussos 0:e8fdba0ed044 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
gkroussos 0:e8fdba0ed044 425 {
gkroussos 0:e8fdba0ed044 426 uint32_t result;
gkroussos 0:e8fdba0ed044 427
gkroussos 0:e8fdba0ed044 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
gkroussos 0:e8fdba0ed044 429 return(result);
gkroussos 0:e8fdba0ed044 430 }
gkroussos 0:e8fdba0ed044 431
gkroussos 0:e8fdba0ed044 432
gkroussos 0:e8fdba0ed044 433 /** \brief Reverse byte order in signed short value
gkroussos 0:e8fdba0ed044 434
gkroussos 0:e8fdba0ed044 435 This function reverses the byte order in a signed short value with sign extension to integer.
gkroussos 0:e8fdba0ed044 436
gkroussos 0:e8fdba0ed044 437 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 438 \return Reversed value
gkroussos 0:e8fdba0ed044 439 */
gkroussos 0:e8fdba0ed044 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
gkroussos 0:e8fdba0ed044 441 {
gkroussos 0:e8fdba0ed044 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
gkroussos 0:e8fdba0ed044 443 return (short)__builtin_bswap16(value);
gkroussos 0:e8fdba0ed044 444 #else
gkroussos 0:e8fdba0ed044 445 uint32_t result;
gkroussos 0:e8fdba0ed044 446
gkroussos 0:e8fdba0ed044 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
gkroussos 0:e8fdba0ed044 448 return(result);
gkroussos 0:e8fdba0ed044 449 #endif
gkroussos 0:e8fdba0ed044 450 }
gkroussos 0:e8fdba0ed044 451
gkroussos 0:e8fdba0ed044 452
gkroussos 0:e8fdba0ed044 453 /** \brief Rotate Right in unsigned value (32 bit)
gkroussos 0:e8fdba0ed044 454
gkroussos 0:e8fdba0ed044 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
gkroussos 0:e8fdba0ed044 456
gkroussos 0:e8fdba0ed044 457 \param [in] value Value to rotate
gkroussos 0:e8fdba0ed044 458 \param [in] value Number of Bits to rotate
gkroussos 0:e8fdba0ed044 459 \return Rotated value
gkroussos 0:e8fdba0ed044 460 */
gkroussos 0:e8fdba0ed044 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
gkroussos 0:e8fdba0ed044 462 {
gkroussos 0:e8fdba0ed044 463 return (op1 >> op2) | (op1 << (32 - op2));
gkroussos 0:e8fdba0ed044 464 }
gkroussos 0:e8fdba0ed044 465
gkroussos 0:e8fdba0ed044 466
gkroussos 0:e8fdba0ed044 467 /** \brief Breakpoint
gkroussos 0:e8fdba0ed044 468
gkroussos 0:e8fdba0ed044 469 This function causes the processor to enter Debug state.
gkroussos 0:e8fdba0ed044 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
gkroussos 0:e8fdba0ed044 471
gkroussos 0:e8fdba0ed044 472 \param [in] value is ignored by the processor.
gkroussos 0:e8fdba0ed044 473 If required, a debugger can use it to store additional information about the breakpoint.
gkroussos 0:e8fdba0ed044 474 */
gkroussos 0:e8fdba0ed044 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
gkroussos 0:e8fdba0ed044 476
gkroussos 0:e8fdba0ed044 477
gkroussos 0:e8fdba0ed044 478 #if (__CORTEX_M >= 0x03)
gkroussos 0:e8fdba0ed044 479
gkroussos 0:e8fdba0ed044 480 /** \brief Reverse bit order of value
gkroussos 0:e8fdba0ed044 481
gkroussos 0:e8fdba0ed044 482 This function reverses the bit order of the given value.
gkroussos 0:e8fdba0ed044 483
gkroussos 0:e8fdba0ed044 484 \param [in] value Value to reverse
gkroussos 0:e8fdba0ed044 485 \return Reversed value
gkroussos 0:e8fdba0ed044 486 */
gkroussos 0:e8fdba0ed044 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
gkroussos 0:e8fdba0ed044 488 {
gkroussos 0:e8fdba0ed044 489 uint32_t result;
gkroussos 0:e8fdba0ed044 490
gkroussos 0:e8fdba0ed044 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
gkroussos 0:e8fdba0ed044 492 return(result);
gkroussos 0:e8fdba0ed044 493 }
gkroussos 0:e8fdba0ed044 494
gkroussos 0:e8fdba0ed044 495
gkroussos 0:e8fdba0ed044 496 /** \brief LDR Exclusive (8 bit)
gkroussos 0:e8fdba0ed044 497
gkroussos 0:e8fdba0ed044 498 This function performs a exclusive LDR command for 8 bit value.
gkroussos 0:e8fdba0ed044 499
gkroussos 0:e8fdba0ed044 500 \param [in] ptr Pointer to data
gkroussos 0:e8fdba0ed044 501 \return value of type uint8_t at (*ptr)
gkroussos 0:e8fdba0ed044 502 */
gkroussos 0:e8fdba0ed044 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
gkroussos 0:e8fdba0ed044 504 {
gkroussos 0:e8fdba0ed044 505 uint32_t result;
gkroussos 0:e8fdba0ed044 506
gkroussos 0:e8fdba0ed044 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
gkroussos 0:e8fdba0ed044 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
gkroussos 0:e8fdba0ed044 509 #else
gkroussos 0:e8fdba0ed044 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
gkroussos 0:e8fdba0ed044 511 accepted by assembler. So has to use following less efficient pattern.
gkroussos 0:e8fdba0ed044 512 */
gkroussos 0:e8fdba0ed044 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
gkroussos 0:e8fdba0ed044 514 #endif
gkroussos 0:e8fdba0ed044 515 return(result);
gkroussos 0:e8fdba0ed044 516 }
gkroussos 0:e8fdba0ed044 517
gkroussos 0:e8fdba0ed044 518
gkroussos 0:e8fdba0ed044 519 /** \brief LDR Exclusive (16 bit)
gkroussos 0:e8fdba0ed044 520
gkroussos 0:e8fdba0ed044 521 This function performs a exclusive LDR command for 16 bit values.
gkroussos 0:e8fdba0ed044 522
gkroussos 0:e8fdba0ed044 523 \param [in] ptr Pointer to data
gkroussos 0:e8fdba0ed044 524 \return value of type uint16_t at (*ptr)
gkroussos 0:e8fdba0ed044 525 */
gkroussos 0:e8fdba0ed044 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
gkroussos 0:e8fdba0ed044 527 {
gkroussos 0:e8fdba0ed044 528 uint32_t result;
gkroussos 0:e8fdba0ed044 529
gkroussos 0:e8fdba0ed044 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
gkroussos 0:e8fdba0ed044 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
gkroussos 0:e8fdba0ed044 532 #else
gkroussos 0:e8fdba0ed044 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
gkroussos 0:e8fdba0ed044 534 accepted by assembler. So has to use following less efficient pattern.
gkroussos 0:e8fdba0ed044 535 */
gkroussos 0:e8fdba0ed044 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
gkroussos 0:e8fdba0ed044 537 #endif
gkroussos 0:e8fdba0ed044 538 return(result);
gkroussos 0:e8fdba0ed044 539 }
gkroussos 0:e8fdba0ed044 540
gkroussos 0:e8fdba0ed044 541
gkroussos 0:e8fdba0ed044 542 /** \brief LDR Exclusive (32 bit)
gkroussos 0:e8fdba0ed044 543
gkroussos 0:e8fdba0ed044 544 This function performs a exclusive LDR command for 32 bit values.
gkroussos 0:e8fdba0ed044 545
gkroussos 0:e8fdba0ed044 546 \param [in] ptr Pointer to data
gkroussos 0:e8fdba0ed044 547 \return value of type uint32_t at (*ptr)
gkroussos 0:e8fdba0ed044 548 */
gkroussos 0:e8fdba0ed044 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
gkroussos 0:e8fdba0ed044 550 {
gkroussos 0:e8fdba0ed044 551 uint32_t result;
gkroussos 0:e8fdba0ed044 552
gkroussos 0:e8fdba0ed044 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
gkroussos 0:e8fdba0ed044 554 return(result);
gkroussos 0:e8fdba0ed044 555 }
gkroussos 0:e8fdba0ed044 556
gkroussos 0:e8fdba0ed044 557
gkroussos 0:e8fdba0ed044 558 /** \brief STR Exclusive (8 bit)
gkroussos 0:e8fdba0ed044 559
gkroussos 0:e8fdba0ed044 560 This function performs a exclusive STR command for 8 bit values.
gkroussos 0:e8fdba0ed044 561
gkroussos 0:e8fdba0ed044 562 \param [in] value Value to store
gkroussos 0:e8fdba0ed044 563 \param [in] ptr Pointer to location
gkroussos 0:e8fdba0ed044 564 \return 0 Function succeeded
gkroussos 0:e8fdba0ed044 565 \return 1 Function failed
gkroussos 0:e8fdba0ed044 566 */
gkroussos 0:e8fdba0ed044 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
gkroussos 0:e8fdba0ed044 568 {
gkroussos 0:e8fdba0ed044 569 uint32_t result;
gkroussos 0:e8fdba0ed044 570
gkroussos 0:e8fdba0ed044 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
gkroussos 0:e8fdba0ed044 572 return(result);
gkroussos 0:e8fdba0ed044 573 }
gkroussos 0:e8fdba0ed044 574
gkroussos 0:e8fdba0ed044 575
gkroussos 0:e8fdba0ed044 576 /** \brief STR Exclusive (16 bit)
gkroussos 0:e8fdba0ed044 577
gkroussos 0:e8fdba0ed044 578 This function performs a exclusive STR command for 16 bit values.
gkroussos 0:e8fdba0ed044 579
gkroussos 0:e8fdba0ed044 580 \param [in] value Value to store
gkroussos 0:e8fdba0ed044 581 \param [in] ptr Pointer to location
gkroussos 0:e8fdba0ed044 582 \return 0 Function succeeded
gkroussos 0:e8fdba0ed044 583 \return 1 Function failed
gkroussos 0:e8fdba0ed044 584 */
gkroussos 0:e8fdba0ed044 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
gkroussos 0:e8fdba0ed044 586 {
gkroussos 0:e8fdba0ed044 587 uint32_t result;
gkroussos 0:e8fdba0ed044 588
gkroussos 0:e8fdba0ed044 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
gkroussos 0:e8fdba0ed044 590 return(result);
gkroussos 0:e8fdba0ed044 591 }
gkroussos 0:e8fdba0ed044 592
gkroussos 0:e8fdba0ed044 593
gkroussos 0:e8fdba0ed044 594 /** \brief STR Exclusive (32 bit)
gkroussos 0:e8fdba0ed044 595
gkroussos 0:e8fdba0ed044 596 This function performs a exclusive STR command for 32 bit values.
gkroussos 0:e8fdba0ed044 597
gkroussos 0:e8fdba0ed044 598 \param [in] value Value to store
gkroussos 0:e8fdba0ed044 599 \param [in] ptr Pointer to location
gkroussos 0:e8fdba0ed044 600 \return 0 Function succeeded
gkroussos 0:e8fdba0ed044 601 \return 1 Function failed
gkroussos 0:e8fdba0ed044 602 */
gkroussos 0:e8fdba0ed044 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
gkroussos 0:e8fdba0ed044 604 {
gkroussos 0:e8fdba0ed044 605 uint32_t result;
gkroussos 0:e8fdba0ed044 606
gkroussos 0:e8fdba0ed044 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
gkroussos 0:e8fdba0ed044 608 return(result);
gkroussos 0:e8fdba0ed044 609 }
gkroussos 0:e8fdba0ed044 610
gkroussos 0:e8fdba0ed044 611
gkroussos 0:e8fdba0ed044 612 /** \brief Remove the exclusive lock
gkroussos 0:e8fdba0ed044 613
gkroussos 0:e8fdba0ed044 614 This function removes the exclusive lock which is created by LDREX.
gkroussos 0:e8fdba0ed044 615
gkroussos 0:e8fdba0ed044 616 */
gkroussos 0:e8fdba0ed044 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
gkroussos 0:e8fdba0ed044 618 {
gkroussos 0:e8fdba0ed044 619 __ASM volatile ("clrex" ::: "memory");
gkroussos 0:e8fdba0ed044 620 }
gkroussos 0:e8fdba0ed044 621
gkroussos 0:e8fdba0ed044 622
gkroussos 0:e8fdba0ed044 623 /** \brief Signed Saturate
gkroussos 0:e8fdba0ed044 624
gkroussos 0:e8fdba0ed044 625 This function saturates a signed value.
gkroussos 0:e8fdba0ed044 626
gkroussos 0:e8fdba0ed044 627 \param [in] value Value to be saturated
gkroussos 0:e8fdba0ed044 628 \param [in] sat Bit position to saturate to (1..32)
gkroussos 0:e8fdba0ed044 629 \return Saturated value
gkroussos 0:e8fdba0ed044 630 */
gkroussos 0:e8fdba0ed044 631 #define __SSAT(ARG1,ARG2) \
gkroussos 0:e8fdba0ed044 632 ({ \
gkroussos 0:e8fdba0ed044 633 uint32_t __RES, __ARG1 = (ARG1); \
gkroussos 0:e8fdba0ed044 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
gkroussos 0:e8fdba0ed044 635 __RES; \
gkroussos 0:e8fdba0ed044 636 })
gkroussos 0:e8fdba0ed044 637
gkroussos 0:e8fdba0ed044 638
gkroussos 0:e8fdba0ed044 639 /** \brief Unsigned Saturate
gkroussos 0:e8fdba0ed044 640
gkroussos 0:e8fdba0ed044 641 This function saturates an unsigned value.
gkroussos 0:e8fdba0ed044 642
gkroussos 0:e8fdba0ed044 643 \param [in] value Value to be saturated
gkroussos 0:e8fdba0ed044 644 \param [in] sat Bit position to saturate to (0..31)
gkroussos 0:e8fdba0ed044 645 \return Saturated value
gkroussos 0:e8fdba0ed044 646 */
gkroussos 0:e8fdba0ed044 647 #define __USAT(ARG1,ARG2) \
gkroussos 0:e8fdba0ed044 648 ({ \
gkroussos 0:e8fdba0ed044 649 uint32_t __RES, __ARG1 = (ARG1); \
gkroussos 0:e8fdba0ed044 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
gkroussos 0:e8fdba0ed044 651 __RES; \
gkroussos 0:e8fdba0ed044 652 })
gkroussos 0:e8fdba0ed044 653
gkroussos 0:e8fdba0ed044 654
gkroussos 0:e8fdba0ed044 655 /** \brief Count leading zeros
gkroussos 0:e8fdba0ed044 656
gkroussos 0:e8fdba0ed044 657 This function counts the number of leading zeros of a data value.
gkroussos 0:e8fdba0ed044 658
gkroussos 0:e8fdba0ed044 659 \param [in] value Value to count the leading zeros
gkroussos 0:e8fdba0ed044 660 \return number of leading zeros in value
gkroussos 0:e8fdba0ed044 661 */
gkroussos 0:e8fdba0ed044 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
gkroussos 0:e8fdba0ed044 663 {
gkroussos 0:e8fdba0ed044 664 uint32_t result;
gkroussos 0:e8fdba0ed044 665
gkroussos 0:e8fdba0ed044 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
gkroussos 0:e8fdba0ed044 667 return(result);
gkroussos 0:e8fdba0ed044 668 }
gkroussos 0:e8fdba0ed044 669
gkroussos 0:e8fdba0ed044 670 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:e8fdba0ed044 671
gkroussos 0:e8fdba0ed044 672
gkroussos 0:e8fdba0ed044 673
gkroussos 0:e8fdba0ed044 674
gkroussos 0:e8fdba0ed044 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
gkroussos 0:e8fdba0ed044 676 /* TASKING carm specific functions */
gkroussos 0:e8fdba0ed044 677
gkroussos 0:e8fdba0ed044 678 /*
gkroussos 0:e8fdba0ed044 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
gkroussos 0:e8fdba0ed044 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
gkroussos 0:e8fdba0ed044 681 * Including the CMSIS ones.
gkroussos 0:e8fdba0ed044 682 */
gkroussos 0:e8fdba0ed044 683
gkroussos 0:e8fdba0ed044 684 #endif
gkroussos 0:e8fdba0ed044 685
gkroussos 0:e8fdba0ed044 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
gkroussos 0:e8fdba0ed044 687
gkroussos 0:e8fdba0ed044 688 #endif /* __CORE_CMINSTR_H */