George Roussos / BLE_iBeacon_Exercise

Birkbeck College Mobile and Ubiquitous Computing IoT Lab Exercise 2

Dependencies:   BLE_API_Native_blog

mbed/TARGET_NRF51822/core_cmFunc.h@0:e8fdba0ed044, 2015-03-07 (annotated)

Committer:
gkroussos
Date:
Sat Mar 07 16:34:53 2015 +0000
Revision:
0:e8fdba0ed044
MUC IoT Workshop v1.0

Who changed what in which revision?

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gkroussos 0:e8fdba0ed044 1 /**************************************************************************//**
gkroussos 0:e8fdba0ed044 2 * @file core_cmFunc.h
gkroussos 0:e8fdba0ed044 3 * @brief CMSIS Cortex-M Core Function Access Header File
gkroussos 0:e8fdba0ed044 4 * @version V3.20
gkroussos 0:e8fdba0ed044 5 * @date 25. February 2013
gkroussos 0:e8fdba0ed044 6 *
gkroussos 0:e8fdba0ed044 7 * @note
gkroussos 0:e8fdba0ed044 8 *
gkroussos 0:e8fdba0ed044 9 ******************************************************************************/
gkroussos 0:e8fdba0ed044 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
gkroussos 0:e8fdba0ed044 11
gkroussos 0:e8fdba0ed044 12 All rights reserved.
gkroussos 0:e8fdba0ed044 13 Redistribution and use in source and binary forms, with or without
gkroussos 0:e8fdba0ed044 14 modification, are permitted provided that the following conditions are met:
gkroussos 0:e8fdba0ed044 15 - Redistributions of source code must retain the above copyright
gkroussos 0:e8fdba0ed044 16 notice, this list of conditions and the following disclaimer.
gkroussos 0:e8fdba0ed044 17 - Redistributions in binary form must reproduce the above copyright
gkroussos 0:e8fdba0ed044 18 notice, this list of conditions and the following disclaimer in the
gkroussos 0:e8fdba0ed044 19 documentation and/or other materials provided with the distribution.
gkroussos 0:e8fdba0ed044 20 - Neither the name of ARM nor the names of its contributors may be used
gkroussos 0:e8fdba0ed044 21 to endorse or promote products derived from this software without
gkroussos 0:e8fdba0ed044 22 specific prior written permission.
gkroussos 0:e8fdba0ed044 23 *
gkroussos 0:e8fdba0ed044 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
gkroussos 0:e8fdba0ed044 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
gkroussos 0:e8fdba0ed044 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
gkroussos 0:e8fdba0ed044 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
gkroussos 0:e8fdba0ed044 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
gkroussos 0:e8fdba0ed044 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
gkroussos 0:e8fdba0ed044 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
gkroussos 0:e8fdba0ed044 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
gkroussos 0:e8fdba0ed044 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
gkroussos 0:e8fdba0ed044 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
gkroussos 0:e8fdba0ed044 34 POSSIBILITY OF SUCH DAMAGE.
gkroussos 0:e8fdba0ed044 35 ---------------------------------------------------------------------------*/
gkroussos 0:e8fdba0ed044 36
gkroussos 0:e8fdba0ed044 37
gkroussos 0:e8fdba0ed044 38 #ifndef __CORE_CMFUNC_H
gkroussos 0:e8fdba0ed044 39 #define __CORE_CMFUNC_H
gkroussos 0:e8fdba0ed044 40
gkroussos 0:e8fdba0ed044 41
gkroussos 0:e8fdba0ed044 42 /* ########################### Core Function Access ########################### */
gkroussos 0:e8fdba0ed044 43 /** \ingroup CMSIS_Core_FunctionInterface
gkroussos 0:e8fdba0ed044 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
gkroussos 0:e8fdba0ed044 45 @{
gkroussos 0:e8fdba0ed044 46 */
gkroussos 0:e8fdba0ed044 47
gkroussos 0:e8fdba0ed044 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
gkroussos 0:e8fdba0ed044 49 /* ARM armcc specific functions */
gkroussos 0:e8fdba0ed044 50
gkroussos 0:e8fdba0ed044 51 #if (__ARMCC_VERSION < 400677)
gkroussos 0:e8fdba0ed044 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
gkroussos 0:e8fdba0ed044 53 #endif
gkroussos 0:e8fdba0ed044 54
gkroussos 0:e8fdba0ed044 55 /* intrinsic void __enable_irq(); */
gkroussos 0:e8fdba0ed044 56 /* intrinsic void __disable_irq(); */
gkroussos 0:e8fdba0ed044 57
gkroussos 0:e8fdba0ed044 58 /** \brief Get Control Register
gkroussos 0:e8fdba0ed044 59
gkroussos 0:e8fdba0ed044 60 This function returns the content of the Control Register.
gkroussos 0:e8fdba0ed044 61
gkroussos 0:e8fdba0ed044 62 \return Control Register value
gkroussos 0:e8fdba0ed044 63 */
gkroussos 0:e8fdba0ed044 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
gkroussos 0:e8fdba0ed044 65 {
gkroussos 0:e8fdba0ed044 66 register uint32_t __regControl __ASM("control");
gkroussos 0:e8fdba0ed044 67 return(__regControl);
gkroussos 0:e8fdba0ed044 68 }
gkroussos 0:e8fdba0ed044 69
gkroussos 0:e8fdba0ed044 70
gkroussos 0:e8fdba0ed044 71 /** \brief Set Control Register
gkroussos 0:e8fdba0ed044 72
gkroussos 0:e8fdba0ed044 73 This function writes the given value to the Control Register.
gkroussos 0:e8fdba0ed044 74
gkroussos 0:e8fdba0ed044 75 \param [in] control Control Register value to set
gkroussos 0:e8fdba0ed044 76 */
gkroussos 0:e8fdba0ed044 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
gkroussos 0:e8fdba0ed044 78 {
gkroussos 0:e8fdba0ed044 79 register uint32_t __regControl __ASM("control");
gkroussos 0:e8fdba0ed044 80 __regControl = control;
gkroussos 0:e8fdba0ed044 81 }
gkroussos 0:e8fdba0ed044 82
gkroussos 0:e8fdba0ed044 83
gkroussos 0:e8fdba0ed044 84 /** \brief Get IPSR Register
gkroussos 0:e8fdba0ed044 85
gkroussos 0:e8fdba0ed044 86 This function returns the content of the IPSR Register.
gkroussos 0:e8fdba0ed044 87
gkroussos 0:e8fdba0ed044 88 \return IPSR Register value
gkroussos 0:e8fdba0ed044 89 */
gkroussos 0:e8fdba0ed044 90 __STATIC_INLINE uint32_t __get_IPSR(void)
gkroussos 0:e8fdba0ed044 91 {
gkroussos 0:e8fdba0ed044 92 register uint32_t __regIPSR __ASM("ipsr");
gkroussos 0:e8fdba0ed044 93 return(__regIPSR);
gkroussos 0:e8fdba0ed044 94 }
gkroussos 0:e8fdba0ed044 95
gkroussos 0:e8fdba0ed044 96
gkroussos 0:e8fdba0ed044 97 /** \brief Get APSR Register
gkroussos 0:e8fdba0ed044 98
gkroussos 0:e8fdba0ed044 99 This function returns the content of the APSR Register.
gkroussos 0:e8fdba0ed044 100
gkroussos 0:e8fdba0ed044 101 \return APSR Register value
gkroussos 0:e8fdba0ed044 102 */
gkroussos 0:e8fdba0ed044 103 __STATIC_INLINE uint32_t __get_APSR(void)
gkroussos 0:e8fdba0ed044 104 {
gkroussos 0:e8fdba0ed044 105 register uint32_t __regAPSR __ASM("apsr");
gkroussos 0:e8fdba0ed044 106 return(__regAPSR);
gkroussos 0:e8fdba0ed044 107 }
gkroussos 0:e8fdba0ed044 108
gkroussos 0:e8fdba0ed044 109
gkroussos 0:e8fdba0ed044 110 /** \brief Get xPSR Register
gkroussos 0:e8fdba0ed044 111
gkroussos 0:e8fdba0ed044 112 This function returns the content of the xPSR Register.
gkroussos 0:e8fdba0ed044 113
gkroussos 0:e8fdba0ed044 114 \return xPSR Register value
gkroussos 0:e8fdba0ed044 115 */
gkroussos 0:e8fdba0ed044 116 __STATIC_INLINE uint32_t __get_xPSR(void)
gkroussos 0:e8fdba0ed044 117 {
gkroussos 0:e8fdba0ed044 118 register uint32_t __regXPSR __ASM("xpsr");
gkroussos 0:e8fdba0ed044 119 return(__regXPSR);
gkroussos 0:e8fdba0ed044 120 }
gkroussos 0:e8fdba0ed044 121
gkroussos 0:e8fdba0ed044 122
gkroussos 0:e8fdba0ed044 123 /** \brief Get Process Stack Pointer
gkroussos 0:e8fdba0ed044 124
gkroussos 0:e8fdba0ed044 125 This function returns the current value of the Process Stack Pointer (PSP).
gkroussos 0:e8fdba0ed044 126
gkroussos 0:e8fdba0ed044 127 \return PSP Register value
gkroussos 0:e8fdba0ed044 128 */
gkroussos 0:e8fdba0ed044 129 __STATIC_INLINE uint32_t __get_PSP(void)
gkroussos 0:e8fdba0ed044 130 {
gkroussos 0:e8fdba0ed044 131 register uint32_t __regProcessStackPointer __ASM("psp");
gkroussos 0:e8fdba0ed044 132 return(__regProcessStackPointer);
gkroussos 0:e8fdba0ed044 133 }
gkroussos 0:e8fdba0ed044 134
gkroussos 0:e8fdba0ed044 135
gkroussos 0:e8fdba0ed044 136 /** \brief Set Process Stack Pointer
gkroussos 0:e8fdba0ed044 137
gkroussos 0:e8fdba0ed044 138 This function assigns the given value to the Process Stack Pointer (PSP).
gkroussos 0:e8fdba0ed044 139
gkroussos 0:e8fdba0ed044 140 \param [in] topOfProcStack Process Stack Pointer value to set
gkroussos 0:e8fdba0ed044 141 */
gkroussos 0:e8fdba0ed044 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
gkroussos 0:e8fdba0ed044 143 {
gkroussos 0:e8fdba0ed044 144 register uint32_t __regProcessStackPointer __ASM("psp");
gkroussos 0:e8fdba0ed044 145 __regProcessStackPointer = topOfProcStack;
gkroussos 0:e8fdba0ed044 146 }
gkroussos 0:e8fdba0ed044 147
gkroussos 0:e8fdba0ed044 148
gkroussos 0:e8fdba0ed044 149 /** \brief Get Main Stack Pointer
gkroussos 0:e8fdba0ed044 150
gkroussos 0:e8fdba0ed044 151 This function returns the current value of the Main Stack Pointer (MSP).
gkroussos 0:e8fdba0ed044 152
gkroussos 0:e8fdba0ed044 153 \return MSP Register value
gkroussos 0:e8fdba0ed044 154 */
gkroussos 0:e8fdba0ed044 155 __STATIC_INLINE uint32_t __get_MSP(void)
gkroussos 0:e8fdba0ed044 156 {
gkroussos 0:e8fdba0ed044 157 register uint32_t __regMainStackPointer __ASM("msp");
gkroussos 0:e8fdba0ed044 158 return(__regMainStackPointer);
gkroussos 0:e8fdba0ed044 159 }
gkroussos 0:e8fdba0ed044 160
gkroussos 0:e8fdba0ed044 161
gkroussos 0:e8fdba0ed044 162 /** \brief Set Main Stack Pointer
gkroussos 0:e8fdba0ed044 163
gkroussos 0:e8fdba0ed044 164 This function assigns the given value to the Main Stack Pointer (MSP).
gkroussos 0:e8fdba0ed044 165
gkroussos 0:e8fdba0ed044 166 \param [in] topOfMainStack Main Stack Pointer value to set
gkroussos 0:e8fdba0ed044 167 */
gkroussos 0:e8fdba0ed044 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
gkroussos 0:e8fdba0ed044 169 {
gkroussos 0:e8fdba0ed044 170 register uint32_t __regMainStackPointer __ASM("msp");
gkroussos 0:e8fdba0ed044 171 __regMainStackPointer = topOfMainStack;
gkroussos 0:e8fdba0ed044 172 }
gkroussos 0:e8fdba0ed044 173
gkroussos 0:e8fdba0ed044 174
gkroussos 0:e8fdba0ed044 175 /** \brief Get Priority Mask
gkroussos 0:e8fdba0ed044 176
gkroussos 0:e8fdba0ed044 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
gkroussos 0:e8fdba0ed044 178
gkroussos 0:e8fdba0ed044 179 \return Priority Mask value
gkroussos 0:e8fdba0ed044 180 */
gkroussos 0:e8fdba0ed044 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
gkroussos 0:e8fdba0ed044 182 {
gkroussos 0:e8fdba0ed044 183 register uint32_t __regPriMask __ASM("primask");
gkroussos 0:e8fdba0ed044 184 return(__regPriMask);
gkroussos 0:e8fdba0ed044 185 }
gkroussos 0:e8fdba0ed044 186
gkroussos 0:e8fdba0ed044 187
gkroussos 0:e8fdba0ed044 188 /** \brief Set Priority Mask
gkroussos 0:e8fdba0ed044 189
gkroussos 0:e8fdba0ed044 190 This function assigns the given value to the Priority Mask Register.
gkroussos 0:e8fdba0ed044 191
gkroussos 0:e8fdba0ed044 192 \param [in] priMask Priority Mask
gkroussos 0:e8fdba0ed044 193 */
gkroussos 0:e8fdba0ed044 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
gkroussos 0:e8fdba0ed044 195 {
gkroussos 0:e8fdba0ed044 196 register uint32_t __regPriMask __ASM("primask");
gkroussos 0:e8fdba0ed044 197 __regPriMask = (priMask);
gkroussos 0:e8fdba0ed044 198 }
gkroussos 0:e8fdba0ed044 199
gkroussos 0:e8fdba0ed044 200
gkroussos 0:e8fdba0ed044 201 #if (__CORTEX_M >= 0x03)
gkroussos 0:e8fdba0ed044 202
gkroussos 0:e8fdba0ed044 203 /** \brief Enable FIQ
gkroussos 0:e8fdba0ed044 204
gkroussos 0:e8fdba0ed044 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
gkroussos 0:e8fdba0ed044 206 Can only be executed in Privileged modes.
gkroussos 0:e8fdba0ed044 207 */
gkroussos 0:e8fdba0ed044 208 #define __enable_fault_irq __enable_fiq
gkroussos 0:e8fdba0ed044 209
gkroussos 0:e8fdba0ed044 210
gkroussos 0:e8fdba0ed044 211 /** \brief Disable FIQ
gkroussos 0:e8fdba0ed044 212
gkroussos 0:e8fdba0ed044 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
gkroussos 0:e8fdba0ed044 214 Can only be executed in Privileged modes.
gkroussos 0:e8fdba0ed044 215 */
gkroussos 0:e8fdba0ed044 216 #define __disable_fault_irq __disable_fiq
gkroussos 0:e8fdba0ed044 217
gkroussos 0:e8fdba0ed044 218
gkroussos 0:e8fdba0ed044 219 /** \brief Get Base Priority
gkroussos 0:e8fdba0ed044 220
gkroussos 0:e8fdba0ed044 221 This function returns the current value of the Base Priority register.
gkroussos 0:e8fdba0ed044 222
gkroussos 0:e8fdba0ed044 223 \return Base Priority register value
gkroussos 0:e8fdba0ed044 224 */
gkroussos 0:e8fdba0ed044 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
gkroussos 0:e8fdba0ed044 226 {
gkroussos 0:e8fdba0ed044 227 register uint32_t __regBasePri __ASM("basepri");
gkroussos 0:e8fdba0ed044 228 return(__regBasePri);
gkroussos 0:e8fdba0ed044 229 }
gkroussos 0:e8fdba0ed044 230
gkroussos 0:e8fdba0ed044 231
gkroussos 0:e8fdba0ed044 232 /** \brief Set Base Priority
gkroussos 0:e8fdba0ed044 233
gkroussos 0:e8fdba0ed044 234 This function assigns the given value to the Base Priority register.
gkroussos 0:e8fdba0ed044 235
gkroussos 0:e8fdba0ed044 236 \param [in] basePri Base Priority value to set
gkroussos 0:e8fdba0ed044 237 */
gkroussos 0:e8fdba0ed044 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
gkroussos 0:e8fdba0ed044 239 {
gkroussos 0:e8fdba0ed044 240 register uint32_t __regBasePri __ASM("basepri");
gkroussos 0:e8fdba0ed044 241 __regBasePri = (basePri & 0xff);
gkroussos 0:e8fdba0ed044 242 }
gkroussos 0:e8fdba0ed044 243
gkroussos 0:e8fdba0ed044 244
gkroussos 0:e8fdba0ed044 245 /** \brief Get Fault Mask
gkroussos 0:e8fdba0ed044 246
gkroussos 0:e8fdba0ed044 247 This function returns the current value of the Fault Mask register.
gkroussos 0:e8fdba0ed044 248
gkroussos 0:e8fdba0ed044 249 \return Fault Mask register value
gkroussos 0:e8fdba0ed044 250 */
gkroussos 0:e8fdba0ed044 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
gkroussos 0:e8fdba0ed044 252 {
gkroussos 0:e8fdba0ed044 253 register uint32_t __regFaultMask __ASM("faultmask");
gkroussos 0:e8fdba0ed044 254 return(__regFaultMask);
gkroussos 0:e8fdba0ed044 255 }
gkroussos 0:e8fdba0ed044 256
gkroussos 0:e8fdba0ed044 257
gkroussos 0:e8fdba0ed044 258 /** \brief Set Fault Mask
gkroussos 0:e8fdba0ed044 259
gkroussos 0:e8fdba0ed044 260 This function assigns the given value to the Fault Mask register.
gkroussos 0:e8fdba0ed044 261
gkroussos 0:e8fdba0ed044 262 \param [in] faultMask Fault Mask value to set
gkroussos 0:e8fdba0ed044 263 */
gkroussos 0:e8fdba0ed044 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
gkroussos 0:e8fdba0ed044 265 {
gkroussos 0:e8fdba0ed044 266 register uint32_t __regFaultMask __ASM("faultmask");
gkroussos 0:e8fdba0ed044 267 __regFaultMask = (faultMask & (uint32_t)1);
gkroussos 0:e8fdba0ed044 268 }
gkroussos 0:e8fdba0ed044 269
gkroussos 0:e8fdba0ed044 270 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:e8fdba0ed044 271
gkroussos 0:e8fdba0ed044 272
gkroussos 0:e8fdba0ed044 273 #if (__CORTEX_M == 0x04)
gkroussos 0:e8fdba0ed044 274
gkroussos 0:e8fdba0ed044 275 /** \brief Get FPSCR
gkroussos 0:e8fdba0ed044 276
gkroussos 0:e8fdba0ed044 277 This function returns the current value of the Floating Point Status/Control register.
gkroussos 0:e8fdba0ed044 278
gkroussos 0:e8fdba0ed044 279 \return Floating Point Status/Control register value
gkroussos 0:e8fdba0ed044 280 */
gkroussos 0:e8fdba0ed044 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
gkroussos 0:e8fdba0ed044 282 {
gkroussos 0:e8fdba0ed044 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:e8fdba0ed044 284 register uint32_t __regfpscr __ASM("fpscr");
gkroussos 0:e8fdba0ed044 285 return(__regfpscr);
gkroussos 0:e8fdba0ed044 286 #else
gkroussos 0:e8fdba0ed044 287 return(0);
gkroussos 0:e8fdba0ed044 288 #endif
gkroussos 0:e8fdba0ed044 289 }
gkroussos 0:e8fdba0ed044 290
gkroussos 0:e8fdba0ed044 291
gkroussos 0:e8fdba0ed044 292 /** \brief Set FPSCR
gkroussos 0:e8fdba0ed044 293
gkroussos 0:e8fdba0ed044 294 This function assigns the given value to the Floating Point Status/Control register.
gkroussos 0:e8fdba0ed044 295
gkroussos 0:e8fdba0ed044 296 \param [in] fpscr Floating Point Status/Control value to set
gkroussos 0:e8fdba0ed044 297 */
gkroussos 0:e8fdba0ed044 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
gkroussos 0:e8fdba0ed044 299 {
gkroussos 0:e8fdba0ed044 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:e8fdba0ed044 301 register uint32_t __regfpscr __ASM("fpscr");
gkroussos 0:e8fdba0ed044 302 __regfpscr = (fpscr);
gkroussos 0:e8fdba0ed044 303 #endif
gkroussos 0:e8fdba0ed044 304 }
gkroussos 0:e8fdba0ed044 305
gkroussos 0:e8fdba0ed044 306 #endif /* (__CORTEX_M == 0x04) */
gkroussos 0:e8fdba0ed044 307
gkroussos 0:e8fdba0ed044 308
gkroussos 0:e8fdba0ed044 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
gkroussos 0:e8fdba0ed044 310 /* IAR iccarm specific functions */
gkroussos 0:e8fdba0ed044 311
gkroussos 0:e8fdba0ed044 312 #include <cmsis_iar.h>
gkroussos 0:e8fdba0ed044 313
gkroussos 0:e8fdba0ed044 314
gkroussos 0:e8fdba0ed044 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
gkroussos 0:e8fdba0ed044 316 /* TI CCS specific functions */
gkroussos 0:e8fdba0ed044 317
gkroussos 0:e8fdba0ed044 318 #include <cmsis_ccs.h>
gkroussos 0:e8fdba0ed044 319
gkroussos 0:e8fdba0ed044 320
gkroussos 0:e8fdba0ed044 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
gkroussos 0:e8fdba0ed044 322 /* GNU gcc specific functions */
gkroussos 0:e8fdba0ed044 323
gkroussos 0:e8fdba0ed044 324 /** \brief Enable IRQ Interrupts
gkroussos 0:e8fdba0ed044 325
gkroussos 0:e8fdba0ed044 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
gkroussos 0:e8fdba0ed044 327 Can only be executed in Privileged modes.
gkroussos 0:e8fdba0ed044 328 */
gkroussos 0:e8fdba0ed044 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
gkroussos 0:e8fdba0ed044 330 {
gkroussos 0:e8fdba0ed044 331 __ASM volatile ("cpsie i" : : : "memory");
gkroussos 0:e8fdba0ed044 332 }
gkroussos 0:e8fdba0ed044 333
gkroussos 0:e8fdba0ed044 334
gkroussos 0:e8fdba0ed044 335 /** \brief Disable IRQ Interrupts
gkroussos 0:e8fdba0ed044 336
gkroussos 0:e8fdba0ed044 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
gkroussos 0:e8fdba0ed044 338 Can only be executed in Privileged modes.
gkroussos 0:e8fdba0ed044 339 */
gkroussos 0:e8fdba0ed044 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
gkroussos 0:e8fdba0ed044 341 {
gkroussos 0:e8fdba0ed044 342 __ASM volatile ("cpsid i" : : : "memory");
gkroussos 0:e8fdba0ed044 343 }
gkroussos 0:e8fdba0ed044 344
gkroussos 0:e8fdba0ed044 345
gkroussos 0:e8fdba0ed044 346 /** \brief Get Control Register
gkroussos 0:e8fdba0ed044 347
gkroussos 0:e8fdba0ed044 348 This function returns the content of the Control Register.
gkroussos 0:e8fdba0ed044 349
gkroussos 0:e8fdba0ed044 350 \return Control Register value
gkroussos 0:e8fdba0ed044 351 */
gkroussos 0:e8fdba0ed044 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
gkroussos 0:e8fdba0ed044 353 {
gkroussos 0:e8fdba0ed044 354 uint32_t result;
gkroussos 0:e8fdba0ed044 355
gkroussos 0:e8fdba0ed044 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
gkroussos 0:e8fdba0ed044 357 return(result);
gkroussos 0:e8fdba0ed044 358 }
gkroussos 0:e8fdba0ed044 359
gkroussos 0:e8fdba0ed044 360
gkroussos 0:e8fdba0ed044 361 /** \brief Set Control Register
gkroussos 0:e8fdba0ed044 362
gkroussos 0:e8fdba0ed044 363 This function writes the given value to the Control Register.
gkroussos 0:e8fdba0ed044 364
gkroussos 0:e8fdba0ed044 365 \param [in] control Control Register value to set
gkroussos 0:e8fdba0ed044 366 */
gkroussos 0:e8fdba0ed044 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
gkroussos 0:e8fdba0ed044 368 {
gkroussos 0:e8fdba0ed044 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
gkroussos 0:e8fdba0ed044 370 }
gkroussos 0:e8fdba0ed044 371
gkroussos 0:e8fdba0ed044 372
gkroussos 0:e8fdba0ed044 373 /** \brief Get IPSR Register
gkroussos 0:e8fdba0ed044 374
gkroussos 0:e8fdba0ed044 375 This function returns the content of the IPSR Register.
gkroussos 0:e8fdba0ed044 376
gkroussos 0:e8fdba0ed044 377 \return IPSR Register value
gkroussos 0:e8fdba0ed044 378 */
gkroussos 0:e8fdba0ed044 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
gkroussos 0:e8fdba0ed044 380 {
gkroussos 0:e8fdba0ed044 381 uint32_t result;
gkroussos 0:e8fdba0ed044 382
gkroussos 0:e8fdba0ed044 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
gkroussos 0:e8fdba0ed044 384 return(result);
gkroussos 0:e8fdba0ed044 385 }
gkroussos 0:e8fdba0ed044 386
gkroussos 0:e8fdba0ed044 387
gkroussos 0:e8fdba0ed044 388 /** \brief Get APSR Register
gkroussos 0:e8fdba0ed044 389
gkroussos 0:e8fdba0ed044 390 This function returns the content of the APSR Register.
gkroussos 0:e8fdba0ed044 391
gkroussos 0:e8fdba0ed044 392 \return APSR Register value
gkroussos 0:e8fdba0ed044 393 */
gkroussos 0:e8fdba0ed044 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
gkroussos 0:e8fdba0ed044 395 {
gkroussos 0:e8fdba0ed044 396 uint32_t result;
gkroussos 0:e8fdba0ed044 397
gkroussos 0:e8fdba0ed044 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
gkroussos 0:e8fdba0ed044 399 return(result);
gkroussos 0:e8fdba0ed044 400 }
gkroussos 0:e8fdba0ed044 401
gkroussos 0:e8fdba0ed044 402
gkroussos 0:e8fdba0ed044 403 /** \brief Get xPSR Register
gkroussos 0:e8fdba0ed044 404
gkroussos 0:e8fdba0ed044 405 This function returns the content of the xPSR Register.
gkroussos 0:e8fdba0ed044 406
gkroussos 0:e8fdba0ed044 407 \return xPSR Register value
gkroussos 0:e8fdba0ed044 408 */
gkroussos 0:e8fdba0ed044 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
gkroussos 0:e8fdba0ed044 410 {
gkroussos 0:e8fdba0ed044 411 uint32_t result;
gkroussos 0:e8fdba0ed044 412
gkroussos 0:e8fdba0ed044 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
gkroussos 0:e8fdba0ed044 414 return(result);
gkroussos 0:e8fdba0ed044 415 }
gkroussos 0:e8fdba0ed044 416
gkroussos 0:e8fdba0ed044 417
gkroussos 0:e8fdba0ed044 418 /** \brief Get Process Stack Pointer
gkroussos 0:e8fdba0ed044 419
gkroussos 0:e8fdba0ed044 420 This function returns the current value of the Process Stack Pointer (PSP).
gkroussos 0:e8fdba0ed044 421
gkroussos 0:e8fdba0ed044 422 \return PSP Register value
gkroussos 0:e8fdba0ed044 423 */
gkroussos 0:e8fdba0ed044 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
gkroussos 0:e8fdba0ed044 425 {
gkroussos 0:e8fdba0ed044 426 register uint32_t result;
gkroussos 0:e8fdba0ed044 427
gkroussos 0:e8fdba0ed044 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
gkroussos 0:e8fdba0ed044 429 return(result);
gkroussos 0:e8fdba0ed044 430 }
gkroussos 0:e8fdba0ed044 431
gkroussos 0:e8fdba0ed044 432
gkroussos 0:e8fdba0ed044 433 /** \brief Set Process Stack Pointer
gkroussos 0:e8fdba0ed044 434
gkroussos 0:e8fdba0ed044 435 This function assigns the given value to the Process Stack Pointer (PSP).
gkroussos 0:e8fdba0ed044 436
gkroussos 0:e8fdba0ed044 437 \param [in] topOfProcStack Process Stack Pointer value to set
gkroussos 0:e8fdba0ed044 438 */
gkroussos 0:e8fdba0ed044 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
gkroussos 0:e8fdba0ed044 440 {
gkroussos 0:e8fdba0ed044 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
gkroussos 0:e8fdba0ed044 442 }
gkroussos 0:e8fdba0ed044 443
gkroussos 0:e8fdba0ed044 444
gkroussos 0:e8fdba0ed044 445 /** \brief Get Main Stack Pointer
gkroussos 0:e8fdba0ed044 446
gkroussos 0:e8fdba0ed044 447 This function returns the current value of the Main Stack Pointer (MSP).
gkroussos 0:e8fdba0ed044 448
gkroussos 0:e8fdba0ed044 449 \return MSP Register value
gkroussos 0:e8fdba0ed044 450 */
gkroussos 0:e8fdba0ed044 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
gkroussos 0:e8fdba0ed044 452 {
gkroussos 0:e8fdba0ed044 453 register uint32_t result;
gkroussos 0:e8fdba0ed044 454
gkroussos 0:e8fdba0ed044 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
gkroussos 0:e8fdba0ed044 456 return(result);
gkroussos 0:e8fdba0ed044 457 }
gkroussos 0:e8fdba0ed044 458
gkroussos 0:e8fdba0ed044 459
gkroussos 0:e8fdba0ed044 460 /** \brief Set Main Stack Pointer
gkroussos 0:e8fdba0ed044 461
gkroussos 0:e8fdba0ed044 462 This function assigns the given value to the Main Stack Pointer (MSP).
gkroussos 0:e8fdba0ed044 463
gkroussos 0:e8fdba0ed044 464 \param [in] topOfMainStack Main Stack Pointer value to set
gkroussos 0:e8fdba0ed044 465 */
gkroussos 0:e8fdba0ed044 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
gkroussos 0:e8fdba0ed044 467 {
gkroussos 0:e8fdba0ed044 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
gkroussos 0:e8fdba0ed044 469 }
gkroussos 0:e8fdba0ed044 470
gkroussos 0:e8fdba0ed044 471
gkroussos 0:e8fdba0ed044 472 /** \brief Get Priority Mask
gkroussos 0:e8fdba0ed044 473
gkroussos 0:e8fdba0ed044 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
gkroussos 0:e8fdba0ed044 475
gkroussos 0:e8fdba0ed044 476 \return Priority Mask value
gkroussos 0:e8fdba0ed044 477 */
gkroussos 0:e8fdba0ed044 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
gkroussos 0:e8fdba0ed044 479 {
gkroussos 0:e8fdba0ed044 480 uint32_t result;
gkroussos 0:e8fdba0ed044 481
gkroussos 0:e8fdba0ed044 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
gkroussos 0:e8fdba0ed044 483 return(result);
gkroussos 0:e8fdba0ed044 484 }
gkroussos 0:e8fdba0ed044 485
gkroussos 0:e8fdba0ed044 486
gkroussos 0:e8fdba0ed044 487 /** \brief Set Priority Mask
gkroussos 0:e8fdba0ed044 488
gkroussos 0:e8fdba0ed044 489 This function assigns the given value to the Priority Mask Register.
gkroussos 0:e8fdba0ed044 490
gkroussos 0:e8fdba0ed044 491 \param [in] priMask Priority Mask
gkroussos 0:e8fdba0ed044 492 */
gkroussos 0:e8fdba0ed044 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
gkroussos 0:e8fdba0ed044 494 {
gkroussos 0:e8fdba0ed044 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
gkroussos 0:e8fdba0ed044 496 }
gkroussos 0:e8fdba0ed044 497
gkroussos 0:e8fdba0ed044 498
gkroussos 0:e8fdba0ed044 499 #if (__CORTEX_M >= 0x03)
gkroussos 0:e8fdba0ed044 500
gkroussos 0:e8fdba0ed044 501 /** \brief Enable FIQ
gkroussos 0:e8fdba0ed044 502
gkroussos 0:e8fdba0ed044 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
gkroussos 0:e8fdba0ed044 504 Can only be executed in Privileged modes.
gkroussos 0:e8fdba0ed044 505 */
gkroussos 0:e8fdba0ed044 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
gkroussos 0:e8fdba0ed044 507 {
gkroussos 0:e8fdba0ed044 508 __ASM volatile ("cpsie f" : : : "memory");
gkroussos 0:e8fdba0ed044 509 }
gkroussos 0:e8fdba0ed044 510
gkroussos 0:e8fdba0ed044 511
gkroussos 0:e8fdba0ed044 512 /** \brief Disable FIQ
gkroussos 0:e8fdba0ed044 513
gkroussos 0:e8fdba0ed044 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
gkroussos 0:e8fdba0ed044 515 Can only be executed in Privileged modes.
gkroussos 0:e8fdba0ed044 516 */
gkroussos 0:e8fdba0ed044 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
gkroussos 0:e8fdba0ed044 518 {
gkroussos 0:e8fdba0ed044 519 __ASM volatile ("cpsid f" : : : "memory");
gkroussos 0:e8fdba0ed044 520 }
gkroussos 0:e8fdba0ed044 521
gkroussos 0:e8fdba0ed044 522
gkroussos 0:e8fdba0ed044 523 /** \brief Get Base Priority
gkroussos 0:e8fdba0ed044 524
gkroussos 0:e8fdba0ed044 525 This function returns the current value of the Base Priority register.
gkroussos 0:e8fdba0ed044 526
gkroussos 0:e8fdba0ed044 527 \return Base Priority register value
gkroussos 0:e8fdba0ed044 528 */
gkroussos 0:e8fdba0ed044 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
gkroussos 0:e8fdba0ed044 530 {
gkroussos 0:e8fdba0ed044 531 uint32_t result;
gkroussos 0:e8fdba0ed044 532
gkroussos 0:e8fdba0ed044 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
gkroussos 0:e8fdba0ed044 534 return(result);
gkroussos 0:e8fdba0ed044 535 }
gkroussos 0:e8fdba0ed044 536
gkroussos 0:e8fdba0ed044 537
gkroussos 0:e8fdba0ed044 538 /** \brief Set Base Priority
gkroussos 0:e8fdba0ed044 539
gkroussos 0:e8fdba0ed044 540 This function assigns the given value to the Base Priority register.
gkroussos 0:e8fdba0ed044 541
gkroussos 0:e8fdba0ed044 542 \param [in] basePri Base Priority value to set
gkroussos 0:e8fdba0ed044 543 */
gkroussos 0:e8fdba0ed044 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
gkroussos 0:e8fdba0ed044 545 {
gkroussos 0:e8fdba0ed044 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
gkroussos 0:e8fdba0ed044 547 }
gkroussos 0:e8fdba0ed044 548
gkroussos 0:e8fdba0ed044 549
gkroussos 0:e8fdba0ed044 550 /** \brief Get Fault Mask
gkroussos 0:e8fdba0ed044 551
gkroussos 0:e8fdba0ed044 552 This function returns the current value of the Fault Mask register.
gkroussos 0:e8fdba0ed044 553
gkroussos 0:e8fdba0ed044 554 \return Fault Mask register value
gkroussos 0:e8fdba0ed044 555 */
gkroussos 0:e8fdba0ed044 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
gkroussos 0:e8fdba0ed044 557 {
gkroussos 0:e8fdba0ed044 558 uint32_t result;
gkroussos 0:e8fdba0ed044 559
gkroussos 0:e8fdba0ed044 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
gkroussos 0:e8fdba0ed044 561 return(result);
gkroussos 0:e8fdba0ed044 562 }
gkroussos 0:e8fdba0ed044 563
gkroussos 0:e8fdba0ed044 564
gkroussos 0:e8fdba0ed044 565 /** \brief Set Fault Mask
gkroussos 0:e8fdba0ed044 566
gkroussos 0:e8fdba0ed044 567 This function assigns the given value to the Fault Mask register.
gkroussos 0:e8fdba0ed044 568
gkroussos 0:e8fdba0ed044 569 \param [in] faultMask Fault Mask value to set
gkroussos 0:e8fdba0ed044 570 */
gkroussos 0:e8fdba0ed044 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
gkroussos 0:e8fdba0ed044 572 {
gkroussos 0:e8fdba0ed044 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
gkroussos 0:e8fdba0ed044 574 }
gkroussos 0:e8fdba0ed044 575
gkroussos 0:e8fdba0ed044 576 #endif /* (__CORTEX_M >= 0x03) */
gkroussos 0:e8fdba0ed044 577
gkroussos 0:e8fdba0ed044 578
gkroussos 0:e8fdba0ed044 579 #if (__CORTEX_M == 0x04)
gkroussos 0:e8fdba0ed044 580
gkroussos 0:e8fdba0ed044 581 /** \brief Get FPSCR
gkroussos 0:e8fdba0ed044 582
gkroussos 0:e8fdba0ed044 583 This function returns the current value of the Floating Point Status/Control register.
gkroussos 0:e8fdba0ed044 584
gkroussos 0:e8fdba0ed044 585 \return Floating Point Status/Control register value
gkroussos 0:e8fdba0ed044 586 */
gkroussos 0:e8fdba0ed044 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
gkroussos 0:e8fdba0ed044 588 {
gkroussos 0:e8fdba0ed044 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:e8fdba0ed044 590 uint32_t result;
gkroussos 0:e8fdba0ed044 591
gkroussos 0:e8fdba0ed044 592 /* Empty asm statement works as a scheduling barrier */
gkroussos 0:e8fdba0ed044 593 __ASM volatile ("");
gkroussos 0:e8fdba0ed044 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
gkroussos 0:e8fdba0ed044 595 __ASM volatile ("");
gkroussos 0:e8fdba0ed044 596 return(result);
gkroussos 0:e8fdba0ed044 597 #else
gkroussos 0:e8fdba0ed044 598 return(0);
gkroussos 0:e8fdba0ed044 599 #endif
gkroussos 0:e8fdba0ed044 600 }
gkroussos 0:e8fdba0ed044 601
gkroussos 0:e8fdba0ed044 602
gkroussos 0:e8fdba0ed044 603 /** \brief Set FPSCR
gkroussos 0:e8fdba0ed044 604
gkroussos 0:e8fdba0ed044 605 This function assigns the given value to the Floating Point Status/Control register.
gkroussos 0:e8fdba0ed044 606
gkroussos 0:e8fdba0ed044 607 \param [in] fpscr Floating Point Status/Control value to set
gkroussos 0:e8fdba0ed044 608 */
gkroussos 0:e8fdba0ed044 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
gkroussos 0:e8fdba0ed044 610 {
gkroussos 0:e8fdba0ed044 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gkroussos 0:e8fdba0ed044 612 /* Empty asm statement works as a scheduling barrier */
gkroussos 0:e8fdba0ed044 613 __ASM volatile ("");
gkroussos 0:e8fdba0ed044 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
gkroussos 0:e8fdba0ed044 615 __ASM volatile ("");
gkroussos 0:e8fdba0ed044 616 #endif
gkroussos 0:e8fdba0ed044 617 }
gkroussos 0:e8fdba0ed044 618
gkroussos 0:e8fdba0ed044 619 #endif /* (__CORTEX_M == 0x04) */
gkroussos 0:e8fdba0ed044 620
gkroussos 0:e8fdba0ed044 621
gkroussos 0:e8fdba0ed044 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
gkroussos 0:e8fdba0ed044 623 /* TASKING carm specific functions */
gkroussos 0:e8fdba0ed044 624
gkroussos 0:e8fdba0ed044 625 /*
gkroussos 0:e8fdba0ed044 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
gkroussos 0:e8fdba0ed044 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
gkroussos 0:e8fdba0ed044 628 * Including the CMSIS ones.
gkroussos 0:e8fdba0ed044 629 */
gkroussos 0:e8fdba0ed044 630
gkroussos 0:e8fdba0ed044 631 #endif
gkroussos 0:e8fdba0ed044 632
gkroussos 0:e8fdba0ed044 633 /*@} end of CMSIS_Core_RegAccFunctions */
gkroussos 0:e8fdba0ed044 634
gkroussos 0:e8fdba0ed044 635
gkroussos 0:e8fdba0ed044 636 #endif /* __CORE_CMFUNC_H */