This is a sample program to drive a 128x128 LCD with t6963 controller through SPI by means of an MCP23S17 16-Bit I/O Expander with Serial Interface
MCP23S17.h@0:bf72877f77ab, 2010-12-05 (annotated)
- Committer:
- gertk
- Date:
- Sun Dec 05 14:31:49 2010 +0000
- Revision:
- 0:bf72877f77ab
0.0001
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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gertk | 0:bf72877f77ab | 1 | /* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI |
gertk | 0:bf72877f77ab | 2 | * Copyright (c) 2010 Romilly Cocking |
gertk | 0:bf72877f77ab | 3 | * Released under the MIT License: http://mbed.org/license/mit |
gertk | 0:bf72877f77ab | 4 | * |
gertk | 0:bf72877f77ab | 5 | * version 0.4 |
gertk | 0:bf72877f77ab | 6 | */ |
gertk | 0:bf72877f77ab | 7 | #include "mbed.h" |
gertk | 0:bf72877f77ab | 8 | |
gertk | 0:bf72877f77ab | 9 | |
gertk | 0:bf72877f77ab | 10 | #define INTERRUPT_POLARITY_BIT 0x02 |
gertk | 0:bf72877f77ab | 11 | #define INTERRUPT_MIRROR_BIT 0x40 |
gertk | 0:bf72877f77ab | 12 | |
gertk | 0:bf72877f77ab | 13 | // all register addresses assume IOCON.BANK = 0 (POR default) |
gertk | 0:bf72877f77ab | 14 | |
gertk | 0:bf72877f77ab | 15 | #define IODIRA 0x00 |
gertk | 0:bf72877f77ab | 16 | #define IODIRB 0x01 |
gertk | 0:bf72877f77ab | 17 | #define IPOLA 0x02 |
gertk | 0:bf72877f77ab | 18 | #define IPOLB 0x03 |
gertk | 0:bf72877f77ab | 19 | #define GPINTENA 0x04 |
gertk | 0:bf72877f77ab | 20 | #define GPINTENB 0x05 |
gertk | 0:bf72877f77ab | 21 | #define DEFVALA 0x06 |
gertk | 0:bf72877f77ab | 22 | #define DEFVALB 0x07 |
gertk | 0:bf72877f77ab | 23 | #define INTCONA 0x08 |
gertk | 0:bf72877f77ab | 24 | #define INTCONB 0x09 |
gertk | 0:bf72877f77ab | 25 | #define IOCONA 0x0A |
gertk | 0:bf72877f77ab | 26 | #define IOCONB 0x0B |
gertk | 0:bf72877f77ab | 27 | #define GPPUA 0x0C |
gertk | 0:bf72877f77ab | 28 | #define GPPUB 0x0D |
gertk | 0:bf72877f77ab | 29 | #define INTFA 0x0E |
gertk | 0:bf72877f77ab | 30 | #define INTFB 0x0F |
gertk | 0:bf72877f77ab | 31 | #define INTCAPA 0x10 |
gertk | 0:bf72877f77ab | 32 | #define INTCAPB 0x11 |
gertk | 0:bf72877f77ab | 33 | #define GPIOA 0x12 |
gertk | 0:bf72877f77ab | 34 | #define GPIOB 0x13 |
gertk | 0:bf72877f77ab | 35 | #define OLATA 0x14 |
gertk | 0:bf72877f77ab | 36 | #define OLATB 0x15 |
gertk | 0:bf72877f77ab | 37 | |
gertk | 0:bf72877f77ab | 38 | #define LCD_HALT 0x80 |
gertk | 0:bf72877f77ab | 39 | #define LCD_FS 0x20 |
gertk | 0:bf72877f77ab | 40 | #define LCD_RST 0x10 |
gertk | 0:bf72877f77ab | 41 | #define LCD_CD 0x08 |
gertk | 0:bf72877f77ab | 42 | #define LCD_CE 0x04 |
gertk | 0:bf72877f77ab | 43 | #define LCD_RD 0x02 |
gertk | 0:bf72877f77ab | 44 | #define LCD_WR 0x01 |
gertk | 0:bf72877f77ab | 45 | |
gertk | 0:bf72877f77ab | 46 | // T6963C OPCODES |
gertk | 0:bf72877f77ab | 47 | #define TXHOME 0x40 // SET TXT HM ADD |
gertk | 0:bf72877f77ab | 48 | #define TXAREA 0x41 // SET TXT AREA |
gertk | 0:bf72877f77ab | 49 | #define GRHOME 0x42 // SET GRAPHIC HOME ADDRESS |
gertk | 0:bf72877f77ab | 50 | #define GRAREA 0x43 // SET GRAPHIC AREA |
gertk | 0:bf72877f77ab | 51 | #define OFFSET 0x22 // SET OFFSET ADDRESS |
gertk | 0:bf72877f77ab | 52 | #define ADPSET 0x24 // SET ADDRESS POINTER |
gertk | 0:bf72877f77ab | 53 | #define AWRON 0xB0 // SET AUTO WRITE MODE |
gertk | 0:bf72877f77ab | 54 | #define AWROFF 0xB2 // RESET AUTO WRITE MODE |