Mike Moore / mmSPI-2

This is an involuntary fork, created because the repository would not update mmSPI. SPI library used to communicate with an altera development board attached to four zigbee-header pins.

Dependents:   Embedded_RTOS_Project

Fork of mmSPI by Mike Moore

mmSPI.h@34:d5553509f31a, 2013-08-31 (annotated)

Committer:
gatedClock
Date:
Sat Aug 31 02:19:42 2013 +0000
Revision:
34:d5553509f31a
Parent:
32:5a5d9525c6c4
Child:
35:6152c9709697
IR can now be written from the UI.  test is passing.  needs some cleanup.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 2:bebcf53b72dc 1 #ifndef mmSPI_H // include guard.
gatedClock 2:bebcf53b72dc 2 #define mmSPI_H // include guard.
gatedClock 0:fb42c5acf810 3 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 4 student : m-moore
gatedClock 32:5a5d9525c6c4 5 email : gated.clock@gmail.com
gatedClock 32:5a5d9525c6c4 6 class : usb device drivers
gatedClock 0:fb42c5acf810 7 directory : mmSPI
gatedClock 0:fb42c5acf810 8 file : mmSPI.h
gatedClock 32:5a5d9525c6c4 9 date : september 3, 2013.
gatedClock 1:15706d15d123 10 ----description---------------------------------//------------------------------
gatedClock 1:15706d15d123 11 ----notes---------------------------------------//------------------------------
gatedClock 1:15706d15d123 12 1. the SPI interface pins are routed to the zigbee header.
gatedClock 0:fb42c5acf810 13 ------------------------------------------------//----------------------------*/
gatedClock 0:fb42c5acf810 14 #include "mbed.h" // standard mbed.org class.
gatedClock 1:15706d15d123 15 //---defines------------------------------------//------------------------------
gatedClock 8:e2d8bbc3e659 16 #define mmSPI_MOSI p29 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 17 #define mmSPI_MISO p30 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 18 #define mmSPI_SCLK p9 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 19 #define mmCPU_CLK p10 // soft CPU system clock.
gatedClock 0:fb42c5acf810 20 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 21 ------------------------------------------------//----------------------------*/
gatedClock 2:bebcf53b72dc 22
gatedClock 0:fb42c5acf810 23 //==============================================//==============================
gatedClock 0:fb42c5acf810 24 class mmSPI
gatedClock 0:fb42c5acf810 25 {
gatedClock 0:fb42c5acf810 26 public:
gatedClock 32:5a5d9525c6c4 27 mmSPI(); // constructor.
gatedClock 32:5a5d9525c6c4 28 ~mmSPI(); // destructor.
gatedClock 32:5a5d9525c6c4 29 void allocations(); // object allocations.
gatedClock 32:5a5d9525c6c4 30
gatedClock 32:5a5d9525c6c4 31 void setSPIfrequency (float); // initializations.
gatedClock 32:5a5d9525c6c4 32 void setSendBuffer (char * pcSendBuffer);
gatedClock 32:5a5d9525c6c4 33 void setReceiveBuffer(char * pcReceiveBuffer);
gatedClock 32:5a5d9525c6c4 34 void setNumberOfBytes(int dNumberOfBytes);
gatedClock 21:e90dd0f8aaa1 35
gatedClock 31:ea7b25e494b5 36 // SPI transceive loop.
gatedClock 32:5a5d9525c6c4 37 void transceive_vector(char cPreCPU, char cPreSPI, char cScan, char cPostCPU);
gatedClock 16:0e422fd263c6 38
gatedClock 24:d3b8c68f41f2 39 // write/read CPU registers.
gatedClock 32:5a5d9525c6c4 40 void write_register(char cRegister, char cValue);
gatedClock 34:d5553509f31a 41 void write_IR(char cValueH, char cValueL);
gatedClock 32:5a5d9525c6c4 42 char read_register (char cRegister);
gatedClock 32:5a5d9525c6c4 43
gatedClock 24:d3b8c68f41f2 44 // write/read CPU main-memory.
gatedClock 32:5a5d9525c6c4 45 void write_memory(char cHData, char cLdata, char cAddress);
gatedClock 32:5a5d9525c6c4 46 unsigned int read_memory (char cAddress);
gatedClock 32:5a5d9525c6c4 47
gatedClock 32:5a5d9525c6c4 48 void step(); // step the CPU.
gatedClock 22:7524dee5c753 49
gatedClock 32:5a5d9525c6c4 50 void clear_transmit_vector(); // fill with 0.
gatedClock 30:331c7c7d8bc1 51
gatedClock 32:5a5d9525c6c4 52 unsigned long SPIClockCount(); // return SPI clock count.
gatedClock 32:5a5d9525c6c4 53 unsigned long CPUClockCount(); // return CPU clock count.
gatedClock 24:d3b8c68f41f2 54
gatedClock 0:fb42c5acf810 55 private:
gatedClock 2:bebcf53b72dc 56
gatedClock 32:5a5d9525c6c4 57 DigitalOut * pMOSI; // SPI pin.
gatedClock 32:5a5d9525c6c4 58 DigitalOut * pMISO; // SPI pin.
gatedClock 32:5a5d9525c6c4 59 DigitalOut * pSCLK; // SPI pin.
gatedClock 32:5a5d9525c6c4 60 DigitalOut * pCPUclk; // soft cpu clock.
gatedClock 32:5a5d9525c6c4 61 char * pcSend; // SPI transmit vector.
gatedClock 32:5a5d9525c6c4 62 char * pcReceive; // SPI receive vector.
gatedClock 32:5a5d9525c6c4 63 float fSPIfreq; // SPI clock frequency.
gatedClock 32:5a5d9525c6c4 64 float fSPIquarterP; // SPI quarter period.
gatedClock 32:5a5d9525c6c4 65 int dNumBytes; // number of SPI bytes.
gatedClock 32:5a5d9525c6c4 66 int dLoop01; // loop index.
gatedClock 32:5a5d9525c6c4 67 int dLoop02; // loop index.
gatedClock 32:5a5d9525c6c4 68 unsigned long ulSPIclkCount; // SPI clock count.
gatedClock 32:5a5d9525c6c4 69 unsigned long ulCPUclkCount; // CPU clock count.
gatedClock 0:fb42c5acf810 70 };
gatedClock 2:bebcf53b72dc 71 //----------------------------------------------//------------------------------
gatedClock 2:bebcf53b72dc 72 #endif // include guard.