Mike Moore / mmSPI-2

This is an involuntary fork, created because the repository would not update mmSPI. SPI library used to communicate with an altera development board attached to four zigbee-header pins.

Dependents:   Embedded_RTOS_Project

Fork of mmSPI by Mike Moore

mmSPI.h@25:5bb59ae7b814, 2013-08-20 (annotated)

Committer:
gatedClock
Date:
Tue Aug 20 14:56:19 2013 +0000
Revision:
25:5bb59ae7b814
Parent:
24:d3b8c68f41f2
Child:
30:331c7c7d8bc1
cleanup.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 2:bebcf53b72dc 1 #ifndef mmSPI_H // include guard.
gatedClock 2:bebcf53b72dc 2 #define mmSPI_H // include guard.
gatedClock 0:fb42c5acf810 3 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 4 student : m-moore
gatedClock 0:fb42c5acf810 5 class : external SPI interface
gatedClock 0:fb42c5acf810 6 directory : mmSPI
gatedClock 0:fb42c5acf810 7 file : mmSPI.h
gatedClock 1:15706d15d123 8 ----description---------------------------------//------------------------------
gatedClock 1:15706d15d123 9 ----notes---------------------------------------//------------------------------
gatedClock 1:15706d15d123 10 1. the SPI interface pins are routed to the zigbee header.
gatedClock 0:fb42c5acf810 11 ------------------------------------------------//----------------------------*/
gatedClock 0:fb42c5acf810 12 #include "mbed.h" // standard mbed.org class.
gatedClock 15:d6cc57c4e23d 13 #include "C12832_lcd.h" // LCD.
gatedClock 1:15706d15d123 14 //---defines------------------------------------//------------------------------
gatedClock 8:e2d8bbc3e659 15 #define mmSPI_MOSI p29 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 16 #define mmSPI_MISO p30 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 17 #define mmSPI_SCLK p9 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 18 #define mmCPU_CLK p10 // soft CPU system clock.
gatedClock 0:fb42c5acf810 19 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 20 ------------------------------------------------//----------------------------*/
gatedClock 2:bebcf53b72dc 21
gatedClock 0:fb42c5acf810 22 //==============================================//==============================
gatedClock 0:fb42c5acf810 23 class mmSPI
gatedClock 0:fb42c5acf810 24 {
gatedClock 0:fb42c5acf810 25 public:
gatedClock 0:fb42c5acf810 26 mmSPI(); // constructor.
gatedClock 0:fb42c5acf810 27 ~mmSPI(); // destructor.
gatedClock 3:de99451ab3c0 28 void allocations(); // object allocations.
gatedClock 24:d3b8c68f41f2 29 void setSPIfrequency (float); // initializations.
gatedClock 24:d3b8c68f41f2 30 void setSendBuffer (char * pcSendBuffer);
gatedClock 24:d3b8c68f41f2 31 void setReceiveBuffer(char * pcReceiveBuffer);
gatedClock 24:d3b8c68f41f2 32 void setNumberOfBytes(int dNumberOfBytes);
gatedClock 21:e90dd0f8aaa1 33
gatedClock 24:d3b8c68f41f2 34 void transceive_vector(); // SPI transceive loop.
gatedClock 16:0e422fd263c6 35
gatedClock 24:d3b8c68f41f2 36 // write/read CPU registers.
gatedClock 23:dbd89a56716d 37 void write_register(char cRegister, char cValue);
gatedClock 24:d3b8c68f41f2 38 char read_register (char cRegister);
gatedClock 24:d3b8c68f41f2 39 // write/read CPU main-memory.
gatedClock 24:d3b8c68f41f2 40 void write_memory(char cHData, char cLdata, char cAddress);
gatedClock 24:d3b8c68f41f2 41 unsigned int read_memory (char cAddress);
gatedClock 22:7524dee5c753 42
gatedClock 24:d3b8c68f41f2 43 void clear_transmit_vector(); // fill with 0.
gatedClock 24:d3b8c68f41f2 44
gatedClock 0:fb42c5acf810 45 private:
gatedClock 2:bebcf53b72dc 46
gatedClock 3:de99451ab3c0 47 DigitalOut * pMOSI; // SPI pin.
gatedClock 3:de99451ab3c0 48 DigitalOut * pMISO; // SPI pin.
gatedClock 3:de99451ab3c0 49 DigitalOut * pSCLK; // SPI pin.
gatedClock 8:e2d8bbc3e659 50 DigitalOut * pCPUclk; // soft cpu clock.
gatedClock 22:7524dee5c753 51 char * pcSend; // SPI transmit vector.
gatedClock 22:7524dee5c753 52 char * pcReceive; // SPI receive vector.
gatedClock 4:aa1fe8707bef 53 float fSPIfreq; // SPI clock frequency.
gatedClock 4:aa1fe8707bef 54 float fSPIquarterP; // SPI quarter period.
gatedClock 22:7524dee5c753 55 int dNumBytes; // number of SPI bytes.
gatedClock 12:a1b7ce9c1d64 56 int dLoop01; // loop index.
gatedClock 12:a1b7ce9c1d64 57 int dLoop02; // loop index.
gatedClock 0:fb42c5acf810 58 };
gatedClock 2:bebcf53b72dc 59 //----------------------------------------------//------------------------------
gatedClock 2:bebcf53b72dc 60 #endif // include guard.