Mike Moore / mmSPI-2

This is an involuntary fork, created because the repository would not update mmSPI. SPI library used to communicate with an altera development board attached to four zigbee-header pins.

Dependents:   Embedded_RTOS_Project

Fork of mmSPI by Mike Moore

mmSPI.h@36:32cdc295f859, 2013-09-17 (annotated)

Committer:
gatedClock
Date:
Tue Sep 17 19:06:50 2013 +0000
Revision:
36:32cdc295f859
Parent:
35:6152c9709697 
updates for RTOS class project.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 2:bebcf53b72dc 1 #ifndef mmSPI_H // include guard.
gatedClock 2:bebcf53b72dc 2 #define mmSPI_H // include guard.
gatedClock 0:fb42c5acf810 3 /*----------------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 4 student : m-moore
gatedClock 32:5a5d9525c6c4 5 email : gated.clock@gmail.com
gatedClock 36:32cdc295f859 6 class : embedded RTOS
gatedClock 35:6152c9709697 7 directory : USB_device_project/mmSPI
gatedClock 0:fb42c5acf810 8 file : mmSPI.h
gatedClock 36:32cdc295f859 9 date : september 19, 2013.
gatedClock 35:6152c9709697 10 ----copyright-----------------------------------//------------------------------
gatedClock 35:6152c9709697 11 licensed for personal and academic use.
gatedClock 36:32cdc295f859 12 commercial use of original code must be approved by the account-holder of
gatedClock 35:6152c9709697 13 gated.clock@gmail.com
gatedClock 35:6152c9709697 14 ----description---------------------------------//------------------------------
gatedClock 35:6152c9709697 15 this library provides the low-level SPI data and clock signaling
gatedClock 35:6152c9709697 16 for communication with the altera development board, via four i/o
gatedClock 35:6152c9709697 17 pins available on the mbed development board's zigbee header.
gatedClock 1:15706d15d123 18 ----notes---------------------------------------//------------------------------
gatedClock 0:fb42c5acf810 19 ------------------------------------------------//----------------------------*/
gatedClock 0:fb42c5acf810 20 #include "mbed.h" // standard mbed.org class.
gatedClock 1:15706d15d123 21 //---defines------------------------------------//------------------------------
gatedClock 8:e2d8bbc3e659 22 #define mmSPI_MOSI p29 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 23 #define mmSPI_MISO p30 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 24 #define mmSPI_SCLK p9 // SPI interface pin.
gatedClock 8:e2d8bbc3e659 25 #define mmCPU_CLK p10 // soft CPU system clock.
gatedClock 0:fb42c5acf810 26 //==============================================//==============================
gatedClock 0:fb42c5acf810 27 class mmSPI
gatedClock 0:fb42c5acf810 28 {
gatedClock 0:fb42c5acf810 29 public:
gatedClock 32:5a5d9525c6c4 30 mmSPI(); // constructor.
gatedClock 32:5a5d9525c6c4 31 ~mmSPI(); // destructor.
gatedClock 32:5a5d9525c6c4 32 void allocations(); // object allocations.
gatedClock 32:5a5d9525c6c4 33
gatedClock 32:5a5d9525c6c4 34 void setSPIfrequency (float); // initializations.
gatedClock 32:5a5d9525c6c4 35 void setSendBuffer (char * pcSendBuffer);
gatedClock 32:5a5d9525c6c4 36 void setReceiveBuffer(char * pcReceiveBuffer);
gatedClock 32:5a5d9525c6c4 37 void setNumberOfBytes(int dNumberOfBytes);
gatedClock 21:e90dd0f8aaa1 38
gatedClock 31:ea7b25e494b5 39 // SPI transceive loop.
gatedClock 32:5a5d9525c6c4 40 void transceive_vector(char cPreCPU, char cPreSPI, char cScan, char cPostCPU);
gatedClock 16:0e422fd263c6 41
gatedClock 24:d3b8c68f41f2 42 // write/read CPU registers.
gatedClock 36:32cdc295f859 43 void write_register (char cRegister, char cValue);
gatedClock 36:32cdc295f859 44 void write_IR (char cValueH, char cValueL);
gatedClock 36:32cdc295f859 45 char read_register (char cRegister);
gatedClock 36:32cdc295f859 46 void read_all_registers(char * pcRegisters);
gatedClock 32:5a5d9525c6c4 47
gatedClock 24:d3b8c68f41f2 48 // write/read CPU main-memory.
gatedClock 32:5a5d9525c6c4 49 void write_memory(char cHData, char cLdata, char cAddress);
gatedClock 32:5a5d9525c6c4 50 unsigned int read_memory (char cAddress);
gatedClock 32:5a5d9525c6c4 51
gatedClock 32:5a5d9525c6c4 52 void step(); // step the CPU.
gatedClock 22:7524dee5c753 53
gatedClock 32:5a5d9525c6c4 54 void clear_transmit_vector(); // fill with 0.
gatedClock 30:331c7c7d8bc1 55
gatedClock 32:5a5d9525c6c4 56 unsigned long SPIClockCount(); // return SPI clock count.
gatedClock 32:5a5d9525c6c4 57 unsigned long CPUClockCount(); // return CPU clock count.
gatedClock 24:d3b8c68f41f2 58
gatedClock 0:fb42c5acf810 59 private:
gatedClock 2:bebcf53b72dc 60
gatedClock 32:5a5d9525c6c4 61 DigitalOut * pMOSI; // SPI pin.
gatedClock 32:5a5d9525c6c4 62 DigitalOut * pMISO; // SPI pin.
gatedClock 32:5a5d9525c6c4 63 DigitalOut * pSCLK; // SPI pin.
gatedClock 32:5a5d9525c6c4 64 DigitalOut * pCPUclk; // soft cpu clock.
gatedClock 32:5a5d9525c6c4 65 char * pcSend; // SPI transmit vector.
gatedClock 32:5a5d9525c6c4 66 char * pcReceive; // SPI receive vector.
gatedClock 32:5a5d9525c6c4 67 float fSPIfreq; // SPI clock frequency.
gatedClock 32:5a5d9525c6c4 68 float fSPIquarterP; // SPI quarter period.
gatedClock 32:5a5d9525c6c4 69 int dNumBytes; // number of SPI bytes.
gatedClock 32:5a5d9525c6c4 70 int dLoop01; // loop index.
gatedClock 32:5a5d9525c6c4 71 int dLoop02; // loop index.
gatedClock 32:5a5d9525c6c4 72 unsigned long ulSPIclkCount; // SPI clock count.
gatedClock 32:5a5d9525c6c4 73 unsigned long ulCPUclkCount; // CPU clock count.
gatedClock 0:fb42c5acf810 74 };
gatedClock 2:bebcf53b72dc 75 //----------------------------------------------//------------------------------
gatedClock 2:bebcf53b72dc 76 #endif // include guard.