Mike Moore
USB Device Programming class project. This project allows a Python/Tk program running on a PC host to monitor/control a test-CPU programmed into an altera development board.
Dependencies: C12832_lcd USBDevice mbed-rtos mbed mmSPI
Diff: mmRTL/cpu.txt
- Revision:
- 12:d10f526ca443
- Parent:
- 7:d1aca9ccbab8
--- a/mmRTL/cpu.txt Sun Sep 01 20:36:16 2013 +0000
+++ b/mmRTL/cpu.txt Sun Sep 01 22:02:19 2013 +0000
@@ -5,15 +5,15 @@
/*-----------------------------------module-----//----------------------------*/
module cpu
(
- iMOSI,
- oMISO,
- iSPIclk,
- iCPUclk,
- iKEY,
- iSW,
- oLEDR,
- oLEDG,
- oDummyLoad
+ iMOSI, // SPI data-in from mbed module.
+ oMISO, // SPI data-out to mbed module.
+ iSPIclk, // SPI clock in from mbed module.
+ iCPUclk, // CPU clock in from mbed module.
+ iKEY, // altera board pushbuttons.
+ iSW, // altera board slider switches.
+ oLEDR, // altera board red LED bank.
+ oLEDG, // altera board green LED bank.
+ oDummyLoad // anti-optimization dummy pin.
);
/*--------------------------------description---//------------------------------
the demonstration cpu datapath.
@@ -98,24 +98,25 @@
ledg0 U22
------------------------------------defines-----//----------------------------*/
/*-----------------------------------ports------//----------------------------*/
- input iMOSI; // SPI input.
- output oMISO; // SPI output.
- input iSPIclk; // SPI clock.
- input iCPUclk; // CPU clock.
- input [ 3:0] iKEY; // keypress.
- input [ 9:0] iSW; // slide-switches.
- output [ 9:0] oLEDR; // red LED bank.
- output [ 7:0] oLEDG; // green LED bank.
- output oDummyLoad; // anti-optimization.
+ input iMOSI; // SPI data-in from mbed module.
+ output oMISO; // SPI data-out to mbed module.
+ input iSPIclk; // SPI clock in from mbed module.
+ input iCPUclk; // CPU clock in from mbed module.
+ input [ 3:0] iKEY; // altera board pushbuttons.
+ input [ 9:0] iSW; // altera board slider switches.
+ output [ 9:0] oLEDR; // altera board red LED bank.
+ output [ 7:0] oLEDG; // altera board green LED bank.
+ output oDummyLoad; // anti-optimization dummy pin.
/*-----------------------------------wires------//----------------------------*/
- wire iMOSI; // SPI input.
- wire oMISO; // SPI output.
- wire iSPIclk; // SPI clock.
- wire iCPUclk; // CPU clock.
- wire [ 3:0] iKEY; // keypress.
- wire [ 9:0] iSW; // slide-switches.
- wire [ 9:0] oLEDR; // red LED bank.
- wire [ 7:0] oLEDG; // green LED bank.
+ wire iMOSI; // SPI data-in from mbed module.
+ wire oMISO; // SPI data-out to mbed module.
+ wire iSPIclk; // SPI clock in from mbed module.
+ wire iCPUclk; // CPU clock in from mbed module.
+ wire [ 3:0] iKEY; // altera board pushbuttons.
+ wire [ 9:0] iSW; // altera board slider switches.
+ wire [ 9:0] oLEDR; // altera board red LED bank.
+ wire [ 7:0] oLEDG; // altera board green LED bank.
+ wire oDummyLoad; // anti-optimization dummy pin.
wire wCEPC; // program counter count-enable.
wire [15:0] wIR; // instruction register.
@@ -162,7 +163,6 @@
wire [ 7:0] wGreenLEDBus2; // green LED bus.
wire [ 7:0] wGreenLEDBus1; // green LED bus.
wire [ 7:0] wGreenLEDBus0; // green LED bus.
- wire oDummyLoad; // anti-optimization.
wire [ 3:0] wTrigger; // trigger control.
/*---------------------------------registers----//----------------------------*/
/*---------------------------------variables----//----------------------------*/
@@ -497,35 +497,3 @@
assign oDummyLoad = (|wShadowIR) | wSIR | (|wSpiControl) | (|wTrigger);
/*-------------------------------*/endmodule/*--------------------------------*/
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