Mike Moore / Mbed 2 deprecated Embedded_RTOS_Project

Embedded RTOS class project. This project allows a Python/Tk program running on a PC host to monitor/control a test-CPU programmed into an altera development board.

Dependencies:   C12832_lcd USBDevice mbed-rtos mbed mmSPI-2 watchdog

Fork of USB_device_project by Mike Moore

mmRTL/mux8x8.txt@15:b8df590ce219, 2013-09-17 (annotated)

Committer:
gatedClock
Date:
Tue Sep 17 19:25:25 2013 +0000
Revision:
15:b8df590ce219
Parent:
7:d1aca9ccbab8 
update for embedded RTOS project.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gatedClock 3:659ffc90b59e 1 /*----------------------------------copyright---------------------------------*/
gatedClock 7:d1aca9ccbab8 2 // licensed for personal and academic use.
gatedClock 7:d1aca9ccbab8 3 // commercial use must be approved by the account-holder of
gatedClock 7:d1aca9ccbab8 4 // gated.clock@gmail.com
gatedClock 3:659ffc90b59e 5 /*-----------------------------------module-----------------------------------*/
gatedClock 7:d1aca9ccbab8 6 module mux8x8
gatedClock 3:659ffc90b59e 7 (
gatedClock 7:d1aca9ccbab8 8 iDin7, // data-input 7.
gatedClock 7:d1aca9ccbab8 9 iDin6, // data-input 6.
gatedClock 7:d1aca9ccbab8 10 iDin5, // data-input 5.
gatedClock 7:d1aca9ccbab8 11 iDin4, // data-input 4.
gatedClock 7:d1aca9ccbab8 12 iDin3, // data-input 3.
gatedClock 7:d1aca9ccbab8 13 iDin2, // data-input 2.
gatedClock 7:d1aca9ccbab8 14 iDin1, // data-input 1.
gatedClock 7:d1aca9ccbab8 15 iDin0, // data-input 0.
gatedClock 7:d1aca9ccbab8 16 iSel, // multiplexor select.
gatedClock 7:d1aca9ccbab8 17 oDout // data-out.
gatedClock 3:659ffc90b59e 18 );
gatedClock 3:659ffc90b59e 19 /*--------------------------------description-----------------------------------
gatedClock 7:d1aca9ccbab8 20 an 8-bit-wide, 8-selection multiplexor.
gatedClock 3:659ffc90b59e 21 -------------------------------------notes--------------------------------------
gatedClock 3:659ffc90b59e 22 ------------------------------------defines-----------------------------------*/
gatedClock 3:659ffc90b59e 23 /*-----------------------------------ports------------------------------------*/
gatedClock 7:d1aca9ccbab8 24 input [ 7:0] iDin7; // data-input 7.
gatedClock 7:d1aca9ccbab8 25 input [ 7:0] iDin6; // data-input 6.
gatedClock 7:d1aca9ccbab8 26 input [ 7:0] iDin5; // data-input 5.
gatedClock 7:d1aca9ccbab8 27 input [ 7:0] iDin4; // data-input 4.
gatedClock 7:d1aca9ccbab8 28 input [ 7:0] iDin3; // data-input 3.
gatedClock 7:d1aca9ccbab8 29 input [ 7:0] iDin2; // data-input 2.
gatedClock 7:d1aca9ccbab8 30 input [ 7:0] iDin1; // data-input 1.
gatedClock 7:d1aca9ccbab8 31 input [ 7:0] iDin0; // data-input 0.
gatedClock 7:d1aca9ccbab8 32 input [ 2:0] iSel; // multiplexor select.
gatedClock 7:d1aca9ccbab8 33 output [ 7:0] oDout; // data-out.
gatedClock 3:659ffc90b59e 34 /*-----------------------------------wires------------------------------------*/
gatedClock 7:d1aca9ccbab8 35 wire [ 7:0] iDin7; // data-input 7.
gatedClock 7:d1aca9ccbab8 36 wire [ 7:0] iDin6; // data-input 6.
gatedClock 7:d1aca9ccbab8 37 wire [ 7:0] iDin5; // data-input 5.
gatedClock 7:d1aca9ccbab8 38 wire [ 7:0] iDin4; // data-input 4.
gatedClock 7:d1aca9ccbab8 39 wire [ 7:0] iDin3; // data-input 3.
gatedClock 7:d1aca9ccbab8 40 wire [ 7:0] iDin2; // data-input 2.
gatedClock 7:d1aca9ccbab8 41 wire [ 7:0] iDin1; // data-input 1.
gatedClock 7:d1aca9ccbab8 42 wire [ 7:0] iDin0; // data-input 0.
gatedClock 7:d1aca9ccbab8 43 wire [ 2:0] iSel; // multiplexor select.
gatedClock 7:d1aca9ccbab8 44 wire [ 7:0] oDout; // data-out.
gatedClock 3:659ffc90b59e 45 /*---------------------------------registers----------------------------------*/
gatedClock 7:d1aca9ccbab8 46 reg [ 7:0] rDout; // output register.
gatedClock 3:659ffc90b59e 47 /*---------------------------------variables----------------------------------*/
gatedClock 3:659ffc90b59e 48 /*---------------------------------parameters---------------------------------*/
gatedClock 3:659ffc90b59e 49 /*-----------------------------------clocks-----------------------------------*/
gatedClock 3:659ffc90b59e 50 /*---------------------------------instances----------------------------------*/
gatedClock 3:659ffc90b59e 51 /*-----------------------------------logic------------------------------------*/
gatedClock 7:d1aca9ccbab8 52 always @ (iDin7 or iDin6 or iDin5 or iDin4 or
gatedClock 3:659ffc90b59e 53 iDin3 or iDin2 or iDin1 or iDin0 or iSel)
gatedClock 7:d1aca9ccbab8 54 case (iSel)
gatedClock 7:d1aca9ccbab8 55 7 : rDout = iDin7;
gatedClock 7:d1aca9ccbab8 56 6 : rDout = iDin6;
gatedClock 7:d1aca9ccbab8 57 5 : rDout = iDin5;
gatedClock 7:d1aca9ccbab8 58 4 : rDout = iDin4;
gatedClock 7:d1aca9ccbab8 59 3 : rDout = iDin3;
gatedClock 7:d1aca9ccbab8 60 2 : rDout = iDin2;
gatedClock 7:d1aca9ccbab8 61 1 : rDout = iDin1;
gatedClock 7:d1aca9ccbab8 62 0 : rDout = iDin0;
gatedClock 7:d1aca9ccbab8 63 endcase
gatedClock 3:659ffc90b59e 64
gatedClock 7:d1aca9ccbab8 65 assign oDout = rDout; // propagate output.
gatedClock 3:659ffc90b59e 66 /*-------------------------------*/endmodule/*--------------------------------*/
gatedClock 3:659ffc90b59e 67
gatedClock 3:659ffc90b59e 68
gatedClock 3:659ffc90b59e 69
gatedClock 3:659ffc90b59e 70
gatedClock 3:659ffc90b59e 71
gatedClock 3:659ffc90b59e 72
gatedClock 3:659ffc90b59e 73
gatedClock 3:659ffc90b59e 74
gatedClock 3:659ffc90b59e 75
gatedClock 3:659ffc90b59e 76
gatedClock 3:659ffc90b59e 77
gatedClock 3:659ffc90b59e 78
gatedClock 3:659ffc90b59e 79
gatedClock 3:659ffc90b59e 80
gatedClock 3:659ffc90b59e 81
gatedClock 3:659ffc90b59e 82
gatedClock 7:d1aca9ccbab8 83
gatedClock 7:d1aca9ccbab8 84
gatedClock 7:d1aca9ccbab8 85
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gatedClock 7:d1aca9ccbab8 87