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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.h@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

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User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_hal_dsi.h
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief Header file of DSI HAL module.
ganlikun	0:13413ea9a877	8	******************************************************************************
ganlikun	0:13413ea9a877	9	* @attention
ganlikun	0:13413ea9a877	10	*
ganlikun	0:13413ea9a877	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	12	*
ganlikun	0:13413ea9a877	13	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	14	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	15	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	16	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	18	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	19	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	21	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	22	* without specific prior written permission.
ganlikun	0:13413ea9a877	23	*
ganlikun	0:13413ea9a877	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	34	*
ganlikun	0:13413ea9a877	35	******************************************************************************
ganlikun	0:13413ea9a877	36	*/
ganlikun	0:13413ea9a877	37
ganlikun	0:13413ea9a877	38	/* Define to prevent recursive inclusion -------------------------------------*/
ganlikun	0:13413ea9a877	39	#ifndef __STM32F4xx_HAL_DSI_H
ganlikun	0:13413ea9a877	40	#define __STM32F4xx_HAL_DSI_H
ganlikun	0:13413ea9a877	41
ganlikun	0:13413ea9a877	42	#ifdef __cplusplus
ganlikun	0:13413ea9a877	43	extern "C" {
ganlikun	0:13413ea9a877	44	#endif
ganlikun	0:13413ea9a877	45
ganlikun	0:13413ea9a877	46	#if defined(STM32F469xx) \|\| defined(STM32F479xx)
ganlikun	0:13413ea9a877	47	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	48	#include "stm32f4xx_hal_def.h"
ganlikun	0:13413ea9a877	49
ganlikun	0:13413ea9a877	50	/** @addtogroup STM32F4xx_HAL_Driver
ganlikun	0:13413ea9a877	51	* @{
ganlikun	0:13413ea9a877	52	*/
ganlikun	0:13413ea9a877	53
ganlikun	0:13413ea9a877	54	/** @defgroup DSI DSI
ganlikun	0:13413ea9a877	55	* @brief DSI HAL module driver
ganlikun	0:13413ea9a877	56	* @{
ganlikun	0:13413ea9a877	57	*/
ganlikun	0:13413ea9a877	58
ganlikun	0:13413ea9a877	59	/* Exported types ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	60	/**
ganlikun	0:13413ea9a877	61	* @brief DSI Init Structure definition
ganlikun	0:13413ea9a877	62	*/
ganlikun	0:13413ea9a877	63	typedef struct
ganlikun	0:13413ea9a877	64	{
ganlikun	0:13413ea9a877	65	uint32_t AutomaticClockLaneControl; /*!< Automatic clock lane control
ganlikun	0:13413ea9a877	66	This parameter can be any value of @ref DSI_Automatic_Clk_Lane_Control */
ganlikun	0:13413ea9a877	67
ganlikun	0:13413ea9a877	68	uint32_t TXEscapeCkdiv; /*!< TX Escape clock division
ganlikun	0:13413ea9a877	69	The values 0 and 1 stop the TX_ESC clock generation */
ganlikun	0:13413ea9a877	70
ganlikun	0:13413ea9a877	71	uint32_t NumberOfLanes; /*!< Number of lanes
ganlikun	0:13413ea9a877	72	This parameter can be any value of @ref DSI_Number_Of_Lanes */
ganlikun	0:13413ea9a877	73
ganlikun	0:13413ea9a877	74	}DSI_InitTypeDef;
ganlikun	0:13413ea9a877	75
ganlikun	0:13413ea9a877	76	/**
ganlikun	0:13413ea9a877	77	* @brief DSI PLL Clock structure definition
ganlikun	0:13413ea9a877	78	*/
ganlikun	0:13413ea9a877	79	typedef struct
ganlikun	0:13413ea9a877	80	{
ganlikun	0:13413ea9a877	81	uint32_t PLLNDIV; /*!< PLL Loop Division Factor
ganlikun	0:13413ea9a877	82	This parameter must be a value between 10 and 125 */
ganlikun	0:13413ea9a877	83
ganlikun	0:13413ea9a877	84	uint32_t PLLIDF; /*!< PLL Input Division Factor
ganlikun	0:13413ea9a877	85	This parameter can be any value of @ref DSI_PLL_IDF */
ganlikun	0:13413ea9a877	86
ganlikun	0:13413ea9a877	87	uint32_t PLLODF; /*!< PLL Output Division Factor
ganlikun	0:13413ea9a877	88	This parameter can be any value of @ref DSI_PLL_ODF */
ganlikun	0:13413ea9a877	89
ganlikun	0:13413ea9a877	90	}DSI_PLLInitTypeDef;
ganlikun	0:13413ea9a877	91
ganlikun	0:13413ea9a877	92	/**
ganlikun	0:13413ea9a877	93	* @brief DSI Video mode configuration
ganlikun	0:13413ea9a877	94	*/
ganlikun	0:13413ea9a877	95	typedef struct
ganlikun	0:13413ea9a877	96	{
ganlikun	0:13413ea9a877	97	uint32_t VirtualChannelID; /!< Virtual channel ID /
ganlikun	0:13413ea9a877	98
ganlikun	0:13413ea9a877	99	uint32_t ColorCoding; /*!< Color coding for LTDC interface
ganlikun	0:13413ea9a877	100	This parameter can be any value of @ref DSI_Color_Coding */
ganlikun	0:13413ea9a877	101
ganlikun	0:13413ea9a877	102	uint32_t LooselyPacked; /*!< Enable or disable loosely packed stream (needed only when using
ganlikun	0:13413ea9a877	103	18-bit configuration).
ganlikun	0:13413ea9a877	104	This parameter can be any value of @ref DSI_LooselyPacked */
ganlikun	0:13413ea9a877	105
ganlikun	0:13413ea9a877	106	uint32_t Mode; /*!< Video mode type
ganlikun	0:13413ea9a877	107	This parameter can be any value of @ref DSI_Video_Mode_Type */
ganlikun	0:13413ea9a877	108
ganlikun	0:13413ea9a877	109	uint32_t PacketSize; /!< Video packet size /
ganlikun	0:13413ea9a877	110
ganlikun	0:13413ea9a877	111	uint32_t NumberOfChunks; /!< Number of chunks /
ganlikun	0:13413ea9a877	112
ganlikun	0:13413ea9a877	113	uint32_t NullPacketSize; /!< Null packet size /
ganlikun	0:13413ea9a877	114
ganlikun	0:13413ea9a877	115	uint32_t HSPolarity; /*!< HSYNC pin polarity
ganlikun	0:13413ea9a877	116	This parameter can be any value of @ref DSI_HSYNC_Polarity */
ganlikun	0:13413ea9a877	117
ganlikun	0:13413ea9a877	118	uint32_t VSPolarity; /*!< VSYNC pin polarity
ganlikun	0:13413ea9a877	119	This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
ganlikun	0:13413ea9a877	120
ganlikun	0:13413ea9a877	121	uint32_t DEPolarity; /*!< Data Enable pin polarity
ganlikun	0:13413ea9a877	122	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
ganlikun	0:13413ea9a877	123
ganlikun	0:13413ea9a877	124	uint32_t HorizontalSyncActive; /!< Horizontal synchronism active duration (in lane byte clock cycles) /
ganlikun	0:13413ea9a877	125
ganlikun	0:13413ea9a877	126	uint32_t HorizontalBackPorch; /!< Horizontal back-porch duration (in lane byte clock cycles) /
ganlikun	0:13413ea9a877	127
ganlikun	0:13413ea9a877	128	uint32_t HorizontalLine; /!< Horizontal line duration (in lane byte clock cycles) /
ganlikun	0:13413ea9a877	129
ganlikun	0:13413ea9a877	130	uint32_t VerticalSyncActive; /!< Vertical synchronism active duration /
ganlikun	0:13413ea9a877	131
ganlikun	0:13413ea9a877	132	uint32_t VerticalBackPorch; /!< Vertical back-porch duration /
ganlikun	0:13413ea9a877	133
ganlikun	0:13413ea9a877	134	uint32_t VerticalFrontPorch; /!< Vertical front-porch duration /
ganlikun	0:13413ea9a877	135
ganlikun	0:13413ea9a877	136	uint32_t VerticalActive; /!< Vertical active duration /
ganlikun	0:13413ea9a877	137
ganlikun	0:13413ea9a877	138	uint32_t LPCommandEnable; /*!< Low-power command enable
ganlikun	0:13413ea9a877	139	This parameter can be any value of @ref DSI_LP_Command */
ganlikun	0:13413ea9a877	140
ganlikun	0:13413ea9a877	141	uint32_t LPLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
ganlikun	0:13413ea9a877	142	can fit in a line during VSA, VBP and VFP regions */
ganlikun	0:13413ea9a877	143
ganlikun	0:13413ea9a877	144	uint32_t LPVACTLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
ganlikun	0:13413ea9a877	145	can fit in a line during VACT region */
ganlikun	0:13413ea9a877	146
ganlikun	0:13413ea9a877	147	uint32_t LPHorizontalFrontPorchEnable; /*!< Low-power horizontal front-porch enable
ganlikun	0:13413ea9a877	148	This parameter can be any value of @ref DSI_LP_HFP */
ganlikun	0:13413ea9a877	149
ganlikun	0:13413ea9a877	150	uint32_t LPHorizontalBackPorchEnable; /*!< Low-power horizontal back-porch enable
ganlikun	0:13413ea9a877	151	This parameter can be any value of @ref DSI_LP_HBP */
ganlikun	0:13413ea9a877	152
ganlikun	0:13413ea9a877	153	uint32_t LPVerticalActiveEnable; /*!< Low-power vertical active enable
ganlikun	0:13413ea9a877	154	This parameter can be any value of @ref DSI_LP_VACT */
ganlikun	0:13413ea9a877	155
ganlikun	0:13413ea9a877	156	uint32_t LPVerticalFrontPorchEnable; /*!< Low-power vertical front-porch enable
ganlikun	0:13413ea9a877	157	This parameter can be any value of @ref DSI_LP_VFP */
ganlikun	0:13413ea9a877	158
ganlikun	0:13413ea9a877	159	uint32_t LPVerticalBackPorchEnable; /*!< Low-power vertical back-porch enable
ganlikun	0:13413ea9a877	160	This parameter can be any value of @ref DSI_LP_VBP */
ganlikun	0:13413ea9a877	161
ganlikun	0:13413ea9a877	162	uint32_t LPVerticalSyncActiveEnable; /*!< Low-power vertical sync active enable
ganlikun	0:13413ea9a877	163	This parameter can be any value of @ref DSI_LP_VSYNC */
ganlikun	0:13413ea9a877	164
ganlikun	0:13413ea9a877	165	uint32_t FrameBTAAcknowledgeEnable; /*!< Frame bus-turn-around acknowledge enable
ganlikun	0:13413ea9a877	166	This parameter can be any value of @ref DSI_FBTA_acknowledge */
ganlikun	0:13413ea9a877	167
ganlikun	0:13413ea9a877	168	}DSI_VidCfgTypeDef;
ganlikun	0:13413ea9a877	169
ganlikun	0:13413ea9a877	170	/**
ganlikun	0:13413ea9a877	171	* @brief DSI Adapted command mode configuration
ganlikun	0:13413ea9a877	172	*/
ganlikun	0:13413ea9a877	173	typedef struct
ganlikun	0:13413ea9a877	174	{
ganlikun	0:13413ea9a877	175	uint32_t VirtualChannelID; /!< Virtual channel ID /
ganlikun	0:13413ea9a877	176
ganlikun	0:13413ea9a877	177	uint32_t ColorCoding; /*!< Color coding for LTDC interface
ganlikun	0:13413ea9a877	178	This parameter can be any value of @ref DSI_Color_Coding */
ganlikun	0:13413ea9a877	179
ganlikun	0:13413ea9a877	180	uint32_t CommandSize; /*!< Maximum allowed size for an LTDC write memory command, measured in
ganlikun	0:13413ea9a877	181	pixels. This parameter can be any value between 0x00 and 0xFFFFU */
ganlikun	0:13413ea9a877	182
ganlikun	0:13413ea9a877	183	uint32_t TearingEffectSource; /*!< Tearing effect source
ganlikun	0:13413ea9a877	184	This parameter can be any value of @ref DSI_TearingEffectSource */
ganlikun	0:13413ea9a877	185
ganlikun	0:13413ea9a877	186	uint32_t TearingEffectPolarity; /*!< Tearing effect pin polarity
ganlikun	0:13413ea9a877	187	This parameter can be any value of @ref DSI_TearingEffectPolarity */
ganlikun	0:13413ea9a877	188
ganlikun	0:13413ea9a877	189	uint32_t HSPolarity; /*!< HSYNC pin polarity
ganlikun	0:13413ea9a877	190	This parameter can be any value of @ref DSI_HSYNC_Polarity */
ganlikun	0:13413ea9a877	191
ganlikun	0:13413ea9a877	192	uint32_t VSPolarity; /*!< VSYNC pin polarity
ganlikun	0:13413ea9a877	193	This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
ganlikun	0:13413ea9a877	194
ganlikun	0:13413ea9a877	195	uint32_t DEPolarity; /*!< Data Enable pin polarity
ganlikun	0:13413ea9a877	196	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
ganlikun	0:13413ea9a877	197
ganlikun	0:13413ea9a877	198	uint32_t VSyncPol; /*!< VSync edge on which the LTDC is halted
ganlikun	0:13413ea9a877	199	This parameter can be any value of @ref DSI_Vsync_Polarity */
ganlikun	0:13413ea9a877	200
ganlikun	0:13413ea9a877	201	uint32_t AutomaticRefresh; /*!< Automatic refresh mode
ganlikun	0:13413ea9a877	202	This parameter can be any value of @ref DSI_AutomaticRefresh */
ganlikun	0:13413ea9a877	203
ganlikun	0:13413ea9a877	204	uint32_t TEAcknowledgeRequest; /*!< Tearing Effect Acknowledge Request Enable
ganlikun	0:13413ea9a877	205	This parameter can be any value of @ref DSI_TE_AcknowledgeRequest */
ganlikun	0:13413ea9a877	206
ganlikun	0:13413ea9a877	207	}DSI_CmdCfgTypeDef;
ganlikun	0:13413ea9a877	208
ganlikun	0:13413ea9a877	209	/**
ganlikun	0:13413ea9a877	210	* @brief DSI command transmission mode configuration
ganlikun	0:13413ea9a877	211	*/
ganlikun	0:13413ea9a877	212	typedef struct
ganlikun	0:13413ea9a877	213	{
ganlikun	0:13413ea9a877	214	uint32_t LPGenShortWriteNoP; /*!< Generic Short Write Zero parameters Transmission
ganlikun	0:13413ea9a877	215	This parameter can be any value of @ref DSI_LP_LPGenShortWriteNoP */
ganlikun	0:13413ea9a877	216
ganlikun	0:13413ea9a877	217	uint32_t LPGenShortWriteOneP; /*!< Generic Short Write One parameter Transmission
ganlikun	0:13413ea9a877	218	This parameter can be any value of @ref DSI_LP_LPGenShortWriteOneP */
ganlikun	0:13413ea9a877	219
ganlikun	0:13413ea9a877	220	uint32_t LPGenShortWriteTwoP; /*!< Generic Short Write Two parameters Transmission
ganlikun	0:13413ea9a877	221	This parameter can be any value of @ref DSI_LP_LPGenShortWriteTwoP */
ganlikun	0:13413ea9a877	222
ganlikun	0:13413ea9a877	223	uint32_t LPGenShortReadNoP; /*!< Generic Short Read Zero parameters Transmission
ganlikun	0:13413ea9a877	224	This parameter can be any value of @ref DSI_LP_LPGenShortReadNoP */
ganlikun	0:13413ea9a877	225
ganlikun	0:13413ea9a877	226	uint32_t LPGenShortReadOneP; /*!< Generic Short Read One parameter Transmission
ganlikun	0:13413ea9a877	227	This parameter can be any value of @ref DSI_LP_LPGenShortReadOneP */
ganlikun	0:13413ea9a877	228
ganlikun	0:13413ea9a877	229	uint32_t LPGenShortReadTwoP; /*!< Generic Short Read Two parameters Transmission
ganlikun	0:13413ea9a877	230	This parameter can be any value of @ref DSI_LP_LPGenShortReadTwoP */
ganlikun	0:13413ea9a877	231
ganlikun	0:13413ea9a877	232	uint32_t LPGenLongWrite; /*!< Generic Long Write Transmission
ganlikun	0:13413ea9a877	233	This parameter can be any value of @ref DSI_LP_LPGenLongWrite */
ganlikun	0:13413ea9a877	234
ganlikun	0:13413ea9a877	235	uint32_t LPDcsShortWriteNoP; /*!< DCS Short Write Zero parameters Transmission
ganlikun	0:13413ea9a877	236	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteNoP */
ganlikun	0:13413ea9a877	237
ganlikun	0:13413ea9a877	238	uint32_t LPDcsShortWriteOneP; /*!< DCS Short Write One parameter Transmission
ganlikun	0:13413ea9a877	239	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteOneP */
ganlikun	0:13413ea9a877	240
ganlikun	0:13413ea9a877	241	uint32_t LPDcsShortReadNoP; /*!< DCS Short Read Zero parameters Transmission
ganlikun	0:13413ea9a877	242	This parameter can be any value of @ref DSI_LP_LPDcsShortReadNoP */
ganlikun	0:13413ea9a877	243
ganlikun	0:13413ea9a877	244	uint32_t LPDcsLongWrite; /*!< DCS Long Write Transmission
ganlikun	0:13413ea9a877	245	This parameter can be any value of @ref DSI_LP_LPDcsLongWrite */
ganlikun	0:13413ea9a877	246
ganlikun	0:13413ea9a877	247	uint32_t LPMaxReadPacket; /*!< Maximum Read Packet Size Transmission
ganlikun	0:13413ea9a877	248	This parameter can be any value of @ref DSI_LP_LPMaxReadPacket */
ganlikun	0:13413ea9a877	249
ganlikun	0:13413ea9a877	250	uint32_t AcknowledgeRequest; /*!< Acknowledge Request Enable
ganlikun	0:13413ea9a877	251	This parameter can be any value of @ref DSI_AcknowledgeRequest */
ganlikun	0:13413ea9a877	252
ganlikun	0:13413ea9a877	253	}DSI_LPCmdTypeDef;
ganlikun	0:13413ea9a877	254
ganlikun	0:13413ea9a877	255	/**
ganlikun	0:13413ea9a877	256	* @brief DSI PHY Timings definition
ganlikun	0:13413ea9a877	257	*/
ganlikun	0:13413ea9a877	258	typedef struct
ganlikun	0:13413ea9a877	259	{
ganlikun	0:13413ea9a877	260	uint32_t ClockLaneHS2LPTime; /*!< The maximum time that the D-PHY clock lane takes to go from high-speed
ganlikun	0:13413ea9a877	261	to low-power transmission */
ganlikun	0:13413ea9a877	262
ganlikun	0:13413ea9a877	263	uint32_t ClockLaneLP2HSTime; /*!< The maximum time that the D-PHY clock lane takes to go from low-power
ganlikun	0:13413ea9a877	264	to high-speed transmission */
ganlikun	0:13413ea9a877	265
ganlikun	0:13413ea9a877	266	uint32_t DataLaneHS2LPTime; /*!< The maximum time that the D-PHY data lanes takes to go from high-speed
ganlikun	0:13413ea9a877	267	to low-power transmission */
ganlikun	0:13413ea9a877	268
ganlikun	0:13413ea9a877	269	uint32_t DataLaneLP2HSTime; /*!< The maximum time that the D-PHY data lanes takes to go from low-power
ganlikun	0:13413ea9a877	270	to high-speed transmission */
ganlikun	0:13413ea9a877	271
ganlikun	0:13413ea9a877	272	uint32_t DataLaneMaxReadTime; /!< The maximum time required to perform a read command /
ganlikun	0:13413ea9a877	273
ganlikun	0:13413ea9a877	274	uint32_t StopWaitTime; /*!< The minimum wait period to request a High-Speed transmission after the
ganlikun	0:13413ea9a877	275	Stop state */
ganlikun	0:13413ea9a877	276
ganlikun	0:13413ea9a877	277	}DSI_PHY_TimerTypeDef;
ganlikun	0:13413ea9a877	278
ganlikun	0:13413ea9a877	279	/**
ganlikun	0:13413ea9a877	280	* @brief DSI HOST Timeouts definition
ganlikun	0:13413ea9a877	281	*/
ganlikun	0:13413ea9a877	282	typedef struct
ganlikun	0:13413ea9a877	283	{
ganlikun	0:13413ea9a877	284	uint32_t TimeoutCkdiv; /!< Time-out clock division /
ganlikun	0:13413ea9a877	285
ganlikun	0:13413ea9a877	286	uint32_t HighSpeedTransmissionTimeout; /!< High-speed transmission time-out /
ganlikun	0:13413ea9a877	287
ganlikun	0:13413ea9a877	288	uint32_t LowPowerReceptionTimeout; /!< Low-power reception time-out /
ganlikun	0:13413ea9a877	289
ganlikun	0:13413ea9a877	290	uint32_t HighSpeedReadTimeout; /!< High-speed read time-out /
ganlikun	0:13413ea9a877	291
ganlikun	0:13413ea9a877	292	uint32_t LowPowerReadTimeout; /!< Low-power read time-out /
ganlikun	0:13413ea9a877	293
ganlikun	0:13413ea9a877	294	uint32_t HighSpeedWriteTimeout; /!< High-speed write time-out /
ganlikun	0:13413ea9a877	295
ganlikun	0:13413ea9a877	296	uint32_t HighSpeedWritePrespMode; /*!< High-speed write presp mode
ganlikun	0:13413ea9a877	297	This parameter can be any value of @ref DSI_HS_PrespMode */
ganlikun	0:13413ea9a877	298
ganlikun	0:13413ea9a877	299	uint32_t LowPowerWriteTimeout; /!< Low-speed write time-out /
ganlikun	0:13413ea9a877	300
ganlikun	0:13413ea9a877	301	uint32_t BTATimeout; /!< BTA time-out /
ganlikun	0:13413ea9a877	302
ganlikun	0:13413ea9a877	303	}DSI_HOST_TimeoutTypeDef;
ganlikun	0:13413ea9a877	304
ganlikun	0:13413ea9a877	305	/**
ganlikun	0:13413ea9a877	306	* @brief DSI States Structure definition
ganlikun	0:13413ea9a877	307	*/
ganlikun	0:13413ea9a877	308	typedef enum
ganlikun	0:13413ea9a877	309	{
ganlikun	0:13413ea9a877	310	HAL_DSI_STATE_RESET = 0x00U,
ganlikun	0:13413ea9a877	311	HAL_DSI_STATE_READY = 0x01U,
ganlikun	0:13413ea9a877	312	HAL_DSI_STATE_ERROR = 0x02U,
ganlikun	0:13413ea9a877	313	HAL_DSI_STATE_BUSY = 0x03U,
ganlikun	0:13413ea9a877	314	HAL_DSI_STATE_TIMEOUT = 0x04U
ganlikun	0:13413ea9a877	315	}HAL_DSI_StateTypeDef;
ganlikun	0:13413ea9a877	316
ganlikun	0:13413ea9a877	317	/**
ganlikun	0:13413ea9a877	318	* @brief DSI Handle Structure definition
ganlikun	0:13413ea9a877	319	*/
ganlikun	0:13413ea9a877	320	typedef struct
ganlikun	0:13413ea9a877	321	{
ganlikun	0:13413ea9a877	322	DSI_TypeDef Instance; /!< Register base address */
ganlikun	0:13413ea9a877	323	DSI_InitTypeDef Init; /!< DSI required parameters /
ganlikun	0:13413ea9a877	324	HAL_LockTypeDef Lock; /!< DSI peripheral status /
ganlikun	0:13413ea9a877	325	__IO HAL_DSI_StateTypeDef State; /!< DSI communication state /
ganlikun	0:13413ea9a877	326	__IO uint32_t ErrorCode; /!< DSI Error code /
ganlikun	0:13413ea9a877	327	uint32_t ErrorMsk; /!< DSI Error monitoring mask /
ganlikun	0:13413ea9a877	328	}DSI_HandleTypeDef;
ganlikun	0:13413ea9a877	329
ganlikun	0:13413ea9a877	330	/* Exported constants --------------------------------------------------------*/
ganlikun	0:13413ea9a877	331	/** @defgroup DSI_DCS_Command DSI DCS Command
ganlikun	0:13413ea9a877	332	* @{
ganlikun	0:13413ea9a877	333	*/
ganlikun	0:13413ea9a877	334	#define DSI_ENTER_IDLE_MODE 0x39U
ganlikun	0:13413ea9a877	335	#define DSI_ENTER_INVERT_MODE 0x21U
ganlikun	0:13413ea9a877	336	#define DSI_ENTER_NORMAL_MODE 0x13U
ganlikun	0:13413ea9a877	337	#define DSI_ENTER_PARTIAL_MODE 0x12U
ganlikun	0:13413ea9a877	338	#define DSI_ENTER_SLEEP_MODE 0x10U
ganlikun	0:13413ea9a877	339	#define DSI_EXIT_IDLE_MODE 0x38U
ganlikun	0:13413ea9a877	340	#define DSI_EXIT_INVERT_MODE 0x20U
ganlikun	0:13413ea9a877	341	#define DSI_EXIT_SLEEP_MODE 0x11U
ganlikun	0:13413ea9a877	342	#define DSI_GET_3D_CONTROL 0x3FU
ganlikun	0:13413ea9a877	343	#define DSI_GET_ADDRESS_MODE 0x0BU
ganlikun	0:13413ea9a877	344	#define DSI_GET_BLUE_CHANNEL 0x08U
ganlikun	0:13413ea9a877	345	#define DSI_GET_DIAGNOSTIC_RESULT 0x0FU
ganlikun	0:13413ea9a877	346	#define DSI_GET_DISPLAY_MODE 0x0DU
ganlikun	0:13413ea9a877	347	#define DSI_GET_GREEN_CHANNEL 0x07U
ganlikun	0:13413ea9a877	348	#define DSI_GET_PIXEL_FORMAT 0x0CU
ganlikun	0:13413ea9a877	349	#define DSI_GET_POWER_MODE 0x0AU
ganlikun	0:13413ea9a877	350	#define DSI_GET_RED_CHANNEL 0x06U
ganlikun	0:13413ea9a877	351	#define DSI_GET_SCANLINE 0x45U
ganlikun	0:13413ea9a877	352	#define DSI_GET_SIGNAL_MODE 0x0EU
ganlikun	0:13413ea9a877	353	#define DSI_NOP 0x00U
ganlikun	0:13413ea9a877	354	#define DSI_READ_DDB_CONTINUE 0xA8U
ganlikun	0:13413ea9a877	355	#define DSI_READ_DDB_START 0xA1U
ganlikun	0:13413ea9a877	356	#define DSI_READ_MEMORY_CONTINUE 0x3EU
ganlikun	0:13413ea9a877	357	#define DSI_READ_MEMORY_START 0x2EU
ganlikun	0:13413ea9a877	358	#define DSI_SET_3D_CONTROL 0x3DU
ganlikun	0:13413ea9a877	359	#define DSI_SET_ADDRESS_MODE 0x36U
ganlikun	0:13413ea9a877	360	#define DSI_SET_COLUMN_ADDRESS 0x2AU
ganlikun	0:13413ea9a877	361	#define DSI_SET_DISPLAY_OFF 0x28U
ganlikun	0:13413ea9a877	362	#define DSI_SET_DISPLAY_ON 0x29U
ganlikun	0:13413ea9a877	363	#define DSI_SET_GAMMA_CURVE 0x26U
ganlikun	0:13413ea9a877	364	#define DSI_SET_PAGE_ADDRESS 0x2BU
ganlikun	0:13413ea9a877	365	#define DSI_SET_PARTIAL_COLUMNS 0x31U
ganlikun	0:13413ea9a877	366	#define DSI_SET_PARTIAL_ROWS 0x30U
ganlikun	0:13413ea9a877	367	#define DSI_SET_PIXEL_FORMAT 0x3AU
ganlikun	0:13413ea9a877	368	#define DSI_SET_SCROLL_AREA 0x33U
ganlikun	0:13413ea9a877	369	#define DSI_SET_SCROLL_START 0x37U
ganlikun	0:13413ea9a877	370	#define DSI_SET_TEAR_OFF 0x34U
ganlikun	0:13413ea9a877	371	#define DSI_SET_TEAR_ON 0x35U
ganlikun	0:13413ea9a877	372	#define DSI_SET_TEAR_SCANLINE 0x44U
ganlikun	0:13413ea9a877	373	#define DSI_SET_VSYNC_TIMING 0x40U
ganlikun	0:13413ea9a877	374	#define DSI_SOFT_RESET 0x01U
ganlikun	0:13413ea9a877	375	#define DSI_WRITE_LUT 0x2DU
ganlikun	0:13413ea9a877	376	#define DSI_WRITE_MEMORY_CONTINUE 0x3CU
ganlikun	0:13413ea9a877	377	#define DSI_WRITE_MEMORY_START 0x2CU
ganlikun	0:13413ea9a877	378	/**
ganlikun	0:13413ea9a877	379	* @}
ganlikun	0:13413ea9a877	380	*/
ganlikun	0:13413ea9a877	381
ganlikun	0:13413ea9a877	382	/** @defgroup DSI_Video_Mode_Type DSI Video Mode Type
ganlikun	0:13413ea9a877	383	* @{
ganlikun	0:13413ea9a877	384	*/
ganlikun	0:13413ea9a877	385	#define DSI_VID_MODE_NB_PULSES 0U
ganlikun	0:13413ea9a877	386	#define DSI_VID_MODE_NB_EVENTS 1U
ganlikun	0:13413ea9a877	387	#define DSI_VID_MODE_BURST 2U
ganlikun	0:13413ea9a877	388	/**
ganlikun	0:13413ea9a877	389	* @}
ganlikun	0:13413ea9a877	390	*/
ganlikun	0:13413ea9a877	391
ganlikun	0:13413ea9a877	392	/** @defgroup DSI_Color_Mode DSI Color Mode
ganlikun	0:13413ea9a877	393	* @{
ganlikun	0:13413ea9a877	394	*/
ganlikun	0:13413ea9a877	395	#define DSI_COLOR_MODE_FULL 0x00000000U
ganlikun	0:13413ea9a877	396	#define DSI_COLOR_MODE_EIGHT DSI_WCR_COLM
ganlikun	0:13413ea9a877	397	/**
ganlikun	0:13413ea9a877	398	* @}
ganlikun	0:13413ea9a877	399	*/
ganlikun	0:13413ea9a877	400
ganlikun	0:13413ea9a877	401	/** @defgroup DSI_ShutDown DSI ShutDown
ganlikun	0:13413ea9a877	402	* @{
ganlikun	0:13413ea9a877	403	*/
ganlikun	0:13413ea9a877	404	#define DSI_DISPLAY_ON 0x00000000U
ganlikun	0:13413ea9a877	405	#define DSI_DISPLAY_OFF DSI_WCR_SHTDN
ganlikun	0:13413ea9a877	406	/**
ganlikun	0:13413ea9a877	407	* @}
ganlikun	0:13413ea9a877	408	*/
ganlikun	0:13413ea9a877	409
ganlikun	0:13413ea9a877	410	/** @defgroup DSI_LP_Command DSI LP Command
ganlikun	0:13413ea9a877	411	* @{
ganlikun	0:13413ea9a877	412	*/
ganlikun	0:13413ea9a877	413	#define DSI_LP_COMMAND_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	414	#define DSI_LP_COMMAND_ENABLE DSI_VMCR_LPCE
ganlikun	0:13413ea9a877	415	/**
ganlikun	0:13413ea9a877	416	* @}
ganlikun	0:13413ea9a877	417	*/
ganlikun	0:13413ea9a877	418
ganlikun	0:13413ea9a877	419	/** @defgroup DSI_LP_HFP DSI LP HFP
ganlikun	0:13413ea9a877	420	* @{
ganlikun	0:13413ea9a877	421	*/
ganlikun	0:13413ea9a877	422	#define DSI_LP_HFP_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	423	#define DSI_LP_HFP_ENABLE DSI_VMCR_LPHFPE
ganlikun	0:13413ea9a877	424	/**
ganlikun	0:13413ea9a877	425	* @}
ganlikun	0:13413ea9a877	426	*/
ganlikun	0:13413ea9a877	427
ganlikun	0:13413ea9a877	428	/** @defgroup DSI_LP_HBP DSI LP HBP
ganlikun	0:13413ea9a877	429	* @{
ganlikun	0:13413ea9a877	430	*/
ganlikun	0:13413ea9a877	431	#define DSI_LP_HBP_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	432	#define DSI_LP_HBP_ENABLE DSI_VMCR_LPHBPE
ganlikun	0:13413ea9a877	433	/**
ganlikun	0:13413ea9a877	434	* @}
ganlikun	0:13413ea9a877	435	*/
ganlikun	0:13413ea9a877	436
ganlikun	0:13413ea9a877	437	/** @defgroup DSI_LP_VACT DSI LP VACT
ganlikun	0:13413ea9a877	438	* @{
ganlikun	0:13413ea9a877	439	*/
ganlikun	0:13413ea9a877	440	#define DSI_LP_VACT_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	441	#define DSI_LP_VACT_ENABLE DSI_VMCR_LPVAE
ganlikun	0:13413ea9a877	442	/**
ganlikun	0:13413ea9a877	443	* @}
ganlikun	0:13413ea9a877	444	*/
ganlikun	0:13413ea9a877	445
ganlikun	0:13413ea9a877	446	/** @defgroup DSI_LP_VFP DSI LP VFP
ganlikun	0:13413ea9a877	447	* @{
ganlikun	0:13413ea9a877	448	*/
ganlikun	0:13413ea9a877	449	#define DSI_LP_VFP_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	450	#define DSI_LP_VFP_ENABLE DSI_VMCR_LPVFPE
ganlikun	0:13413ea9a877	451	/**
ganlikun	0:13413ea9a877	452	* @}
ganlikun	0:13413ea9a877	453	*/
ganlikun	0:13413ea9a877	454
ganlikun	0:13413ea9a877	455	/** @defgroup DSI_LP_VBP DSI LP VBP
ganlikun	0:13413ea9a877	456	* @{
ganlikun	0:13413ea9a877	457	*/
ganlikun	0:13413ea9a877	458	#define DSI_LP_VBP_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	459	#define DSI_LP_VBP_ENABLE DSI_VMCR_LPVBPE
ganlikun	0:13413ea9a877	460	/**
ganlikun	0:13413ea9a877	461	* @}
ganlikun	0:13413ea9a877	462	*/
ganlikun	0:13413ea9a877	463
ganlikun	0:13413ea9a877	464	/** @defgroup DSI_LP_VSYNC DSI LP VSYNC
ganlikun	0:13413ea9a877	465	* @{
ganlikun	0:13413ea9a877	466	*/
ganlikun	0:13413ea9a877	467	#define DSI_LP_VSYNC_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	468	#define DSI_LP_VSYNC_ENABLE DSI_VMCR_LPVSAE
ganlikun	0:13413ea9a877	469	/**
ganlikun	0:13413ea9a877	470	* @}
ganlikun	0:13413ea9a877	471	*/
ganlikun	0:13413ea9a877	472
ganlikun	0:13413ea9a877	473	/** @defgroup DSI_FBTA_acknowledge DSI FBTA Acknowledge
ganlikun	0:13413ea9a877	474	* @{
ganlikun	0:13413ea9a877	475	*/
ganlikun	0:13413ea9a877	476	#define DSI_FBTAA_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	477	#define DSI_FBTAA_ENABLE DSI_VMCR_FBTAAE
ganlikun	0:13413ea9a877	478	/**
ganlikun	0:13413ea9a877	479	* @}
ganlikun	0:13413ea9a877	480	*/
ganlikun	0:13413ea9a877	481
ganlikun	0:13413ea9a877	482	/** @defgroup DSI_TearingEffectSource DSI Tearing Effect Source
ganlikun	0:13413ea9a877	483	* @{
ganlikun	0:13413ea9a877	484	*/
ganlikun	0:13413ea9a877	485	#define DSI_TE_DSILINK 0x00000000U
ganlikun	0:13413ea9a877	486	#define DSI_TE_EXTERNAL DSI_WCFGR_TESRC
ganlikun	0:13413ea9a877	487	/**
ganlikun	0:13413ea9a877	488	* @}
ganlikun	0:13413ea9a877	489	*/
ganlikun	0:13413ea9a877	490
ganlikun	0:13413ea9a877	491	/** @defgroup DSI_TearingEffectPolarity DSI Tearing Effect Polarity
ganlikun	0:13413ea9a877	492	* @{
ganlikun	0:13413ea9a877	493	*/
ganlikun	0:13413ea9a877	494	#define DSI_TE_RISING_EDGE 0x00000000U
ganlikun	0:13413ea9a877	495	#define DSI_TE_FALLING_EDGE DSI_WCFGR_TEPOL
ganlikun	0:13413ea9a877	496	/**
ganlikun	0:13413ea9a877	497	* @}
ganlikun	0:13413ea9a877	498	*/
ganlikun	0:13413ea9a877	499
ganlikun	0:13413ea9a877	500	/** @defgroup DSI_Vsync_Polarity DSI Vsync Polarity
ganlikun	0:13413ea9a877	501	* @{
ganlikun	0:13413ea9a877	502	*/
ganlikun	0:13413ea9a877	503	#define DSI_VSYNC_FALLING 0x00000000U
ganlikun	0:13413ea9a877	504	#define DSI_VSYNC_RISING DSI_WCFGR_VSPOL
ganlikun	0:13413ea9a877	505	/**
ganlikun	0:13413ea9a877	506	* @}
ganlikun	0:13413ea9a877	507	*/
ganlikun	0:13413ea9a877	508
ganlikun	0:13413ea9a877	509	/** @defgroup DSI_AutomaticRefresh DSI Automatic Refresh
ganlikun	0:13413ea9a877	510	* @{
ganlikun	0:13413ea9a877	511	*/
ganlikun	0:13413ea9a877	512	#define DSI_AR_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	513	#define DSI_AR_ENABLE DSI_WCFGR_AR
ganlikun	0:13413ea9a877	514	/**
ganlikun	0:13413ea9a877	515	* @}
ganlikun	0:13413ea9a877	516	*/
ganlikun	0:13413ea9a877	517
ganlikun	0:13413ea9a877	518	/** @defgroup DSI_TE_AcknowledgeRequest DSI TE Acknowledge Request
ganlikun	0:13413ea9a877	519	* @{
ganlikun	0:13413ea9a877	520	*/
ganlikun	0:13413ea9a877	521	#define DSI_TE_ACKNOWLEDGE_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	522	#define DSI_TE_ACKNOWLEDGE_ENABLE DSI_CMCR_TEARE
ganlikun	0:13413ea9a877	523	/**
ganlikun	0:13413ea9a877	524	* @}
ganlikun	0:13413ea9a877	525	*/
ganlikun	0:13413ea9a877	526
ganlikun	0:13413ea9a877	527	/** @defgroup DSI_AcknowledgeRequest DSI Acknowledge Request
ganlikun	0:13413ea9a877	528	* @{
ganlikun	0:13413ea9a877	529	*/
ganlikun	0:13413ea9a877	530	#define DSI_ACKNOWLEDGE_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	531	#define DSI_ACKNOWLEDGE_ENABLE DSI_CMCR_ARE
ganlikun	0:13413ea9a877	532	/**
ganlikun	0:13413ea9a877	533	* @}
ganlikun	0:13413ea9a877	534	*/
ganlikun	0:13413ea9a877	535
ganlikun	0:13413ea9a877	536	/** @defgroup DSI_LP_LPGenShortWriteNoP DSI LP LPGen Short Write NoP
ganlikun	0:13413ea9a877	537	* @{
ganlikun	0:13413ea9a877	538	*/
ganlikun	0:13413ea9a877	539	#define DSI_LP_GSW0P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	540	#define DSI_LP_GSW0P_ENABLE DSI_CMCR_GSW0TX
ganlikun	0:13413ea9a877	541	/**
ganlikun	0:13413ea9a877	542	* @}
ganlikun	0:13413ea9a877	543	*/
ganlikun	0:13413ea9a877	544
ganlikun	0:13413ea9a877	545	/** @defgroup DSI_LP_LPGenShortWriteOneP DSI LP LPGen Short Write OneP
ganlikun	0:13413ea9a877	546	* @{
ganlikun	0:13413ea9a877	547	*/
ganlikun	0:13413ea9a877	548	#define DSI_LP_GSW1P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	549	#define DSI_LP_GSW1P_ENABLE DSI_CMCR_GSW1TX
ganlikun	0:13413ea9a877	550	/**
ganlikun	0:13413ea9a877	551	* @}
ganlikun	0:13413ea9a877	552	*/
ganlikun	0:13413ea9a877	553
ganlikun	0:13413ea9a877	554	/** @defgroup DSI_LP_LPGenShortWriteTwoP DSI LP LPGen Short Write TwoP
ganlikun	0:13413ea9a877	555	* @{
ganlikun	0:13413ea9a877	556	*/
ganlikun	0:13413ea9a877	557	#define DSI_LP_GSW2P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	558	#define DSI_LP_GSW2P_ENABLE DSI_CMCR_GSW2TX
ganlikun	0:13413ea9a877	559	/**
ganlikun	0:13413ea9a877	560	* @}
ganlikun	0:13413ea9a877	561	*/
ganlikun	0:13413ea9a877	562
ganlikun	0:13413ea9a877	563	/** @defgroup DSI_LP_LPGenShortReadNoP DSI LP LPGen Short Read NoP
ganlikun	0:13413ea9a877	564	* @{
ganlikun	0:13413ea9a877	565	*/
ganlikun	0:13413ea9a877	566	#define DSI_LP_GSR0P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	567	#define DSI_LP_GSR0P_ENABLE DSI_CMCR_GSR0TX
ganlikun	0:13413ea9a877	568	/**
ganlikun	0:13413ea9a877	569	* @}
ganlikun	0:13413ea9a877	570	*/
ganlikun	0:13413ea9a877	571
ganlikun	0:13413ea9a877	572	/** @defgroup DSI_LP_LPGenShortReadOneP DSI LP LPGen Short Read OneP
ganlikun	0:13413ea9a877	573	* @{
ganlikun	0:13413ea9a877	574	*/
ganlikun	0:13413ea9a877	575	#define DSI_LP_GSR1P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	576	#define DSI_LP_GSR1P_ENABLE DSI_CMCR_GSR1TX
ganlikun	0:13413ea9a877	577	/**
ganlikun	0:13413ea9a877	578	* @}
ganlikun	0:13413ea9a877	579	*/
ganlikun	0:13413ea9a877	580
ganlikun	0:13413ea9a877	581	/** @defgroup DSI_LP_LPGenShortReadTwoP DSI LP LPGen Short Read TwoP
ganlikun	0:13413ea9a877	582	* @{
ganlikun	0:13413ea9a877	583	*/
ganlikun	0:13413ea9a877	584	#define DSI_LP_GSR2P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	585	#define DSI_LP_GSR2P_ENABLE DSI_CMCR_GSR2TX
ganlikun	0:13413ea9a877	586	/**
ganlikun	0:13413ea9a877	587	* @}
ganlikun	0:13413ea9a877	588	*/
ganlikun	0:13413ea9a877	589
ganlikun	0:13413ea9a877	590	/** @defgroup DSI_LP_LPGenLongWrite DSI LP LPGen LongWrite
ganlikun	0:13413ea9a877	591	* @{
ganlikun	0:13413ea9a877	592	*/
ganlikun	0:13413ea9a877	593	#define DSI_LP_GLW_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	594	#define DSI_LP_GLW_ENABLE DSI_CMCR_GLWTX
ganlikun	0:13413ea9a877	595	/**
ganlikun	0:13413ea9a877	596	* @}
ganlikun	0:13413ea9a877	597	*/
ganlikun	0:13413ea9a877	598
ganlikun	0:13413ea9a877	599	/** @defgroup DSI_LP_LPDcsShortWriteNoP DSI LP LPDcs Short Write NoP
ganlikun	0:13413ea9a877	600	* @{
ganlikun	0:13413ea9a877	601	*/
ganlikun	0:13413ea9a877	602	#define DSI_LP_DSW0P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	603	#define DSI_LP_DSW0P_ENABLE DSI_CMCR_DSW0TX
ganlikun	0:13413ea9a877	604	/**
ganlikun	0:13413ea9a877	605	* @}
ganlikun	0:13413ea9a877	606	*/
ganlikun	0:13413ea9a877	607
ganlikun	0:13413ea9a877	608	/** @defgroup DSI_LP_LPDcsShortWriteOneP DSI LP LPDcs Short Write OneP
ganlikun	0:13413ea9a877	609	* @{
ganlikun	0:13413ea9a877	610	*/
ganlikun	0:13413ea9a877	611	#define DSI_LP_DSW1P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	612	#define DSI_LP_DSW1P_ENABLE DSI_CMCR_DSW1TX
ganlikun	0:13413ea9a877	613	/**
ganlikun	0:13413ea9a877	614	* @}
ganlikun	0:13413ea9a877	615	*/
ganlikun	0:13413ea9a877	616
ganlikun	0:13413ea9a877	617	/** @defgroup DSI_LP_LPDcsShortReadNoP DSI LP LPDcs Short Read NoP
ganlikun	0:13413ea9a877	618	* @{
ganlikun	0:13413ea9a877	619	*/
ganlikun	0:13413ea9a877	620	#define DSI_LP_DSR0P_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	621	#define DSI_LP_DSR0P_ENABLE DSI_CMCR_DSR0TX
ganlikun	0:13413ea9a877	622	/**
ganlikun	0:13413ea9a877	623	* @}
ganlikun	0:13413ea9a877	624	*/
ganlikun	0:13413ea9a877	625
ganlikun	0:13413ea9a877	626	/** @defgroup DSI_LP_LPDcsLongWrite DSI LP LPDcs Long Write
ganlikun	0:13413ea9a877	627	* @{
ganlikun	0:13413ea9a877	628	*/
ganlikun	0:13413ea9a877	629	#define DSI_LP_DLW_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	630	#define DSI_LP_DLW_ENABLE DSI_CMCR_DLWTX
ganlikun	0:13413ea9a877	631	/**
ganlikun	0:13413ea9a877	632	* @}
ganlikun	0:13413ea9a877	633	*/
ganlikun	0:13413ea9a877	634
ganlikun	0:13413ea9a877	635	/** @defgroup DSI_LP_LPMaxReadPacket DSI LP LPMax Read Packet
ganlikun	0:13413ea9a877	636	* @{
ganlikun	0:13413ea9a877	637	*/
ganlikun	0:13413ea9a877	638	#define DSI_LP_MRDP_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	639	#define DSI_LP_MRDP_ENABLE DSI_CMCR_MRDPS
ganlikun	0:13413ea9a877	640	/**
ganlikun	0:13413ea9a877	641	* @}
ganlikun	0:13413ea9a877	642	*/
ganlikun	0:13413ea9a877	643
ganlikun	0:13413ea9a877	644	/** @defgroup DSI_HS_PrespMode DSI HS Presp Mode
ganlikun	0:13413ea9a877	645	* @{
ganlikun	0:13413ea9a877	646	*/
ganlikun	0:13413ea9a877	647	#define DSI_HS_PM_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	648	#define DSI_HS_PM_ENABLE DSI_TCCR3_PM
ganlikun	0:13413ea9a877	649	/**
ganlikun	0:13413ea9a877	650	* @}
ganlikun	0:13413ea9a877	651	*/
ganlikun	0:13413ea9a877	652
ganlikun	0:13413ea9a877	653
ganlikun	0:13413ea9a877	654	/** @defgroup DSI_Automatic_Clk_Lane_Control DSI Automatic Clk Lane Control
ganlikun	0:13413ea9a877	655	* @{
ganlikun	0:13413ea9a877	656	*/
ganlikun	0:13413ea9a877	657	#define DSI_AUTO_CLK_LANE_CTRL_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	658	#define DSI_AUTO_CLK_LANE_CTRL_ENABLE DSI_CLCR_ACR
ganlikun	0:13413ea9a877	659	/**
ganlikun	0:13413ea9a877	660	* @}
ganlikun	0:13413ea9a877	661	*/
ganlikun	0:13413ea9a877	662
ganlikun	0:13413ea9a877	663	/** @defgroup DSI_Number_Of_Lanes DSI Number Of Lanes
ganlikun	0:13413ea9a877	664	* @{
ganlikun	0:13413ea9a877	665	*/
ganlikun	0:13413ea9a877	666	#define DSI_ONE_DATA_LANE 0U
ganlikun	0:13413ea9a877	667	#define DSI_TWO_DATA_LANES 1U
ganlikun	0:13413ea9a877	668	/**
ganlikun	0:13413ea9a877	669	* @}
ganlikun	0:13413ea9a877	670	*/
ganlikun	0:13413ea9a877	671
ganlikun	0:13413ea9a877	672	/** @defgroup DSI_FlowControl DSI Flow Control
ganlikun	0:13413ea9a877	673	* @{
ganlikun	0:13413ea9a877	674	*/
ganlikun	0:13413ea9a877	675	#define DSI_FLOW_CONTROL_CRC_RX DSI_PCR_CRCRXE
ganlikun	0:13413ea9a877	676	#define DSI_FLOW_CONTROL_ECC_RX DSI_PCR_ECCRXE
ganlikun	0:13413ea9a877	677	#define DSI_FLOW_CONTROL_BTA DSI_PCR_BTAE
ganlikun	0:13413ea9a877	678	#define DSI_FLOW_CONTROL_EOTP_RX DSI_PCR_ETRXE
ganlikun	0:13413ea9a877	679	#define DSI_FLOW_CONTROL_EOTP_TX DSI_PCR_ETTXE
ganlikun	0:13413ea9a877	680	#define DSI_FLOW_CONTROL_ALL (DSI_FLOW_CONTROL_CRC_RX \| DSI_FLOW_CONTROL_ECC_RX \| \
ganlikun	0:13413ea9a877	681	DSI_FLOW_CONTROL_BTA \| DSI_FLOW_CONTROL_EOTP_RX \| \
ganlikun	0:13413ea9a877	682	DSI_FLOW_CONTROL_EOTP_TX)
ganlikun	0:13413ea9a877	683	/**
ganlikun	0:13413ea9a877	684	* @}
ganlikun	0:13413ea9a877	685	*/
ganlikun	0:13413ea9a877	686
ganlikun	0:13413ea9a877	687	/** @defgroup DSI_Color_Coding DSI Color Coding
ganlikun	0:13413ea9a877	688	* @{
ganlikun	0:13413ea9a877	689	*/
ganlikun	0:13413ea9a877	690	#define DSI_RGB565 0x00000000U /!< The values 0x00000001 and 0x00000002 can also be used for the RGB565 color mode configuration /
ganlikun	0:13413ea9a877	691	#define DSI_RGB666 0x00000003U /!< The value 0x00000004 can also be used for the RGB666 color mode configuration /
ganlikun	0:13413ea9a877	692	#define DSI_RGB888 0x00000005U
ganlikun	0:13413ea9a877	693	/**
ganlikun	0:13413ea9a877	694	* @}
ganlikun	0:13413ea9a877	695	*/
ganlikun	0:13413ea9a877	696
ganlikun	0:13413ea9a877	697	/** @defgroup DSI_LooselyPacked DSI Loosely Packed
ganlikun	0:13413ea9a877	698	* @{
ganlikun	0:13413ea9a877	699	*/
ganlikun	0:13413ea9a877	700	#define DSI_LOOSELY_PACKED_ENABLE DSI_LCOLCR_LPE
ganlikun	0:13413ea9a877	701	#define DSI_LOOSELY_PACKED_DISABLE 0x00000000U
ganlikun	0:13413ea9a877	702	/**
ganlikun	0:13413ea9a877	703	* @}
ganlikun	0:13413ea9a877	704	*/
ganlikun	0:13413ea9a877	705
ganlikun	0:13413ea9a877	706	/** @defgroup DSI_HSYNC_Polarity DSI HSYNC Polarity
ganlikun	0:13413ea9a877	707	* @{
ganlikun	0:13413ea9a877	708	*/
ganlikun	0:13413ea9a877	709	#define DSI_HSYNC_ACTIVE_HIGH 0x00000000U
ganlikun	0:13413ea9a877	710	#define DSI_HSYNC_ACTIVE_LOW DSI_LPCR_HSP
ganlikun	0:13413ea9a877	711	/**
ganlikun	0:13413ea9a877	712	* @}
ganlikun	0:13413ea9a877	713	*/
ganlikun	0:13413ea9a877	714
ganlikun	0:13413ea9a877	715	/** @defgroup DSI_VSYNC_Active_Polarity DSI VSYNC Active Polarity
ganlikun	0:13413ea9a877	716	* @{
ganlikun	0:13413ea9a877	717	*/
ganlikun	0:13413ea9a877	718	#define DSI_VSYNC_ACTIVE_HIGH 0x00000000U
ganlikun	0:13413ea9a877	719	#define DSI_VSYNC_ACTIVE_LOW DSI_LPCR_VSP
ganlikun	0:13413ea9a877	720	/**
ganlikun	0:13413ea9a877	721	* @}
ganlikun	0:13413ea9a877	722	*/
ganlikun	0:13413ea9a877	723
ganlikun	0:13413ea9a877	724	/** @defgroup DSI_DATA_ENABLE_Polarity DSI DATA ENABLE Polarity
ganlikun	0:13413ea9a877	725	* @{
ganlikun	0:13413ea9a877	726	*/
ganlikun	0:13413ea9a877	727	#define DSI_DATA_ENABLE_ACTIVE_HIGH 0x00000000U
ganlikun	0:13413ea9a877	728	#define DSI_DATA_ENABLE_ACTIVE_LOW DSI_LPCR_DEP
ganlikun	0:13413ea9a877	729	/**
ganlikun	0:13413ea9a877	730	* @}
ganlikun	0:13413ea9a877	731	*/
ganlikun	0:13413ea9a877	732
ganlikun	0:13413ea9a877	733	/** @defgroup DSI_PLL_IDF DSI PLL IDF
ganlikun	0:13413ea9a877	734	* @{
ganlikun	0:13413ea9a877	735	*/
ganlikun	0:13413ea9a877	736	#define DSI_PLL_IN_DIV1 0x00000001U
ganlikun	0:13413ea9a877	737	#define DSI_PLL_IN_DIV2 0x00000002U
ganlikun	0:13413ea9a877	738	#define DSI_PLL_IN_DIV3 0x00000003U
ganlikun	0:13413ea9a877	739	#define DSI_PLL_IN_DIV4 0x00000004U
ganlikun	0:13413ea9a877	740	#define DSI_PLL_IN_DIV5 0x00000005U
ganlikun	0:13413ea9a877	741	#define DSI_PLL_IN_DIV6 0x00000006U
ganlikun	0:13413ea9a877	742	#define DSI_PLL_IN_DIV7 0x00000007U
ganlikun	0:13413ea9a877	743	/**
ganlikun	0:13413ea9a877	744	* @}
ganlikun	0:13413ea9a877	745	*/
ganlikun	0:13413ea9a877	746
ganlikun	0:13413ea9a877	747	/** @defgroup DSI_PLL_ODF DSI PLL ODF
ganlikun	0:13413ea9a877	748	* @{
ganlikun	0:13413ea9a877	749	*/
ganlikun	0:13413ea9a877	750	#define DSI_PLL_OUT_DIV1 0x00000000U
ganlikun	0:13413ea9a877	751	#define DSI_PLL_OUT_DIV2 0x00000001U
ganlikun	0:13413ea9a877	752	#define DSI_PLL_OUT_DIV4 0x00000002U
ganlikun	0:13413ea9a877	753	#define DSI_PLL_OUT_DIV8 0x00000003U
ganlikun	0:13413ea9a877	754	/**
ganlikun	0:13413ea9a877	755	* @}
ganlikun	0:13413ea9a877	756	*/
ganlikun	0:13413ea9a877	757
ganlikun	0:13413ea9a877	758	/** @defgroup DSI_Flags DSI Flags
ganlikun	0:13413ea9a877	759	* @{
ganlikun	0:13413ea9a877	760	*/
ganlikun	0:13413ea9a877	761	#define DSI_FLAG_TE DSI_WISR_TEIF
ganlikun	0:13413ea9a877	762	#define DSI_FLAG_ER DSI_WISR_ERIF
ganlikun	0:13413ea9a877	763	#define DSI_FLAG_BUSY DSI_WISR_BUSY
ganlikun	0:13413ea9a877	764	#define DSI_FLAG_PLLLS DSI_WISR_PLLLS
ganlikun	0:13413ea9a877	765	#define DSI_FLAG_PLLL DSI_WISR_PLLLIF
ganlikun	0:13413ea9a877	766	#define DSI_FLAG_PLLU DSI_WISR_PLLUIF
ganlikun	0:13413ea9a877	767	#define DSI_FLAG_RRS DSI_WISR_RRS
ganlikun	0:13413ea9a877	768	#define DSI_FLAG_RR DSI_WISR_RRIF
ganlikun	0:13413ea9a877	769	/**
ganlikun	0:13413ea9a877	770	* @}
ganlikun	0:13413ea9a877	771	*/
ganlikun	0:13413ea9a877	772
ganlikun	0:13413ea9a877	773	/** @defgroup DSI_Interrupts DSI Interrupts
ganlikun	0:13413ea9a877	774	* @{
ganlikun	0:13413ea9a877	775	*/
ganlikun	0:13413ea9a877	776	#define DSI_IT_TE DSI_WIER_TEIE
ganlikun	0:13413ea9a877	777	#define DSI_IT_ER DSI_WIER_ERIE
ganlikun	0:13413ea9a877	778	#define DSI_IT_PLLL DSI_WIER_PLLLIE
ganlikun	0:13413ea9a877	779	#define DSI_IT_PLLU DSI_WIER_PLLUIE
ganlikun	0:13413ea9a877	780	#define DSI_IT_RR DSI_WIER_RRIE
ganlikun	0:13413ea9a877	781	/**
ganlikun	0:13413ea9a877	782	* @}
ganlikun	0:13413ea9a877	783	*/
ganlikun	0:13413ea9a877	784
ganlikun	0:13413ea9a877	785	/** @defgroup DSI_SHORT_WRITE_PKT_Data_Type DSI SHORT WRITE PKT Data Type
ganlikun	0:13413ea9a877	786	* @{
ganlikun	0:13413ea9a877	787	*/
ganlikun	0:13413ea9a877	788	#define DSI_DCS_SHORT_PKT_WRITE_P0 0x00000005U /!< DCS short write, no parameters /
ganlikun	0:13413ea9a877	789	#define DSI_DCS_SHORT_PKT_WRITE_P1 0x00000015U /!< DCS short write, one parameter /
ganlikun	0:13413ea9a877	790	#define DSI_GEN_SHORT_PKT_WRITE_P0 0x00000003U /!< Generic short write, no parameters /
ganlikun	0:13413ea9a877	791	#define DSI_GEN_SHORT_PKT_WRITE_P1 0x00000013U /!< Generic short write, one parameter /
ganlikun	0:13413ea9a877	792	#define DSI_GEN_SHORT_PKT_WRITE_P2 0x00000023U /!< Generic short write, two parameters /
ganlikun	0:13413ea9a877	793	/**
ganlikun	0:13413ea9a877	794	* @}
ganlikun	0:13413ea9a877	795	*/
ganlikun	0:13413ea9a877	796
ganlikun	0:13413ea9a877	797	/** @defgroup DSI_LONG_WRITE_PKT_Data_Type DSI LONG WRITE PKT Data Type
ganlikun	0:13413ea9a877	798	* @{
ganlikun	0:13413ea9a877	799	*/
ganlikun	0:13413ea9a877	800	#define DSI_DCS_LONG_PKT_WRITE 0x00000039U /!< DCS long write /
ganlikun	0:13413ea9a877	801	#define DSI_GEN_LONG_PKT_WRITE 0x00000029U /!< Generic long write /
ganlikun	0:13413ea9a877	802	/**
ganlikun	0:13413ea9a877	803	* @}
ganlikun	0:13413ea9a877	804	*/
ganlikun	0:13413ea9a877	805
ganlikun	0:13413ea9a877	806	/** @defgroup DSI_SHORT_READ_PKT_Data_Type DSI SHORT READ PKT Data Type
ganlikun	0:13413ea9a877	807	* @{
ganlikun	0:13413ea9a877	808	*/
ganlikun	0:13413ea9a877	809	#define DSI_DCS_SHORT_PKT_READ 0x00000006U /!< DCS short read /
ganlikun	0:13413ea9a877	810	#define DSI_GEN_SHORT_PKT_READ_P0 0x00000004U /!< Generic short read, no parameters /
ganlikun	0:13413ea9a877	811	#define DSI_GEN_SHORT_PKT_READ_P1 0x00000014U /!< Generic short read, one parameter /
ganlikun	0:13413ea9a877	812	#define DSI_GEN_SHORT_PKT_READ_P2 0x00000024U /!< Generic short read, two parameters /
ganlikun	0:13413ea9a877	813	/**
ganlikun	0:13413ea9a877	814	* @}
ganlikun	0:13413ea9a877	815	*/
ganlikun	0:13413ea9a877	816
ganlikun	0:13413ea9a877	817	/** @defgroup DSI_Error_Data_Type DSI Error Data Type
ganlikun	0:13413ea9a877	818	* @{
ganlikun	0:13413ea9a877	819	*/
ganlikun	0:13413ea9a877	820	#define HAL_DSI_ERROR_NONE 0U
ganlikun	0:13413ea9a877	821	#define HAL_DSI_ERROR_ACK 0x00000001U /!< acknowledge errors /
ganlikun	0:13413ea9a877	822	#define HAL_DSI_ERROR_PHY 0x00000002U /!< PHY related errors /
ganlikun	0:13413ea9a877	823	#define HAL_DSI_ERROR_TX 0x00000004U /!< transmission error /
ganlikun	0:13413ea9a877	824	#define HAL_DSI_ERROR_RX 0x00000008U /!< reception error /
ganlikun	0:13413ea9a877	825	#define HAL_DSI_ERROR_ECC 0x00000010U /!< ECC errors /
ganlikun	0:13413ea9a877	826	#define HAL_DSI_ERROR_CRC 0x00000020U /!< CRC error /
ganlikun	0:13413ea9a877	827	#define HAL_DSI_ERROR_PSE 0x00000040U /!< Packet Size error /
ganlikun	0:13413ea9a877	828	#define HAL_DSI_ERROR_EOT 0x00000080U /!< End Of Transmission error /
ganlikun	0:13413ea9a877	829	#define HAL_DSI_ERROR_OVF 0x00000100U /!< FIFO overflow error /
ganlikun	0:13413ea9a877	830	#define HAL_DSI_ERROR_GEN 0x00000200U /!< Generic FIFO related errors /
ganlikun	0:13413ea9a877	831	/**
ganlikun	0:13413ea9a877	832	* @}
ganlikun	0:13413ea9a877	833	*/
ganlikun	0:13413ea9a877	834
ganlikun	0:13413ea9a877	835	/** @defgroup DSI_Lane_Group DSI Lane Group
ganlikun	0:13413ea9a877	836	* @{
ganlikun	0:13413ea9a877	837	*/
ganlikun	0:13413ea9a877	838	#define DSI_CLOCK_LANE 0x00000000U
ganlikun	0:13413ea9a877	839	#define DSI_DATA_LANES 0x00000001U
ganlikun	0:13413ea9a877	840	/**
ganlikun	0:13413ea9a877	841	* @}
ganlikun	0:13413ea9a877	842	*/
ganlikun	0:13413ea9a877	843
ganlikun	0:13413ea9a877	844	/** @defgroup DSI_Communication_Delay DSI Communication Delay
ganlikun	0:13413ea9a877	845	* @{
ganlikun	0:13413ea9a877	846	*/
ganlikun	0:13413ea9a877	847	#define DSI_SLEW_RATE_HSTX 0x00000000U
ganlikun	0:13413ea9a877	848	#define DSI_SLEW_RATE_LPTX 0x00000001U
ganlikun	0:13413ea9a877	849	#define DSI_HS_DELAY 0x00000002U
ganlikun	0:13413ea9a877	850	/**
ganlikun	0:13413ea9a877	851	* @}
ganlikun	0:13413ea9a877	852	*/
ganlikun	0:13413ea9a877	853
ganlikun	0:13413ea9a877	854	/** @defgroup DSI_CustomLane DSI CustomLane
ganlikun	0:13413ea9a877	855	* @{
ganlikun	0:13413ea9a877	856	*/
ganlikun	0:13413ea9a877	857	#define DSI_SWAP_LANE_PINS 0x00000000U
ganlikun	0:13413ea9a877	858	#define DSI_INVERT_HS_SIGNAL 0x00000001U
ganlikun	0:13413ea9a877	859	/**
ganlikun	0:13413ea9a877	860	* @}
ganlikun	0:13413ea9a877	861	*/
ganlikun	0:13413ea9a877	862
ganlikun	0:13413ea9a877	863	/** @defgroup DSI_Lane_Select DSI Lane Select
ganlikun	0:13413ea9a877	864	* @{
ganlikun	0:13413ea9a877	865	*/
ganlikun	0:13413ea9a877	866	#define DSI_CLOCK_LANE 0x00000000U
ganlikun	0:13413ea9a877	867	#define DSI_DATA_LANE0 0x00000001U
ganlikun	0:13413ea9a877	868	#define DSI_DATA_LANE1 0x00000002U
ganlikun	0:13413ea9a877	869	/**
ganlikun	0:13413ea9a877	870	* @}
ganlikun	0:13413ea9a877	871	*/
ganlikun	0:13413ea9a877	872
ganlikun	0:13413ea9a877	873	/** @defgroup DSI_PHY_Timing DSI PHY Timing
ganlikun	0:13413ea9a877	874	* @{
ganlikun	0:13413ea9a877	875	*/
ganlikun	0:13413ea9a877	876	#define DSI_TCLK_POST 0x00000000U
ganlikun	0:13413ea9a877	877	#define DSI_TLPX_CLK 0x00000001U
ganlikun	0:13413ea9a877	878	#define DSI_THS_EXIT 0x00000002U
ganlikun	0:13413ea9a877	879	#define DSI_TLPX_DATA 0x00000003U
ganlikun	0:13413ea9a877	880	#define DSI_THS_ZERO 0x00000004U
ganlikun	0:13413ea9a877	881	#define DSI_THS_TRAIL 0x00000005U
ganlikun	0:13413ea9a877	882	#define DSI_THS_PREPARE 0x00000006U
ganlikun	0:13413ea9a877	883	#define DSI_TCLK_ZERO 0x00000007U
ganlikun	0:13413ea9a877	884	#define DSI_TCLK_PREPARE 0x00000008U
ganlikun	0:13413ea9a877	885	/**
ganlikun	0:13413ea9a877	886	* @}
ganlikun	0:13413ea9a877	887	*/
ganlikun	0:13413ea9a877	888
ganlikun	0:13413ea9a877	889	/* Exported macros -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	890	/**
ganlikun	0:13413ea9a877	891	* @brief Enables the DSI host.
ganlikun	0:13413ea9a877	892	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	893	* @retval None.
ganlikun	0:13413ea9a877	894	*/
ganlikun	0:13413ea9a877	895	#define __HAL_DSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= DSI_CR_EN)
ganlikun	0:13413ea9a877	896
ganlikun	0:13413ea9a877	897	/**
ganlikun	0:13413ea9a877	898	* @brief Disables the DSI host.
ganlikun	0:13413ea9a877	899	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	900	* @retval None.
ganlikun	0:13413ea9a877	901	*/
ganlikun	0:13413ea9a877	902	#define __HAL_DSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DSI_CR_EN)
ganlikun	0:13413ea9a877	903
ganlikun	0:13413ea9a877	904	/**
ganlikun	0:13413ea9a877	905	* @brief Enables the DSI wrapper.
ganlikun	0:13413ea9a877	906	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	907	* @retval None.
ganlikun	0:13413ea9a877	908	*/
ganlikun	0:13413ea9a877	909	#define __HAL_DSI_WRAPPER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WCR \|= DSI_WCR_DSIEN)
ganlikun	0:13413ea9a877	910
ganlikun	0:13413ea9a877	911	/**
ganlikun	0:13413ea9a877	912	* @brief Disable the DSI wrapper.
ganlikun	0:13413ea9a877	913	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	914	* @retval None.
ganlikun	0:13413ea9a877	915	*/
ganlikun	0:13413ea9a877	916	#define __HAL_DSI_WRAPPER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WCR &= ~DSI_WCR_DSIEN)
ganlikun	0:13413ea9a877	917
ganlikun	0:13413ea9a877	918	/**
ganlikun	0:13413ea9a877	919	* @brief Enables the DSI PLL.
ganlikun	0:13413ea9a877	920	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	921	* @retval None.
ganlikun	0:13413ea9a877	922	*/
ganlikun	0:13413ea9a877	923	#define __HAL_DSI_PLL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR \|= DSI_WRPCR_PLLEN)
ganlikun	0:13413ea9a877	924
ganlikun	0:13413ea9a877	925	/**
ganlikun	0:13413ea9a877	926	* @brief Disables the DSI PLL.
ganlikun	0:13413ea9a877	927	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	928	* @retval None.
ganlikun	0:13413ea9a877	929	*/
ganlikun	0:13413ea9a877	930	#define __HAL_DSI_PLL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR &= ~DSI_WRPCR_PLLEN)
ganlikun	0:13413ea9a877	931
ganlikun	0:13413ea9a877	932	/**
ganlikun	0:13413ea9a877	933	* @brief Enables the DSI regulator.
ganlikun	0:13413ea9a877	934	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	935	* @retval None.
ganlikun	0:13413ea9a877	936	*/
ganlikun	0:13413ea9a877	937	#define __HAL_DSI_REG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR \|= DSI_WRPCR_REGEN)
ganlikun	0:13413ea9a877	938
ganlikun	0:13413ea9a877	939	/**
ganlikun	0:13413ea9a877	940	* @brief Disables the DSI regulator.
ganlikun	0:13413ea9a877	941	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	942	* @retval None.
ganlikun	0:13413ea9a877	943	*/
ganlikun	0:13413ea9a877	944	#define __HAL_DSI_REG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->WRPCR &= ~DSI_WRPCR_REGEN)
ganlikun	0:13413ea9a877	945
ganlikun	0:13413ea9a877	946	/**
ganlikun	0:13413ea9a877	947	* @brief Get the DSI pending flags.
ganlikun	0:13413ea9a877	948	* @param __HANDLE__: DSI handle.
ganlikun	0:13413ea9a877	949	* @param __FLAG__: Get the specified flag.
ganlikun	0:13413ea9a877	950	* This parameter can be any combination of the following values:
ganlikun	0:13413ea9a877	951	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
ganlikun	0:13413ea9a877	952	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
ganlikun	0:13413ea9a877	953	* @arg DSI_FLAG_BUSY : Busy Flag
ganlikun	0:13413ea9a877	954	* @arg DSI_FLAG_PLLLS: PLL Lock Status
ganlikun	0:13413ea9a877	955	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
ganlikun	0:13413ea9a877	956	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
ganlikun	0:13413ea9a877	957	* @arg DSI_FLAG_RRS : Regulator Ready Flag
ganlikun	0:13413ea9a877	958	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
ganlikun	0:13413ea9a877	959	* @retval The state of FLAG (SET or RESET).
ganlikun	0:13413ea9a877	960	*/
ganlikun	0:13413ea9a877	961	#define __HAL_DSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WISR & (__FLAG__))
ganlikun	0:13413ea9a877	962
ganlikun	0:13413ea9a877	963	/**
ganlikun	0:13413ea9a877	964	* @brief Clears the DSI pending flags.
ganlikun	0:13413ea9a877	965	* @param __HANDLE__: DSI handle.
ganlikun	0:13413ea9a877	966	* @param __FLAG__: specifies the flag to clear.
ganlikun	0:13413ea9a877	967	* This parameter can be any combination of the following values:
ganlikun	0:13413ea9a877	968	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
ganlikun	0:13413ea9a877	969	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
ganlikun	0:13413ea9a877	970	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
ganlikun	0:13413ea9a877	971	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
ganlikun	0:13413ea9a877	972	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
ganlikun	0:13413ea9a877	973	* @retval None
ganlikun	0:13413ea9a877	974	*/
ganlikun	0:13413ea9a877	975	#define __HAL_DSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WIFCR = (__FLAG__))
ganlikun	0:13413ea9a877	976
ganlikun	0:13413ea9a877	977	/**
ganlikun	0:13413ea9a877	978	* @brief Enables the specified DSI interrupts.
ganlikun	0:13413ea9a877	979	* @param __HANDLE__: DSI handle.
ganlikun	0:13413ea9a877	980	* @param __INTERRUPT__: specifies the DSI interrupt sources to be enabled.
ganlikun	0:13413ea9a877	981	* This parameter can be any combination of the following values:
ganlikun	0:13413ea9a877	982	* @arg DSI_IT_TE : Tearing Effect Interrupt
ganlikun	0:13413ea9a877	983	* @arg DSI_IT_ER : End of Refresh Interrupt
ganlikun	0:13413ea9a877	984	* @arg DSI_IT_PLLL: PLL Lock Interrupt
ganlikun	0:13413ea9a877	985	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
ganlikun	0:13413ea9a877	986	* @arg DSI_IT_RR : Regulator Ready Interrupt
ganlikun	0:13413ea9a877	987	* @retval None
ganlikun	0:13413ea9a877	988	*/
ganlikun	0:13413ea9a877	989	#define __HAL_DSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER \|= (__INTERRUPT__))
ganlikun	0:13413ea9a877	990
ganlikun	0:13413ea9a877	991	/**
ganlikun	0:13413ea9a877	992	* @brief Disables the specified DSI interrupts.
ganlikun	0:13413ea9a877	993	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	994	* @param __INTERRUPT__: specifies the DSI interrupt sources to be disabled.
ganlikun	0:13413ea9a877	995	* This parameter can be any combination of the following values:
ganlikun	0:13413ea9a877	996	* @arg DSI_IT_TE : Tearing Effect Interrupt
ganlikun	0:13413ea9a877	997	* @arg DSI_IT_ER : End of Refresh Interrupt
ganlikun	0:13413ea9a877	998	* @arg DSI_IT_PLLL: PLL Lock Interrupt
ganlikun	0:13413ea9a877	999	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
ganlikun	0:13413ea9a877	1000	* @arg DSI_IT_RR : Regulator Ready Interrupt
ganlikun	0:13413ea9a877	1001	* @retval None
ganlikun	0:13413ea9a877	1002	*/
ganlikun	0:13413ea9a877	1003	#define __HAL_DSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER &= ~(__INTERRUPT__))
ganlikun	0:13413ea9a877	1004
ganlikun	0:13413ea9a877	1005	/**
ganlikun	0:13413ea9a877	1006	* @brief Checks whether the specified DSI interrupt has occurred or not.
ganlikun	0:13413ea9a877	1007	* @param __HANDLE__: DSI handle
ganlikun	0:13413ea9a877	1008	* @param __INTERRUPT__: specifies the DSI interrupt source to check.
ganlikun	0:13413ea9a877	1009	* This parameter can be one of the following values:
ganlikun	0:13413ea9a877	1010	* @arg DSI_IT_TE : Tearing Effect Interrupt
ganlikun	0:13413ea9a877	1011	* @arg DSI_IT_ER : End of Refresh Interrupt
ganlikun	0:13413ea9a877	1012	* @arg DSI_IT_PLLL: PLL Lock Interrupt
ganlikun	0:13413ea9a877	1013	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
ganlikun	0:13413ea9a877	1014	* @arg DSI_IT_RR : Regulator Ready Interrupt
ganlikun	0:13413ea9a877	1015	* @retval The state of INTERRUPT (SET or RESET).
ganlikun	0:13413ea9a877	1016	*/
ganlikun	0:13413ea9a877	1017	#define __HAL_DSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER & (__INTERRUPT__))
ganlikun	0:13413ea9a877	1018
ganlikun	0:13413ea9a877	1019	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	1020	/** @defgroup DSI_Exported_Functions DSI Exported Functions
ganlikun	0:13413ea9a877	1021	* @{
ganlikun	0:13413ea9a877	1022	*/
ganlikun	0:13413ea9a877	1023	HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef hdsi, DSI_PLLInitTypeDef PLLInit);
ganlikun	0:13413ea9a877	1024	HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1025	void HAL_DSI_MspInit(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1026	void HAL_DSI_MspDeInit(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1027
ganlikun	0:13413ea9a877	1028	void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1029	void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1030	void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1031	void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1032
ganlikun	0:13413ea9a877	1033	HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID);
ganlikun	0:13413ea9a877	1034	HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef hdsi, DSI_VidCfgTypeDef VidCfg);
ganlikun	0:13413ea9a877	1035	HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef hdsi, DSI_CmdCfgTypeDef CmdCfg);
ganlikun	0:13413ea9a877	1036	HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef hdsi, DSI_LPCmdTypeDef LPCmd);
ganlikun	0:13413ea9a877	1037	HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl);
ganlikun	0:13413ea9a877	1038	HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef hdsi, DSI_PHY_TimerTypeDef PhyTimers);
ganlikun	0:13413ea9a877	1039	HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef hdsi, DSI_HOST_TimeoutTypeDef HostTimeouts);
ganlikun	0:13413ea9a877	1040	HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1041	HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1042	HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1043	HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode);
ganlikun	0:13413ea9a877	1044	HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown);
ganlikun	0:13413ea9a877	1045	HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
ganlikun	0:13413ea9a877	1046	uint32_t ChannelID,
ganlikun	0:13413ea9a877	1047	uint32_t Mode,
ganlikun	0:13413ea9a877	1048	uint32_t Param1,
ganlikun	0:13413ea9a877	1049	uint32_t Param2);
ganlikun	0:13413ea9a877	1050	HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
ganlikun	0:13413ea9a877	1051	uint32_t ChannelID,
ganlikun	0:13413ea9a877	1052	uint32_t Mode,
ganlikun	0:13413ea9a877	1053	uint32_t NbParams,
ganlikun	0:13413ea9a877	1054	uint32_t Param1,
ganlikun	0:13413ea9a877	1055	uint8_t* ParametersTable);
ganlikun	0:13413ea9a877	1056	HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
ganlikun	0:13413ea9a877	1057	uint32_t ChannelNbr,
ganlikun	0:13413ea9a877	1058	uint8_t* Array,
ganlikun	0:13413ea9a877	1059	uint32_t Size,
ganlikun	0:13413ea9a877	1060	uint32_t Mode,
ganlikun	0:13413ea9a877	1061	uint32_t DCSCmd,
ganlikun	0:13413ea9a877	1062	uint8_t* ParametersTable);
ganlikun	0:13413ea9a877	1063	HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1064	HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1065	HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1066	HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1067
ganlikun	0:13413ea9a877	1068	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation);
ganlikun	0:13413ea9a877	1069	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1070
ganlikun	0:13413ea9a877	1071	HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value);
ganlikun	0:13413ea9a877	1072	HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency);
ganlikun	0:13413ea9a877	1073	HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State);
ganlikun	0:13413ea9a877	1074	HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State);
ganlikun	0:13413ea9a877	1075	HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value);
ganlikun	0:13413ea9a877	1076	HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State);
ganlikun	0:13413ea9a877	1077	HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State);
ganlikun	0:13413ea9a877	1078	HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State);
ganlikun	0:13413ea9a877	1079	HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State);
ganlikun	0:13413ea9a877	1080	HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State);
ganlikun	0:13413ea9a877	1081
ganlikun	0:13413ea9a877	1082	uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1083	HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors);
ganlikun	0:13413ea9a877	1084	HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi);
ganlikun	0:13413ea9a877	1085	/**
ganlikun	0:13413ea9a877	1086	* @}
ganlikun	0:13413ea9a877	1087	*/
ganlikun	0:13413ea9a877	1088
ganlikun	0:13413ea9a877	1089	/* Private types -------------------------------------------------------------*/
ganlikun	0:13413ea9a877	1090	/** @defgroup DSI_Private_Types DSI Private Types
ganlikun	0:13413ea9a877	1091	* @{
ganlikun	0:13413ea9a877	1092	*/
ganlikun	0:13413ea9a877	1093
ganlikun	0:13413ea9a877	1094	/**
ganlikun	0:13413ea9a877	1095	* @}
ganlikun	0:13413ea9a877	1096	*/
ganlikun	0:13413ea9a877	1097
ganlikun	0:13413ea9a877	1098	/* Private defines -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	1099	/** @defgroup DSI_Private_Defines DSI Private Defines
ganlikun	0:13413ea9a877	1100	* @{
ganlikun	0:13413ea9a877	1101	*/
ganlikun	0:13413ea9a877	1102
ganlikun	0:13413ea9a877	1103	/**
ganlikun	0:13413ea9a877	1104	* @}
ganlikun	0:13413ea9a877	1105	*/
ganlikun	0:13413ea9a877	1106
ganlikun	0:13413ea9a877	1107	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	1108	/** @defgroup DSI_Private_Variables DSI Private Variables
ganlikun	0:13413ea9a877	1109	* @{
ganlikun	0:13413ea9a877	1110	*/
ganlikun	0:13413ea9a877	1111
ganlikun	0:13413ea9a877	1112	/**
ganlikun	0:13413ea9a877	1113	* @}
ganlikun	0:13413ea9a877	1114	*/
ganlikun	0:13413ea9a877	1115
ganlikun	0:13413ea9a877	1116	/* Private constants ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	1117	/** @defgroup DSI_Private_Constants DSI Private Constants
ganlikun	0:13413ea9a877	1118	* @{
ganlikun	0:13413ea9a877	1119	*/
ganlikun	0:13413ea9a877	1120	#define DSI_MAX_RETURN_PKT_SIZE ((uint32_t)0x00000037U) /!< Maximum return packet configuration /
ganlikun	0:13413ea9a877	1121	/**
ganlikun	0:13413ea9a877	1122	* @}
ganlikun	0:13413ea9a877	1123	*/
ganlikun	0:13413ea9a877	1124
ganlikun	0:13413ea9a877	1125	/* Private macros ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	1126	/** @defgroup DSI_Private_Macros DSI Private Macros
ganlikun	0:13413ea9a877	1127	* @{
ganlikun	0:13413ea9a877	1128	*/
ganlikun	0:13413ea9a877	1129	#define IS_DSI_PLL_NDIV(NDIV) ((10U <= (NDIV)) && ((NDIV) <= 125U))
ganlikun	0:13413ea9a877	1130	#define IS_DSI_PLL_IDF(IDF) (((IDF) == DSI_PLL_IN_DIV1) \|\| \
ganlikun	0:13413ea9a877	1131	((IDF) == DSI_PLL_IN_DIV2) \|\| \
ganlikun	0:13413ea9a877	1132	((IDF) == DSI_PLL_IN_DIV3) \|\| \
ganlikun	0:13413ea9a877	1133	((IDF) == DSI_PLL_IN_DIV4) \|\| \
ganlikun	0:13413ea9a877	1134	((IDF) == DSI_PLL_IN_DIV5) \|\| \
ganlikun	0:13413ea9a877	1135	((IDF) == DSI_PLL_IN_DIV6) \|\| \
ganlikun	0:13413ea9a877	1136	((IDF) == DSI_PLL_IN_DIV7))
ganlikun	0:13413ea9a877	1137	#define IS_DSI_PLL_ODF(ODF) (((ODF) == DSI_PLL_OUT_DIV1) \|\| \
ganlikun	0:13413ea9a877	1138	((ODF) == DSI_PLL_OUT_DIV2) \|\| \
ganlikun	0:13413ea9a877	1139	((ODF) == DSI_PLL_OUT_DIV4) \|\| \
ganlikun	0:13413ea9a877	1140	((ODF) == DSI_PLL_OUT_DIV8))
ganlikun	0:13413ea9a877	1141	#define IS_DSI_AUTO_CLKLANE_CONTROL(AutoClkLane) (((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_DISABLE) \|\| ((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_ENABLE))
ganlikun	0:13413ea9a877	1142	#define IS_DSI_NUMBER_OF_LANES(NumberOfLanes) (((NumberOfLanes) == DSI_ONE_DATA_LANE) \|\| ((NumberOfLanes) == DSI_TWO_DATA_LANES))
ganlikun	0:13413ea9a877	1143	#define IS_DSI_FLOW_CONTROL(FlowControl) (((FlowControl) \| DSI_FLOW_CONTROL_ALL) == DSI_FLOW_CONTROL_ALL)
ganlikun	0:13413ea9a877	1144	#define IS_DSI_COLOR_CODING(ColorCoding) ((ColorCoding) <= 5U)
ganlikun	0:13413ea9a877	1145	#define IS_DSI_LOOSELY_PACKED(LooselyPacked) (((LooselyPacked) == DSI_LOOSELY_PACKED_ENABLE) \|\| ((LooselyPacked) == DSI_LOOSELY_PACKED_DISABLE))
ganlikun	0:13413ea9a877	1146	#define IS_DSI_DE_POLARITY(DataEnable) (((DataEnable) == DSI_DATA_ENABLE_ACTIVE_HIGH) \|\| ((DataEnable) == DSI_DATA_ENABLE_ACTIVE_LOW))
ganlikun	0:13413ea9a877	1147	#define IS_DSI_VSYNC_POLARITY(VSYNC) (((VSYNC) == DSI_VSYNC_ACTIVE_HIGH) \|\| ((VSYNC) == DSI_VSYNC_ACTIVE_LOW))
ganlikun	0:13413ea9a877	1148	#define IS_DSI_HSYNC_POLARITY(HSYNC) (((HSYNC) == DSI_HSYNC_ACTIVE_HIGH) \|\| ((HSYNC) == DSI_HSYNC_ACTIVE_LOW))
ganlikun	0:13413ea9a877	1149	#define IS_DSI_VIDEO_MODE_TYPE(VideoModeType) (((VideoModeType) == DSI_VID_MODE_NB_PULSES) \|\| \
ganlikun	0:13413ea9a877	1150	((VideoModeType) == DSI_VID_MODE_NB_EVENTS) \|\| \
ganlikun	0:13413ea9a877	1151	((VideoModeType) == DSI_VID_MODE_BURST))
ganlikun	0:13413ea9a877	1152	#define IS_DSI_COLOR_MODE(ColorMode) (((ColorMode) == DSI_COLOR_MODE_FULL) \|\| ((ColorMode) == DSI_COLOR_MODE_EIGHT))
ganlikun	0:13413ea9a877	1153	#define IS_DSI_SHUT_DOWN(ShutDown) (((ShutDown) == DSI_DISPLAY_ON) \|\| ((ShutDown) == DSI_DISPLAY_OFF))
ganlikun	0:13413ea9a877	1154	#define IS_DSI_LP_COMMAND(LPCommand) (((LPCommand) == DSI_LP_COMMAND_DISABLE) \|\| ((LPCommand) == DSI_LP_COMMAND_ENABLE))
ganlikun	0:13413ea9a877	1155	#define IS_DSI_LP_HFP(LPHFP) (((LPHFP) == DSI_LP_HFP_DISABLE) \|\| ((LPHFP) == DSI_LP_HFP_ENABLE))
ganlikun	0:13413ea9a877	1156	#define IS_DSI_LP_HBP(LPHBP) (((LPHBP) == DSI_LP_HBP_DISABLE) \|\| ((LPHBP) == DSI_LP_HBP_ENABLE))
ganlikun	0:13413ea9a877	1157	#define IS_DSI_LP_VACTIVE(LPVActive) (((LPVActive) == DSI_LP_VACT_DISABLE) \|\| ((LPVActive) == DSI_LP_VACT_ENABLE))
ganlikun	0:13413ea9a877	1158	#define IS_DSI_LP_VFP(LPVFP) (((LPVFP) == DSI_LP_VFP_DISABLE) \|\| ((LPVFP) == DSI_LP_VFP_ENABLE))
ganlikun	0:13413ea9a877	1159	#define IS_DSI_LP_VBP(LPVBP) (((LPVBP) == DSI_LP_VBP_DISABLE) \|\| ((LPVBP) == DSI_LP_VBP_ENABLE))
ganlikun	0:13413ea9a877	1160	#define IS_DSI_LP_VSYNC(LPVSYNC) (((LPVSYNC) == DSI_LP_VSYNC_DISABLE) \|\| ((LPVSYNC) == DSI_LP_VSYNC_ENABLE))
ganlikun	0:13413ea9a877	1161	#define IS_DSI_FBTAA(FrameBTAAcknowledge) (((FrameBTAAcknowledge) == DSI_FBTAA_DISABLE) \|\| ((FrameBTAAcknowledge) == DSI_FBTAA_ENABLE))
ganlikun	0:13413ea9a877	1162	#define IS_DSI_TE_SOURCE(TESource) (((TESource) == DSI_TE_DSILINK) \|\| ((TESource) == DSI_TE_EXTERNAL))
ganlikun	0:13413ea9a877	1163	#define IS_DSI_TE_POLARITY(TEPolarity) (((TEPolarity) == DSI_TE_RISING_EDGE) \|\| ((TEPolarity) == DSI_TE_FALLING_EDGE))
ganlikun	0:13413ea9a877	1164	#define IS_DSI_AUTOMATIC_REFRESH(AutomaticRefresh) (((AutomaticRefresh) == DSI_AR_DISABLE) \|\| ((AutomaticRefresh) == DSI_AR_ENABLE))
ganlikun	0:13413ea9a877	1165	#define IS_DSI_VS_POLARITY(VSPolarity) (((VSPolarity) == DSI_VSYNC_FALLING) \|\| ((VSPolarity) == DSI_VSYNC_RISING))
ganlikun	0:13413ea9a877	1166	#define IS_DSI_TE_ACK_REQUEST(TEAcknowledgeRequest) (((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_DISABLE) \|\| ((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_ENABLE))
ganlikun	0:13413ea9a877	1167	#define IS_DSI_ACK_REQUEST(AcknowledgeRequest) (((AcknowledgeRequest) == DSI_ACKNOWLEDGE_DISABLE) \|\| ((AcknowledgeRequest) == DSI_ACKNOWLEDGE_ENABLE))
ganlikun	0:13413ea9a877	1168	#define IS_DSI_LP_GSW0P(LP_GSW0P) (((LP_GSW0P) == DSI_LP_GSW0P_DISABLE) \|\| ((LP_GSW0P) == DSI_LP_GSW0P_ENABLE))
ganlikun	0:13413ea9a877	1169	#define IS_DSI_LP_GSW1P(LP_GSW1P) (((LP_GSW1P) == DSI_LP_GSW1P_DISABLE) \|\| ((LP_GSW1P) == DSI_LP_GSW1P_ENABLE))
ganlikun	0:13413ea9a877	1170	#define IS_DSI_LP_GSW2P(LP_GSW2P) (((LP_GSW2P) == DSI_LP_GSW2P_DISABLE) \|\| ((LP_GSW2P) == DSI_LP_GSW2P_ENABLE))
ganlikun	0:13413ea9a877	1171	#define IS_DSI_LP_GSR0P(LP_GSR0P) (((LP_GSR0P) == DSI_LP_GSR0P_DISABLE) \|\| ((LP_GSR0P) == DSI_LP_GSR0P_ENABLE))
ganlikun	0:13413ea9a877	1172	#define IS_DSI_LP_GSR1P(LP_GSR1P) (((LP_GSR1P) == DSI_LP_GSR1P_DISABLE) \|\| ((LP_GSR1P) == DSI_LP_GSR1P_ENABLE))
ganlikun	0:13413ea9a877	1173	#define IS_DSI_LP_GSR2P(LP_GSR2P) (((LP_GSR2P) == DSI_LP_GSR2P_DISABLE) \|\| ((LP_GSR2P) == DSI_LP_GSR2P_ENABLE))
ganlikun	0:13413ea9a877	1174	#define IS_DSI_LP_GLW(LP_GLW) (((LP_GLW) == DSI_LP_GLW_DISABLE) \|\| ((LP_GLW) == DSI_LP_GLW_ENABLE))
ganlikun	0:13413ea9a877	1175	#define IS_DSI_LP_DSW0P(LP_DSW0P) (((LP_DSW0P) == DSI_LP_DSW0P_DISABLE) \|\| ((LP_DSW0P) == DSI_LP_DSW0P_ENABLE))
ganlikun	0:13413ea9a877	1176	#define IS_DSI_LP_DSW1P(LP_DSW1P) (((LP_DSW1P) == DSI_LP_DSW1P_DISABLE) \|\| ((LP_DSW1P) == DSI_LP_DSW1P_ENABLE))
ganlikun	0:13413ea9a877	1177	#define IS_DSI_LP_DSR0P(LP_DSR0P) (((LP_DSR0P) == DSI_LP_DSR0P_DISABLE) \|\| ((LP_DSR0P) == DSI_LP_DSR0P_ENABLE))
ganlikun	0:13413ea9a877	1178	#define IS_DSI_LP_DLW(LP_DLW) (((LP_DLW) == DSI_LP_DLW_DISABLE) \|\| ((LP_DLW) == DSI_LP_DLW_ENABLE))
ganlikun	0:13413ea9a877	1179	#define IS_DSI_LP_MRDP(LP_MRDP) (((LP_MRDP) == DSI_LP_MRDP_DISABLE) \|\| ((LP_MRDP) == DSI_LP_MRDP_ENABLE))
ganlikun	0:13413ea9a877	1180	#define IS_DSI_SHORT_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_WRITE_P0) \|\| \
ganlikun	0:13413ea9a877	1181	((MODE) == DSI_DCS_SHORT_PKT_WRITE_P1) \|\| \
ganlikun	0:13413ea9a877	1182	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P0) \|\| \
ganlikun	0:13413ea9a877	1183	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P1) \|\| \
ganlikun	0:13413ea9a877	1184	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P2))
ganlikun	0:13413ea9a877	1185	#define IS_DSI_LONG_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_LONG_PKT_WRITE) \|\| \
ganlikun	0:13413ea9a877	1186	((MODE) == DSI_GEN_LONG_PKT_WRITE))
ganlikun	0:13413ea9a877	1187	#define IS_DSI_READ_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_READ) \|\| \
ganlikun	0:13413ea9a877	1188	((MODE) == DSI_GEN_SHORT_PKT_READ_P0) \|\| \
ganlikun	0:13413ea9a877	1189	((MODE) == DSI_GEN_SHORT_PKT_READ_P1) \|\| \
ganlikun	0:13413ea9a877	1190	((MODE) == DSI_GEN_SHORT_PKT_READ_P2))
ganlikun	0:13413ea9a877	1191	#define IS_DSI_COMMUNICATION_DELAY(CommDelay) (((CommDelay) == DSI_SLEW_RATE_HSTX) \|\| ((CommDelay) == DSI_SLEW_RATE_LPTX) \|\| ((CommDelay) == DSI_HS_DELAY))
ganlikun	0:13413ea9a877	1192	#define IS_DSI_LANE_GROUP(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANES))
ganlikun	0:13413ea9a877	1193	#define IS_DSI_CUSTOM_LANE(CustomLane) (((CustomLane) == DSI_SWAP_LANE_PINS) \|\| ((CustomLane) == DSI_INVERT_HS_SIGNAL))
ganlikun	0:13413ea9a877	1194	#define IS_DSI_LANE(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANE0) \|\| ((Lane) == DSI_DATA_LANE1))
ganlikun	0:13413ea9a877	1195	#define IS_DSI_PHY_TIMING(Timing) (((Timing) == DSI_TCLK_POST ) \|\| \
ganlikun	0:13413ea9a877	1196	((Timing) == DSI_TLPX_CLK ) \|\| \
ganlikun	0:13413ea9a877	1197	((Timing) == DSI_THS_EXIT ) \|\| \
ganlikun	0:13413ea9a877	1198	((Timing) == DSI_TLPX_DATA ) \|\| \
ganlikun	0:13413ea9a877	1199	((Timing) == DSI_THS_ZERO ) \|\| \
ganlikun	0:13413ea9a877	1200	((Timing) == DSI_THS_TRAIL ) \|\| \
ganlikun	0:13413ea9a877	1201	((Timing) == DSI_THS_PREPARE ) \|\| \
ganlikun	0:13413ea9a877	1202	((Timing) == DSI_TCLK_ZERO ) \|\| \
ganlikun	0:13413ea9a877	1203	((Timing) == DSI_TCLK_PREPARE))
ganlikun	0:13413ea9a877	1204
ganlikun	0:13413ea9a877	1205	/**
ganlikun	0:13413ea9a877	1206	* @}
ganlikun	0:13413ea9a877	1207	*/
ganlikun	0:13413ea9a877	1208
ganlikun	0:13413ea9a877	1209	/* Private functions prototypes ----------------------------------------------*/
ganlikun	0:13413ea9a877	1210	/** @defgroup DSI_Private_Functions_Prototypes DSI Private Functions Prototypes
ganlikun	0:13413ea9a877	1211	* @{
ganlikun	0:13413ea9a877	1212	*/
ganlikun	0:13413ea9a877	1213
ganlikun	0:13413ea9a877	1214	/**
ganlikun	0:13413ea9a877	1215	* @}
ganlikun	0:13413ea9a877	1216	*/
ganlikun	0:13413ea9a877	1217
ganlikun	0:13413ea9a877	1218	/* Private functions ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	1219	/** @defgroup DSI_Private_Functions DSI Private Functions
ganlikun	0:13413ea9a877	1220	* @{
ganlikun	0:13413ea9a877	1221	*/
ganlikun	0:13413ea9a877	1222
ganlikun	0:13413ea9a877	1223	/**
ganlikun	0:13413ea9a877	1224	* @}
ganlikun	0:13413ea9a877	1225	*/
ganlikun	0:13413ea9a877	1226
ganlikun	0:13413ea9a877	1227	/**
ganlikun	0:13413ea9a877	1228	* @}
ganlikun	0:13413ea9a877	1229	*/
ganlikun	0:13413ea9a877	1230
ganlikun	0:13413ea9a877	1231	/**
ganlikun	0:13413ea9a877	1232	* @}
ganlikun	0:13413ea9a877	1233	*/
ganlikun	0:13413ea9a877	1234	#endif /* STM32F469xx \|\| STM32F479xx */
ganlikun	0:13413ea9a877	1235
ganlikun	0:13413ea9a877	1236	#ifdef __cplusplus
ganlikun	0:13413ea9a877	1237	}
ganlikun	0:13413ea9a877	1238	#endif
ganlikun	0:13413ea9a877	1239
ganlikun	0:13413ea9a877	1240	#endif /* __STM32F4xx_HAL_DSI_H */
ganlikun	0:13413ea9a877	1241
ganlikun	0:13413ea9a877	1242	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	1243

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Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
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Followers:	1

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.h@0:13413ea9a877, 2022-06-12 (annotated)

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