Gan likun / mbed1-dev

001

targets/TARGET_STM/gpio_api.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ganlikun 0:13413ea9a877 1 /* mbed Microcontroller Library
ganlikun 0:13413ea9a877 2 *******************************************************************************
ganlikun 0:13413ea9a877 3 * Copyright (c) 2015, STMicroelectronics
ganlikun 0:13413ea9a877 4 * All rights reserved.
ganlikun 0:13413ea9a877 5 *
ganlikun 0:13413ea9a877 6 * Redistribution and use in source and binary forms, with or without
ganlikun 0:13413ea9a877 7 * modification, are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 8 *
ganlikun 0:13413ea9a877 9 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 10 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 12 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 13 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 15 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 16 * without specific prior written permission.
ganlikun 0:13413ea9a877 17 *
ganlikun 0:13413ea9a877 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 28 *******************************************************************************
ganlikun 0:13413ea9a877 29 */
ganlikun 0:13413ea9a877 30 #include "mbed_assert.h"
ganlikun 0:13413ea9a877 31 #include "gpio_api.h"
ganlikun 0:13413ea9a877 32 #include "pinmap.h"
ganlikun 0:13413ea9a877 33 #include "mbed_error.h"
ganlikun 0:13413ea9a877 34 #include "pin_device.h"
ganlikun 0:13413ea9a877 35
ganlikun 0:13413ea9a877 36 extern const uint32_t ll_pin_defines[16];
ganlikun 0:13413ea9a877 37
ganlikun 0:13413ea9a877 38 // Enable GPIO clock and return GPIO base address
ganlikun 0:13413ea9a877 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) {
ganlikun 0:13413ea9a877 40 uint32_t gpio_add = 0;
ganlikun 0:13413ea9a877 41 switch (port_idx) {
ganlikun 0:13413ea9a877 42 case PortA:
ganlikun 0:13413ea9a877 43 gpio_add = GPIOA_BASE;
ganlikun 0:13413ea9a877 44 __HAL_RCC_GPIOA_CLK_ENABLE();
ganlikun 0:13413ea9a877 45 break;
ganlikun 0:13413ea9a877 46 case PortB:
ganlikun 0:13413ea9a877 47 gpio_add = GPIOB_BASE;
ganlikun 0:13413ea9a877 48 __HAL_RCC_GPIOB_CLK_ENABLE();
ganlikun 0:13413ea9a877 49 break;
ganlikun 0:13413ea9a877 50 #if defined(GPIOC_BASE)
ganlikun 0:13413ea9a877 51 case PortC:
ganlikun 0:13413ea9a877 52 gpio_add = GPIOC_BASE;
ganlikun 0:13413ea9a877 53 __HAL_RCC_GPIOC_CLK_ENABLE();
ganlikun 0:13413ea9a877 54 break;
ganlikun 0:13413ea9a877 55 #endif
ganlikun 0:13413ea9a877 56 #if defined GPIOD_BASE
ganlikun 0:13413ea9a877 57 case PortD:
ganlikun 0:13413ea9a877 58 gpio_add = GPIOD_BASE;
ganlikun 0:13413ea9a877 59 __HAL_RCC_GPIOD_CLK_ENABLE();
ganlikun 0:13413ea9a877 60 break;
ganlikun 0:13413ea9a877 61 #endif
ganlikun 0:13413ea9a877 62 #if defined GPIOE_BASE
ganlikun 0:13413ea9a877 63 case PortE:
ganlikun 0:13413ea9a877 64 gpio_add = GPIOE_BASE;
ganlikun 0:13413ea9a877 65 __HAL_RCC_GPIOE_CLK_ENABLE();
ganlikun 0:13413ea9a877 66 break;
ganlikun 0:13413ea9a877 67 #endif
ganlikun 0:13413ea9a877 68 #if defined GPIOF_BASE
ganlikun 0:13413ea9a877 69 case PortF:
ganlikun 0:13413ea9a877 70 gpio_add = GPIOF_BASE;
ganlikun 0:13413ea9a877 71 __HAL_RCC_GPIOF_CLK_ENABLE();
ganlikun 0:13413ea9a877 72 break;
ganlikun 0:13413ea9a877 73 #endif
ganlikun 0:13413ea9a877 74 #if defined GPIOG_BASE
ganlikun 0:13413ea9a877 75 case PortG:
ganlikun 0:13413ea9a877 76 #if defined TARGET_STM32L4
ganlikun 0:13413ea9a877 77 __HAL_RCC_PWR_CLK_ENABLE();
ganlikun 0:13413ea9a877 78 HAL_PWREx_EnableVddIO2();
ganlikun 0:13413ea9a877 79 #endif
ganlikun 0:13413ea9a877 80 gpio_add = GPIOG_BASE;
ganlikun 0:13413ea9a877 81 __HAL_RCC_GPIOG_CLK_ENABLE();
ganlikun 0:13413ea9a877 82 break;
ganlikun 0:13413ea9a877 83 #endif
ganlikun 0:13413ea9a877 84 #if defined GPIOH_BASE
ganlikun 0:13413ea9a877 85 case PortH:
ganlikun 0:13413ea9a877 86 gpio_add = GPIOH_BASE;
ganlikun 0:13413ea9a877 87 __HAL_RCC_GPIOH_CLK_ENABLE();
ganlikun 0:13413ea9a877 88 break;
ganlikun 0:13413ea9a877 89 #endif
ganlikun 0:13413ea9a877 90 #if defined GPIOI_BASE
ganlikun 0:13413ea9a877 91 case PortI:
ganlikun 0:13413ea9a877 92 gpio_add = GPIOI_BASE;
ganlikun 0:13413ea9a877 93 __HAL_RCC_GPIOI_CLK_ENABLE();
ganlikun 0:13413ea9a877 94 break;
ganlikun 0:13413ea9a877 95 #endif
ganlikun 0:13413ea9a877 96 #if defined GPIOJ_BASE
ganlikun 0:13413ea9a877 97 case PortJ:
ganlikun 0:13413ea9a877 98 gpio_add = GPIOJ_BASE;
ganlikun 0:13413ea9a877 99 __HAL_RCC_GPIOJ_CLK_ENABLE();
ganlikun 0:13413ea9a877 100 break;
ganlikun 0:13413ea9a877 101 #endif
ganlikun 0:13413ea9a877 102 #if defined GPIOK_BASE
ganlikun 0:13413ea9a877 103 case PortK:
ganlikun 0:13413ea9a877 104 gpio_add = GPIOK_BASE;
ganlikun 0:13413ea9a877 105 __HAL_RCC_GPIOK_CLK_ENABLE();
ganlikun 0:13413ea9a877 106 break;
ganlikun 0:13413ea9a877 107 #endif
ganlikun 0:13413ea9a877 108 default:
ganlikun 0:13413ea9a877 109 error("Pinmap error: wrong port number.");
ganlikun 0:13413ea9a877 110 break;
ganlikun 0:13413ea9a877 111 }
ganlikun 0:13413ea9a877 112 return (GPIO_TypeDef *) gpio_add;
ganlikun 0:13413ea9a877 113 }
ganlikun 0:13413ea9a877 114
ganlikun 0:13413ea9a877 115 uint32_t gpio_set(PinName pin) {
ganlikun 0:13413ea9a877 116 MBED_ASSERT(pin != (PinName)NC);
ganlikun 0:13413ea9a877 117
ganlikun 0:13413ea9a877 118 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ganlikun 0:13413ea9a877 119
ganlikun 0:13413ea9a877 120 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
ganlikun 0:13413ea9a877 121 }
ganlikun 0:13413ea9a877 122
ganlikun 0:13413ea9a877 123
ganlikun 0:13413ea9a877 124 void gpio_init(gpio_t *obj, PinName pin) {
ganlikun 0:13413ea9a877 125 obj->pin = pin;
ganlikun 0:13413ea9a877 126 if (pin == (PinName)NC) {
ganlikun 0:13413ea9a877 127 return;
ganlikun 0:13413ea9a877 128 }
ganlikun 0:13413ea9a877 129
ganlikun 0:13413ea9a877 130 uint32_t port_index = STM_PORT(pin);
ganlikun 0:13413ea9a877 131
ganlikun 0:13413ea9a877 132 // Enable GPIO clock
ganlikun 0:13413ea9a877 133 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
ganlikun 0:13413ea9a877 134
ganlikun 0:13413ea9a877 135 // Fill GPIO object structure for future use
ganlikun 0:13413ea9a877 136 obj->mask = gpio_set(pin);
ganlikun 0:13413ea9a877 137 obj->gpio = gpio;
ganlikun 0:13413ea9a877 138 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
ganlikun 0:13413ea9a877 139 obj->reg_in = &gpio->IDR;
ganlikun 0:13413ea9a877 140 obj->reg_set = &gpio->BSRR;
ganlikun 0:13413ea9a877 141 #ifdef GPIO_IP_WITHOUT_BRR
ganlikun 0:13413ea9a877 142 obj->reg_clr = &gpio->BSRR;
ganlikun 0:13413ea9a877 143 #else
ganlikun 0:13413ea9a877 144 obj->reg_clr = &gpio->BRR;
ganlikun 0:13413ea9a877 145 #endif
ganlikun 0:13413ea9a877 146 }
ganlikun 0:13413ea9a877 147
ganlikun 0:13413ea9a877 148 void gpio_mode(gpio_t *obj, PinMode mode) {
ganlikun 0:13413ea9a877 149 pin_mode(obj->pin, mode);
ganlikun 0:13413ea9a877 150 }
ganlikun 0:13413ea9a877 151
ganlikun 0:13413ea9a877 152 inline void gpio_dir(gpio_t *obj, PinDirection direction) {
ganlikun 0:13413ea9a877 153 if (direction == PIN_INPUT) {
ganlikun 0:13413ea9a877 154 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
ganlikun 0:13413ea9a877 155 } else {
ganlikun 0:13413ea9a877 156 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
ganlikun 0:13413ea9a877 157 }
ganlikun 0:13413ea9a877 158 }
ganlikun 0:13413ea9a877 159
ganlikun 0:13413ea9a877 160