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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_lptim.h@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

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User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_ll_lptim.h
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief Header file of LPTIM LL module.
ganlikun	0:13413ea9a877	8	******************************************************************************
ganlikun	0:13413ea9a877	9	* @attention
ganlikun	0:13413ea9a877	10	*
ganlikun	0:13413ea9a877	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	12	*
ganlikun	0:13413ea9a877	13	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	14	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	15	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	16	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	18	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	19	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	21	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	22	* without specific prior written permission.
ganlikun	0:13413ea9a877	23	*
ganlikun	0:13413ea9a877	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	34	*
ganlikun	0:13413ea9a877	35	******************************************************************************
ganlikun	0:13413ea9a877	36	*/
ganlikun	0:13413ea9a877	37
ganlikun	0:13413ea9a877	38	/* Define to prevent recursive inclusion -------------------------------------*/
ganlikun	0:13413ea9a877	39	#ifndef __STM32F4xx_LL_LPTIM_H
ganlikun	0:13413ea9a877	40	#define __STM32F4xx_LL_LPTIM_H
ganlikun	0:13413ea9a877	41
ganlikun	0:13413ea9a877	42	#ifdef __cplusplus
ganlikun	0:13413ea9a877	43	extern "C" {
ganlikun	0:13413ea9a877	44	#endif
ganlikun	0:13413ea9a877	45
ganlikun	0:13413ea9a877	46	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	47	#include "stm32f4xx.h"
ganlikun	0:13413ea9a877	48
ganlikun	0:13413ea9a877	49	/** @addtogroup STM32F4xx_LL_Driver
ganlikun	0:13413ea9a877	50	* @{
ganlikun	0:13413ea9a877	51	*/
ganlikun	0:13413ea9a877	52	#if defined (LPTIM1)
ganlikun	0:13413ea9a877	53
ganlikun	0:13413ea9a877	54	/** @defgroup LPTIM_LL LPTIM
ganlikun	0:13413ea9a877	55	* @{
ganlikun	0:13413ea9a877	56	*/
ganlikun	0:13413ea9a877	57
ganlikun	0:13413ea9a877	58	/* Private types -------------------------------------------------------------*/
ganlikun	0:13413ea9a877	59	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	60
ganlikun	0:13413ea9a877	61	/* Private constants ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	62
ganlikun	0:13413ea9a877	63	/* Private macros ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	64	#if defined(USE_FULL_LL_DRIVER)
ganlikun	0:13413ea9a877	65	/** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
ganlikun	0:13413ea9a877	66	* @{
ganlikun	0:13413ea9a877	67	*/
ganlikun	0:13413ea9a877	68	/**
ganlikun	0:13413ea9a877	69	* @}
ganlikun	0:13413ea9a877	70	*/
ganlikun	0:13413ea9a877	71	#endif /USE_FULL_LL_DRIVER/
ganlikun	0:13413ea9a877	72
ganlikun	0:13413ea9a877	73	/* Exported types ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	74	#if defined(USE_FULL_LL_DRIVER)
ganlikun	0:13413ea9a877	75	/** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
ganlikun	0:13413ea9a877	76	* @{
ganlikun	0:13413ea9a877	77	*/
ganlikun	0:13413ea9a877	78
ganlikun	0:13413ea9a877	79	/**
ganlikun	0:13413ea9a877	80	* @brief LPTIM Init structure definition
ganlikun	0:13413ea9a877	81	*/
ganlikun	0:13413ea9a877	82	typedef struct
ganlikun	0:13413ea9a877	83	{
ganlikun	0:13413ea9a877	84	uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
ganlikun	0:13413ea9a877	85	This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
ganlikun	0:13413ea9a877	86
ganlikun	0:13413ea9a877	87	This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
ganlikun	0:13413ea9a877	88
ganlikun	0:13413ea9a877	89	uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
ganlikun	0:13413ea9a877	90	This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
ganlikun	0:13413ea9a877	91
ganlikun	0:13413ea9a877	92	This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
ganlikun	0:13413ea9a877	93
ganlikun	0:13413ea9a877	94	uint32_t Waveform; /*!< Specifies the waveform shape.
ganlikun	0:13413ea9a877	95	This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
ganlikun	0:13413ea9a877	96
ganlikun	0:13413ea9a877	97	This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
ganlikun	0:13413ea9a877	98
ganlikun	0:13413ea9a877	99	uint32_t Polarity; /*!< Specifies waveform polarity.
ganlikun	0:13413ea9a877	100	This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
ganlikun	0:13413ea9a877	101
ganlikun	0:13413ea9a877	102	This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
ganlikun	0:13413ea9a877	103	} LL_LPTIM_InitTypeDef;
ganlikun	0:13413ea9a877	104
ganlikun	0:13413ea9a877	105	/**
ganlikun	0:13413ea9a877	106	* @}
ganlikun	0:13413ea9a877	107	*/
ganlikun	0:13413ea9a877	108	#endif /* USE_FULL_LL_DRIVER */
ganlikun	0:13413ea9a877	109
ganlikun	0:13413ea9a877	110	/* Exported constants --------------------------------------------------------*/
ganlikun	0:13413ea9a877	111	/** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
ganlikun	0:13413ea9a877	112	* @{
ganlikun	0:13413ea9a877	113	*/
ganlikun	0:13413ea9a877	114
ganlikun	0:13413ea9a877	115	/** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
ganlikun	0:13413ea9a877	116	* @brief Flags defines which can be used with LL_LPTIM_ReadReg function
ganlikun	0:13413ea9a877	117	* @{
ganlikun	0:13413ea9a877	118	*/
ganlikun	0:13413ea9a877	119	#define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /!< Compare match /
ganlikun	0:13413ea9a877	120	#define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /!< Autoreload match /
ganlikun	0:13413ea9a877	121	#define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /!< External trigger edge event /
ganlikun	0:13413ea9a877	122	#define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /!< Compare register update OK /
ganlikun	0:13413ea9a877	123	#define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /!< Autoreload register update OK /
ganlikun	0:13413ea9a877	124	#define LL_LPTIM_ISR_UP LPTIM_ISR_UP /!< Counter direction change down to up /
ganlikun	0:13413ea9a877	125	#define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /!< Counter direction change up to down /
ganlikun	0:13413ea9a877	126	/**
ganlikun	0:13413ea9a877	127	* @}
ganlikun	0:13413ea9a877	128	*/
ganlikun	0:13413ea9a877	129
ganlikun	0:13413ea9a877	130	/** @defgroup LPTIM_LL_EC_IT IT Defines
ganlikun	0:13413ea9a877	131	* @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
ganlikun	0:13413ea9a877	132	* @{
ganlikun	0:13413ea9a877	133	*/
ganlikun	0:13413ea9a877	134	#define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /!< Compare match Interrupt Enable /
ganlikun	0:13413ea9a877	135	#define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /!< Autoreload match Interrupt Enable /
ganlikun	0:13413ea9a877	136	#define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /!< External trigger valid edge Interrupt Enable /
ganlikun	0:13413ea9a877	137	#define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /!< Compare register update OK Interrupt Enable /
ganlikun	0:13413ea9a877	138	#define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /!< Autoreload register update OK Interrupt Enable /
ganlikun	0:13413ea9a877	139	#define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /!< Direction change to UP Interrupt Enable /
ganlikun	0:13413ea9a877	140	#define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /!< Direction change to down Interrupt Enable /
ganlikun	0:13413ea9a877	141	/**
ganlikun	0:13413ea9a877	142	* @}
ganlikun	0:13413ea9a877	143	*/
ganlikun	0:13413ea9a877	144
ganlikun	0:13413ea9a877	145	/** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
ganlikun	0:13413ea9a877	146	* @{
ganlikun	0:13413ea9a877	147	*/
ganlikun	0:13413ea9a877	148	#define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /!<LP Timer starts in continuous mode/
ganlikun	0:13413ea9a877	149	#define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /!<LP Tilmer starts in single mode/
ganlikun	0:13413ea9a877	150	/**
ganlikun	0:13413ea9a877	151	* @}
ganlikun	0:13413ea9a877	152	*/
ganlikun	0:13413ea9a877	153
ganlikun	0:13413ea9a877	154	/** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
ganlikun	0:13413ea9a877	155	* @{
ganlikun	0:13413ea9a877	156	*/
ganlikun	0:13413ea9a877	157	#define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /!<Preload is disabled: registers are updated after each APB bus write access/
ganlikun	0:13413ea9a877	158	#define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /!<preload is enabled: registers are updated at the end of the current LPTIM period/
ganlikun	0:13413ea9a877	159	/**
ganlikun	0:13413ea9a877	160	* @}
ganlikun	0:13413ea9a877	161	*/
ganlikun	0:13413ea9a877	162
ganlikun	0:13413ea9a877	163	/** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
ganlikun	0:13413ea9a877	164	* @{
ganlikun	0:13413ea9a877	165	*/
ganlikun	0:13413ea9a877	166	#define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /!<The counter is incremented following each internal clock pulse/
ganlikun	0:13413ea9a877	167	#define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /!<The counter is incremented following each valid clock pulse on the LPTIM external Input1/
ganlikun	0:13413ea9a877	168	/**
ganlikun	0:13413ea9a877	169	* @}
ganlikun	0:13413ea9a877	170	*/
ganlikun	0:13413ea9a877	171
ganlikun	0:13413ea9a877	172	/** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
ganlikun	0:13413ea9a877	173	* @{
ganlikun	0:13413ea9a877	174	*/
ganlikun	0:13413ea9a877	175	#define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE/
ganlikun	0:13413ea9a877	176	#define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /!<LPTIM generates a Set Once waveform/
ganlikun	0:13413ea9a877	177	/**
ganlikun	0:13413ea9a877	178	* @}
ganlikun	0:13413ea9a877	179	*/
ganlikun	0:13413ea9a877	180
ganlikun	0:13413ea9a877	181	/** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
ganlikun	0:13413ea9a877	182	* @{
ganlikun	0:13413ea9a877	183	*/
ganlikun	0:13413ea9a877	184	#define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers/
ganlikun	0:13413ea9a877	185	#define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers/
ganlikun	0:13413ea9a877	186	/**
ganlikun	0:13413ea9a877	187	* @}
ganlikun	0:13413ea9a877	188	*/
ganlikun	0:13413ea9a877	189
ganlikun	0:13413ea9a877	190	/** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
ganlikun	0:13413ea9a877	191	* @{
ganlikun	0:13413ea9a877	192	*/
ganlikun	0:13413ea9a877	193	#define LL_LPTIM_PRESCALER_DIV1 0x00000000U /!<Prescaler division factor is set to 1/
ganlikun	0:13413ea9a877	194	#define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /!<Prescaler division factor is set to 2/
ganlikun	0:13413ea9a877	195	#define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /!<Prescaler division factor is set to 4/
ganlikun	0:13413ea9a877	196	#define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 \| LPTIM_CFGR_PRESC_0) /!<Prescaler division factor is set to 8/
ganlikun	0:13413ea9a877	197	#define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /!<Prescaler division factor is set to 16/
ganlikun	0:13413ea9a877	198	#define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 \| LPTIM_CFGR_PRESC_0) /!<Prescaler division factor is set to 32/
ganlikun	0:13413ea9a877	199	#define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 \| LPTIM_CFGR_PRESC_1) /!<Prescaler division factor is set to 64/
ganlikun	0:13413ea9a877	200	#define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /!<Prescaler division factor is set to 128/
ganlikun	0:13413ea9a877	201	/**
ganlikun	0:13413ea9a877	202	* @}
ganlikun	0:13413ea9a877	203	*/
ganlikun	0:13413ea9a877	204
ganlikun	0:13413ea9a877	205	/** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
ganlikun	0:13413ea9a877	206	* @{
ganlikun	0:13413ea9a877	207	*/
ganlikun	0:13413ea9a877	208	#define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /!<External input trigger is connected to TIMx_ETR input/
ganlikun	0:13413ea9a877	209	#define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /!<External input trigger is connected to RTC Alarm A/
ganlikun	0:13413ea9a877	210	#define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /!<External input trigger is connected to RTC Alarm B/
ganlikun	0:13413ea9a877	211	#define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 \| LPTIM_CFGR_TRIGSEL_0) /!<External input trigger is connected to RTC Tamper 1/
ganlikun	0:13413ea9a877	212	#define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /!<External input trigger is connected to TIM1/
ganlikun	0:13413ea9a877	213	#define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 \| LPTIM_CFGR_TRIGSEL_0) /!<External input trigger is connected to TIM5/
ganlikun	0:13413ea9a877	214	/**
ganlikun	0:13413ea9a877	215	* @}
ganlikun	0:13413ea9a877	216	*/
ganlikun	0:13413ea9a877	217
ganlikun	0:13413ea9a877	218	/** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
ganlikun	0:13413ea9a877	219	* @{
ganlikun	0:13413ea9a877	220	*/
ganlikun	0:13413ea9a877	221	#define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /!<Any trigger active level change is considered as a valid trigger/
ganlikun	0:13413ea9a877	222	#define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger/
ganlikun	0:13413ea9a877	223	#define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger/
ganlikun	0:13413ea9a877	224	#define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger/
ganlikun	0:13413ea9a877	225	/**
ganlikun	0:13413ea9a877	226	* @}
ganlikun	0:13413ea9a877	227	*/
ganlikun	0:13413ea9a877	228
ganlikun	0:13413ea9a877	229	/** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
ganlikun	0:13413ea9a877	230	* @{
ganlikun	0:13413ea9a877	231	*/
ganlikun	0:13413ea9a877	232	#define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /!<LPTIM counter starts when a rising edge is detected/
ganlikun	0:13413ea9a877	233	#define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /!<LPTIM counter starts when a falling edge is detected/
ganlikun	0:13413ea9a877	234	#define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /!<LPTIM counter starts when a rising or a falling edge is detected/
ganlikun	0:13413ea9a877	235	/**
ganlikun	0:13413ea9a877	236	* @}
ganlikun	0:13413ea9a877	237	*/
ganlikun	0:13413ea9a877	238
ganlikun	0:13413ea9a877	239	/** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
ganlikun	0:13413ea9a877	240	* @{
ganlikun	0:13413ea9a877	241	*/
ganlikun	0:13413ea9a877	242	#define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)/
ganlikun	0:13413ea9a877	243	#define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /!<LPTIM is clocked by an external clock source through the LPTIM external Input1/
ganlikun	0:13413ea9a877	244	/**
ganlikun	0:13413ea9a877	245	* @}
ganlikun	0:13413ea9a877	246	*/
ganlikun	0:13413ea9a877	247
ganlikun	0:13413ea9a877	248	/** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
ganlikun	0:13413ea9a877	249	* @{
ganlikun	0:13413ea9a877	250	*/
ganlikun	0:13413ea9a877	251	#define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /!<Any external clock signal level change is considered as a valid transition/
ganlikun	0:13413ea9a877	252	#define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition/
ganlikun	0:13413ea9a877	253	#define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition/
ganlikun	0:13413ea9a877	254	#define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition/
ganlikun	0:13413ea9a877	255	/**
ganlikun	0:13413ea9a877	256	* @}
ganlikun	0:13413ea9a877	257	*/
ganlikun	0:13413ea9a877	258
ganlikun	0:13413ea9a877	259	/** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
ganlikun	0:13413ea9a877	260	* @{
ganlikun	0:13413ea9a877	261	*/
ganlikun	0:13413ea9a877	262	#define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /!< The rising edge is the active edge used for counting/
ganlikun	0:13413ea9a877	263	#define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /!< The falling edge is the active edge used for counting/
ganlikun	0:13413ea9a877	264	#define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /!< Both edges are active edges/
ganlikun	0:13413ea9a877	265	/**
ganlikun	0:13413ea9a877	266	* @}
ganlikun	0:13413ea9a877	267	*/
ganlikun	0:13413ea9a877	268
ganlikun	0:13413ea9a877	269	/** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
ganlikun	0:13413ea9a877	270	* @{
ganlikun	0:13413ea9a877	271	*/
ganlikun	0:13413ea9a877	272	#define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /!< The rising edge is the active edge used for counting/
ganlikun	0:13413ea9a877	273	#define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /!< The falling edge is the active edge used for counting/
ganlikun	0:13413ea9a877	274	#define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /!< Both edges are active edges/
ganlikun	0:13413ea9a877	275	/**
ganlikun	0:13413ea9a877	276	* @}
ganlikun	0:13413ea9a877	277	*/
ganlikun	0:13413ea9a877	278
ganlikun	0:13413ea9a877	279
ganlikun	0:13413ea9a877	280	/**
ganlikun	0:13413ea9a877	281	* @}
ganlikun	0:13413ea9a877	282	*/
ganlikun	0:13413ea9a877	283
ganlikun	0:13413ea9a877	284	/* Exported macro ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	285	/** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
ganlikun	0:13413ea9a877	286	* @{
ganlikun	0:13413ea9a877	287	*/
ganlikun	0:13413ea9a877	288
ganlikun	0:13413ea9a877	289	/** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
ganlikun	0:13413ea9a877	290	* @{
ganlikun	0:13413ea9a877	291	*/
ganlikun	0:13413ea9a877	292
ganlikun	0:13413ea9a877	293	/**
ganlikun	0:13413ea9a877	294	* @brief Write a value in LPTIM register
ganlikun	0:13413ea9a877	295	* @param __INSTANCE__ LPTIM Instance
ganlikun	0:13413ea9a877	296	* @param __REG__ Register to be written
ganlikun	0:13413ea9a877	297	* @param __VALUE__ Value to be written in the register
ganlikun	0:13413ea9a877	298	* @retval None
ganlikun	0:13413ea9a877	299	*/
ganlikun	0:13413ea9a877	300	#define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
ganlikun	0:13413ea9a877	301
ganlikun	0:13413ea9a877	302	/**
ganlikun	0:13413ea9a877	303	* @brief Read a value in LPTIM register
ganlikun	0:13413ea9a877	304	* @param __INSTANCE__ LPTIM Instance
ganlikun	0:13413ea9a877	305	* @param __REG__ Register to be read
ganlikun	0:13413ea9a877	306	* @retval Register value
ganlikun	0:13413ea9a877	307	*/
ganlikun	0:13413ea9a877	308	#define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
ganlikun	0:13413ea9a877	309	/**
ganlikun	0:13413ea9a877	310	* @}
ganlikun	0:13413ea9a877	311	*/
ganlikun	0:13413ea9a877	312
ganlikun	0:13413ea9a877	313	/**
ganlikun	0:13413ea9a877	314	* @}
ganlikun	0:13413ea9a877	315	*/
ganlikun	0:13413ea9a877	316
ganlikun	0:13413ea9a877	317
ganlikun	0:13413ea9a877	318	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	319	/** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
ganlikun	0:13413ea9a877	320	* @{
ganlikun	0:13413ea9a877	321	*/
ganlikun	0:13413ea9a877	322
ganlikun	0:13413ea9a877	323	/** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
ganlikun	0:13413ea9a877	324	* @{
ganlikun	0:13413ea9a877	325	*/
ganlikun	0:13413ea9a877	326
ganlikun	0:13413ea9a877	327	/**
ganlikun	0:13413ea9a877	328	* @brief Enable the LPTIM instance
ganlikun	0:13413ea9a877	329	* @note After setting the ENABLE bit, a delay of two counter clock is needed
ganlikun	0:13413ea9a877	330	* before the LPTIM instance is actually enabled.
ganlikun	0:13413ea9a877	331	* @rmtoll CR ENABLE LL_LPTIM_Enable
ganlikun	0:13413ea9a877	332	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	333	* @retval None
ganlikun	0:13413ea9a877	334	*/
ganlikun	0:13413ea9a877	335	__STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	336	{
ganlikun	0:13413ea9a877	337	SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
ganlikun	0:13413ea9a877	338	}
ganlikun	0:13413ea9a877	339
ganlikun	0:13413ea9a877	340	/**
ganlikun	0:13413ea9a877	341	* @brief Disable the LPTIM instance
ganlikun	0:13413ea9a877	342	* @rmtoll CR ENABLE LL_LPTIM_Disable
ganlikun	0:13413ea9a877	343	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	344	* @retval None
ganlikun	0:13413ea9a877	345	*/
ganlikun	0:13413ea9a877	346	__STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	347	{
ganlikun	0:13413ea9a877	348	CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
ganlikun	0:13413ea9a877	349	}
ganlikun	0:13413ea9a877	350
ganlikun	0:13413ea9a877	351	/**
ganlikun	0:13413ea9a877	352	* @brief Indicates whether the LPTIM instance is enabled.
ganlikun	0:13413ea9a877	353	* @rmtoll CR ENABLE LL_LPTIM_IsEnabled
ganlikun	0:13413ea9a877	354	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	355	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	356	*/
ganlikun	0:13413ea9a877	357	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	358	{
ganlikun	0:13413ea9a877	359	return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
ganlikun	0:13413ea9a877	360	}
ganlikun	0:13413ea9a877	361
ganlikun	0:13413ea9a877	362	/**
ganlikun	0:13413ea9a877	363	* @brief Starts the LPTIM counter in the desired mode.
ganlikun	0:13413ea9a877	364	* @note LPTIM instance must be enabled before starting the counter.
ganlikun	0:13413ea9a877	365	* @note It is possible to change on the fly from One Shot mode to
ganlikun	0:13413ea9a877	366	* Continuous mode.
ganlikun	0:13413ea9a877	367	* @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
ganlikun	0:13413ea9a877	368	* CR SNGSTRT LL_LPTIM_StartCounter
ganlikun	0:13413ea9a877	369	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	370	* @param OperatingMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	371	* @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
ganlikun	0:13413ea9a877	372	* @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
ganlikun	0:13413ea9a877	373	* @retval None
ganlikun	0:13413ea9a877	374	*/
ganlikun	0:13413ea9a877	375	__STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
ganlikun	0:13413ea9a877	376	{
ganlikun	0:13413ea9a877	377	MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT \| LPTIM_CR_SNGSTRT, OperatingMode);
ganlikun	0:13413ea9a877	378	}
ganlikun	0:13413ea9a877	379
ganlikun	0:13413ea9a877	380
ganlikun	0:13413ea9a877	381	/**
ganlikun	0:13413ea9a877	382	* @brief Set the LPTIM registers update mode (enable/disable register preload)
ganlikun	0:13413ea9a877	383	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	384	* @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
ganlikun	0:13413ea9a877	385	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	386	* @param UpdateMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	387	* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
ganlikun	0:13413ea9a877	388	* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
ganlikun	0:13413ea9a877	389	* @retval None
ganlikun	0:13413ea9a877	390	*/
ganlikun	0:13413ea9a877	391	__STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
ganlikun	0:13413ea9a877	392	{
ganlikun	0:13413ea9a877	393	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
ganlikun	0:13413ea9a877	394	}
ganlikun	0:13413ea9a877	395
ganlikun	0:13413ea9a877	396	/**
ganlikun	0:13413ea9a877	397	* @brief Get the LPTIM registers update mode
ganlikun	0:13413ea9a877	398	* @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
ganlikun	0:13413ea9a877	399	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	400	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	401	* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
ganlikun	0:13413ea9a877	402	* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
ganlikun	0:13413ea9a877	403	*/
ganlikun	0:13413ea9a877	404	__STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	405	{
ganlikun	0:13413ea9a877	406	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
ganlikun	0:13413ea9a877	407	}
ganlikun	0:13413ea9a877	408
ganlikun	0:13413ea9a877	409	/**
ganlikun	0:13413ea9a877	410	* @brief Set the auto reload value
ganlikun	0:13413ea9a877	411	* @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
ganlikun	0:13413ea9a877	412	* @note After a write to the LPTIMx_ARR register a new write operation to the
ganlikun	0:13413ea9a877	413	* same register can only be performed when the previous write operation
ganlikun	0:13413ea9a877	414	* is completed. Any successive write before the ARROK flag be set, will
ganlikun	0:13413ea9a877	415	* lead to unpredictable results.
ganlikun	0:13413ea9a877	416	* @note autoreload value be strictly greater than the compare value.
ganlikun	0:13413ea9a877	417	* @rmtoll ARR ARR LL_LPTIM_SetAutoReload
ganlikun	0:13413ea9a877	418	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	419	* @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	420	* @retval None
ganlikun	0:13413ea9a877	421	*/
ganlikun	0:13413ea9a877	422	__STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
ganlikun	0:13413ea9a877	423	{
ganlikun	0:13413ea9a877	424	MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
ganlikun	0:13413ea9a877	425	}
ganlikun	0:13413ea9a877	426
ganlikun	0:13413ea9a877	427	/**
ganlikun	0:13413ea9a877	428	* @brief Get actual auto reload value
ganlikun	0:13413ea9a877	429	* @rmtoll ARR ARR LL_LPTIM_GetAutoReload
ganlikun	0:13413ea9a877	430	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	431	* @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	432	*/
ganlikun	0:13413ea9a877	433	__STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	434	{
ganlikun	0:13413ea9a877	435	return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
ganlikun	0:13413ea9a877	436	}
ganlikun	0:13413ea9a877	437
ganlikun	0:13413ea9a877	438	/**
ganlikun	0:13413ea9a877	439	* @brief Set the compare value
ganlikun	0:13413ea9a877	440	* @note After a write to the LPTIMx_CMP register a new write operation to the
ganlikun	0:13413ea9a877	441	* same register can only be performed when the previous write operation
ganlikun	0:13413ea9a877	442	* is completed. Any successive write before the CMPOK flag be set, will
ganlikun	0:13413ea9a877	443	* lead to unpredictable results.
ganlikun	0:13413ea9a877	444	* @rmtoll CMP CMP LL_LPTIM_SetCompare
ganlikun	0:13413ea9a877	445	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	446	* @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	447	* @retval None
ganlikun	0:13413ea9a877	448	*/
ganlikun	0:13413ea9a877	449	__STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
ganlikun	0:13413ea9a877	450	{
ganlikun	0:13413ea9a877	451	MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
ganlikun	0:13413ea9a877	452	}
ganlikun	0:13413ea9a877	453
ganlikun	0:13413ea9a877	454	/**
ganlikun	0:13413ea9a877	455	* @brief Get actual compare value
ganlikun	0:13413ea9a877	456	* @rmtoll CMP CMP LL_LPTIM_GetCompare
ganlikun	0:13413ea9a877	457	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	458	* @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	459	*/
ganlikun	0:13413ea9a877	460	__STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	461	{
ganlikun	0:13413ea9a877	462	return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
ganlikun	0:13413ea9a877	463	}
ganlikun	0:13413ea9a877	464
ganlikun	0:13413ea9a877	465	/**
ganlikun	0:13413ea9a877	466	* @brief Get actual counter value
ganlikun	0:13413ea9a877	467	* @note When the LPTIM instance is running with an asynchronous clock, reading
ganlikun	0:13413ea9a877	468	* the LPTIMx_CNT register may return unreliable values. So in this case
ganlikun	0:13413ea9a877	469	* it is necessary to perform two consecutive read accesses and verify
ganlikun	0:13413ea9a877	470	* that the two returned values are identical.
ganlikun	0:13413ea9a877	471	* @rmtoll CNT CNT LL_LPTIM_GetCounter
ganlikun	0:13413ea9a877	472	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	473	* @retval Counter value
ganlikun	0:13413ea9a877	474	*/
ganlikun	0:13413ea9a877	475	__STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	476	{
ganlikun	0:13413ea9a877	477	return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
ganlikun	0:13413ea9a877	478	}
ganlikun	0:13413ea9a877	479
ganlikun	0:13413ea9a877	480	/**
ganlikun	0:13413ea9a877	481	* @brief Set the counter mode (selection of the LPTIM counter clock source).
ganlikun	0:13413ea9a877	482	* @note The counter mode can be set only when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	483	* @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
ganlikun	0:13413ea9a877	484	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	485	* @param CounterMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	486	* @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
ganlikun	0:13413ea9a877	487	* @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
ganlikun	0:13413ea9a877	488	* @retval None
ganlikun	0:13413ea9a877	489	*/
ganlikun	0:13413ea9a877	490	__STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
ganlikun	0:13413ea9a877	491	{
ganlikun	0:13413ea9a877	492	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
ganlikun	0:13413ea9a877	493	}
ganlikun	0:13413ea9a877	494
ganlikun	0:13413ea9a877	495	/**
ganlikun	0:13413ea9a877	496	* @brief Get the counter mode
ganlikun	0:13413ea9a877	497	* @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
ganlikun	0:13413ea9a877	498	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	499	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	500	* @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
ganlikun	0:13413ea9a877	501	* @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
ganlikun	0:13413ea9a877	502	*/
ganlikun	0:13413ea9a877	503	__STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	504	{
ganlikun	0:13413ea9a877	505	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
ganlikun	0:13413ea9a877	506	}
ganlikun	0:13413ea9a877	507
ganlikun	0:13413ea9a877	508	/**
ganlikun	0:13413ea9a877	509	* @brief Configure the LPTIM instance output (LPTIMx_OUT)
ganlikun	0:13413ea9a877	510	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	511	* @note Regarding the LPTIM output polarity the change takes effect
ganlikun	0:13413ea9a877	512	* immediately, so the output default value will change immediately after
ganlikun	0:13413ea9a877	513	* the polarity is re-configured, even before the timer is enabled.
ganlikun	0:13413ea9a877	514	* @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
ganlikun	0:13413ea9a877	515	* CFGR WAVPOL LL_LPTIM_ConfigOutput
ganlikun	0:13413ea9a877	516	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	517	* @param Waveform This parameter can be one of the following values:
ganlikun	0:13413ea9a877	518	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
ganlikun	0:13413ea9a877	519	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
ganlikun	0:13413ea9a877	520	* @param Polarity This parameter can be one of the following values:
ganlikun	0:13413ea9a877	521	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
ganlikun	0:13413ea9a877	522	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
ganlikun	0:13413ea9a877	523	* @retval None
ganlikun	0:13413ea9a877	524	*/
ganlikun	0:13413ea9a877	525	__STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
ganlikun	0:13413ea9a877	526	{
ganlikun	0:13413ea9a877	527	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE \| LPTIM_CFGR_WAVPOL, Waveform \| Polarity);
ganlikun	0:13413ea9a877	528	}
ganlikun	0:13413ea9a877	529
ganlikun	0:13413ea9a877	530	/**
ganlikun	0:13413ea9a877	531	* @brief Set waveform shape
ganlikun	0:13413ea9a877	532	* @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
ganlikun	0:13413ea9a877	533	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	534	* @param Waveform This parameter can be one of the following values:
ganlikun	0:13413ea9a877	535	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
ganlikun	0:13413ea9a877	536	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
ganlikun	0:13413ea9a877	537	* @retval None
ganlikun	0:13413ea9a877	538	*/
ganlikun	0:13413ea9a877	539	__STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
ganlikun	0:13413ea9a877	540	{
ganlikun	0:13413ea9a877	541	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
ganlikun	0:13413ea9a877	542	}
ganlikun	0:13413ea9a877	543
ganlikun	0:13413ea9a877	544	/**
ganlikun	0:13413ea9a877	545	* @brief Get actual waveform shape
ganlikun	0:13413ea9a877	546	* @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
ganlikun	0:13413ea9a877	547	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	548	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	549	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
ganlikun	0:13413ea9a877	550	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
ganlikun	0:13413ea9a877	551	*/
ganlikun	0:13413ea9a877	552	__STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	553	{
ganlikun	0:13413ea9a877	554	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
ganlikun	0:13413ea9a877	555	}
ganlikun	0:13413ea9a877	556
ganlikun	0:13413ea9a877	557	/**
ganlikun	0:13413ea9a877	558	* @brief Set output polarity
ganlikun	0:13413ea9a877	559	* @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
ganlikun	0:13413ea9a877	560	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	561	* @param Polarity This parameter can be one of the following values:
ganlikun	0:13413ea9a877	562	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
ganlikun	0:13413ea9a877	563	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
ganlikun	0:13413ea9a877	564	* @retval None
ganlikun	0:13413ea9a877	565	*/
ganlikun	0:13413ea9a877	566	__STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
ganlikun	0:13413ea9a877	567	{
ganlikun	0:13413ea9a877	568	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
ganlikun	0:13413ea9a877	569	}
ganlikun	0:13413ea9a877	570
ganlikun	0:13413ea9a877	571	/**
ganlikun	0:13413ea9a877	572	* @brief Get actual output polarity
ganlikun	0:13413ea9a877	573	* @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
ganlikun	0:13413ea9a877	574	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	575	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	576	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
ganlikun	0:13413ea9a877	577	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
ganlikun	0:13413ea9a877	578	*/
ganlikun	0:13413ea9a877	579	__STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	580	{
ganlikun	0:13413ea9a877	581	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
ganlikun	0:13413ea9a877	582	}
ganlikun	0:13413ea9a877	583
ganlikun	0:13413ea9a877	584	/**
ganlikun	0:13413ea9a877	585	* @brief Set actual prescaler division ratio.
ganlikun	0:13413ea9a877	586	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	587	* @note When the LPTIM is configured to be clocked by an internal clock source
ganlikun	0:13413ea9a877	588	* and the LPTIM counter is configured to be updated by active edges
ganlikun	0:13413ea9a877	589	* detected on the LPTIM external Input1, the internal clock provided to
ganlikun	0:13413ea9a877	590	* the LPTIM must be not be prescaled.
ganlikun	0:13413ea9a877	591	* @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
ganlikun	0:13413ea9a877	592	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	593	* @param Prescaler This parameter can be one of the following values:
ganlikun	0:13413ea9a877	594	* @arg @ref LL_LPTIM_PRESCALER_DIV1
ganlikun	0:13413ea9a877	595	* @arg @ref LL_LPTIM_PRESCALER_DIV2
ganlikun	0:13413ea9a877	596	* @arg @ref LL_LPTIM_PRESCALER_DIV4
ganlikun	0:13413ea9a877	597	* @arg @ref LL_LPTIM_PRESCALER_DIV8
ganlikun	0:13413ea9a877	598	* @arg @ref LL_LPTIM_PRESCALER_DIV16
ganlikun	0:13413ea9a877	599	* @arg @ref LL_LPTIM_PRESCALER_DIV32
ganlikun	0:13413ea9a877	600	* @arg @ref LL_LPTIM_PRESCALER_DIV64
ganlikun	0:13413ea9a877	601	* @arg @ref LL_LPTIM_PRESCALER_DIV128
ganlikun	0:13413ea9a877	602	* @retval None
ganlikun	0:13413ea9a877	603	*/
ganlikun	0:13413ea9a877	604	__STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
ganlikun	0:13413ea9a877	605	{
ganlikun	0:13413ea9a877	606	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
ganlikun	0:13413ea9a877	607	}
ganlikun	0:13413ea9a877	608
ganlikun	0:13413ea9a877	609	/**
ganlikun	0:13413ea9a877	610	* @brief Get actual prescaler division ratio.
ganlikun	0:13413ea9a877	611	* @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
ganlikun	0:13413ea9a877	612	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	613	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	614	* @arg @ref LL_LPTIM_PRESCALER_DIV1
ganlikun	0:13413ea9a877	615	* @arg @ref LL_LPTIM_PRESCALER_DIV2
ganlikun	0:13413ea9a877	616	* @arg @ref LL_LPTIM_PRESCALER_DIV4
ganlikun	0:13413ea9a877	617	* @arg @ref LL_LPTIM_PRESCALER_DIV8
ganlikun	0:13413ea9a877	618	* @arg @ref LL_LPTIM_PRESCALER_DIV16
ganlikun	0:13413ea9a877	619	* @arg @ref LL_LPTIM_PRESCALER_DIV32
ganlikun	0:13413ea9a877	620	* @arg @ref LL_LPTIM_PRESCALER_DIV64
ganlikun	0:13413ea9a877	621	* @arg @ref LL_LPTIM_PRESCALER_DIV128
ganlikun	0:13413ea9a877	622	*/
ganlikun	0:13413ea9a877	623	__STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	624	{
ganlikun	0:13413ea9a877	625	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
ganlikun	0:13413ea9a877	626	}
ganlikun	0:13413ea9a877	627
ganlikun	0:13413ea9a877	628
ganlikun	0:13413ea9a877	629	/**
ganlikun	0:13413ea9a877	630	* @}
ganlikun	0:13413ea9a877	631	*/
ganlikun	0:13413ea9a877	632
ganlikun	0:13413ea9a877	633	/** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
ganlikun	0:13413ea9a877	634	* @{
ganlikun	0:13413ea9a877	635	*/
ganlikun	0:13413ea9a877	636
ganlikun	0:13413ea9a877	637	/**
ganlikun	0:13413ea9a877	638	* @brief Enable the timeout function
ganlikun	0:13413ea9a877	639	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	640	* @note The first trigger event will start the timer, any successive trigger
ganlikun	0:13413ea9a877	641	* event will reset the counter and the timer will restart.
ganlikun	0:13413ea9a877	642	* @note The timeout value corresponds to the compare value; if no trigger
ganlikun	0:13413ea9a877	643	* occurs within the expected time frame, the MCU is waked-up by the
ganlikun	0:13413ea9a877	644	* compare match event.
ganlikun	0:13413ea9a877	645	* @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
ganlikun	0:13413ea9a877	646	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	647	* @retval None
ganlikun	0:13413ea9a877	648	*/
ganlikun	0:13413ea9a877	649	__STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	650	{
ganlikun	0:13413ea9a877	651	SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
ganlikun	0:13413ea9a877	652	}
ganlikun	0:13413ea9a877	653
ganlikun	0:13413ea9a877	654	/**
ganlikun	0:13413ea9a877	655	* @brief Disable the timeout function
ganlikun	0:13413ea9a877	656	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	657	* @note A trigger event arriving when the timer is already started will be
ganlikun	0:13413ea9a877	658	* ignored.
ganlikun	0:13413ea9a877	659	* @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
ganlikun	0:13413ea9a877	660	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	661	* @retval None
ganlikun	0:13413ea9a877	662	*/
ganlikun	0:13413ea9a877	663	__STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	664	{
ganlikun	0:13413ea9a877	665	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
ganlikun	0:13413ea9a877	666	}
ganlikun	0:13413ea9a877	667
ganlikun	0:13413ea9a877	668	/**
ganlikun	0:13413ea9a877	669	* @brief Indicate whether the timeout function is enabled.
ganlikun	0:13413ea9a877	670	* @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
ganlikun	0:13413ea9a877	671	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	672	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	673	*/
ganlikun	0:13413ea9a877	674	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	675	{
ganlikun	0:13413ea9a877	676	return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
ganlikun	0:13413ea9a877	677	}
ganlikun	0:13413ea9a877	678
ganlikun	0:13413ea9a877	679	/**
ganlikun	0:13413ea9a877	680	* @brief Start the LPTIM counter
ganlikun	0:13413ea9a877	681	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	682	* @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
ganlikun	0:13413ea9a877	683	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	684	* @retval None
ganlikun	0:13413ea9a877	685	*/
ganlikun	0:13413ea9a877	686	__STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	687	{
ganlikun	0:13413ea9a877	688	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
ganlikun	0:13413ea9a877	689	}
ganlikun	0:13413ea9a877	690
ganlikun	0:13413ea9a877	691	/**
ganlikun	0:13413ea9a877	692	* @brief Configure the external trigger used as a trigger event for the LPTIM.
ganlikun	0:13413ea9a877	693	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	694	* @note An internal clock source must be present when a digital filter is
ganlikun	0:13413ea9a877	695	* required for the trigger.
ganlikun	0:13413ea9a877	696	* @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
ganlikun	0:13413ea9a877	697	* CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
ganlikun	0:13413ea9a877	698	* CFGR TRIGEN LL_LPTIM_ConfigTrigger
ganlikun	0:13413ea9a877	699	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	700	* @param Source This parameter can be one of the following values:
ganlikun	0:13413ea9a877	701	* @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
ganlikun	0:13413ea9a877	702	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
ganlikun	0:13413ea9a877	703	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
ganlikun	0:13413ea9a877	704	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
ganlikun	0:13413ea9a877	705	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
ganlikun	0:13413ea9a877	706	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
ganlikun	0:13413ea9a877	707	* @param Filter This parameter can be one of the following values:
ganlikun	0:13413ea9a877	708	* @arg @ref LL_LPTIM_TRIG_FILTER_NONE
ganlikun	0:13413ea9a877	709	* @arg @ref LL_LPTIM_TRIG_FILTER_2
ganlikun	0:13413ea9a877	710	* @arg @ref LL_LPTIM_TRIG_FILTER_4
ganlikun	0:13413ea9a877	711	* @arg @ref LL_LPTIM_TRIG_FILTER_8
ganlikun	0:13413ea9a877	712	* @param Polarity This parameter can be one of the following values:
ganlikun	0:13413ea9a877	713	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
ganlikun	0:13413ea9a877	714	* @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
ganlikun	0:13413ea9a877	715	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
ganlikun	0:13413ea9a877	716	* (*) value not defined in all devices.
ganlikun	0:13413ea9a877	717	* @retval None
ganlikun	0:13413ea9a877	718	*/
ganlikun	0:13413ea9a877	719	__STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
ganlikun	0:13413ea9a877	720	{
ganlikun	0:13413ea9a877	721	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL \| LPTIM_CFGR_TRGFLT \| LPTIM_CFGR_TRIGEN, Source \| Filter \| Polarity);
ganlikun	0:13413ea9a877	722	}
ganlikun	0:13413ea9a877	723
ganlikun	0:13413ea9a877	724	/**
ganlikun	0:13413ea9a877	725	* @brief Get actual external trigger source.
ganlikun	0:13413ea9a877	726	* @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
ganlikun	0:13413ea9a877	727	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	728	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	729	* @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
ganlikun	0:13413ea9a877	730	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
ganlikun	0:13413ea9a877	731	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
ganlikun	0:13413ea9a877	732	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
ganlikun	0:13413ea9a877	733	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
ganlikun	0:13413ea9a877	734	* @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
ganlikun	0:13413ea9a877	735	*/
ganlikun	0:13413ea9a877	736	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	737	{
ganlikun	0:13413ea9a877	738	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
ganlikun	0:13413ea9a877	739	}
ganlikun	0:13413ea9a877	740
ganlikun	0:13413ea9a877	741	/**
ganlikun	0:13413ea9a877	742	* @brief Get actual external trigger filter.
ganlikun	0:13413ea9a877	743	* @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
ganlikun	0:13413ea9a877	744	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	745	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	746	* @arg @ref LL_LPTIM_TRIG_FILTER_NONE
ganlikun	0:13413ea9a877	747	* @arg @ref LL_LPTIM_TRIG_FILTER_2
ganlikun	0:13413ea9a877	748	* @arg @ref LL_LPTIM_TRIG_FILTER_4
ganlikun	0:13413ea9a877	749	* @arg @ref LL_LPTIM_TRIG_FILTER_8
ganlikun	0:13413ea9a877	750	*/
ganlikun	0:13413ea9a877	751	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	752	{
ganlikun	0:13413ea9a877	753	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
ganlikun	0:13413ea9a877	754	}
ganlikun	0:13413ea9a877	755
ganlikun	0:13413ea9a877	756	/**
ganlikun	0:13413ea9a877	757	* @brief Get actual external trigger polarity.
ganlikun	0:13413ea9a877	758	* @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
ganlikun	0:13413ea9a877	759	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	760	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	761	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
ganlikun	0:13413ea9a877	762	* @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
ganlikun	0:13413ea9a877	763	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
ganlikun	0:13413ea9a877	764	*/
ganlikun	0:13413ea9a877	765	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	766	{
ganlikun	0:13413ea9a877	767	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
ganlikun	0:13413ea9a877	768	}
ganlikun	0:13413ea9a877	769
ganlikun	0:13413ea9a877	770	/**
ganlikun	0:13413ea9a877	771	* @}
ganlikun	0:13413ea9a877	772	*/
ganlikun	0:13413ea9a877	773
ganlikun	0:13413ea9a877	774	/** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
ganlikun	0:13413ea9a877	775	* @{
ganlikun	0:13413ea9a877	776	*/
ganlikun	0:13413ea9a877	777
ganlikun	0:13413ea9a877	778	/**
ganlikun	0:13413ea9a877	779	* @brief Set the source of the clock used by the LPTIM instance.
ganlikun	0:13413ea9a877	780	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	781	* @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
ganlikun	0:13413ea9a877	782	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	783	* @param ClockSource This parameter can be one of the following values:
ganlikun	0:13413ea9a877	784	* @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
ganlikun	0:13413ea9a877	785	* @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
ganlikun	0:13413ea9a877	786	* @retval None
ganlikun	0:13413ea9a877	787	*/
ganlikun	0:13413ea9a877	788	__STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
ganlikun	0:13413ea9a877	789	{
ganlikun	0:13413ea9a877	790	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
ganlikun	0:13413ea9a877	791	}
ganlikun	0:13413ea9a877	792
ganlikun	0:13413ea9a877	793	/**
ganlikun	0:13413ea9a877	794	* @brief Get actual LPTIM instance clock source.
ganlikun	0:13413ea9a877	795	* @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
ganlikun	0:13413ea9a877	796	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	797	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	798	* @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
ganlikun	0:13413ea9a877	799	* @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
ganlikun	0:13413ea9a877	800	*/
ganlikun	0:13413ea9a877	801	__STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	802	{
ganlikun	0:13413ea9a877	803	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
ganlikun	0:13413ea9a877	804	}
ganlikun	0:13413ea9a877	805
ganlikun	0:13413ea9a877	806	/**
ganlikun	0:13413ea9a877	807	* @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
ganlikun	0:13413ea9a877	808	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	809	* @note When both external clock signal edges are considered active ones,
ganlikun	0:13413ea9a877	810	* the LPTIM must also be clocked by an internal clock source with a
ganlikun	0:13413ea9a877	811	* frequency equal to at least four times the external clock frequency.
ganlikun	0:13413ea9a877	812	* @note An internal clock source must be present when a digital filter is
ganlikun	0:13413ea9a877	813	* required for external clock.
ganlikun	0:13413ea9a877	814	* @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
ganlikun	0:13413ea9a877	815	* CFGR CKPOL LL_LPTIM_ConfigClock
ganlikun	0:13413ea9a877	816	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	817	* @param ClockFilter This parameter can be one of the following values:
ganlikun	0:13413ea9a877	818	* @arg @ref LL_LPTIM_CLK_FILTER_NONE
ganlikun	0:13413ea9a877	819	* @arg @ref LL_LPTIM_CLK_FILTER_2
ganlikun	0:13413ea9a877	820	* @arg @ref LL_LPTIM_CLK_FILTER_4
ganlikun	0:13413ea9a877	821	* @arg @ref LL_LPTIM_CLK_FILTER_8
ganlikun	0:13413ea9a877	822	* @param ClockPolarity This parameter can be one of the following values:
ganlikun	0:13413ea9a877	823	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING
ganlikun	0:13413ea9a877	824	* @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
ganlikun	0:13413ea9a877	825	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
ganlikun	0:13413ea9a877	826	* @retval None
ganlikun	0:13413ea9a877	827	*/
ganlikun	0:13413ea9a877	828	__STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
ganlikun	0:13413ea9a877	829	{
ganlikun	0:13413ea9a877	830	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT \| LPTIM_CFGR_CKPOL, ClockFilter \| ClockPolarity);
ganlikun	0:13413ea9a877	831	}
ganlikun	0:13413ea9a877	832
ganlikun	0:13413ea9a877	833	/**
ganlikun	0:13413ea9a877	834	* @brief Get actual clock polarity
ganlikun	0:13413ea9a877	835	* @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
ganlikun	0:13413ea9a877	836	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	837	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	838	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING
ganlikun	0:13413ea9a877	839	* @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
ganlikun	0:13413ea9a877	840	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
ganlikun	0:13413ea9a877	841	*/
ganlikun	0:13413ea9a877	842	__STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	843	{
ganlikun	0:13413ea9a877	844	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
ganlikun	0:13413ea9a877	845	}
ganlikun	0:13413ea9a877	846
ganlikun	0:13413ea9a877	847	/**
ganlikun	0:13413ea9a877	848	* @brief Get actual clock digital filter
ganlikun	0:13413ea9a877	849	* @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
ganlikun	0:13413ea9a877	850	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	851	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	852	* @arg @ref LL_LPTIM_CLK_FILTER_NONE
ganlikun	0:13413ea9a877	853	* @arg @ref LL_LPTIM_CLK_FILTER_2
ganlikun	0:13413ea9a877	854	* @arg @ref LL_LPTIM_CLK_FILTER_4
ganlikun	0:13413ea9a877	855	* @arg @ref LL_LPTIM_CLK_FILTER_8
ganlikun	0:13413ea9a877	856	*/
ganlikun	0:13413ea9a877	857	__STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	858	{
ganlikun	0:13413ea9a877	859	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
ganlikun	0:13413ea9a877	860	}
ganlikun	0:13413ea9a877	861
ganlikun	0:13413ea9a877	862	/**
ganlikun	0:13413ea9a877	863	* @}
ganlikun	0:13413ea9a877	864	*/
ganlikun	0:13413ea9a877	865
ganlikun	0:13413ea9a877	866	/** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
ganlikun	0:13413ea9a877	867	* @{
ganlikun	0:13413ea9a877	868	*/
ganlikun	0:13413ea9a877	869
ganlikun	0:13413ea9a877	870	/**
ganlikun	0:13413ea9a877	871	* @brief Configure the encoder mode.
ganlikun	0:13413ea9a877	872	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	873	* @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
ganlikun	0:13413ea9a877	874	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	875	* @param EncoderMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	876	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING
ganlikun	0:13413ea9a877	877	* @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
ganlikun	0:13413ea9a877	878	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
ganlikun	0:13413ea9a877	879	* @retval None
ganlikun	0:13413ea9a877	880	*/
ganlikun	0:13413ea9a877	881	__STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
ganlikun	0:13413ea9a877	882	{
ganlikun	0:13413ea9a877	883	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
ganlikun	0:13413ea9a877	884	}
ganlikun	0:13413ea9a877	885
ganlikun	0:13413ea9a877	886	/**
ganlikun	0:13413ea9a877	887	* @brief Get actual encoder mode.
ganlikun	0:13413ea9a877	888	* @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
ganlikun	0:13413ea9a877	889	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	890	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	891	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING
ganlikun	0:13413ea9a877	892	* @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
ganlikun	0:13413ea9a877	893	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
ganlikun	0:13413ea9a877	894	*/
ganlikun	0:13413ea9a877	895	__STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	896	{
ganlikun	0:13413ea9a877	897	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
ganlikun	0:13413ea9a877	898	}
ganlikun	0:13413ea9a877	899
ganlikun	0:13413ea9a877	900	/**
ganlikun	0:13413ea9a877	901	* @brief Enable the encoder mode
ganlikun	0:13413ea9a877	902	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	903	* @note In this mode the LPTIM instance must be clocked by an internal clock
ganlikun	0:13413ea9a877	904	* source. Also, the prescaler division ratio must be equal to 1.
ganlikun	0:13413ea9a877	905	* @note LPTIM instance must be configured in continuous mode prior enabling
ganlikun	0:13413ea9a877	906	* the encoder mode.
ganlikun	0:13413ea9a877	907	* @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
ganlikun	0:13413ea9a877	908	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	909	* @retval None
ganlikun	0:13413ea9a877	910	*/
ganlikun	0:13413ea9a877	911	__STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	912	{
ganlikun	0:13413ea9a877	913	SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
ganlikun	0:13413ea9a877	914	}
ganlikun	0:13413ea9a877	915
ganlikun	0:13413ea9a877	916	/**
ganlikun	0:13413ea9a877	917	* @brief Disable the encoder mode
ganlikun	0:13413ea9a877	918	* @note This function must be called when the LPTIM instance is disabled.
ganlikun	0:13413ea9a877	919	* @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
ganlikun	0:13413ea9a877	920	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	921	* @retval None
ganlikun	0:13413ea9a877	922	*/
ganlikun	0:13413ea9a877	923	__STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	924	{
ganlikun	0:13413ea9a877	925	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
ganlikun	0:13413ea9a877	926	}
ganlikun	0:13413ea9a877	927
ganlikun	0:13413ea9a877	928	/**
ganlikun	0:13413ea9a877	929	* @brief Indicates whether the LPTIM operates in encoder mode.
ganlikun	0:13413ea9a877	930	* @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
ganlikun	0:13413ea9a877	931	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	932	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	933	*/
ganlikun	0:13413ea9a877	934	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	935	{
ganlikun	0:13413ea9a877	936	return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
ganlikun	0:13413ea9a877	937	}
ganlikun	0:13413ea9a877	938
ganlikun	0:13413ea9a877	939	/**
ganlikun	0:13413ea9a877	940	* @}
ganlikun	0:13413ea9a877	941	*/
ganlikun	0:13413ea9a877	942
ganlikun	0:13413ea9a877	943	/** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
ganlikun	0:13413ea9a877	944	* @{
ganlikun	0:13413ea9a877	945	*/
ganlikun	0:13413ea9a877	946
ganlikun	0:13413ea9a877	947	/**
ganlikun	0:13413ea9a877	948	* @brief Clear the compare match flag (CMPMCF)
ganlikun	0:13413ea9a877	949	* @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
ganlikun	0:13413ea9a877	950	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	951	* @retval None
ganlikun	0:13413ea9a877	952	*/
ganlikun	0:13413ea9a877	953	__STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	954	{
ganlikun	0:13413ea9a877	955	SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
ganlikun	0:13413ea9a877	956	}
ganlikun	0:13413ea9a877	957
ganlikun	0:13413ea9a877	958	/**
ganlikun	0:13413ea9a877	959	* @brief Inform application whether a compare match interrupt has occurred.
ganlikun	0:13413ea9a877	960	* @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
ganlikun	0:13413ea9a877	961	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	962	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	963	*/
ganlikun	0:13413ea9a877	964	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	965	{
ganlikun	0:13413ea9a877	966	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
ganlikun	0:13413ea9a877	967	}
ganlikun	0:13413ea9a877	968
ganlikun	0:13413ea9a877	969	/**
ganlikun	0:13413ea9a877	970	* @brief Clear the autoreload match flag (ARRMCF)
ganlikun	0:13413ea9a877	971	* @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
ganlikun	0:13413ea9a877	972	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	973	* @retval None
ganlikun	0:13413ea9a877	974	*/
ganlikun	0:13413ea9a877	975	__STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	976	{
ganlikun	0:13413ea9a877	977	SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
ganlikun	0:13413ea9a877	978	}
ganlikun	0:13413ea9a877	979
ganlikun	0:13413ea9a877	980	/**
ganlikun	0:13413ea9a877	981	* @brief Inform application whether a autoreload match interrupt has occured.
ganlikun	0:13413ea9a877	982	* @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
ganlikun	0:13413ea9a877	983	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	984	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	985	*/
ganlikun	0:13413ea9a877	986	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	987	{
ganlikun	0:13413ea9a877	988	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
ganlikun	0:13413ea9a877	989	}
ganlikun	0:13413ea9a877	990
ganlikun	0:13413ea9a877	991	/**
ganlikun	0:13413ea9a877	992	* @brief Clear the external trigger valid edge flag(EXTTRIGCF).
ganlikun	0:13413ea9a877	993	* @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
ganlikun	0:13413ea9a877	994	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	995	* @retval None
ganlikun	0:13413ea9a877	996	*/
ganlikun	0:13413ea9a877	997	__STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	998	{
ganlikun	0:13413ea9a877	999	SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
ganlikun	0:13413ea9a877	1000	}
ganlikun	0:13413ea9a877	1001
ganlikun	0:13413ea9a877	1002	/**
ganlikun	0:13413ea9a877	1003	* @brief Inform application whether a valid edge on the selected external trigger input has occurred.
ganlikun	0:13413ea9a877	1004	* @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
ganlikun	0:13413ea9a877	1005	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1006	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1007	*/
ganlikun	0:13413ea9a877	1008	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1009	{
ganlikun	0:13413ea9a877	1010	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
ganlikun	0:13413ea9a877	1011	}
ganlikun	0:13413ea9a877	1012
ganlikun	0:13413ea9a877	1013	/**
ganlikun	0:13413ea9a877	1014	* @brief Clear the compare register update interrupt flag (CMPOKCF).
ganlikun	0:13413ea9a877	1015	* @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
ganlikun	0:13413ea9a877	1016	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1017	* @retval None
ganlikun	0:13413ea9a877	1018	*/
ganlikun	0:13413ea9a877	1019	__STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1020	{
ganlikun	0:13413ea9a877	1021	SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
ganlikun	0:13413ea9a877	1022	}
ganlikun	0:13413ea9a877	1023
ganlikun	0:13413ea9a877	1024	/**
ganlikun	0:13413ea9a877	1025	* @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
ganlikun	0:13413ea9a877	1026	* @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
ganlikun	0:13413ea9a877	1027	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1028	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1029	*/
ganlikun	0:13413ea9a877	1030	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1031	{
ganlikun	0:13413ea9a877	1032	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
ganlikun	0:13413ea9a877	1033	}
ganlikun	0:13413ea9a877	1034
ganlikun	0:13413ea9a877	1035	/**
ganlikun	0:13413ea9a877	1036	* @brief Clear the autoreload register update interrupt flag (ARROKCF).
ganlikun	0:13413ea9a877	1037	* @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
ganlikun	0:13413ea9a877	1038	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1039	* @retval None
ganlikun	0:13413ea9a877	1040	*/
ganlikun	0:13413ea9a877	1041	__STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1042	{
ganlikun	0:13413ea9a877	1043	SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
ganlikun	0:13413ea9a877	1044	}
ganlikun	0:13413ea9a877	1045
ganlikun	0:13413ea9a877	1046	/**
ganlikun	0:13413ea9a877	1047	* @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
ganlikun	0:13413ea9a877	1048	* @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
ganlikun	0:13413ea9a877	1049	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1050	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1051	*/
ganlikun	0:13413ea9a877	1052	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1053	{
ganlikun	0:13413ea9a877	1054	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
ganlikun	0:13413ea9a877	1055	}
ganlikun	0:13413ea9a877	1056
ganlikun	0:13413ea9a877	1057	/**
ganlikun	0:13413ea9a877	1058	* @brief Clear the counter direction change to up interrupt flag (UPCF).
ganlikun	0:13413ea9a877	1059	* @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
ganlikun	0:13413ea9a877	1060	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1061	* @retval None
ganlikun	0:13413ea9a877	1062	*/
ganlikun	0:13413ea9a877	1063	__STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1064	{
ganlikun	0:13413ea9a877	1065	SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
ganlikun	0:13413ea9a877	1066	}
ganlikun	0:13413ea9a877	1067
ganlikun	0:13413ea9a877	1068	/**
ganlikun	0:13413ea9a877	1069	* @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
ganlikun	0:13413ea9a877	1070	* @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
ganlikun	0:13413ea9a877	1071	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1072	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1073	*/
ganlikun	0:13413ea9a877	1074	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1075	{
ganlikun	0:13413ea9a877	1076	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
ganlikun	0:13413ea9a877	1077	}
ganlikun	0:13413ea9a877	1078
ganlikun	0:13413ea9a877	1079	/**
ganlikun	0:13413ea9a877	1080	* @brief Clear the counter direction change to down interrupt flag (DOWNCF).
ganlikun	0:13413ea9a877	1081	* @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
ganlikun	0:13413ea9a877	1082	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1083	* @retval None
ganlikun	0:13413ea9a877	1084	*/
ganlikun	0:13413ea9a877	1085	__STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1086	{
ganlikun	0:13413ea9a877	1087	SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
ganlikun	0:13413ea9a877	1088	}
ganlikun	0:13413ea9a877	1089
ganlikun	0:13413ea9a877	1090	/**
ganlikun	0:13413ea9a877	1091	* @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
ganlikun	0:13413ea9a877	1092	* @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
ganlikun	0:13413ea9a877	1093	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1094	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1095	*/
ganlikun	0:13413ea9a877	1096	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1097	{
ganlikun	0:13413ea9a877	1098	return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
ganlikun	0:13413ea9a877	1099	}
ganlikun	0:13413ea9a877	1100
ganlikun	0:13413ea9a877	1101	/**
ganlikun	0:13413ea9a877	1102	* @}
ganlikun	0:13413ea9a877	1103	*/
ganlikun	0:13413ea9a877	1104
ganlikun	0:13413ea9a877	1105	/** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
ganlikun	0:13413ea9a877	1106	* @{
ganlikun	0:13413ea9a877	1107	*/
ganlikun	0:13413ea9a877	1108
ganlikun	0:13413ea9a877	1109	/**
ganlikun	0:13413ea9a877	1110	* @brief Enable compare match interrupt (CMPMIE).
ganlikun	0:13413ea9a877	1111	* @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
ganlikun	0:13413ea9a877	1112	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1113	* @retval None
ganlikun	0:13413ea9a877	1114	*/
ganlikun	0:13413ea9a877	1115	__STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1116	{
ganlikun	0:13413ea9a877	1117	SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
ganlikun	0:13413ea9a877	1118	}
ganlikun	0:13413ea9a877	1119
ganlikun	0:13413ea9a877	1120	/**
ganlikun	0:13413ea9a877	1121	* @brief Disable compare match interrupt (CMPMIE).
ganlikun	0:13413ea9a877	1122	* @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
ganlikun	0:13413ea9a877	1123	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1124	* @retval None
ganlikun	0:13413ea9a877	1125	*/
ganlikun	0:13413ea9a877	1126	__STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1127	{
ganlikun	0:13413ea9a877	1128	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
ganlikun	0:13413ea9a877	1129	}
ganlikun	0:13413ea9a877	1130
ganlikun	0:13413ea9a877	1131	/**
ganlikun	0:13413ea9a877	1132	* @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
ganlikun	0:13413ea9a877	1133	* @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
ganlikun	0:13413ea9a877	1134	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1135	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1136	*/
ganlikun	0:13413ea9a877	1137	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1138	{
ganlikun	0:13413ea9a877	1139	return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
ganlikun	0:13413ea9a877	1140	}
ganlikun	0:13413ea9a877	1141
ganlikun	0:13413ea9a877	1142	/**
ganlikun	0:13413ea9a877	1143	* @brief Enable autoreload match interrupt (ARRMIE).
ganlikun	0:13413ea9a877	1144	* @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
ganlikun	0:13413ea9a877	1145	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1146	* @retval None
ganlikun	0:13413ea9a877	1147	*/
ganlikun	0:13413ea9a877	1148	__STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1149	{
ganlikun	0:13413ea9a877	1150	SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
ganlikun	0:13413ea9a877	1151	}
ganlikun	0:13413ea9a877	1152
ganlikun	0:13413ea9a877	1153	/**
ganlikun	0:13413ea9a877	1154	* @brief Disable autoreload match interrupt (ARRMIE).
ganlikun	0:13413ea9a877	1155	* @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
ganlikun	0:13413ea9a877	1156	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1157	* @retval None
ganlikun	0:13413ea9a877	1158	*/
ganlikun	0:13413ea9a877	1159	__STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1160	{
ganlikun	0:13413ea9a877	1161	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
ganlikun	0:13413ea9a877	1162	}
ganlikun	0:13413ea9a877	1163
ganlikun	0:13413ea9a877	1164	/**
ganlikun	0:13413ea9a877	1165	* @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
ganlikun	0:13413ea9a877	1166	* @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
ganlikun	0:13413ea9a877	1167	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1168	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1169	*/
ganlikun	0:13413ea9a877	1170	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1171	{
ganlikun	0:13413ea9a877	1172	return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
ganlikun	0:13413ea9a877	1173	}
ganlikun	0:13413ea9a877	1174
ganlikun	0:13413ea9a877	1175	/**
ganlikun	0:13413ea9a877	1176	* @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
ganlikun	0:13413ea9a877	1177	* @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
ganlikun	0:13413ea9a877	1178	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1179	* @retval None
ganlikun	0:13413ea9a877	1180	*/
ganlikun	0:13413ea9a877	1181	__STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1182	{
ganlikun	0:13413ea9a877	1183	SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
ganlikun	0:13413ea9a877	1184	}
ganlikun	0:13413ea9a877	1185
ganlikun	0:13413ea9a877	1186	/**
ganlikun	0:13413ea9a877	1187	* @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
ganlikun	0:13413ea9a877	1188	* @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
ganlikun	0:13413ea9a877	1189	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1190	* @retval None
ganlikun	0:13413ea9a877	1191	*/
ganlikun	0:13413ea9a877	1192	__STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1193	{
ganlikun	0:13413ea9a877	1194	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
ganlikun	0:13413ea9a877	1195	}
ganlikun	0:13413ea9a877	1196
ganlikun	0:13413ea9a877	1197	/**
ganlikun	0:13413ea9a877	1198	* @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
ganlikun	0:13413ea9a877	1199	* @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
ganlikun	0:13413ea9a877	1200	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1201	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1202	*/
ganlikun	0:13413ea9a877	1203	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1204	{
ganlikun	0:13413ea9a877	1205	return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
ganlikun	0:13413ea9a877	1206	}
ganlikun	0:13413ea9a877	1207
ganlikun	0:13413ea9a877	1208	/**
ganlikun	0:13413ea9a877	1209	* @brief Enable compare register write completed interrupt (CMPOKIE).
ganlikun	0:13413ea9a877	1210	* @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
ganlikun	0:13413ea9a877	1211	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1212	* @retval None
ganlikun	0:13413ea9a877	1213	*/
ganlikun	0:13413ea9a877	1214	__STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1215	{
ganlikun	0:13413ea9a877	1216	SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
ganlikun	0:13413ea9a877	1217	}
ganlikun	0:13413ea9a877	1218
ganlikun	0:13413ea9a877	1219	/**
ganlikun	0:13413ea9a877	1220	* @brief Disable compare register write completed interrupt (CMPOKIE).
ganlikun	0:13413ea9a877	1221	* @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
ganlikun	0:13413ea9a877	1222	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1223	* @retval None
ganlikun	0:13413ea9a877	1224	*/
ganlikun	0:13413ea9a877	1225	__STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1226	{
ganlikun	0:13413ea9a877	1227	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
ganlikun	0:13413ea9a877	1228	}
ganlikun	0:13413ea9a877	1229
ganlikun	0:13413ea9a877	1230	/**
ganlikun	0:13413ea9a877	1231	* @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
ganlikun	0:13413ea9a877	1232	* @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
ganlikun	0:13413ea9a877	1233	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1234	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1235	*/
ganlikun	0:13413ea9a877	1236	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1237	{
ganlikun	0:13413ea9a877	1238	return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
ganlikun	0:13413ea9a877	1239	}
ganlikun	0:13413ea9a877	1240
ganlikun	0:13413ea9a877	1241	/**
ganlikun	0:13413ea9a877	1242	* @brief Enable autoreload register write completed interrupt (ARROKIE).
ganlikun	0:13413ea9a877	1243	* @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
ganlikun	0:13413ea9a877	1244	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1245	* @retval None
ganlikun	0:13413ea9a877	1246	*/
ganlikun	0:13413ea9a877	1247	__STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1248	{
ganlikun	0:13413ea9a877	1249	SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
ganlikun	0:13413ea9a877	1250	}
ganlikun	0:13413ea9a877	1251
ganlikun	0:13413ea9a877	1252	/**
ganlikun	0:13413ea9a877	1253	* @brief Disable autoreload register write completed interrupt (ARROKIE).
ganlikun	0:13413ea9a877	1254	* @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
ganlikun	0:13413ea9a877	1255	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1256	* @retval None
ganlikun	0:13413ea9a877	1257	*/
ganlikun	0:13413ea9a877	1258	__STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1259	{
ganlikun	0:13413ea9a877	1260	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
ganlikun	0:13413ea9a877	1261	}
ganlikun	0:13413ea9a877	1262
ganlikun	0:13413ea9a877	1263	/**
ganlikun	0:13413ea9a877	1264	* @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
ganlikun	0:13413ea9a877	1265	* @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
ganlikun	0:13413ea9a877	1266	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1267	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1268	*/
ganlikun	0:13413ea9a877	1269	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1270	{
ganlikun	0:13413ea9a877	1271	return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
ganlikun	0:13413ea9a877	1272	}
ganlikun	0:13413ea9a877	1273
ganlikun	0:13413ea9a877	1274	/**
ganlikun	0:13413ea9a877	1275	* @brief Enable direction change to up interrupt (UPIE).
ganlikun	0:13413ea9a877	1276	* @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
ganlikun	0:13413ea9a877	1277	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1278	* @retval None
ganlikun	0:13413ea9a877	1279	*/
ganlikun	0:13413ea9a877	1280	__STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1281	{
ganlikun	0:13413ea9a877	1282	SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
ganlikun	0:13413ea9a877	1283	}
ganlikun	0:13413ea9a877	1284
ganlikun	0:13413ea9a877	1285	/**
ganlikun	0:13413ea9a877	1286	* @brief Disable direction change to up interrupt (UPIE).
ganlikun	0:13413ea9a877	1287	* @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
ganlikun	0:13413ea9a877	1288	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1289	* @retval None
ganlikun	0:13413ea9a877	1290	*/
ganlikun	0:13413ea9a877	1291	__STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1292	{
ganlikun	0:13413ea9a877	1293	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
ganlikun	0:13413ea9a877	1294	}
ganlikun	0:13413ea9a877	1295
ganlikun	0:13413ea9a877	1296	/**
ganlikun	0:13413ea9a877	1297	* @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
ganlikun	0:13413ea9a877	1298	* @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
ganlikun	0:13413ea9a877	1299	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1300	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1301	*/
ganlikun	0:13413ea9a877	1302	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1303	{
ganlikun	0:13413ea9a877	1304	return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
ganlikun	0:13413ea9a877	1305	}
ganlikun	0:13413ea9a877	1306
ganlikun	0:13413ea9a877	1307	/**
ganlikun	0:13413ea9a877	1308	* @brief Enable direction change to down interrupt (DOWNIE).
ganlikun	0:13413ea9a877	1309	* @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
ganlikun	0:13413ea9a877	1310	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1311	* @retval None
ganlikun	0:13413ea9a877	1312	*/
ganlikun	0:13413ea9a877	1313	__STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1314	{
ganlikun	0:13413ea9a877	1315	SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
ganlikun	0:13413ea9a877	1316	}
ganlikun	0:13413ea9a877	1317
ganlikun	0:13413ea9a877	1318	/**
ganlikun	0:13413ea9a877	1319	* @brief Disable direction change to down interrupt (DOWNIE).
ganlikun	0:13413ea9a877	1320	* @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
ganlikun	0:13413ea9a877	1321	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1322	* @retval None
ganlikun	0:13413ea9a877	1323	*/
ganlikun	0:13413ea9a877	1324	__STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1325	{
ganlikun	0:13413ea9a877	1326	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
ganlikun	0:13413ea9a877	1327	}
ganlikun	0:13413ea9a877	1328
ganlikun	0:13413ea9a877	1329	/**
ganlikun	0:13413ea9a877	1330	* @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
ganlikun	0:13413ea9a877	1331	* @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
ganlikun	0:13413ea9a877	1332	* @param LPTIMx Low-Power Timer instance
ganlikun	0:13413ea9a877	1333	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1334	*/
ganlikun	0:13413ea9a877	1335	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
ganlikun	0:13413ea9a877	1336	{
ganlikun	0:13413ea9a877	1337	return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
ganlikun	0:13413ea9a877	1338	}
ganlikun	0:13413ea9a877	1339
ganlikun	0:13413ea9a877	1340	/**
ganlikun	0:13413ea9a877	1341	* @}
ganlikun	0:13413ea9a877	1342	*/
ganlikun	0:13413ea9a877	1343
ganlikun	0:13413ea9a877	1344	#if defined(USE_FULL_LL_DRIVER)
ganlikun	0:13413ea9a877	1345	/** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
ganlikun	0:13413ea9a877	1346	* @{
ganlikun	0:13413ea9a877	1347	*/
ganlikun	0:13413ea9a877	1348
ganlikun	0:13413ea9a877	1349	ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
ganlikun	0:13413ea9a877	1350	void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
ganlikun	0:13413ea9a877	1351	ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef LPTIMx, LL_LPTIM_InitTypeDef LPTIM_InitStruct);
ganlikun	0:13413ea9a877	1352	/**
ganlikun	0:13413ea9a877	1353	* @}
ganlikun	0:13413ea9a877	1354	*/
ganlikun	0:13413ea9a877	1355	#endif /* USE_FULL_LL_DRIVER */
ganlikun	0:13413ea9a877	1356
ganlikun	0:13413ea9a877	1357	/**
ganlikun	0:13413ea9a877	1358	* @}
ganlikun	0:13413ea9a877	1359	*/
ganlikun	0:13413ea9a877	1360
ganlikun	0:13413ea9a877	1361	/**
ganlikun	0:13413ea9a877	1362	* @}
ganlikun	0:13413ea9a877	1363	*/
ganlikun	0:13413ea9a877	1364
ganlikun	0:13413ea9a877	1365	#endif /* LPTIM1 */
ganlikun	0:13413ea9a877	1366
ganlikun	0:13413ea9a877	1367	/**
ganlikun	0:13413ea9a877	1368	* @}
ganlikun	0:13413ea9a877	1369	*/
ganlikun	0:13413ea9a877	1370
ganlikun	0:13413ea9a877	1371	#ifdef __cplusplus
ganlikun	0:13413ea9a877	1372	}
ganlikun	0:13413ea9a877	1373	#endif
ganlikun	0:13413ea9a877	1374
ganlikun	0:13413ea9a877	1375	#endif /* __STM32F4xx_LL_LPTIM_H */
ganlikun	0:13413ea9a877	1376
ganlikun	0:13413ea9a877	1377	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	1378

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Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_lptim.h@0:13413ea9a877, 2022-06-12 (annotated)

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