mbed1-dev - 001

Users » ganlikun » Code » mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_dma2d.h@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

Who changed what in which revision?

User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_ll_dma2d.h
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief Header file of DMA2D LL module.
ganlikun	0:13413ea9a877	8	******************************************************************************
ganlikun	0:13413ea9a877	9	* @attention
ganlikun	0:13413ea9a877	10	*
ganlikun	0:13413ea9a877	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	12	*
ganlikun	0:13413ea9a877	13	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	14	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	15	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	16	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	18	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	19	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	21	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	22	* without specific prior written permission.
ganlikun	0:13413ea9a877	23	*
ganlikun	0:13413ea9a877	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	34	*
ganlikun	0:13413ea9a877	35	******************************************************************************
ganlikun	0:13413ea9a877	36	*/
ganlikun	0:13413ea9a877	37
ganlikun	0:13413ea9a877	38	/* Define to prevent recursive inclusion -------------------------------------*/
ganlikun	0:13413ea9a877	39	#ifndef __STM32F4xx_LL_DMA2D_H
ganlikun	0:13413ea9a877	40	#define __STM32F4xx_LL_DMA2D_H
ganlikun	0:13413ea9a877	41
ganlikun	0:13413ea9a877	42	#ifdef __cplusplus
ganlikun	0:13413ea9a877	43	extern "C" {
ganlikun	0:13413ea9a877	44	#endif
ganlikun	0:13413ea9a877	45
ganlikun	0:13413ea9a877	46	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	47	#include "stm32f4xx.h"
ganlikun	0:13413ea9a877	48
ganlikun	0:13413ea9a877	49	/** @addtogroup STM32F4xx_LL_Driver
ganlikun	0:13413ea9a877	50	* @{
ganlikun	0:13413ea9a877	51	*/
ganlikun	0:13413ea9a877	52
ganlikun	0:13413ea9a877	53	#if defined (DMA2D)
ganlikun	0:13413ea9a877	54
ganlikun	0:13413ea9a877	55	/** @defgroup DMA2D_LL DMA2D
ganlikun	0:13413ea9a877	56	* @{
ganlikun	0:13413ea9a877	57	*/
ganlikun	0:13413ea9a877	58
ganlikun	0:13413ea9a877	59	/* Private types -------------------------------------------------------------*/
ganlikun	0:13413ea9a877	60	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	61	/* Private constants ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	62	/* Private macros ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	63	#if defined(USE_FULL_LL_DRIVER)
ganlikun	0:13413ea9a877	64	/** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
ganlikun	0:13413ea9a877	65	* @{
ganlikun	0:13413ea9a877	66	*/
ganlikun	0:13413ea9a877	67
ganlikun	0:13413ea9a877	68	/**
ganlikun	0:13413ea9a877	69	* @}
ganlikun	0:13413ea9a877	70	*/
ganlikun	0:13413ea9a877	71	#endif /USE_FULL_LL_DRIVER/
ganlikun	0:13413ea9a877	72
ganlikun	0:13413ea9a877	73	/* Exported types ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	74	#if defined(USE_FULL_LL_DRIVER)
ganlikun	0:13413ea9a877	75	/** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
ganlikun	0:13413ea9a877	76	* @{
ganlikun	0:13413ea9a877	77	*/
ganlikun	0:13413ea9a877	78
ganlikun	0:13413ea9a877	79	/**
ganlikun	0:13413ea9a877	80	* @brief LL DMA2D Init Structure Definition
ganlikun	0:13413ea9a877	81	*/
ganlikun	0:13413ea9a877	82	typedef struct
ganlikun	0:13413ea9a877	83	{
ganlikun	0:13413ea9a877	84	uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
ganlikun	0:13413ea9a877	85	- This parameter can be one value of @ref DMA2D_LL_EC_MODE.
ganlikun	0:13413ea9a877	86
ganlikun	0:13413ea9a877	87	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
ganlikun	0:13413ea9a877	88
ganlikun	0:13413ea9a877	89	uint32_t ColorMode; /*!< Specifies the color format of the output image.
ganlikun	0:13413ea9a877	90	- This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
ganlikun	0:13413ea9a877	91
ganlikun	0:13413ea9a877	92	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
ganlikun	0:13413ea9a877	93
ganlikun	0:13413ea9a877	94	uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
ganlikun	0:13413ea9a877	95	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	96	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
ganlikun	0:13413ea9a877	97	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
ganlikun	0:13413ea9a877	98	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	99	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	100
ganlikun	0:13413ea9a877	101	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	102	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	103
ganlikun	0:13413ea9a877	104	uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
ganlikun	0:13413ea9a877	105	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	106	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
ganlikun	0:13413ea9a877	107	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
ganlikun	0:13413ea9a877	108	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	109	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	110
ganlikun	0:13413ea9a877	111	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	112	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	113
ganlikun	0:13413ea9a877	114	uint32_t OutputRed; /*!< Specifies the Red value of the output image.
ganlikun	0:13413ea9a877	115	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	116	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
ganlikun	0:13413ea9a877	117	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
ganlikun	0:13413ea9a877	118	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	119	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	120
ganlikun	0:13413ea9a877	121	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	122	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	123
ganlikun	0:13413ea9a877	124	uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
ganlikun	0:13413ea9a877	125	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	126	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	127	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	128	- This parameter is not considered if RGB888 or RGB565 color mode is selected.
ganlikun	0:13413ea9a877	129
ganlikun	0:13413ea9a877	130	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	131	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	132
ganlikun	0:13413ea9a877	133	uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
ganlikun	0:13413ea9a877	134	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
ganlikun	0:13413ea9a877	135
ganlikun	0:13413ea9a877	136	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
ganlikun	0:13413ea9a877	137
ganlikun	0:13413ea9a877	138	uint32_t LineOffset; /*!< Specifies the output line offset value.
ganlikun	0:13413ea9a877	139	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
ganlikun	0:13413ea9a877	140
ganlikun	0:13413ea9a877	141	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
ganlikun	0:13413ea9a877	142
ganlikun	0:13413ea9a877	143	uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
ganlikun	0:13413ea9a877	144	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
ganlikun	0:13413ea9a877	145
ganlikun	0:13413ea9a877	146	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
ganlikun	0:13413ea9a877	147
ganlikun	0:13413ea9a877	148	uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
ganlikun	0:13413ea9a877	149	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
ganlikun	0:13413ea9a877	150
ganlikun	0:13413ea9a877	151	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
ganlikun	0:13413ea9a877	152
ganlikun	0:13413ea9a877	153	} LL_DMA2D_InitTypeDef;
ganlikun	0:13413ea9a877	154
ganlikun	0:13413ea9a877	155	/**
ganlikun	0:13413ea9a877	156	* @brief LL DMA2D Layer Configuration Structure Definition
ganlikun	0:13413ea9a877	157	*/
ganlikun	0:13413ea9a877	158	typedef struct
ganlikun	0:13413ea9a877	159	{
ganlikun	0:13413ea9a877	160	uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
ganlikun	0:13413ea9a877	161	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
ganlikun	0:13413ea9a877	162
ganlikun	0:13413ea9a877	163	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	164	- @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
ganlikun	0:13413ea9a877	165	- @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
ganlikun	0:13413ea9a877	166
ganlikun	0:13413ea9a877	167	uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
ganlikun	0:13413ea9a877	168	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
ganlikun	0:13413ea9a877	169
ganlikun	0:13413ea9a877	170	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	171	- @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
ganlikun	0:13413ea9a877	172	- @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
ganlikun	0:13413ea9a877	173
ganlikun	0:13413ea9a877	174	uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
ganlikun	0:13413ea9a877	175	- This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
ganlikun	0:13413ea9a877	176
ganlikun	0:13413ea9a877	177	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	178	- @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
ganlikun	0:13413ea9a877	179	- @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
ganlikun	0:13413ea9a877	180
ganlikun	0:13413ea9a877	181	uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
ganlikun	0:13413ea9a877	182	- This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
ganlikun	0:13413ea9a877	183
ganlikun	0:13413ea9a877	184	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	185	- @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
ganlikun	0:13413ea9a877	186	- @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
ganlikun	0:13413ea9a877	187
ganlikun	0:13413ea9a877	188	uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
ganlikun	0:13413ea9a877	189	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
ganlikun	0:13413ea9a877	190
ganlikun	0:13413ea9a877	191	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	192	- @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
ganlikun	0:13413ea9a877	193	- @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
ganlikun	0:13413ea9a877	194
ganlikun	0:13413ea9a877	195	uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
ganlikun	0:13413ea9a877	196	- This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
ganlikun	0:13413ea9a877	197
ganlikun	0:13413ea9a877	198	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	199	- @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
ganlikun	0:13413ea9a877	200	- @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
ganlikun	0:13413ea9a877	201
ganlikun	0:13413ea9a877	202	uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
ganlikun	0:13413ea9a877	203	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
ganlikun	0:13413ea9a877	204
ganlikun	0:13413ea9a877	205	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	206	- @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
ganlikun	0:13413ea9a877	207	- @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
ganlikun	0:13413ea9a877	208
ganlikun	0:13413ea9a877	209	uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
ganlikun	0:13413ea9a877	210	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
ganlikun	0:13413ea9a877	211
ganlikun	0:13413ea9a877	212	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	213	- @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
ganlikun	0:13413ea9a877	214	- @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
ganlikun	0:13413ea9a877	215
ganlikun	0:13413ea9a877	216	uint32_t Green; /*!< Specifies the foreground or background Green color value.
ganlikun	0:13413ea9a877	217	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
ganlikun	0:13413ea9a877	218
ganlikun	0:13413ea9a877	219	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	220	- @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
ganlikun	0:13413ea9a877	221	- @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
ganlikun	0:13413ea9a877	222
ganlikun	0:13413ea9a877	223	uint32_t Red; /*!< Specifies the foreground or background Red color value.
ganlikun	0:13413ea9a877	224	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
ganlikun	0:13413ea9a877	225
ganlikun	0:13413ea9a877	226	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	227	- @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
ganlikun	0:13413ea9a877	228	- @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
ganlikun	0:13413ea9a877	229
ganlikun	0:13413ea9a877	230	uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
ganlikun	0:13413ea9a877	231	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
ganlikun	0:13413ea9a877	232
ganlikun	0:13413ea9a877	233	This parameter can be modified afterwards using unitary functions
ganlikun	0:13413ea9a877	234	- @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
ganlikun	0:13413ea9a877	235	- @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
ganlikun	0:13413ea9a877	236
ganlikun	0:13413ea9a877	237	} LL_DMA2D_LayerCfgTypeDef;
ganlikun	0:13413ea9a877	238
ganlikun	0:13413ea9a877	239	/**
ganlikun	0:13413ea9a877	240	* @brief LL DMA2D Output Color Structure Definition
ganlikun	0:13413ea9a877	241	*/
ganlikun	0:13413ea9a877	242	typedef struct
ganlikun	0:13413ea9a877	243	{
ganlikun	0:13413ea9a877	244	uint32_t ColorMode; /*!< Specifies the color format of the output image.
ganlikun	0:13413ea9a877	245	- This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
ganlikun	0:13413ea9a877	246
ganlikun	0:13413ea9a877	247	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
ganlikun	0:13413ea9a877	248
ganlikun	0:13413ea9a877	249	uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
ganlikun	0:13413ea9a877	250	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	251	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
ganlikun	0:13413ea9a877	252	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
ganlikun	0:13413ea9a877	253	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	254	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	255
ganlikun	0:13413ea9a877	256	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	257	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	258
ganlikun	0:13413ea9a877	259	uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
ganlikun	0:13413ea9a877	260	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	261	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
ganlikun	0:13413ea9a877	262	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
ganlikun	0:13413ea9a877	263	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	264	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	265
ganlikun	0:13413ea9a877	266	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	267	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	268
ganlikun	0:13413ea9a877	269	uint32_t OutputRed; /*!< Specifies the Red value of the output image.
ganlikun	0:13413ea9a877	270	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	271	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
ganlikun	0:13413ea9a877	272	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
ganlikun	0:13413ea9a877	273	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	274	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	275
ganlikun	0:13413ea9a877	276	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	277	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	278
ganlikun	0:13413ea9a877	279	uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
ganlikun	0:13413ea9a877	280	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
ganlikun	0:13413ea9a877	281	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
ganlikun	0:13413ea9a877	282	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
ganlikun	0:13413ea9a877	283	- This parameter is not considered if RGB888 or RGB565 color mode is selected.
ganlikun	0:13413ea9a877	284
ganlikun	0:13413ea9a877	285	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
ganlikun	0:13413ea9a877	286	function @ref LL_DMA2D_ConfigOutputColor(). */
ganlikun	0:13413ea9a877	287
ganlikun	0:13413ea9a877	288	} LL_DMA2D_ColorTypeDef;
ganlikun	0:13413ea9a877	289
ganlikun	0:13413ea9a877	290	/**
ganlikun	0:13413ea9a877	291	* @}
ganlikun	0:13413ea9a877	292	*/
ganlikun	0:13413ea9a877	293	#endif /* USE_FULL_LL_DRIVER */
ganlikun	0:13413ea9a877	294
ganlikun	0:13413ea9a877	295	/* Exported constants --------------------------------------------------------*/
ganlikun	0:13413ea9a877	296	/** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
ganlikun	0:13413ea9a877	297	* @{
ganlikun	0:13413ea9a877	298	*/
ganlikun	0:13413ea9a877	299
ganlikun	0:13413ea9a877	300	/** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
ganlikun	0:13413ea9a877	301	* @brief Flags defines which can be used with LL_DMA2D_ReadReg function
ganlikun	0:13413ea9a877	302	* @{
ganlikun	0:13413ea9a877	303	*/
ganlikun	0:13413ea9a877	304	#define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /!< Configuration Error Interrupt Flag /
ganlikun	0:13413ea9a877	305	#define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /!< CLUT Transfer Complete Interrupt Flag /
ganlikun	0:13413ea9a877	306	#define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /!< CLUT Access Error Interrupt Flag /
ganlikun	0:13413ea9a877	307	#define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /!< Transfer Watermark Interrupt Flag /
ganlikun	0:13413ea9a877	308	#define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /!< Transfer Complete Interrupt Flag /
ganlikun	0:13413ea9a877	309	#define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /!< Transfer Error Interrupt Flag /
ganlikun	0:13413ea9a877	310	/**
ganlikun	0:13413ea9a877	311	* @}
ganlikun	0:13413ea9a877	312	*/
ganlikun	0:13413ea9a877	313
ganlikun	0:13413ea9a877	314	/** @defgroup DMA2D_LL_EC_IT IT Defines
ganlikun	0:13413ea9a877	315	* @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
ganlikun	0:13413ea9a877	316	* @{
ganlikun	0:13413ea9a877	317	*/
ganlikun	0:13413ea9a877	318	#define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /!< Configuration Error Interrupt /
ganlikun	0:13413ea9a877	319	#define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /!< CLUT Transfer Complete Interrupt /
ganlikun	0:13413ea9a877	320	#define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /!< CLUT Access Error Interrupt /
ganlikun	0:13413ea9a877	321	#define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /!< Transfer Watermark Interrupt /
ganlikun	0:13413ea9a877	322	#define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /!< Transfer Complete Interrupt /
ganlikun	0:13413ea9a877	323	#define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /!< Transfer Error Interrupt /
ganlikun	0:13413ea9a877	324	/**
ganlikun	0:13413ea9a877	325	* @}
ganlikun	0:13413ea9a877	326	*/
ganlikun	0:13413ea9a877	327
ganlikun	0:13413ea9a877	328	/** @defgroup DMA2D_LL_EC_MODE Mode
ganlikun	0:13413ea9a877	329	* @{
ganlikun	0:13413ea9a877	330	*/
ganlikun	0:13413ea9a877	331	#define LL_DMA2D_MODE_M2M 0x00000000U /!< DMA2D memory to memory transfer mode /
ganlikun	0:13413ea9a877	332	#define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /!< DMA2D memory to memory with pixel format conversion transfer mode /
ganlikun	0:13413ea9a877	333	#define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /!< DMA2D memory to memory with blending transfer mode /
ganlikun	0:13413ea9a877	334	#define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /!< DMA2D register to memory transfer mode /
ganlikun	0:13413ea9a877	335	/**
ganlikun	0:13413ea9a877	336	* @}
ganlikun	0:13413ea9a877	337	*/
ganlikun	0:13413ea9a877	338
ganlikun	0:13413ea9a877	339	/** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
ganlikun	0:13413ea9a877	340	* @{
ganlikun	0:13413ea9a877	341	*/
ganlikun	0:13413ea9a877	342	#define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /!< ARGB8888 /
ganlikun	0:13413ea9a877	343	#define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /!< RGB888 /
ganlikun	0:13413ea9a877	344	#define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /!< RGB565 /
ganlikun	0:13413ea9a877	345	#define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0\|DMA2D_OPFCCR_CM_1) /!< ARGB1555 /
ganlikun	0:13413ea9a877	346	#define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /!< ARGB4444 /
ganlikun	0:13413ea9a877	347	/**
ganlikun	0:13413ea9a877	348	* @}
ganlikun	0:13413ea9a877	349	*/
ganlikun	0:13413ea9a877	350
ganlikun	0:13413ea9a877	351	/** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
ganlikun	0:13413ea9a877	352	* @{
ganlikun	0:13413ea9a877	353	*/
ganlikun	0:13413ea9a877	354	#define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /!< ARGB8888 /
ganlikun	0:13413ea9a877	355	#define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /!< RGB888 /
ganlikun	0:13413ea9a877	356	#define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /!< RGB565 /
ganlikun	0:13413ea9a877	357	#define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_1) /!< ARGB1555 /
ganlikun	0:13413ea9a877	358	#define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /!< ARGB4444 /
ganlikun	0:13413ea9a877	359	#define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_2) /!< L8 /
ganlikun	0:13413ea9a877	360	#define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1\|DMA2D_FGPFCCR_CM_2) /!< AL44 /
ganlikun	0:13413ea9a877	361	#define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_1\|DMA2D_FGPFCCR_CM_2) /!< AL88 /
ganlikun	0:13413ea9a877	362	#define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /!< L4 /
ganlikun	0:13413ea9a877	363	#define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_3) /!< A8 /
ganlikun	0:13413ea9a877	364	#define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1\|DMA2D_FGPFCCR_CM_3) /!< A4 /
ganlikun	0:13413ea9a877	365	/**
ganlikun	0:13413ea9a877	366	* @}
ganlikun	0:13413ea9a877	367	*/
ganlikun	0:13413ea9a877	368
ganlikun	0:13413ea9a877	369	/** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
ganlikun	0:13413ea9a877	370	* @{
ganlikun	0:13413ea9a877	371	*/
ganlikun	0:13413ea9a877	372	#define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /!< No modification of the alpha channel value /
ganlikun	0:13413ea9a877	373	#define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /!< Replace original alpha channel value by programmed alpha value /
ganlikun	0:13413ea9a877	374	#define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
ganlikun	0:13413ea9a877	375	with original alpha channel value */
ganlikun	0:13413ea9a877	376	/**
ganlikun	0:13413ea9a877	377	* @}
ganlikun	0:13413ea9a877	378	*/
ganlikun	0:13413ea9a877	379
ganlikun	0:13413ea9a877	380	/** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
ganlikun	0:13413ea9a877	381	* @{
ganlikun	0:13413ea9a877	382	*/
ganlikun	0:13413ea9a877	383	#define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /!< ARGB8888 /
ganlikun	0:13413ea9a877	384	#define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /!< RGB888 /
ganlikun	0:13413ea9a877	385	/**
ganlikun	0:13413ea9a877	386	* @}
ganlikun	0:13413ea9a877	387	*/
ganlikun	0:13413ea9a877	388
ganlikun	0:13413ea9a877	389	/**
ganlikun	0:13413ea9a877	390	* @}
ganlikun	0:13413ea9a877	391	*/
ganlikun	0:13413ea9a877	392
ganlikun	0:13413ea9a877	393	/* Exported macro ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	394	/** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
ganlikun	0:13413ea9a877	395	* @{
ganlikun	0:13413ea9a877	396	*/
ganlikun	0:13413ea9a877	397
ganlikun	0:13413ea9a877	398	/** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
ganlikun	0:13413ea9a877	399	* @{
ganlikun	0:13413ea9a877	400	*/
ganlikun	0:13413ea9a877	401
ganlikun	0:13413ea9a877	402	/**
ganlikun	0:13413ea9a877	403	* @brief Write a value in DMA2D register.
ganlikun	0:13413ea9a877	404	* @param __INSTANCE__ DMA2D Instance
ganlikun	0:13413ea9a877	405	* @param __REG__ Register to be written
ganlikun	0:13413ea9a877	406	* @param __VALUE__ Value to be written in the register
ganlikun	0:13413ea9a877	407	* @retval None
ganlikun	0:13413ea9a877	408	*/
ganlikun	0:13413ea9a877	409	#define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
ganlikun	0:13413ea9a877	410
ganlikun	0:13413ea9a877	411	/**
ganlikun	0:13413ea9a877	412	* @brief Read a value in DMA2D register.
ganlikun	0:13413ea9a877	413	* @param __INSTANCE__ DMA2D Instance
ganlikun	0:13413ea9a877	414	* @param __REG__ Register to be read
ganlikun	0:13413ea9a877	415	* @retval Register value
ganlikun	0:13413ea9a877	416	*/
ganlikun	0:13413ea9a877	417	#define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
ganlikun	0:13413ea9a877	418	/**
ganlikun	0:13413ea9a877	419	* @}
ganlikun	0:13413ea9a877	420	*/
ganlikun	0:13413ea9a877	421
ganlikun	0:13413ea9a877	422	/**
ganlikun	0:13413ea9a877	423	* @}
ganlikun	0:13413ea9a877	424	*/
ganlikun	0:13413ea9a877	425
ganlikun	0:13413ea9a877	426	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	427	/** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
ganlikun	0:13413ea9a877	428	* @{
ganlikun	0:13413ea9a877	429	*/
ganlikun	0:13413ea9a877	430
ganlikun	0:13413ea9a877	431	/** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
ganlikun	0:13413ea9a877	432	* @{
ganlikun	0:13413ea9a877	433	*/
ganlikun	0:13413ea9a877	434
ganlikun	0:13413ea9a877	435	/**
ganlikun	0:13413ea9a877	436	* @brief Start a DMA2D transfer.
ganlikun	0:13413ea9a877	437	* @rmtoll CR START LL_DMA2D_Start
ganlikun	0:13413ea9a877	438	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	439	* @retval None
ganlikun	0:13413ea9a877	440	*/
ganlikun	0:13413ea9a877	441	__STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	442	{
ganlikun	0:13413ea9a877	443	SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
ganlikun	0:13413ea9a877	444	}
ganlikun	0:13413ea9a877	445
ganlikun	0:13413ea9a877	446	/**
ganlikun	0:13413ea9a877	447	* @brief Indicate if a DMA2D transfer is ongoing.
ganlikun	0:13413ea9a877	448	* @rmtoll CR START LL_DMA2D_IsTransferOngoing
ganlikun	0:13413ea9a877	449	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	450	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	451	*/
ganlikun	0:13413ea9a877	452	__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	453	{
ganlikun	0:13413ea9a877	454	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
ganlikun	0:13413ea9a877	455	}
ganlikun	0:13413ea9a877	456
ganlikun	0:13413ea9a877	457	/**
ganlikun	0:13413ea9a877	458	* @brief Suspend DMA2D transfer.
ganlikun	0:13413ea9a877	459	* @note This API can be used to suspend automatic foreground or background CLUT loading.
ganlikun	0:13413ea9a877	460	* @rmtoll CR SUSP LL_DMA2D_Suspend
ganlikun	0:13413ea9a877	461	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	462	* @retval None
ganlikun	0:13413ea9a877	463	*/
ganlikun	0:13413ea9a877	464	__STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	465	{
ganlikun	0:13413ea9a877	466	MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP \| DMA2D_CR_START, DMA2D_CR_SUSP);
ganlikun	0:13413ea9a877	467	}
ganlikun	0:13413ea9a877	468
ganlikun	0:13413ea9a877	469	/**
ganlikun	0:13413ea9a877	470	* @brief Resume DMA2D transfer.
ganlikun	0:13413ea9a877	471	* @note This API can be used to resume automatic foreground or background CLUT loading.
ganlikun	0:13413ea9a877	472	* @rmtoll CR SUSP LL_DMA2D_Resume
ganlikun	0:13413ea9a877	473	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	474	* @retval None
ganlikun	0:13413ea9a877	475	*/
ganlikun	0:13413ea9a877	476	__STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	477	{
ganlikun	0:13413ea9a877	478	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP \| DMA2D_CR_START);
ganlikun	0:13413ea9a877	479	}
ganlikun	0:13413ea9a877	480
ganlikun	0:13413ea9a877	481	/**
ganlikun	0:13413ea9a877	482	* @brief Indicate if DMA2D transfer is suspended.
ganlikun	0:13413ea9a877	483	* @note This API can be used to indicate whether or not automatic foreground or
ganlikun	0:13413ea9a877	484	* background CLUT loading is suspended.
ganlikun	0:13413ea9a877	485	* @rmtoll CR SUSP LL_DMA2D_IsSuspended
ganlikun	0:13413ea9a877	486	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	487	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	488	*/
ganlikun	0:13413ea9a877	489	__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	490	{
ganlikun	0:13413ea9a877	491	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
ganlikun	0:13413ea9a877	492	}
ganlikun	0:13413ea9a877	493
ganlikun	0:13413ea9a877	494	/**
ganlikun	0:13413ea9a877	495	* @brief Abort DMA2D transfer.
ganlikun	0:13413ea9a877	496	* @note This API can be used to abort automatic foreground or background CLUT loading.
ganlikun	0:13413ea9a877	497	* @rmtoll CR ABORT LL_DMA2D_Abort
ganlikun	0:13413ea9a877	498	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	499	* @retval None
ganlikun	0:13413ea9a877	500	*/
ganlikun	0:13413ea9a877	501	__STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	502	{
ganlikun	0:13413ea9a877	503	MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT \| DMA2D_CR_START, DMA2D_CR_ABORT);
ganlikun	0:13413ea9a877	504	}
ganlikun	0:13413ea9a877	505
ganlikun	0:13413ea9a877	506	/**
ganlikun	0:13413ea9a877	507	* @brief Indicate if DMA2D transfer is aborted.
ganlikun	0:13413ea9a877	508	* @note This API can be used to indicate whether or not automatic foreground or
ganlikun	0:13413ea9a877	509	* background CLUT loading is aborted.
ganlikun	0:13413ea9a877	510	* @rmtoll CR ABORT LL_DMA2D_IsAborted
ganlikun	0:13413ea9a877	511	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	512	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	513	*/
ganlikun	0:13413ea9a877	514	__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	515	{
ganlikun	0:13413ea9a877	516	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
ganlikun	0:13413ea9a877	517	}
ganlikun	0:13413ea9a877	518
ganlikun	0:13413ea9a877	519	/**
ganlikun	0:13413ea9a877	520	* @brief Set DMA2D mode.
ganlikun	0:13413ea9a877	521	* @rmtoll CR MODE LL_DMA2D_SetMode
ganlikun	0:13413ea9a877	522	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	523	* @param Mode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	524	* @arg @ref LL_DMA2D_MODE_M2M
ganlikun	0:13413ea9a877	525	* @arg @ref LL_DMA2D_MODE_M2M_PFC
ganlikun	0:13413ea9a877	526	* @arg @ref LL_DMA2D_MODE_M2M_BLEND
ganlikun	0:13413ea9a877	527	* @arg @ref LL_DMA2D_MODE_R2M
ganlikun	0:13413ea9a877	528	* @retval None
ganlikun	0:13413ea9a877	529	*/
ganlikun	0:13413ea9a877	530	__STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
ganlikun	0:13413ea9a877	531	{
ganlikun	0:13413ea9a877	532	MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
ganlikun	0:13413ea9a877	533	}
ganlikun	0:13413ea9a877	534
ganlikun	0:13413ea9a877	535	/**
ganlikun	0:13413ea9a877	536	* @brief Return DMA2D mode
ganlikun	0:13413ea9a877	537	* @rmtoll CR MODE LL_DMA2D_GetMode
ganlikun	0:13413ea9a877	538	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	539	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	540	* @arg @ref LL_DMA2D_MODE_M2M
ganlikun	0:13413ea9a877	541	* @arg @ref LL_DMA2D_MODE_M2M_PFC
ganlikun	0:13413ea9a877	542	* @arg @ref LL_DMA2D_MODE_M2M_BLEND
ganlikun	0:13413ea9a877	543	* @arg @ref LL_DMA2D_MODE_R2M
ganlikun	0:13413ea9a877	544	*/
ganlikun	0:13413ea9a877	545	__STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	546	{
ganlikun	0:13413ea9a877	547	return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
ganlikun	0:13413ea9a877	548	}
ganlikun	0:13413ea9a877	549
ganlikun	0:13413ea9a877	550	/**
ganlikun	0:13413ea9a877	551	* @brief Set DMA2D output color mode.
ganlikun	0:13413ea9a877	552	* @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
ganlikun	0:13413ea9a877	553	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	554	* @param ColorMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	555	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
ganlikun	0:13413ea9a877	556	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
ganlikun	0:13413ea9a877	557	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
ganlikun	0:13413ea9a877	558	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
ganlikun	0:13413ea9a877	559	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
ganlikun	0:13413ea9a877	560	* @retval None
ganlikun	0:13413ea9a877	561	*/
ganlikun	0:13413ea9a877	562	__STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
ganlikun	0:13413ea9a877	563	{
ganlikun	0:13413ea9a877	564	MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
ganlikun	0:13413ea9a877	565	}
ganlikun	0:13413ea9a877	566
ganlikun	0:13413ea9a877	567	/**
ganlikun	0:13413ea9a877	568	* @brief Return DMA2D output color mode.
ganlikun	0:13413ea9a877	569	* @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
ganlikun	0:13413ea9a877	570	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	571	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	572	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
ganlikun	0:13413ea9a877	573	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
ganlikun	0:13413ea9a877	574	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
ganlikun	0:13413ea9a877	575	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
ganlikun	0:13413ea9a877	576	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
ganlikun	0:13413ea9a877	577	*/
ganlikun	0:13413ea9a877	578	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	579	{
ganlikun	0:13413ea9a877	580	return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
ganlikun	0:13413ea9a877	581	}
ganlikun	0:13413ea9a877	582
ganlikun	0:13413ea9a877	583	/**
ganlikun	0:13413ea9a877	584	* @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
ganlikun	0:13413ea9a877	585	* @rmtoll OOR LO LL_DMA2D_SetLineOffset
ganlikun	0:13413ea9a877	586	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	587	* @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
ganlikun	0:13413ea9a877	588	* @retval None
ganlikun	0:13413ea9a877	589	*/
ganlikun	0:13413ea9a877	590	__STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
ganlikun	0:13413ea9a877	591	{
ganlikun	0:13413ea9a877	592	MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
ganlikun	0:13413ea9a877	593	}
ganlikun	0:13413ea9a877	594
ganlikun	0:13413ea9a877	595	/**
ganlikun	0:13413ea9a877	596	* @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
ganlikun	0:13413ea9a877	597	* @rmtoll OOR LO LL_DMA2D_GetLineOffset
ganlikun	0:13413ea9a877	598	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	599	* @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
ganlikun	0:13413ea9a877	600	*/
ganlikun	0:13413ea9a877	601	__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	602	{
ganlikun	0:13413ea9a877	603	return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
ganlikun	0:13413ea9a877	604	}
ganlikun	0:13413ea9a877	605
ganlikun	0:13413ea9a877	606	/**
ganlikun	0:13413ea9a877	607	* @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
ganlikun	0:13413ea9a877	608	* @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
ganlikun	0:13413ea9a877	609	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	610	* @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
ganlikun	0:13413ea9a877	611	* @retval None
ganlikun	0:13413ea9a877	612	*/
ganlikun	0:13413ea9a877	613	__STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
ganlikun	0:13413ea9a877	614	{
ganlikun	0:13413ea9a877	615	MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
ganlikun	0:13413ea9a877	616	}
ganlikun	0:13413ea9a877	617
ganlikun	0:13413ea9a877	618	/**
ganlikun	0:13413ea9a877	619	* @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
ganlikun	0:13413ea9a877	620	* @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
ganlikun	0:13413ea9a877	621	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	622	* @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
ganlikun	0:13413ea9a877	623	*/
ganlikun	0:13413ea9a877	624	__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	625	{
ganlikun	0:13413ea9a877	626	return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
ganlikun	0:13413ea9a877	627	}
ganlikun	0:13413ea9a877	628
ganlikun	0:13413ea9a877	629	/**
ganlikun	0:13413ea9a877	630	* @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
ganlikun	0:13413ea9a877	631	* @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
ganlikun	0:13413ea9a877	632	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	633	* @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	634	* @retval None
ganlikun	0:13413ea9a877	635	*/
ganlikun	0:13413ea9a877	636	__STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
ganlikun	0:13413ea9a877	637	{
ganlikun	0:13413ea9a877	638	MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
ganlikun	0:13413ea9a877	639	}
ganlikun	0:13413ea9a877	640
ganlikun	0:13413ea9a877	641	/**
ganlikun	0:13413ea9a877	642	* @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
ganlikun	0:13413ea9a877	643	* @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
ganlikun	0:13413ea9a877	644	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	645	* @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	646	*/
ganlikun	0:13413ea9a877	647	__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	648	{
ganlikun	0:13413ea9a877	649	return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
ganlikun	0:13413ea9a877	650	}
ganlikun	0:13413ea9a877	651
ganlikun	0:13413ea9a877	652	/**
ganlikun	0:13413ea9a877	653	* @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	654	* @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
ganlikun	0:13413ea9a877	655	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	656	* @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	657	* @retval None
ganlikun	0:13413ea9a877	658	*/
ganlikun	0:13413ea9a877	659	__STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
ganlikun	0:13413ea9a877	660	{
ganlikun	0:13413ea9a877	661	LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
ganlikun	0:13413ea9a877	662	}
ganlikun	0:13413ea9a877	663
ganlikun	0:13413ea9a877	664	/**
ganlikun	0:13413ea9a877	665	* @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	666	* @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
ganlikun	0:13413ea9a877	667	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	668	* @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	669	*/
ganlikun	0:13413ea9a877	670	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	671	{
ganlikun	0:13413ea9a877	672	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
ganlikun	0:13413ea9a877	673	}
ganlikun	0:13413ea9a877	674
ganlikun	0:13413ea9a877	675	/**
ganlikun	0:13413ea9a877	676	* @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	677	* @note Output color format depends on output color mode, ARGB8888, RGB888,
ganlikun	0:13413ea9a877	678	* RGB565, ARGB1555 or ARGB4444.
ganlikun	0:13413ea9a877	679	* @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
ganlikun	0:13413ea9a877	680	* with respect to color mode is not done by the user code.
ganlikun	0:13413ea9a877	681	* @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
ganlikun	0:13413ea9a877	682	* OCOLR GREEN LL_DMA2D_SetOutputColor\n
ganlikun	0:13413ea9a877	683	* OCOLR RED LL_DMA2D_SetOutputColor\n
ganlikun	0:13413ea9a877	684	* OCOLR ALPHA LL_DMA2D_SetOutputColor
ganlikun	0:13413ea9a877	685	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	686	* @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	687	* @retval None
ganlikun	0:13413ea9a877	688	*/
ganlikun	0:13413ea9a877	689	__STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
ganlikun	0:13413ea9a877	690	{
ganlikun	0:13413ea9a877	691	MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 \| DMA2D_OCOLR_GREEN_1 \| DMA2D_OCOLR_RED_1 \| DMA2D_OCOLR_ALPHA_1), \
ganlikun	0:13413ea9a877	692	OutputColor);
ganlikun	0:13413ea9a877	693	}
ganlikun	0:13413ea9a877	694
ganlikun	0:13413ea9a877	695	/**
ganlikun	0:13413ea9a877	696	* @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	697	* @note Alpha channel and red, green, blue color values must be retrieved from the returned
ganlikun	0:13413ea9a877	698	* value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
ganlikun	0:13413ea9a877	699	* as set by @ref LL_DMA2D_SetOutputColorMode.
ganlikun	0:13413ea9a877	700	* @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
ganlikun	0:13413ea9a877	701	* OCOLR GREEN LL_DMA2D_GetOutputColor\n
ganlikun	0:13413ea9a877	702	* OCOLR RED LL_DMA2D_GetOutputColor\n
ganlikun	0:13413ea9a877	703	* OCOLR ALPHA LL_DMA2D_GetOutputColor
ganlikun	0:13413ea9a877	704	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	705	* @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	706	*/
ganlikun	0:13413ea9a877	707	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	708	{
ganlikun	0:13413ea9a877	709	return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
ganlikun	0:13413ea9a877	710	(DMA2D_OCOLR_BLUE_1 \| DMA2D_OCOLR_GREEN_1 \| DMA2D_OCOLR_RED_1 \| DMA2D_OCOLR_ALPHA_1)));
ganlikun	0:13413ea9a877	711	}
ganlikun	0:13413ea9a877	712
ganlikun	0:13413ea9a877	713	/**
ganlikun	0:13413ea9a877	714	* @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
ganlikun	0:13413ea9a877	715	* @rmtoll LWR LW LL_DMA2D_SetLineWatermark
ganlikun	0:13413ea9a877	716	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	717	* @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	718	* @retval None
ganlikun	0:13413ea9a877	719	*/
ganlikun	0:13413ea9a877	720	__STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
ganlikun	0:13413ea9a877	721	{
ganlikun	0:13413ea9a877	722	MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
ganlikun	0:13413ea9a877	723	}
ganlikun	0:13413ea9a877	724
ganlikun	0:13413ea9a877	725	/**
ganlikun	0:13413ea9a877	726	* @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
ganlikun	0:13413ea9a877	727	* @rmtoll LWR LW LL_DMA2D_GetLineWatermark
ganlikun	0:13413ea9a877	728	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	729	* @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
ganlikun	0:13413ea9a877	730	*/
ganlikun	0:13413ea9a877	731	__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	732	{
ganlikun	0:13413ea9a877	733	return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
ganlikun	0:13413ea9a877	734	}
ganlikun	0:13413ea9a877	735
ganlikun	0:13413ea9a877	736	/**
ganlikun	0:13413ea9a877	737	* @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	738	* @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
ganlikun	0:13413ea9a877	739	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	740	* @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	741	* @retval None
ganlikun	0:13413ea9a877	742	*/
ganlikun	0:13413ea9a877	743	__STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
ganlikun	0:13413ea9a877	744	{
ganlikun	0:13413ea9a877	745	MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
ganlikun	0:13413ea9a877	746	}
ganlikun	0:13413ea9a877	747
ganlikun	0:13413ea9a877	748	/**
ganlikun	0:13413ea9a877	749	* @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	750	* @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
ganlikun	0:13413ea9a877	751	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	752	* @retval Dead time value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	753	*/
ganlikun	0:13413ea9a877	754	__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	755	{
ganlikun	0:13413ea9a877	756	return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
ganlikun	0:13413ea9a877	757	}
ganlikun	0:13413ea9a877	758
ganlikun	0:13413ea9a877	759	/**
ganlikun	0:13413ea9a877	760	* @brief Enable DMA2D dead time functionality.
ganlikun	0:13413ea9a877	761	* @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
ganlikun	0:13413ea9a877	762	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	763	* @retval None
ganlikun	0:13413ea9a877	764	*/
ganlikun	0:13413ea9a877	765	__STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	766	{
ganlikun	0:13413ea9a877	767	SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
ganlikun	0:13413ea9a877	768	}
ganlikun	0:13413ea9a877	769
ganlikun	0:13413ea9a877	770	/**
ganlikun	0:13413ea9a877	771	* @brief Disable DMA2D dead time functionality.
ganlikun	0:13413ea9a877	772	* @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
ganlikun	0:13413ea9a877	773	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	774	* @retval None
ganlikun	0:13413ea9a877	775	*/
ganlikun	0:13413ea9a877	776	__STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	777	{
ganlikun	0:13413ea9a877	778	CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
ganlikun	0:13413ea9a877	779	}
ganlikun	0:13413ea9a877	780
ganlikun	0:13413ea9a877	781	/**
ganlikun	0:13413ea9a877	782	* @brief Indicate if DMA2D dead time functionality is enabled.
ganlikun	0:13413ea9a877	783	* @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
ganlikun	0:13413ea9a877	784	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	785	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	786	*/
ganlikun	0:13413ea9a877	787	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	788	{
ganlikun	0:13413ea9a877	789	return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
ganlikun	0:13413ea9a877	790	}
ganlikun	0:13413ea9a877	791
ganlikun	0:13413ea9a877	792	/** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
ganlikun	0:13413ea9a877	793	* @{
ganlikun	0:13413ea9a877	794	*/
ganlikun	0:13413ea9a877	795
ganlikun	0:13413ea9a877	796	/**
ganlikun	0:13413ea9a877	797	* @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	798	* @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
ganlikun	0:13413ea9a877	799	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	800	* @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	801	* @retval None
ganlikun	0:13413ea9a877	802	*/
ganlikun	0:13413ea9a877	803	__STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
ganlikun	0:13413ea9a877	804	{
ganlikun	0:13413ea9a877	805	LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
ganlikun	0:13413ea9a877	806	}
ganlikun	0:13413ea9a877	807
ganlikun	0:13413ea9a877	808	/**
ganlikun	0:13413ea9a877	809	* @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	810	* @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
ganlikun	0:13413ea9a877	811	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	812	* @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	813	*/
ganlikun	0:13413ea9a877	814	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	815	{
ganlikun	0:13413ea9a877	816	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
ganlikun	0:13413ea9a877	817	}
ganlikun	0:13413ea9a877	818
ganlikun	0:13413ea9a877	819	/**
ganlikun	0:13413ea9a877	820	* @brief Enable DMA2D foreground CLUT loading.
ganlikun	0:13413ea9a877	821	* @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
ganlikun	0:13413ea9a877	822	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	823	* @retval None
ganlikun	0:13413ea9a877	824	*/
ganlikun	0:13413ea9a877	825	__STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	826	{
ganlikun	0:13413ea9a877	827	SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
ganlikun	0:13413ea9a877	828	}
ganlikun	0:13413ea9a877	829
ganlikun	0:13413ea9a877	830	/**
ganlikun	0:13413ea9a877	831	* @brief Indicate if DMA2D foreground CLUT loading is enabled.
ganlikun	0:13413ea9a877	832	* @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
ganlikun	0:13413ea9a877	833	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	834	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	835	*/
ganlikun	0:13413ea9a877	836	__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	837	{
ganlikun	0:13413ea9a877	838	return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
ganlikun	0:13413ea9a877	839	}
ganlikun	0:13413ea9a877	840
ganlikun	0:13413ea9a877	841	/**
ganlikun	0:13413ea9a877	842	* @brief Set DMA2D foreground color mode.
ganlikun	0:13413ea9a877	843	* @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
ganlikun	0:13413ea9a877	844	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	845	* @param ColorMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	846	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
ganlikun	0:13413ea9a877	847	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
ganlikun	0:13413ea9a877	848	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
ganlikun	0:13413ea9a877	849	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
ganlikun	0:13413ea9a877	850	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
ganlikun	0:13413ea9a877	851	* @arg @ref LL_DMA2D_INPUT_MODE_L8
ganlikun	0:13413ea9a877	852	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
ganlikun	0:13413ea9a877	853	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
ganlikun	0:13413ea9a877	854	* @arg @ref LL_DMA2D_INPUT_MODE_L4
ganlikun	0:13413ea9a877	855	* @arg @ref LL_DMA2D_INPUT_MODE_A8
ganlikun	0:13413ea9a877	856	* @arg @ref LL_DMA2D_INPUT_MODE_A4
ganlikun	0:13413ea9a877	857	* @retval None
ganlikun	0:13413ea9a877	858	*/
ganlikun	0:13413ea9a877	859	__STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
ganlikun	0:13413ea9a877	860	{
ganlikun	0:13413ea9a877	861	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
ganlikun	0:13413ea9a877	862	}
ganlikun	0:13413ea9a877	863
ganlikun	0:13413ea9a877	864	/**
ganlikun	0:13413ea9a877	865	* @brief Return DMA2D foreground color mode.
ganlikun	0:13413ea9a877	866	* @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
ganlikun	0:13413ea9a877	867	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	868	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	869	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
ganlikun	0:13413ea9a877	870	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
ganlikun	0:13413ea9a877	871	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
ganlikun	0:13413ea9a877	872	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
ganlikun	0:13413ea9a877	873	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
ganlikun	0:13413ea9a877	874	* @arg @ref LL_DMA2D_INPUT_MODE_L8
ganlikun	0:13413ea9a877	875	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
ganlikun	0:13413ea9a877	876	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
ganlikun	0:13413ea9a877	877	* @arg @ref LL_DMA2D_INPUT_MODE_L4
ganlikun	0:13413ea9a877	878	* @arg @ref LL_DMA2D_INPUT_MODE_A8
ganlikun	0:13413ea9a877	879	* @arg @ref LL_DMA2D_INPUT_MODE_A4
ganlikun	0:13413ea9a877	880	*/
ganlikun	0:13413ea9a877	881	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	882	{
ganlikun	0:13413ea9a877	883	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
ganlikun	0:13413ea9a877	884	}
ganlikun	0:13413ea9a877	885
ganlikun	0:13413ea9a877	886	/**
ganlikun	0:13413ea9a877	887	* @brief Set DMA2D foreground alpha mode.
ganlikun	0:13413ea9a877	888	* @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
ganlikun	0:13413ea9a877	889	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	890	* @param AphaMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	891	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
ganlikun	0:13413ea9a877	892	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
ganlikun	0:13413ea9a877	893	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
ganlikun	0:13413ea9a877	894	* @retval None
ganlikun	0:13413ea9a877	895	*/
ganlikun	0:13413ea9a877	896	__STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
ganlikun	0:13413ea9a877	897	{
ganlikun	0:13413ea9a877	898	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
ganlikun	0:13413ea9a877	899	}
ganlikun	0:13413ea9a877	900
ganlikun	0:13413ea9a877	901	/**
ganlikun	0:13413ea9a877	902	* @brief Return DMA2D foreground alpha mode.
ganlikun	0:13413ea9a877	903	* @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
ganlikun	0:13413ea9a877	904	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	905	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	906	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
ganlikun	0:13413ea9a877	907	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
ganlikun	0:13413ea9a877	908	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
ganlikun	0:13413ea9a877	909	*/
ganlikun	0:13413ea9a877	910	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	911	{
ganlikun	0:13413ea9a877	912	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
ganlikun	0:13413ea9a877	913	}
ganlikun	0:13413ea9a877	914
ganlikun	0:13413ea9a877	915	/**
ganlikun	0:13413ea9a877	916	* @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	917	* @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
ganlikun	0:13413ea9a877	918	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	919	* @param Alpha Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	920	* @retval None
ganlikun	0:13413ea9a877	921	*/
ganlikun	0:13413ea9a877	922	__STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
ganlikun	0:13413ea9a877	923	{
ganlikun	0:13413ea9a877	924	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
ganlikun	0:13413ea9a877	925	}
ganlikun	0:13413ea9a877	926
ganlikun	0:13413ea9a877	927	/**
ganlikun	0:13413ea9a877	928	* @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	929	* @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
ganlikun	0:13413ea9a877	930	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	931	* @retval Alpha value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	932	*/
ganlikun	0:13413ea9a877	933	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	934	{
ganlikun	0:13413ea9a877	935	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
ganlikun	0:13413ea9a877	936	}
ganlikun	0:13413ea9a877	937
ganlikun	0:13413ea9a877	938	/**
ganlikun	0:13413ea9a877	939	* @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
ganlikun	0:13413ea9a877	940	* @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
ganlikun	0:13413ea9a877	941	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	942	* @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
ganlikun	0:13413ea9a877	943	* @retval None
ganlikun	0:13413ea9a877	944	*/
ganlikun	0:13413ea9a877	945	__STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
ganlikun	0:13413ea9a877	946	{
ganlikun	0:13413ea9a877	947	MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
ganlikun	0:13413ea9a877	948	}
ganlikun	0:13413ea9a877	949
ganlikun	0:13413ea9a877	950	/**
ganlikun	0:13413ea9a877	951	* @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
ganlikun	0:13413ea9a877	952	* @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
ganlikun	0:13413ea9a877	953	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	954	* @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
ganlikun	0:13413ea9a877	955	*/
ganlikun	0:13413ea9a877	956	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	957	{
ganlikun	0:13413ea9a877	958	return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
ganlikun	0:13413ea9a877	959	}
ganlikun	0:13413ea9a877	960
ganlikun	0:13413ea9a877	961	/**
ganlikun	0:13413ea9a877	962	* @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
ganlikun	0:13413ea9a877	963	* @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
ganlikun	0:13413ea9a877	964	* @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
ganlikun	0:13413ea9a877	965	* @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
ganlikun	0:13413ea9a877	966	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	967	* @param Red Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	968	* @param Green Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	969	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	970	* @retval None
ganlikun	0:13413ea9a877	971	*/
ganlikun	0:13413ea9a877	972	__STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
ganlikun	0:13413ea9a877	973	{
ganlikun	0:13413ea9a877	974	MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED \| DMA2D_FGCOLR_GREEN \| DMA2D_FGCOLR_BLUE), \
ganlikun	0:13413ea9a877	975	((Red << DMA2D_FGCOLR_RED_Pos) \| (Green << DMA2D_FGCOLR_GREEN_Pos) \| Blue));
ganlikun	0:13413ea9a877	976	}
ganlikun	0:13413ea9a877	977
ganlikun	0:13413ea9a877	978	/**
ganlikun	0:13413ea9a877	979	* @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	980	* @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
ganlikun	0:13413ea9a877	981	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	982	* @param Red Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	983	* @retval None
ganlikun	0:13413ea9a877	984	*/
ganlikun	0:13413ea9a877	985	__STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
ganlikun	0:13413ea9a877	986	{
ganlikun	0:13413ea9a877	987	MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
ganlikun	0:13413ea9a877	988	}
ganlikun	0:13413ea9a877	989
ganlikun	0:13413ea9a877	990	/**
ganlikun	0:13413ea9a877	991	* @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	992	* @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
ganlikun	0:13413ea9a877	993	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	994	* @retval Red color value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	995	*/
ganlikun	0:13413ea9a877	996	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	997	{
ganlikun	0:13413ea9a877	998	return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
ganlikun	0:13413ea9a877	999	}
ganlikun	0:13413ea9a877	1000
ganlikun	0:13413ea9a877	1001	/**
ganlikun	0:13413ea9a877	1002	* @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1003	* @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
ganlikun	0:13413ea9a877	1004	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1005	* @param Green Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1006	* @retval None
ganlikun	0:13413ea9a877	1007	*/
ganlikun	0:13413ea9a877	1008	__STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
ganlikun	0:13413ea9a877	1009	{
ganlikun	0:13413ea9a877	1010	MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
ganlikun	0:13413ea9a877	1011	}
ganlikun	0:13413ea9a877	1012
ganlikun	0:13413ea9a877	1013	/**
ganlikun	0:13413ea9a877	1014	* @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1015	* @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
ganlikun	0:13413ea9a877	1016	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1017	* @retval Green color value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1018	*/
ganlikun	0:13413ea9a877	1019	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1020	{
ganlikun	0:13413ea9a877	1021	return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
ganlikun	0:13413ea9a877	1022	}
ganlikun	0:13413ea9a877	1023
ganlikun	0:13413ea9a877	1024	/**
ganlikun	0:13413ea9a877	1025	* @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1026	* @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
ganlikun	0:13413ea9a877	1027	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1028	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1029	* @retval None
ganlikun	0:13413ea9a877	1030	*/
ganlikun	0:13413ea9a877	1031	__STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
ganlikun	0:13413ea9a877	1032	{
ganlikun	0:13413ea9a877	1033	MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
ganlikun	0:13413ea9a877	1034	}
ganlikun	0:13413ea9a877	1035
ganlikun	0:13413ea9a877	1036	/**
ganlikun	0:13413ea9a877	1037	* @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1038	* @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
ganlikun	0:13413ea9a877	1039	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1040	* @retval Blue color value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1041	*/
ganlikun	0:13413ea9a877	1042	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1043	{
ganlikun	0:13413ea9a877	1044	return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
ganlikun	0:13413ea9a877	1045	}
ganlikun	0:13413ea9a877	1046
ganlikun	0:13413ea9a877	1047	/**
ganlikun	0:13413ea9a877	1048	* @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	1049	* @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
ganlikun	0:13413ea9a877	1050	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1051	* @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	1052	* @retval None
ganlikun	0:13413ea9a877	1053	*/
ganlikun	0:13413ea9a877	1054	__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
ganlikun	0:13413ea9a877	1055	{
ganlikun	0:13413ea9a877	1056	LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
ganlikun	0:13413ea9a877	1057	}
ganlikun	0:13413ea9a877	1058
ganlikun	0:13413ea9a877	1059	/**
ganlikun	0:13413ea9a877	1060	* @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	1061	* @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
ganlikun	0:13413ea9a877	1062	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1063	* @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	1064	*/
ganlikun	0:13413ea9a877	1065	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1066	{
ganlikun	0:13413ea9a877	1067	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
ganlikun	0:13413ea9a877	1068	}
ganlikun	0:13413ea9a877	1069
ganlikun	0:13413ea9a877	1070	/**
ganlikun	0:13413ea9a877	1071	* @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1072	* @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
ganlikun	0:13413ea9a877	1073	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1074	* @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1075	* @retval None
ganlikun	0:13413ea9a877	1076	*/
ganlikun	0:13413ea9a877	1077	__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
ganlikun	0:13413ea9a877	1078	{
ganlikun	0:13413ea9a877	1079	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
ganlikun	0:13413ea9a877	1080	}
ganlikun	0:13413ea9a877	1081
ganlikun	0:13413ea9a877	1082	/**
ganlikun	0:13413ea9a877	1083	* @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1084	* @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
ganlikun	0:13413ea9a877	1085	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1086	* @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1087	*/
ganlikun	0:13413ea9a877	1088	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1089	{
ganlikun	0:13413ea9a877	1090	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
ganlikun	0:13413ea9a877	1091	}
ganlikun	0:13413ea9a877	1092
ganlikun	0:13413ea9a877	1093	/**
ganlikun	0:13413ea9a877	1094	* @brief Set DMA2D foreground CLUT color mode.
ganlikun	0:13413ea9a877	1095	* @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
ganlikun	0:13413ea9a877	1096	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1097	* @param CLUTColorMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	1098	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
ganlikun	0:13413ea9a877	1099	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
ganlikun	0:13413ea9a877	1100	* @retval None
ganlikun	0:13413ea9a877	1101	*/
ganlikun	0:13413ea9a877	1102	__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
ganlikun	0:13413ea9a877	1103	{
ganlikun	0:13413ea9a877	1104	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
ganlikun	0:13413ea9a877	1105	}
ganlikun	0:13413ea9a877	1106
ganlikun	0:13413ea9a877	1107	/**
ganlikun	0:13413ea9a877	1108	* @brief Return DMA2D foreground CLUT color mode.
ganlikun	0:13413ea9a877	1109	* @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
ganlikun	0:13413ea9a877	1110	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1111	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	1112	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
ganlikun	0:13413ea9a877	1113	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
ganlikun	0:13413ea9a877	1114	*/
ganlikun	0:13413ea9a877	1115	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1116	{
ganlikun	0:13413ea9a877	1117	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
ganlikun	0:13413ea9a877	1118	}
ganlikun	0:13413ea9a877	1119
ganlikun	0:13413ea9a877	1120	/**
ganlikun	0:13413ea9a877	1121	* @}
ganlikun	0:13413ea9a877	1122	*/
ganlikun	0:13413ea9a877	1123
ganlikun	0:13413ea9a877	1124	/** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
ganlikun	0:13413ea9a877	1125	* @{
ganlikun	0:13413ea9a877	1126	*/
ganlikun	0:13413ea9a877	1127
ganlikun	0:13413ea9a877	1128	/**
ganlikun	0:13413ea9a877	1129	* @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	1130	* @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
ganlikun	0:13413ea9a877	1131	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1132	* @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	1133	* @retval None
ganlikun	0:13413ea9a877	1134	*/
ganlikun	0:13413ea9a877	1135	__STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
ganlikun	0:13413ea9a877	1136	{
ganlikun	0:13413ea9a877	1137	LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
ganlikun	0:13413ea9a877	1138	}
ganlikun	0:13413ea9a877	1139
ganlikun	0:13413ea9a877	1140	/**
ganlikun	0:13413ea9a877	1141	* @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	1142	* @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
ganlikun	0:13413ea9a877	1143	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1144	* @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	1145	*/
ganlikun	0:13413ea9a877	1146	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1147	{
ganlikun	0:13413ea9a877	1148	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
ganlikun	0:13413ea9a877	1149	}
ganlikun	0:13413ea9a877	1150
ganlikun	0:13413ea9a877	1151	/**
ganlikun	0:13413ea9a877	1152	* @brief Enable DMA2D background CLUT loading.
ganlikun	0:13413ea9a877	1153	* @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
ganlikun	0:13413ea9a877	1154	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1155	* @retval None
ganlikun	0:13413ea9a877	1156	*/
ganlikun	0:13413ea9a877	1157	__STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1158	{
ganlikun	0:13413ea9a877	1159	SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
ganlikun	0:13413ea9a877	1160	}
ganlikun	0:13413ea9a877	1161
ganlikun	0:13413ea9a877	1162	/**
ganlikun	0:13413ea9a877	1163	* @brief Indicate if DMA2D background CLUT loading is enabled.
ganlikun	0:13413ea9a877	1164	* @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
ganlikun	0:13413ea9a877	1165	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1166	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1167	*/
ganlikun	0:13413ea9a877	1168	__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1169	{
ganlikun	0:13413ea9a877	1170	return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
ganlikun	0:13413ea9a877	1171	}
ganlikun	0:13413ea9a877	1172
ganlikun	0:13413ea9a877	1173	/**
ganlikun	0:13413ea9a877	1174	* @brief Set DMA2D background color mode.
ganlikun	0:13413ea9a877	1175	* @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
ganlikun	0:13413ea9a877	1176	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1177	* @param ColorMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	1178	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
ganlikun	0:13413ea9a877	1179	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
ganlikun	0:13413ea9a877	1180	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
ganlikun	0:13413ea9a877	1181	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
ganlikun	0:13413ea9a877	1182	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
ganlikun	0:13413ea9a877	1183	* @arg @ref LL_DMA2D_INPUT_MODE_L8
ganlikun	0:13413ea9a877	1184	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
ganlikun	0:13413ea9a877	1185	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
ganlikun	0:13413ea9a877	1186	* @arg @ref LL_DMA2D_INPUT_MODE_L4
ganlikun	0:13413ea9a877	1187	* @arg @ref LL_DMA2D_INPUT_MODE_A8
ganlikun	0:13413ea9a877	1188	* @arg @ref LL_DMA2D_INPUT_MODE_A4
ganlikun	0:13413ea9a877	1189	* @retval None
ganlikun	0:13413ea9a877	1190	*/
ganlikun	0:13413ea9a877	1191	__STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
ganlikun	0:13413ea9a877	1192	{
ganlikun	0:13413ea9a877	1193	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
ganlikun	0:13413ea9a877	1194	}
ganlikun	0:13413ea9a877	1195
ganlikun	0:13413ea9a877	1196	/**
ganlikun	0:13413ea9a877	1197	* @brief Return DMA2D background color mode.
ganlikun	0:13413ea9a877	1198	* @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
ganlikun	0:13413ea9a877	1199	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1200	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	1201	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
ganlikun	0:13413ea9a877	1202	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
ganlikun	0:13413ea9a877	1203	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
ganlikun	0:13413ea9a877	1204	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
ganlikun	0:13413ea9a877	1205	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
ganlikun	0:13413ea9a877	1206	* @arg @ref LL_DMA2D_INPUT_MODE_L8
ganlikun	0:13413ea9a877	1207	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
ganlikun	0:13413ea9a877	1208	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
ganlikun	0:13413ea9a877	1209	* @arg @ref LL_DMA2D_INPUT_MODE_L4
ganlikun	0:13413ea9a877	1210	* @arg @ref LL_DMA2D_INPUT_MODE_A8
ganlikun	0:13413ea9a877	1211	* @arg @ref LL_DMA2D_INPUT_MODE_A4
ganlikun	0:13413ea9a877	1212	*/
ganlikun	0:13413ea9a877	1213	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1214	{
ganlikun	0:13413ea9a877	1215	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
ganlikun	0:13413ea9a877	1216	}
ganlikun	0:13413ea9a877	1217
ganlikun	0:13413ea9a877	1218	/**
ganlikun	0:13413ea9a877	1219	* @brief Set DMA2D background alpha mode.
ganlikun	0:13413ea9a877	1220	* @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
ganlikun	0:13413ea9a877	1221	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1222	* @param AphaMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	1223	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
ganlikun	0:13413ea9a877	1224	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
ganlikun	0:13413ea9a877	1225	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
ganlikun	0:13413ea9a877	1226	* @retval None
ganlikun	0:13413ea9a877	1227	*/
ganlikun	0:13413ea9a877	1228	__STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
ganlikun	0:13413ea9a877	1229	{
ganlikun	0:13413ea9a877	1230	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
ganlikun	0:13413ea9a877	1231	}
ganlikun	0:13413ea9a877	1232
ganlikun	0:13413ea9a877	1233	/**
ganlikun	0:13413ea9a877	1234	* @brief Return DMA2D background alpha mode.
ganlikun	0:13413ea9a877	1235	* @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
ganlikun	0:13413ea9a877	1236	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1237	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	1238	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
ganlikun	0:13413ea9a877	1239	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
ganlikun	0:13413ea9a877	1240	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
ganlikun	0:13413ea9a877	1241	*/
ganlikun	0:13413ea9a877	1242	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1243	{
ganlikun	0:13413ea9a877	1244	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
ganlikun	0:13413ea9a877	1245	}
ganlikun	0:13413ea9a877	1246
ganlikun	0:13413ea9a877	1247	/**
ganlikun	0:13413ea9a877	1248	* @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1249	* @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
ganlikun	0:13413ea9a877	1250	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1251	* @param Alpha Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1252	* @retval None
ganlikun	0:13413ea9a877	1253	*/
ganlikun	0:13413ea9a877	1254	__STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
ganlikun	0:13413ea9a877	1255	{
ganlikun	0:13413ea9a877	1256	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
ganlikun	0:13413ea9a877	1257	}
ganlikun	0:13413ea9a877	1258
ganlikun	0:13413ea9a877	1259	/**
ganlikun	0:13413ea9a877	1260	* @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1261	* @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
ganlikun	0:13413ea9a877	1262	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1263	* @retval Alpha value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1264	*/
ganlikun	0:13413ea9a877	1265	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1266	{
ganlikun	0:13413ea9a877	1267	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
ganlikun	0:13413ea9a877	1268	}
ganlikun	0:13413ea9a877	1269
ganlikun	0:13413ea9a877	1270	/**
ganlikun	0:13413ea9a877	1271	* @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
ganlikun	0:13413ea9a877	1272	* @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
ganlikun	0:13413ea9a877	1273	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1274	* @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
ganlikun	0:13413ea9a877	1275	* @retval None
ganlikun	0:13413ea9a877	1276	*/
ganlikun	0:13413ea9a877	1277	__STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
ganlikun	0:13413ea9a877	1278	{
ganlikun	0:13413ea9a877	1279	MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
ganlikun	0:13413ea9a877	1280	}
ganlikun	0:13413ea9a877	1281
ganlikun	0:13413ea9a877	1282	/**
ganlikun	0:13413ea9a877	1283	* @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
ganlikun	0:13413ea9a877	1284	* @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
ganlikun	0:13413ea9a877	1285	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1286	* @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
ganlikun	0:13413ea9a877	1287	*/
ganlikun	0:13413ea9a877	1288	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1289	{
ganlikun	0:13413ea9a877	1290	return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
ganlikun	0:13413ea9a877	1291	}
ganlikun	0:13413ea9a877	1292
ganlikun	0:13413ea9a877	1293	/**
ganlikun	0:13413ea9a877	1294	* @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
ganlikun	0:13413ea9a877	1295	* @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
ganlikun	0:13413ea9a877	1296	* @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
ganlikun	0:13413ea9a877	1297	* @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
ganlikun	0:13413ea9a877	1298	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1299	* @param Red Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1300	* @param Green Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1301	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1302	* @retval None
ganlikun	0:13413ea9a877	1303	*/
ganlikun	0:13413ea9a877	1304	__STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
ganlikun	0:13413ea9a877	1305	{
ganlikun	0:13413ea9a877	1306	MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED \| DMA2D_BGCOLR_GREEN \| DMA2D_BGCOLR_BLUE), \
ganlikun	0:13413ea9a877	1307	((Red << DMA2D_BGCOLR_RED_Pos) \| (Green << DMA2D_BGCOLR_GREEN_Pos) \| Blue));
ganlikun	0:13413ea9a877	1308	}
ganlikun	0:13413ea9a877	1309
ganlikun	0:13413ea9a877	1310	/**
ganlikun	0:13413ea9a877	1311	* @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1312	* @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
ganlikun	0:13413ea9a877	1313	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1314	* @param Red Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1315	* @retval None
ganlikun	0:13413ea9a877	1316	*/
ganlikun	0:13413ea9a877	1317	__STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
ganlikun	0:13413ea9a877	1318	{
ganlikun	0:13413ea9a877	1319	MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
ganlikun	0:13413ea9a877	1320	}
ganlikun	0:13413ea9a877	1321
ganlikun	0:13413ea9a877	1322	/**
ganlikun	0:13413ea9a877	1323	* @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1324	* @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
ganlikun	0:13413ea9a877	1325	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1326	* @retval Red color value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1327	*/
ganlikun	0:13413ea9a877	1328	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1329	{
ganlikun	0:13413ea9a877	1330	return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
ganlikun	0:13413ea9a877	1331	}
ganlikun	0:13413ea9a877	1332
ganlikun	0:13413ea9a877	1333	/**
ganlikun	0:13413ea9a877	1334	* @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1335	* @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
ganlikun	0:13413ea9a877	1336	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1337	* @param Green Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1338	* @retval None
ganlikun	0:13413ea9a877	1339	*/
ganlikun	0:13413ea9a877	1340	__STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
ganlikun	0:13413ea9a877	1341	{
ganlikun	0:13413ea9a877	1342	MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
ganlikun	0:13413ea9a877	1343	}
ganlikun	0:13413ea9a877	1344
ganlikun	0:13413ea9a877	1345	/**
ganlikun	0:13413ea9a877	1346	* @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1347	* @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
ganlikun	0:13413ea9a877	1348	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1349	* @retval Green color value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1350	*/
ganlikun	0:13413ea9a877	1351	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1352	{
ganlikun	0:13413ea9a877	1353	return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
ganlikun	0:13413ea9a877	1354	}
ganlikun	0:13413ea9a877	1355
ganlikun	0:13413ea9a877	1356	/**
ganlikun	0:13413ea9a877	1357	* @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1358	* @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
ganlikun	0:13413ea9a877	1359	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1360	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1361	* @retval None
ganlikun	0:13413ea9a877	1362	*/
ganlikun	0:13413ea9a877	1363	__STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
ganlikun	0:13413ea9a877	1364	{
ganlikun	0:13413ea9a877	1365	MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
ganlikun	0:13413ea9a877	1366	}
ganlikun	0:13413ea9a877	1367
ganlikun	0:13413ea9a877	1368	/**
ganlikun	0:13413ea9a877	1369	* @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1370	* @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
ganlikun	0:13413ea9a877	1371	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1372	* @retval Blue color value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1373	*/
ganlikun	0:13413ea9a877	1374	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1375	{
ganlikun	0:13413ea9a877	1376	return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
ganlikun	0:13413ea9a877	1377	}
ganlikun	0:13413ea9a877	1378
ganlikun	0:13413ea9a877	1379	/**
ganlikun	0:13413ea9a877	1380	* @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	1381	* @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
ganlikun	0:13413ea9a877	1382	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1383	* @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	1384	* @retval None
ganlikun	0:13413ea9a877	1385	*/
ganlikun	0:13413ea9a877	1386	__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
ganlikun	0:13413ea9a877	1387	{
ganlikun	0:13413ea9a877	1388	LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
ganlikun	0:13413ea9a877	1389	}
ganlikun	0:13413ea9a877	1390
ganlikun	0:13413ea9a877	1391	/**
ganlikun	0:13413ea9a877	1392	* @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
ganlikun	0:13413ea9a877	1393	* @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
ganlikun	0:13413ea9a877	1394	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1395	* @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
ganlikun	0:13413ea9a877	1396	*/
ganlikun	0:13413ea9a877	1397	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1398	{
ganlikun	0:13413ea9a877	1399	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
ganlikun	0:13413ea9a877	1400	}
ganlikun	0:13413ea9a877	1401
ganlikun	0:13413ea9a877	1402	/**
ganlikun	0:13413ea9a877	1403	* @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1404	* @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
ganlikun	0:13413ea9a877	1405	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1406	* @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1407	* @retval None
ganlikun	0:13413ea9a877	1408	*/
ganlikun	0:13413ea9a877	1409	__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
ganlikun	0:13413ea9a877	1410	{
ganlikun	0:13413ea9a877	1411	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
ganlikun	0:13413ea9a877	1412	}
ganlikun	0:13413ea9a877	1413
ganlikun	0:13413ea9a877	1414	/**
ganlikun	0:13413ea9a877	1415	* @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
ganlikun	0:13413ea9a877	1416	* @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
ganlikun	0:13413ea9a877	1417	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1418	* @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
ganlikun	0:13413ea9a877	1419	*/
ganlikun	0:13413ea9a877	1420	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1421	{
ganlikun	0:13413ea9a877	1422	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
ganlikun	0:13413ea9a877	1423	}
ganlikun	0:13413ea9a877	1424
ganlikun	0:13413ea9a877	1425	/**
ganlikun	0:13413ea9a877	1426	* @brief Set DMA2D background CLUT color mode.
ganlikun	0:13413ea9a877	1427	* @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
ganlikun	0:13413ea9a877	1428	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1429	* @param CLUTColorMode This parameter can be one of the following values:
ganlikun	0:13413ea9a877	1430	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
ganlikun	0:13413ea9a877	1431	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
ganlikun	0:13413ea9a877	1432	* @retval None
ganlikun	0:13413ea9a877	1433	*/
ganlikun	0:13413ea9a877	1434	__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
ganlikun	0:13413ea9a877	1435	{
ganlikun	0:13413ea9a877	1436	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
ganlikun	0:13413ea9a877	1437	}
ganlikun	0:13413ea9a877	1438
ganlikun	0:13413ea9a877	1439	/**
ganlikun	0:13413ea9a877	1440	* @brief Return DMA2D background CLUT color mode.
ganlikun	0:13413ea9a877	1441	* @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
ganlikun	0:13413ea9a877	1442	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1443	* @retval Returned value can be one of the following values:
ganlikun	0:13413ea9a877	1444	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
ganlikun	0:13413ea9a877	1445	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
ganlikun	0:13413ea9a877	1446	*/
ganlikun	0:13413ea9a877	1447	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1448	{
ganlikun	0:13413ea9a877	1449	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
ganlikun	0:13413ea9a877	1450	}
ganlikun	0:13413ea9a877	1451
ganlikun	0:13413ea9a877	1452	/**
ganlikun	0:13413ea9a877	1453	* @}
ganlikun	0:13413ea9a877	1454	*/
ganlikun	0:13413ea9a877	1455
ganlikun	0:13413ea9a877	1456	/**
ganlikun	0:13413ea9a877	1457	* @}
ganlikun	0:13413ea9a877	1458	*/
ganlikun	0:13413ea9a877	1459
ganlikun	0:13413ea9a877	1460
ganlikun	0:13413ea9a877	1461	/** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
ganlikun	0:13413ea9a877	1462	* @{
ganlikun	0:13413ea9a877	1463	*/
ganlikun	0:13413ea9a877	1464
ganlikun	0:13413ea9a877	1465	/**
ganlikun	0:13413ea9a877	1466	* @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
ganlikun	0:13413ea9a877	1467	* @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
ganlikun	0:13413ea9a877	1468	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1469	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1470	*/
ganlikun	0:13413ea9a877	1471	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1472	{
ganlikun	0:13413ea9a877	1473	return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
ganlikun	0:13413ea9a877	1474	}
ganlikun	0:13413ea9a877	1475
ganlikun	0:13413ea9a877	1476	/**
ganlikun	0:13413ea9a877	1477	* @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
ganlikun	0:13413ea9a877	1478	* @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
ganlikun	0:13413ea9a877	1479	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1480	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1481	*/
ganlikun	0:13413ea9a877	1482	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1483	{
ganlikun	0:13413ea9a877	1484	return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
ganlikun	0:13413ea9a877	1485	}
ganlikun	0:13413ea9a877	1486
ganlikun	0:13413ea9a877	1487	/**
ganlikun	0:13413ea9a877	1488	* @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
ganlikun	0:13413ea9a877	1489	* @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
ganlikun	0:13413ea9a877	1490	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1491	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1492	*/
ganlikun	0:13413ea9a877	1493	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1494	{
ganlikun	0:13413ea9a877	1495	return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
ganlikun	0:13413ea9a877	1496	}
ganlikun	0:13413ea9a877	1497
ganlikun	0:13413ea9a877	1498	/**
ganlikun	0:13413ea9a877	1499	* @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
ganlikun	0:13413ea9a877	1500	* @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
ganlikun	0:13413ea9a877	1501	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1502	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1503	*/
ganlikun	0:13413ea9a877	1504	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1505	{
ganlikun	0:13413ea9a877	1506	return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
ganlikun	0:13413ea9a877	1507	}
ganlikun	0:13413ea9a877	1508
ganlikun	0:13413ea9a877	1509	/**
ganlikun	0:13413ea9a877	1510	* @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
ganlikun	0:13413ea9a877	1511	* @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
ganlikun	0:13413ea9a877	1512	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1513	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1514	*/
ganlikun	0:13413ea9a877	1515	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1516	{
ganlikun	0:13413ea9a877	1517	return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
ganlikun	0:13413ea9a877	1518	}
ganlikun	0:13413ea9a877	1519
ganlikun	0:13413ea9a877	1520	/**
ganlikun	0:13413ea9a877	1521	* @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
ganlikun	0:13413ea9a877	1522	* @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
ganlikun	0:13413ea9a877	1523	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1524	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1525	*/
ganlikun	0:13413ea9a877	1526	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1527	{
ganlikun	0:13413ea9a877	1528	return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
ganlikun	0:13413ea9a877	1529	}
ganlikun	0:13413ea9a877	1530
ganlikun	0:13413ea9a877	1531	/**
ganlikun	0:13413ea9a877	1532	* @brief Clear DMA2D Configuration Error Interrupt Flag
ganlikun	0:13413ea9a877	1533	* @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
ganlikun	0:13413ea9a877	1534	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1535	* @retval None
ganlikun	0:13413ea9a877	1536	*/
ganlikun	0:13413ea9a877	1537	__STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1538	{
ganlikun	0:13413ea9a877	1539	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
ganlikun	0:13413ea9a877	1540	}
ganlikun	0:13413ea9a877	1541
ganlikun	0:13413ea9a877	1542	/**
ganlikun	0:13413ea9a877	1543	* @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
ganlikun	0:13413ea9a877	1544	* @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
ganlikun	0:13413ea9a877	1545	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1546	* @retval None
ganlikun	0:13413ea9a877	1547	*/
ganlikun	0:13413ea9a877	1548	__STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1549	{
ganlikun	0:13413ea9a877	1550	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
ganlikun	0:13413ea9a877	1551	}
ganlikun	0:13413ea9a877	1552
ganlikun	0:13413ea9a877	1553	/**
ganlikun	0:13413ea9a877	1554	* @brief Clear DMA2D CLUT Access Error Interrupt Flag
ganlikun	0:13413ea9a877	1555	* @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
ganlikun	0:13413ea9a877	1556	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1557	* @retval None
ganlikun	0:13413ea9a877	1558	*/
ganlikun	0:13413ea9a877	1559	__STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1560	{
ganlikun	0:13413ea9a877	1561	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
ganlikun	0:13413ea9a877	1562	}
ganlikun	0:13413ea9a877	1563
ganlikun	0:13413ea9a877	1564	/**
ganlikun	0:13413ea9a877	1565	* @brief Clear DMA2D Transfer Watermark Interrupt Flag
ganlikun	0:13413ea9a877	1566	* @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
ganlikun	0:13413ea9a877	1567	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1568	* @retval None
ganlikun	0:13413ea9a877	1569	*/
ganlikun	0:13413ea9a877	1570	__STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1571	{
ganlikun	0:13413ea9a877	1572	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
ganlikun	0:13413ea9a877	1573	}
ganlikun	0:13413ea9a877	1574
ganlikun	0:13413ea9a877	1575	/**
ganlikun	0:13413ea9a877	1576	* @brief Clear DMA2D Transfer Complete Interrupt Flag
ganlikun	0:13413ea9a877	1577	* @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
ganlikun	0:13413ea9a877	1578	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1579	* @retval None
ganlikun	0:13413ea9a877	1580	*/
ganlikun	0:13413ea9a877	1581	__STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1582	{
ganlikun	0:13413ea9a877	1583	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
ganlikun	0:13413ea9a877	1584	}
ganlikun	0:13413ea9a877	1585
ganlikun	0:13413ea9a877	1586	/**
ganlikun	0:13413ea9a877	1587	* @brief Clear DMA2D Transfer Error Interrupt Flag
ganlikun	0:13413ea9a877	1588	* @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
ganlikun	0:13413ea9a877	1589	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1590	* @retval None
ganlikun	0:13413ea9a877	1591	*/
ganlikun	0:13413ea9a877	1592	__STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1593	{
ganlikun	0:13413ea9a877	1594	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
ganlikun	0:13413ea9a877	1595	}
ganlikun	0:13413ea9a877	1596
ganlikun	0:13413ea9a877	1597	/**
ganlikun	0:13413ea9a877	1598	* @}
ganlikun	0:13413ea9a877	1599	*/
ganlikun	0:13413ea9a877	1600
ganlikun	0:13413ea9a877	1601	/** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
ganlikun	0:13413ea9a877	1602	* @{
ganlikun	0:13413ea9a877	1603	*/
ganlikun	0:13413ea9a877	1604
ganlikun	0:13413ea9a877	1605	/**
ganlikun	0:13413ea9a877	1606	* @brief Enable Configuration Error Interrupt
ganlikun	0:13413ea9a877	1607	* @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
ganlikun	0:13413ea9a877	1608	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1609	* @retval None
ganlikun	0:13413ea9a877	1610	*/
ganlikun	0:13413ea9a877	1611	__STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1612	{
ganlikun	0:13413ea9a877	1613	SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
ganlikun	0:13413ea9a877	1614	}
ganlikun	0:13413ea9a877	1615
ganlikun	0:13413ea9a877	1616	/**
ganlikun	0:13413ea9a877	1617	* @brief Enable CLUT Transfer Complete Interrupt
ganlikun	0:13413ea9a877	1618	* @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
ganlikun	0:13413ea9a877	1619	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1620	* @retval None
ganlikun	0:13413ea9a877	1621	*/
ganlikun	0:13413ea9a877	1622	__STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1623	{
ganlikun	0:13413ea9a877	1624	SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
ganlikun	0:13413ea9a877	1625	}
ganlikun	0:13413ea9a877	1626
ganlikun	0:13413ea9a877	1627	/**
ganlikun	0:13413ea9a877	1628	* @brief Enable CLUT Access Error Interrupt
ganlikun	0:13413ea9a877	1629	* @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
ganlikun	0:13413ea9a877	1630	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1631	* @retval None
ganlikun	0:13413ea9a877	1632	*/
ganlikun	0:13413ea9a877	1633	__STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1634	{
ganlikun	0:13413ea9a877	1635	SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
ganlikun	0:13413ea9a877	1636	}
ganlikun	0:13413ea9a877	1637
ganlikun	0:13413ea9a877	1638	/**
ganlikun	0:13413ea9a877	1639	* @brief Enable Transfer Watermark Interrupt
ganlikun	0:13413ea9a877	1640	* @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
ganlikun	0:13413ea9a877	1641	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1642	* @retval None
ganlikun	0:13413ea9a877	1643	*/
ganlikun	0:13413ea9a877	1644	__STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1645	{
ganlikun	0:13413ea9a877	1646	SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
ganlikun	0:13413ea9a877	1647	}
ganlikun	0:13413ea9a877	1648
ganlikun	0:13413ea9a877	1649	/**
ganlikun	0:13413ea9a877	1650	* @brief Enable Transfer Complete Interrupt
ganlikun	0:13413ea9a877	1651	* @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
ganlikun	0:13413ea9a877	1652	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1653	* @retval None
ganlikun	0:13413ea9a877	1654	*/
ganlikun	0:13413ea9a877	1655	__STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1656	{
ganlikun	0:13413ea9a877	1657	SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
ganlikun	0:13413ea9a877	1658	}
ganlikun	0:13413ea9a877	1659
ganlikun	0:13413ea9a877	1660	/**
ganlikun	0:13413ea9a877	1661	* @brief Enable Transfer Error Interrupt
ganlikun	0:13413ea9a877	1662	* @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
ganlikun	0:13413ea9a877	1663	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1664	* @retval None
ganlikun	0:13413ea9a877	1665	*/
ganlikun	0:13413ea9a877	1666	__STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1667	{
ganlikun	0:13413ea9a877	1668	SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
ganlikun	0:13413ea9a877	1669	}
ganlikun	0:13413ea9a877	1670
ganlikun	0:13413ea9a877	1671	/**
ganlikun	0:13413ea9a877	1672	* @brief Disable Configuration Error Interrupt
ganlikun	0:13413ea9a877	1673	* @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
ganlikun	0:13413ea9a877	1674	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1675	* @retval None
ganlikun	0:13413ea9a877	1676	*/
ganlikun	0:13413ea9a877	1677	__STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1678	{
ganlikun	0:13413ea9a877	1679	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
ganlikun	0:13413ea9a877	1680	}
ganlikun	0:13413ea9a877	1681
ganlikun	0:13413ea9a877	1682	/**
ganlikun	0:13413ea9a877	1683	* @brief Disable CLUT Transfer Complete Interrupt
ganlikun	0:13413ea9a877	1684	* @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
ganlikun	0:13413ea9a877	1685	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1686	* @retval None
ganlikun	0:13413ea9a877	1687	*/
ganlikun	0:13413ea9a877	1688	__STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1689	{
ganlikun	0:13413ea9a877	1690	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
ganlikun	0:13413ea9a877	1691	}
ganlikun	0:13413ea9a877	1692
ganlikun	0:13413ea9a877	1693	/**
ganlikun	0:13413ea9a877	1694	* @brief Disable CLUT Access Error Interrupt
ganlikun	0:13413ea9a877	1695	* @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
ganlikun	0:13413ea9a877	1696	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1697	* @retval None
ganlikun	0:13413ea9a877	1698	*/
ganlikun	0:13413ea9a877	1699	__STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1700	{
ganlikun	0:13413ea9a877	1701	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
ganlikun	0:13413ea9a877	1702	}
ganlikun	0:13413ea9a877	1703
ganlikun	0:13413ea9a877	1704	/**
ganlikun	0:13413ea9a877	1705	* @brief Disable Transfer Watermark Interrupt
ganlikun	0:13413ea9a877	1706	* @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
ganlikun	0:13413ea9a877	1707	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1708	* @retval None
ganlikun	0:13413ea9a877	1709	*/
ganlikun	0:13413ea9a877	1710	__STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1711	{
ganlikun	0:13413ea9a877	1712	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
ganlikun	0:13413ea9a877	1713	}
ganlikun	0:13413ea9a877	1714
ganlikun	0:13413ea9a877	1715	/**
ganlikun	0:13413ea9a877	1716	* @brief Disable Transfer Complete Interrupt
ganlikun	0:13413ea9a877	1717	* @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
ganlikun	0:13413ea9a877	1718	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1719	* @retval None
ganlikun	0:13413ea9a877	1720	*/
ganlikun	0:13413ea9a877	1721	__STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1722	{
ganlikun	0:13413ea9a877	1723	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
ganlikun	0:13413ea9a877	1724	}
ganlikun	0:13413ea9a877	1725
ganlikun	0:13413ea9a877	1726	/**
ganlikun	0:13413ea9a877	1727	* @brief Disable Transfer Error Interrupt
ganlikun	0:13413ea9a877	1728	* @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
ganlikun	0:13413ea9a877	1729	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1730	* @retval None
ganlikun	0:13413ea9a877	1731	*/
ganlikun	0:13413ea9a877	1732	__STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1733	{
ganlikun	0:13413ea9a877	1734	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
ganlikun	0:13413ea9a877	1735	}
ganlikun	0:13413ea9a877	1736
ganlikun	0:13413ea9a877	1737	/**
ganlikun	0:13413ea9a877	1738	* @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
ganlikun	0:13413ea9a877	1739	* @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
ganlikun	0:13413ea9a877	1740	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1741	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1742	*/
ganlikun	0:13413ea9a877	1743	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1744	{
ganlikun	0:13413ea9a877	1745	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
ganlikun	0:13413ea9a877	1746	}
ganlikun	0:13413ea9a877	1747
ganlikun	0:13413ea9a877	1748	/**
ganlikun	0:13413ea9a877	1749	* @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
ganlikun	0:13413ea9a877	1750	* @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
ganlikun	0:13413ea9a877	1751	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1752	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1753	*/
ganlikun	0:13413ea9a877	1754	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1755	{
ganlikun	0:13413ea9a877	1756	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
ganlikun	0:13413ea9a877	1757	}
ganlikun	0:13413ea9a877	1758
ganlikun	0:13413ea9a877	1759	/**
ganlikun	0:13413ea9a877	1760	* @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
ganlikun	0:13413ea9a877	1761	* @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
ganlikun	0:13413ea9a877	1762	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1763	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1764	*/
ganlikun	0:13413ea9a877	1765	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1766	{
ganlikun	0:13413ea9a877	1767	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
ganlikun	0:13413ea9a877	1768	}
ganlikun	0:13413ea9a877	1769
ganlikun	0:13413ea9a877	1770	/**
ganlikun	0:13413ea9a877	1771	* @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
ganlikun	0:13413ea9a877	1772	* @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
ganlikun	0:13413ea9a877	1773	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1774	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1775	*/
ganlikun	0:13413ea9a877	1776	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1777	{
ganlikun	0:13413ea9a877	1778	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
ganlikun	0:13413ea9a877	1779	}
ganlikun	0:13413ea9a877	1780
ganlikun	0:13413ea9a877	1781	/**
ganlikun	0:13413ea9a877	1782	* @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
ganlikun	0:13413ea9a877	1783	* @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
ganlikun	0:13413ea9a877	1784	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1785	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1786	*/
ganlikun	0:13413ea9a877	1787	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1788	{
ganlikun	0:13413ea9a877	1789	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
ganlikun	0:13413ea9a877	1790	}
ganlikun	0:13413ea9a877	1791
ganlikun	0:13413ea9a877	1792	/**
ganlikun	0:13413ea9a877	1793	* @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
ganlikun	0:13413ea9a877	1794	* @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
ganlikun	0:13413ea9a877	1795	* @param DMA2Dx DMA2D Instance
ganlikun	0:13413ea9a877	1796	* @retval State of bit (1 or 0).
ganlikun	0:13413ea9a877	1797	*/
ganlikun	0:13413ea9a877	1798	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
ganlikun	0:13413ea9a877	1799	{
ganlikun	0:13413ea9a877	1800	return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
ganlikun	0:13413ea9a877	1801	}
ganlikun	0:13413ea9a877	1802
ganlikun	0:13413ea9a877	1803
ganlikun	0:13413ea9a877	1804
ganlikun	0:13413ea9a877	1805	/**
ganlikun	0:13413ea9a877	1806	* @}
ganlikun	0:13413ea9a877	1807	*/
ganlikun	0:13413ea9a877	1808
ganlikun	0:13413ea9a877	1809	#if defined(USE_FULL_LL_DRIVER)
ganlikun	0:13413ea9a877	1810	/** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
ganlikun	0:13413ea9a877	1811	* @{
ganlikun	0:13413ea9a877	1812	*/
ganlikun	0:13413ea9a877	1813
ganlikun	0:13413ea9a877	1814	ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
ganlikun	0:13413ea9a877	1815	ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef DMA2Dx, LL_DMA2D_InitTypeDef DMA2D_InitStruct);
ganlikun	0:13413ea9a877	1816	void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
ganlikun	0:13413ea9a877	1817	void LL_DMA2D_ConfigLayer(DMA2D_TypeDef DMA2Dx, LL_DMA2D_LayerCfgTypeDef DMA2D_LayerCfg, uint32_t LayerIdx);
ganlikun	0:13413ea9a877	1818	void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
ganlikun	0:13413ea9a877	1819	void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef DMA2Dx, LL_DMA2D_ColorTypeDef DMA2D_ColorStruct);
ganlikun	0:13413ea9a877	1820	uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
ganlikun	0:13413ea9a877	1821	uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
ganlikun	0:13413ea9a877	1822	uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
ganlikun	0:13413ea9a877	1823	uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
ganlikun	0:13413ea9a877	1824	void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
ganlikun	0:13413ea9a877	1825
ganlikun	0:13413ea9a877	1826	/**
ganlikun	0:13413ea9a877	1827	* @}
ganlikun	0:13413ea9a877	1828	*/
ganlikun	0:13413ea9a877	1829	#endif /* USE_FULL_LL_DRIVER */
ganlikun	0:13413ea9a877	1830
ganlikun	0:13413ea9a877	1831	/**
ganlikun	0:13413ea9a877	1832	* @}
ganlikun	0:13413ea9a877	1833	*/
ganlikun	0:13413ea9a877	1834
ganlikun	0:13413ea9a877	1835	/**
ganlikun	0:13413ea9a877	1836	* @}
ganlikun	0:13413ea9a877	1837	*/
ganlikun	0:13413ea9a877	1838
ganlikun	0:13413ea9a877	1839	#endif /* defined (DMA2D) */
ganlikun	0:13413ea9a877	1840
ganlikun	0:13413ea9a877	1841	/**
ganlikun	0:13413ea9a877	1842	* @}
ganlikun	0:13413ea9a877	1843	*/
ganlikun	0:13413ea9a877	1844
ganlikun	0:13413ea9a877	1845	#ifdef __cplusplus
ganlikun	0:13413ea9a877	1846	}
ganlikun	0:13413ea9a877	1847	#endif
ganlikun	0:13413ea9a877	1848
ganlikun	0:13413ea9a877	1849	#endif /* __STM32F4xx_LL_DMA2D_H */
ganlikun	0:13413ea9a877	1850
ganlikun	0:13413ea9a877	1851	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	1852

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	1

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_dma2d.h@0:13413ea9a877, 2022-06-12 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning