mbed1-dev - 001

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_spi.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

Who changed what in which revision?

User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_hal_spi.c
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief SPI HAL module driver.
ganlikun	0:13413ea9a877	8	* This file provides firmware functions to manage the following
ganlikun	0:13413ea9a877	9	* functionalities of the Serial Peripheral Interface (SPI) peripheral:
ganlikun	0:13413ea9a877	10	* + Initialization and de-initialization functions
ganlikun	0:13413ea9a877	11	* + IO operation functions
ganlikun	0:13413ea9a877	12	* + Peripheral Control functions
ganlikun	0:13413ea9a877	13	* + Peripheral State functions
ganlikun	0:13413ea9a877	14	*
ganlikun	0:13413ea9a877	15	@verbatim
ganlikun	0:13413ea9a877	16	==============================================================================
ganlikun	0:13413ea9a877	17	##### How to use this driver #####
ganlikun	0:13413ea9a877	18	==============================================================================
ganlikun	0:13413ea9a877	19	[..]
ganlikun	0:13413ea9a877	20	The SPI HAL driver can be used as follows:
ganlikun	0:13413ea9a877	21
ganlikun	0:13413ea9a877	22	(#) Declare a SPI_HandleTypeDef handle structure, for example:
ganlikun	0:13413ea9a877	23	SPI_HandleTypeDef hspi;
ganlikun	0:13413ea9a877	24
ganlikun	0:13413ea9a877	25	(#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
ganlikun	0:13413ea9a877	26	(##) Enable the SPIx interface clock
ganlikun	0:13413ea9a877	27	(##) SPI pins configuration
ganlikun	0:13413ea9a877	28	(+++) Enable the clock for the SPI GPIOs
ganlikun	0:13413ea9a877	29	(+++) Configure these SPI pins as alternate function push-pull
ganlikun	0:13413ea9a877	30	(##) NVIC configuration if you need to use interrupt process
ganlikun	0:13413ea9a877	31	(+++) Configure the SPIx interrupt priority
ganlikun	0:13413ea9a877	32	(+++) Enable the NVIC SPI IRQ handle
ganlikun	0:13413ea9a877	33	(##) DMA Configuration if you need to use DMA process
ganlikun	0:13413ea9a877	34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
ganlikun	0:13413ea9a877	35	(+++) Enable the DMAx clock
ganlikun	0:13413ea9a877	36	(+++) Configure the DMA handle parameters
ganlikun	0:13413ea9a877	37	(+++) Configure the DMA Tx or Rx stream
ganlikun	0:13413ea9a877	38	(+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
ganlikun	0:13413ea9a877	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx stream
ganlikun	0:13413ea9a877	40
ganlikun	0:13413ea9a877	41	(#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
ganlikun	0:13413ea9a877	42	management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
ganlikun	0:13413ea9a877	43
ganlikun	0:13413ea9a877	44	(#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
ganlikun	0:13413ea9a877	45	(++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
ganlikun	0:13413ea9a877	46	by calling the customized HAL_SPI_MspInit() API.
ganlikun	0:13413ea9a877	47	[..]
ganlikun	0:13413ea9a877	48	Circular mode restriction:
ganlikun	0:13413ea9a877	49	(#) The DMA circular mode cannot be used when the SPI is configured in these modes:
ganlikun	0:13413ea9a877	50	(##) Master 2Lines RxOnly
ganlikun	0:13413ea9a877	51	(##) Master 1Line Rx
ganlikun	0:13413ea9a877	52	(#) The CRC feature is not managed when the DMA circular mode is enabled
ganlikun	0:13413ea9a877	53	(#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
ganlikun	0:13413ea9a877	54	the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
ganlikun	0:13413ea9a877	55	[..]
ganlikun	0:13413ea9a877	56	Master Receive mode restriction:
ganlikun	0:13413ea9a877	57	(#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=0) or
ganlikun	0:13413ea9a877	58	bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI
ganlikun	0:13413ea9a877	59	does not initiate a new transfer the following procedure has to be respected:
ganlikun	0:13413ea9a877	60	(##) HAL_SPI_DeInit()
ganlikun	0:13413ea9a877	61	(##) HAL_SPI_Init()
ganlikun	0:13413ea9a877	62
ganlikun	0:13413ea9a877	63	@endverbatim
ganlikun	0:13413ea9a877	64
ganlikun	0:13413ea9a877	65	Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
ganlikun	0:13413ea9a877	66	the following tables resume the max SPI frequency reached with data size 8bits/16bits,
ganlikun	0:13413ea9a877	67	according to frequency used on APBx Peripheral Clock (fPCLK) used by the SPI instance :
ganlikun	0:13413ea9a877	68
ganlikun	0:13413ea9a877	69	DataSize = SPI_DATASIZE_8BIT:
ganlikun	0:13413ea9a877	70	+----------------------------------------------------------------------------------------------+
ganlikun	0:13413ea9a877	71	\| \| \| 2Lines Fullduplex \| 2Lines RxOnly \| 1Line \|
ganlikun	0:13413ea9a877	72	\| Process \| Tranfert mode \|---------------------\|----------------------\|----------------------\|
ganlikun	0:13413ea9a877	73	\| \| \| Master \| Slave \| Master \| Slave \| Master \| Slave \|
ganlikun	0:13413ea9a877	74	\|==============================================================================================\|
ganlikun	0:13413ea9a877	75	\| T \| Polling \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| NA \| NA \|
ganlikun	0:13413ea9a877	76	\| X \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	77	\| / \| Interrupt \| Fpclk/4 \| Fpclk/8 \| NA \| NA \| NA \| NA \|
ganlikun	0:13413ea9a877	78	\| R \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	79	\| X \| DMA \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| NA \| NA \|
ganlikun	0:13413ea9a877	80	\|=========\|================\|==========\|==========\|===========\|==========\|===========\|==========\|
ganlikun	0:13413ea9a877	81	\| \| Polling \| Fpclk/2 \| Fpclk/2 \| Fpclk/64 \| Fpclk/2 \| Fpclk/64 \| Fpclk/2 \|
ganlikun	0:13413ea9a877	82	\| \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	83	\| R \| Interrupt \| Fpclk/8 \| Fpclk/8 \| Fpclk/64 \| Fpclk/2 \| Fpclk/64 \| Fpclk/2 \|
ganlikun	0:13413ea9a877	84	\| X \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	85	\| \| DMA \| Fpclk/2 \| Fpclk/2 \| Fpclk/64 \| Fpclk/2 \| Fpclk/128 \| Fpclk/2 \|
ganlikun	0:13413ea9a877	86	\|=========\|================\|==========\|==========\|===========\|==========\|===========\|==========\|
ganlikun	0:13413ea9a877	87	\| \| Polling \| Fpclk/2 \| Fpclk/4 \| NA \| NA \| Fpclk/2 \| Fpclk/64 \|
ganlikun	0:13413ea9a877	88	\| \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	89	\| T \| Interrupt \| Fpclk/2 \| Fpclk/4 \| NA \| NA \| Fpclk/2 \| Fpclk/64 \|
ganlikun	0:13413ea9a877	90	\| X \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	91	\| \| DMA \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| Fpclk/2 \| Fpclk/128\|
ganlikun	0:13413ea9a877	92	+----------------------------------------------------------------------------------------------+
ganlikun	0:13413ea9a877	93
ganlikun	0:13413ea9a877	94	DataSize = SPI_DATASIZE_16BIT:
ganlikun	0:13413ea9a877	95	+----------------------------------------------------------------------------------------------+
ganlikun	0:13413ea9a877	96	\| \| \| 2Lines Fullduplex \| 2Lines RxOnly \| 1Line \|
ganlikun	0:13413ea9a877	97	\| Process \| Tranfert mode \|---------------------\|----------------------\|----------------------\|
ganlikun	0:13413ea9a877	98	\| \| \| Master \| Slave \| Master \| Slave \| Master \| Slave \|
ganlikun	0:13413ea9a877	99	\|==============================================================================================\|
ganlikun	0:13413ea9a877	100	\| T \| Polling \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| NA \| NA \|
ganlikun	0:13413ea9a877	101	\| X \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	102	\| / \| Interrupt \| Fpclk/4 \| Fpclk/4 \| NA \| NA \| NA \| NA \|
ganlikun	0:13413ea9a877	103	\| R \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	104	\| X \| DMA \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| NA \| NA \|
ganlikun	0:13413ea9a877	105	\|=========\|================\|==========\|==========\|===========\|==========\|===========\|==========\|
ganlikun	0:13413ea9a877	106	\| \| Polling \| Fpclk/2 \| Fpclk/2 \| Fpclk/64 \| Fpclk/2 \| Fpclk/32 \| Fpclk/2 \|
ganlikun	0:13413ea9a877	107	\| \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	108	\| R \| Interrupt \| Fpclk/4 \| Fpclk/4 \| Fpclk/64 \| Fpclk/2 \| Fpclk/64 \| Fpclk/2 \|
ganlikun	0:13413ea9a877	109	\| X \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	110	\| \| DMA \| Fpclk/2 \| Fpclk/2 \| Fpclk/64 \| Fpclk/2 \| Fpclk/128 \| Fpclk/2 \|
ganlikun	0:13413ea9a877	111	\|=========\|================\|==========\|==========\|===========\|==========\|===========\|==========\|
ganlikun	0:13413ea9a877	112	\| \| Polling \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| Fpclk/2 \| Fpclk/32 \|
ganlikun	0:13413ea9a877	113	\| \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	114	\| T \| Interrupt \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| Fpclk/2 \| Fpclk/64 \|
ganlikun	0:13413ea9a877	115	\| X \|----------------\|----------\|----------\|-----------\|----------\|-----------\|----------\|
ganlikun	0:13413ea9a877	116	\| \| DMA \| Fpclk/2 \| Fpclk/2 \| NA \| NA \| Fpclk/2 \| Fpclk/128\|
ganlikun	0:13413ea9a877	117	+----------------------------------------------------------------------------------------------+
ganlikun	0:13413ea9a877	118	[..]
ganlikun	0:13413ea9a877	119	(@) The max SPI frequency depend on SPI data size (8bits, 16bits),
ganlikun	0:13413ea9a877	120	SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
ganlikun	0:13413ea9a877	121	(@)
ganlikun	0:13413ea9a877	122	(+@) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
ganlikun	0:13413ea9a877	123	(+@) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
ganlikun	0:13413ea9a877	124	(+@) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
ganlikun	0:13413ea9a877	125	******************************************************************************
ganlikun	0:13413ea9a877	126	* @attention
ganlikun	0:13413ea9a877	127	*
ganlikun	0:13413ea9a877	128	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	129	*
ganlikun	0:13413ea9a877	130	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	131	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	132	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	133	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	134	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	135	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	136	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	137	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	138	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	139	* without specific prior written permission.
ganlikun	0:13413ea9a877	140	*
ganlikun	0:13413ea9a877	141	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	142	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	143	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	144	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	145	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	146	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	147	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	148	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	149	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	150	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	151	*
ganlikun	0:13413ea9a877	152	******************************************************************************
ganlikun	0:13413ea9a877	153	*/
ganlikun	0:13413ea9a877	154
ganlikun	0:13413ea9a877	155	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	156	#include "stm32f4xx_hal.h"
ganlikun	0:13413ea9a877	157
ganlikun	0:13413ea9a877	158	/** @addtogroup STM32F4xx_HAL_Driver
ganlikun	0:13413ea9a877	159	* @{
ganlikun	0:13413ea9a877	160	*/
ganlikun	0:13413ea9a877	161	/** @defgroup SPI SPI
ganlikun	0:13413ea9a877	162	* @brief SPI HAL module driver
ganlikun	0:13413ea9a877	163	* @{
ganlikun	0:13413ea9a877	164	*/
ganlikun	0:13413ea9a877	165	#ifdef HAL_SPI_MODULE_ENABLED
ganlikun	0:13413ea9a877	166
ganlikun	0:13413ea9a877	167	/* Private typedef -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	168	/* Private defines -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	169	/** @defgroup SPI_Private_Constants SPI Private Constants
ganlikun	0:13413ea9a877	170	* @{
ganlikun	0:13413ea9a877	171	*/
ganlikun	0:13413ea9a877	172	#define SPI_DEFAULT_TIMEOUT 100U
ganlikun	0:13413ea9a877	173	/**
ganlikun	0:13413ea9a877	174	* @}
ganlikun	0:13413ea9a877	175	*/
ganlikun	0:13413ea9a877	176
ganlikun	0:13413ea9a877	177	/* Private macros ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	178	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	179	/* Private function prototypes -----------------------------------------------*/
ganlikun	0:13413ea9a877	180	/** @addtogroup SPI_Private_Functions
ganlikun	0:13413ea9a877	181	* @{
ganlikun	0:13413ea9a877	182	*/
ganlikun	0:13413ea9a877	183	static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	184	static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	185	static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	186	static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	187	static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	188	static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	189	static void SPI_DMAError(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	190	static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	191	static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	192	static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	193	static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout, uint32_t Tickstart);
ganlikun	0:13413ea9a877	194	static HAL_StatusTypeDef SPI_WaitTXEFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
ganlikun	0:13413ea9a877	195	static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	196	static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	197	static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	198	static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	199	static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	200	static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	201	static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	202	static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	203	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	204	static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	205	static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	206	static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	207	static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	208	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	209	static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	210	static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	211	static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	212	static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	213	static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
ganlikun	0:13413ea9a877	214	static HAL_StatusTypeDef SPI_CheckFlag_BSY(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
ganlikun	0:13413ea9a877	215	/**
ganlikun	0:13413ea9a877	216	* @}
ganlikun	0:13413ea9a877	217	*/
ganlikun	0:13413ea9a877	218
ganlikun	0:13413ea9a877	219	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	220	/** @defgroup SPI_Exported_Functions SPI Exported Functions
ganlikun	0:13413ea9a877	221	* @{
ganlikun	0:13413ea9a877	222	*/
ganlikun	0:13413ea9a877	223
ganlikun	0:13413ea9a877	224	/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
ganlikun	0:13413ea9a877	225	* @brief Initialization and Configuration functions
ganlikun	0:13413ea9a877	226	*
ganlikun	0:13413ea9a877	227	@verbatim
ganlikun	0:13413ea9a877	228	===============================================================================
ganlikun	0:13413ea9a877	229	##### Initialization and de-initialization functions #####
ganlikun	0:13413ea9a877	230	===============================================================================
ganlikun	0:13413ea9a877	231	[..] This subsection provides a set of functions allowing to initialize and
ganlikun	0:13413ea9a877	232	de-initialize the SPIx peripheral:
ganlikun	0:13413ea9a877	233
ganlikun	0:13413ea9a877	234	(+) User must implement HAL_SPI_MspInit() function in which he configures
ganlikun	0:13413ea9a877	235	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
ganlikun	0:13413ea9a877	236
ganlikun	0:13413ea9a877	237	(+) Call the function HAL_SPI_Init() to configure the selected device with
ganlikun	0:13413ea9a877	238	the selected configuration:
ganlikun	0:13413ea9a877	239	(++) Mode
ganlikun	0:13413ea9a877	240	(++) Direction
ganlikun	0:13413ea9a877	241	(++) Data Size
ganlikun	0:13413ea9a877	242	(++) Clock Polarity and Phase
ganlikun	0:13413ea9a877	243	(++) NSS Management
ganlikun	0:13413ea9a877	244	(++) BaudRate Prescaler
ganlikun	0:13413ea9a877	245	(++) FirstBit
ganlikun	0:13413ea9a877	246	(++) TIMode
ganlikun	0:13413ea9a877	247	(++) CRC Calculation
ganlikun	0:13413ea9a877	248	(++) CRC Polynomial if CRC enabled
ganlikun	0:13413ea9a877	249
ganlikun	0:13413ea9a877	250	(+) Call the function HAL_SPI_DeInit() to restore the default configuration
ganlikun	0:13413ea9a877	251	of the selected SPIx peripheral.
ganlikun	0:13413ea9a877	252
ganlikun	0:13413ea9a877	253	@endverbatim
ganlikun	0:13413ea9a877	254	* @{
ganlikun	0:13413ea9a877	255	*/
ganlikun	0:13413ea9a877	256
ganlikun	0:13413ea9a877	257	/**
ganlikun	0:13413ea9a877	258	* @brief Initialize the SPI according to the specified parameters
ganlikun	0:13413ea9a877	259	* in the SPI_InitTypeDef and initialize the associated handle.
ganlikun	0:13413ea9a877	260	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	261	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	262	* @retval HAL status
ganlikun	0:13413ea9a877	263	*/
ganlikun	0:13413ea9a877	264	HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	265	{
ganlikun	0:13413ea9a877	266	/* Check the SPI handle allocation */
ganlikun	0:13413ea9a877	267	if(hspi == NULL)
ganlikun	0:13413ea9a877	268	{
ganlikun	0:13413ea9a877	269	return HAL_ERROR;
ganlikun	0:13413ea9a877	270	}
ganlikun	0:13413ea9a877	271
ganlikun	0:13413ea9a877	272	/* Check the parameters */
ganlikun	0:13413ea9a877	273	assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
ganlikun	0:13413ea9a877	274	assert_param(IS_SPI_MODE(hspi->Init.Mode));
ganlikun	0:13413ea9a877	275	assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
ganlikun	0:13413ea9a877	276	assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
ganlikun	0:13413ea9a877	277	assert_param(IS_SPI_NSS(hspi->Init.NSS));
ganlikun	0:13413ea9a877	278	assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
ganlikun	0:13413ea9a877	279	assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
ganlikun	0:13413ea9a877	280	assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
ganlikun	0:13413ea9a877	281	if(hspi->Init.TIMode == SPI_TIMODE_DISABLE)
ganlikun	0:13413ea9a877	282	{
ganlikun	0:13413ea9a877	283	assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
ganlikun	0:13413ea9a877	284	assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
ganlikun	0:13413ea9a877	285	}
ganlikun	0:13413ea9a877	286	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	287	assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
ganlikun	0:13413ea9a877	288	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	289	{
ganlikun	0:13413ea9a877	290	assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
ganlikun	0:13413ea9a877	291	}
ganlikun	0:13413ea9a877	292	#else
ganlikun	0:13413ea9a877	293	hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
ganlikun	0:13413ea9a877	294	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	295
ganlikun	0:13413ea9a877	296	if(hspi->State == HAL_SPI_STATE_RESET)
ganlikun	0:13413ea9a877	297	{
ganlikun	0:13413ea9a877	298	/* Allocate lock resource and initialize it */
ganlikun	0:13413ea9a877	299	hspi->Lock = HAL_UNLOCKED;
ganlikun	0:13413ea9a877	300
ganlikun	0:13413ea9a877	301	/* Init the low level hardware : GPIO, CLOCK, NVIC... */
ganlikun	0:13413ea9a877	302	HAL_SPI_MspInit(hspi);
ganlikun	0:13413ea9a877	303	}
ganlikun	0:13413ea9a877	304
ganlikun	0:13413ea9a877	305	hspi->State = HAL_SPI_STATE_BUSY;
ganlikun	0:13413ea9a877	306
ganlikun	0:13413ea9a877	307	/* Disable the selected SPI peripheral */
ganlikun	0:13413ea9a877	308	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	309
ganlikun	0:13413ea9a877	310	/----------------------- SPIx CR1 & CR2 Configuration ---------------------/
ganlikun	0:13413ea9a877	311	/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
ganlikun	0:13413ea9a877	312	Communication speed, First bit and CRC calculation state */
ganlikun	0:13413ea9a877	313	WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode \| hspi->Init.Direction \| hspi->Init.DataSize \|
ganlikun	0:13413ea9a877	314	hspi->Init.CLKPolarity \| hspi->Init.CLKPhase \| (hspi->Init.NSS & SPI_CR1_SSM) \|
ganlikun	0:13413ea9a877	315	hspi->Init.BaudRatePrescaler \| hspi->Init.FirstBit \| hspi->Init.CRCCalculation) );
ganlikun	0:13413ea9a877	316
ganlikun	0:13413ea9a877	317	/* Configure : NSS management */
ganlikun	0:13413ea9a877	318	WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) \| hspi->Init.TIMode));
ganlikun	0:13413ea9a877	319
ganlikun	0:13413ea9a877	320	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	321	/---------------------------- SPIx CRCPOLY Configuration ------------------/
ganlikun	0:13413ea9a877	322	/* Configure : CRC Polynomial */
ganlikun	0:13413ea9a877	323	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	324	{
ganlikun	0:13413ea9a877	325	WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
ganlikun	0:13413ea9a877	326	}
ganlikun	0:13413ea9a877	327	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	328
ganlikun	0:13413ea9a877	329	#if defined(SPI_I2SCFGR_I2SMOD)
ganlikun	0:13413ea9a877	330	/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
ganlikun	0:13413ea9a877	331	CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
ganlikun	0:13413ea9a877	332	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	333
ganlikun	0:13413ea9a877	334	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	335	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	336
ganlikun	0:13413ea9a877	337	return HAL_OK;
ganlikun	0:13413ea9a877	338	}
ganlikun	0:13413ea9a877	339
ganlikun	0:13413ea9a877	340	/**
ganlikun	0:13413ea9a877	341	* @brief De Initialize the SPI peripheral.
ganlikun	0:13413ea9a877	342	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	343	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	344	* @retval HAL status
ganlikun	0:13413ea9a877	345	*/
ganlikun	0:13413ea9a877	346	HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	347	{
ganlikun	0:13413ea9a877	348	/* Check the SPI handle allocation */
ganlikun	0:13413ea9a877	349	if(hspi == NULL)
ganlikun	0:13413ea9a877	350	{
ganlikun	0:13413ea9a877	351	return HAL_ERROR;
ganlikun	0:13413ea9a877	352	}
ganlikun	0:13413ea9a877	353
ganlikun	0:13413ea9a877	354	/* Check SPI Instance parameter */
ganlikun	0:13413ea9a877	355	assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
ganlikun	0:13413ea9a877	356
ganlikun	0:13413ea9a877	357	hspi->State = HAL_SPI_STATE_BUSY;
ganlikun	0:13413ea9a877	358
ganlikun	0:13413ea9a877	359	/* Disable the SPI Peripheral Clock */
ganlikun	0:13413ea9a877	360	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	361
ganlikun	0:13413ea9a877	362	/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
ganlikun	0:13413ea9a877	363	HAL_SPI_MspDeInit(hspi);
ganlikun	0:13413ea9a877	364
ganlikun	0:13413ea9a877	365	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	366	hspi->State = HAL_SPI_STATE_RESET;
ganlikun	0:13413ea9a877	367
ganlikun	0:13413ea9a877	368	/* Release Lock */
ganlikun	0:13413ea9a877	369	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	370
ganlikun	0:13413ea9a877	371	return HAL_OK;
ganlikun	0:13413ea9a877	372	}
ganlikun	0:13413ea9a877	373
ganlikun	0:13413ea9a877	374	/**
ganlikun	0:13413ea9a877	375	* @brief Initialize the SPI MSP.
ganlikun	0:13413ea9a877	376	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	377	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	378	* @retval None
ganlikun	0:13413ea9a877	379	*/
ganlikun	0:13413ea9a877	380	__weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	381	{
ganlikun	0:13413ea9a877	382	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	383	UNUSED(hspi);
ganlikun	0:13413ea9a877	384	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	385	the HAL_SPI_MspInit should be implemented in the user file
ganlikun	0:13413ea9a877	386	*/
ganlikun	0:13413ea9a877	387	}
ganlikun	0:13413ea9a877	388
ganlikun	0:13413ea9a877	389	/**
ganlikun	0:13413ea9a877	390	* @brief De-Initialize the SPI MSP.
ganlikun	0:13413ea9a877	391	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	392	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	393	* @retval None
ganlikun	0:13413ea9a877	394	*/
ganlikun	0:13413ea9a877	395	__weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	396	{
ganlikun	0:13413ea9a877	397	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	398	UNUSED(hspi);
ganlikun	0:13413ea9a877	399	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	400	the HAL_SPI_MspDeInit should be implemented in the user file
ganlikun	0:13413ea9a877	401	*/
ganlikun	0:13413ea9a877	402	}
ganlikun	0:13413ea9a877	403
ganlikun	0:13413ea9a877	404	/**
ganlikun	0:13413ea9a877	405	* @}
ganlikun	0:13413ea9a877	406	*/
ganlikun	0:13413ea9a877	407
ganlikun	0:13413ea9a877	408	/** @defgroup SPI_Exported_Functions_Group2 IO operation functions
ganlikun	0:13413ea9a877	409	* @brief Data transfers functions
ganlikun	0:13413ea9a877	410	*
ganlikun	0:13413ea9a877	411	@verbatim
ganlikun	0:13413ea9a877	412	==============================================================================
ganlikun	0:13413ea9a877	413	##### IO operation functions #####
ganlikun	0:13413ea9a877	414	===============================================================================
ganlikun	0:13413ea9a877	415	[..]
ganlikun	0:13413ea9a877	416	This subsection provides a set of functions allowing to manage the SPI
ganlikun	0:13413ea9a877	417	data transfers.
ganlikun	0:13413ea9a877	418
ganlikun	0:13413ea9a877	419	[..] The SPI supports master and slave mode :
ganlikun	0:13413ea9a877	420
ganlikun	0:13413ea9a877	421	(#) There are two modes of transfer:
ganlikun	0:13413ea9a877	422	(++) Blocking mode: The communication is performed in polling mode.
ganlikun	0:13413ea9a877	423	The HAL status of all data processing is returned by the same function
ganlikun	0:13413ea9a877	424	after finishing transfer.
ganlikun	0:13413ea9a877	425	(++) No-Blocking mode: The communication is performed using Interrupts
ganlikun	0:13413ea9a877	426	or DMA, These APIs return the HAL status.
ganlikun	0:13413ea9a877	427	The end of the data processing will be indicated through the
ganlikun	0:13413ea9a877	428	dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
ganlikun	0:13413ea9a877	429	using DMA mode.
ganlikun	0:13413ea9a877	430	The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
ganlikun	0:13413ea9a877	431	will be executed respectively at the end of the transmit or Receive process
ganlikun	0:13413ea9a877	432	The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
ganlikun	0:13413ea9a877	433
ganlikun	0:13413ea9a877	434	(#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
ganlikun	0:13413ea9a877	435	exist for 1Line (simplex) and 2Lines (full duplex) modes.
ganlikun	0:13413ea9a877	436
ganlikun	0:13413ea9a877	437	@endverbatim
ganlikun	0:13413ea9a877	438	* @{
ganlikun	0:13413ea9a877	439	*/
ganlikun	0:13413ea9a877	440
ganlikun	0:13413ea9a877	441	/**
ganlikun	0:13413ea9a877	442	* @brief Transmit an amount of data in blocking mode.
ganlikun	0:13413ea9a877	443	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	444	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	445	* @param pData: pointer to data buffer
ganlikun	0:13413ea9a877	446	* @param Size: amount of data to be sent
ganlikun	0:13413ea9a877	447	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	448	* @retval HAL status
ganlikun	0:13413ea9a877	449	*/
ganlikun	0:13413ea9a877	450	HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
ganlikun	0:13413ea9a877	451	{
ganlikun	0:13413ea9a877	452	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	453	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	454
ganlikun	0:13413ea9a877	455	/* Check Direction parameter */
ganlikun	0:13413ea9a877	456	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
ganlikun	0:13413ea9a877	457
ganlikun	0:13413ea9a877	458	/* Process Locked */
ganlikun	0:13413ea9a877	459	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	460
ganlikun	0:13413ea9a877	461	/* Init tickstart for timeout management*/
ganlikun	0:13413ea9a877	462	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	463
ganlikun	0:13413ea9a877	464	if(hspi->State != HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	465	{
ganlikun	0:13413ea9a877	466	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	467	goto error;
ganlikun	0:13413ea9a877	468	}
ganlikun	0:13413ea9a877	469
ganlikun	0:13413ea9a877	470	if((pData == NULL ) \|\| (Size == 0))
ganlikun	0:13413ea9a877	471	{
ganlikun	0:13413ea9a877	472	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	473	goto error;
ganlikun	0:13413ea9a877	474	}
ganlikun	0:13413ea9a877	475
ganlikun	0:13413ea9a877	476	/* Set the transaction information */
ganlikun	0:13413ea9a877	477	hspi->State = HAL_SPI_STATE_BUSY_TX;
ganlikun	0:13413ea9a877	478	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	479	hspi->pTxBuffPtr = (uint8_t *)pData;
ganlikun	0:13413ea9a877	480	hspi->TxXferSize = Size;
ganlikun	0:13413ea9a877	481	hspi->TxXferCount = Size;
ganlikun	0:13413ea9a877	482
ganlikun	0:13413ea9a877	483	/Init field not used in handle to zero /
ganlikun	0:13413ea9a877	484	hspi->pRxBuffPtr = (uint8_t *)NULL;
ganlikun	0:13413ea9a877	485	hspi->RxXferSize = 0U;
ganlikun	0:13413ea9a877	486	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	487	hspi->TxISR = NULL;
ganlikun	0:13413ea9a877	488	hspi->RxISR = NULL;
ganlikun	0:13413ea9a877	489
ganlikun	0:13413ea9a877	490	/* Configure communication direction : 1Line */
ganlikun	0:13413ea9a877	491	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
ganlikun	0:13413ea9a877	492	{
ganlikun	0:13413ea9a877	493	SPI_1LINE_TX(hspi);
ganlikun	0:13413ea9a877	494	}
ganlikun	0:13413ea9a877	495
ganlikun	0:13413ea9a877	496	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	497	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	498	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	499	{
ganlikun	0:13413ea9a877	500	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	501	}
ganlikun	0:13413ea9a877	502	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	503
ganlikun	0:13413ea9a877	504	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	505	if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	506	{
ganlikun	0:13413ea9a877	507	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	508	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	509	}
ganlikun	0:13413ea9a877	510
ganlikun	0:13413ea9a877	511	/* Transmit data in 16 Bit mode */
ganlikun	0:13413ea9a877	512	if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
ganlikun	0:13413ea9a877	513	{
ganlikun	0:13413ea9a877	514	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| (hspi->TxXferCount == 0x01))
ganlikun	0:13413ea9a877	515	{
ganlikun	0:13413ea9a877	516	hspi->Instance->DR = ((uint16_t )pData);
ganlikun	0:13413ea9a877	517	pData += sizeof(uint16_t);
ganlikun	0:13413ea9a877	518	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	519	}
ganlikun	0:13413ea9a877	520	/* Transmit data in 16 Bit mode */
ganlikun	0:13413ea9a877	521	while (hspi->TxXferCount > 0U)
ganlikun	0:13413ea9a877	522	{
ganlikun	0:13413ea9a877	523	/* Wait until TXE flag is set to send data */
ganlikun	0:13413ea9a877	524	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
ganlikun	0:13413ea9a877	525	{
ganlikun	0:13413ea9a877	526	hspi->Instance->DR = ((uint16_t )pData);
ganlikun	0:13413ea9a877	527	pData += sizeof(uint16_t);
ganlikun	0:13413ea9a877	528	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	529	}
ganlikun	0:13413ea9a877	530	else
ganlikun	0:13413ea9a877	531	{
ganlikun	0:13413ea9a877	532	/* Timeout management */
ganlikun	0:13413ea9a877	533	if((Timeout == 0U) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
ganlikun	0:13413ea9a877	534	{
ganlikun	0:13413ea9a877	535	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	536	goto error;
ganlikun	0:13413ea9a877	537	}
ganlikun	0:13413ea9a877	538	}
ganlikun	0:13413ea9a877	539	}
ganlikun	0:13413ea9a877	540	}
ganlikun	0:13413ea9a877	541	/* Transmit data in 8 Bit mode */
ganlikun	0:13413ea9a877	542	else
ganlikun	0:13413ea9a877	543	{
ganlikun	0:13413ea9a877	544	if((hspi->Init.Mode == SPI_MODE_SLAVE)\|\| (hspi->TxXferCount == 0x01))
ganlikun	0:13413ea9a877	545	{
ganlikun	0:13413ea9a877	546	((__IO uint8_t)&hspi->Instance->DR) = (*pData);
ganlikun	0:13413ea9a877	547	pData += sizeof(uint8_t);
ganlikun	0:13413ea9a877	548	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	549	}
ganlikun	0:13413ea9a877	550	while (hspi->TxXferCount > 0U)
ganlikun	0:13413ea9a877	551	{
ganlikun	0:13413ea9a877	552	/* Wait until TXE flag is set to send data */
ganlikun	0:13413ea9a877	553	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
ganlikun	0:13413ea9a877	554	{
ganlikun	0:13413ea9a877	555	((__IO uint8_t)&hspi->Instance->DR) = (*pData);
ganlikun	0:13413ea9a877	556	pData += sizeof(uint8_t);
ganlikun	0:13413ea9a877	557	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	558	}
ganlikun	0:13413ea9a877	559	else
ganlikun	0:13413ea9a877	560	{
ganlikun	0:13413ea9a877	561	/* Timeout management */
ganlikun	0:13413ea9a877	562	if((Timeout == 0U) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
ganlikun	0:13413ea9a877	563	{
ganlikun	0:13413ea9a877	564	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	565	goto error;
ganlikun	0:13413ea9a877	566	}
ganlikun	0:13413ea9a877	567	}
ganlikun	0:13413ea9a877	568	}
ganlikun	0:13413ea9a877	569	}
ganlikun	0:13413ea9a877	570
ganlikun	0:13413ea9a877	571	/* Wait until TXE flag */
ganlikun	0:13413ea9a877	572	if(SPI_WaitTXEFlagStateUntilTimeout(hspi, Timeout, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	573	{
ganlikun	0:13413ea9a877	574	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	575	goto error;
ganlikun	0:13413ea9a877	576	}
ganlikun	0:13413ea9a877	577
ganlikun	0:13413ea9a877	578	/* Check Busy flag */
ganlikun	0:13413ea9a877	579	if(SPI_CheckFlag_BSY(hspi, Timeout, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	580	{
ganlikun	0:13413ea9a877	581	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	582	hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
ganlikun	0:13413ea9a877	583	goto error;
ganlikun	0:13413ea9a877	584	}
ganlikun	0:13413ea9a877	585
ganlikun	0:13413ea9a877	586	/* Clear overrun flag in 2 Lines communication mode because received is not read */
ganlikun	0:13413ea9a877	587	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
ganlikun	0:13413ea9a877	588	{
ganlikun	0:13413ea9a877	589	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	590	}
ganlikun	0:13413ea9a877	591	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	592	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	593	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	594	{
ganlikun	0:13413ea9a877	595	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	596	}
ganlikun	0:13413ea9a877	597	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	598
ganlikun	0:13413ea9a877	599	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	600	{
ganlikun	0:13413ea9a877	601	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	602	}
ganlikun	0:13413ea9a877	603
ganlikun	0:13413ea9a877	604	error:
ganlikun	0:13413ea9a877	605	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	606	/* Process Unlocked */
ganlikun	0:13413ea9a877	607	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	608	return errorcode;
ganlikun	0:13413ea9a877	609	}
ganlikun	0:13413ea9a877	610
ganlikun	0:13413ea9a877	611	/**
ganlikun	0:13413ea9a877	612	* @brief Receive an amount of data in blocking mode.
ganlikun	0:13413ea9a877	613	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	614	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	615	* @param pData: pointer to data buffer
ganlikun	0:13413ea9a877	616	* @param Size: amount of data to be received
ganlikun	0:13413ea9a877	617	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	618	* @retval HAL status
ganlikun	0:13413ea9a877	619	*/
ganlikun	0:13413ea9a877	620	HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
ganlikun	0:13413ea9a877	621	{
ganlikun	0:13413ea9a877	622	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	623	__IO uint16_t tmpreg = 0U;
ganlikun	0:13413ea9a877	624	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	625	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	626	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	627
ganlikun	0:13413ea9a877	628	if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
ganlikun	0:13413ea9a877	629	{
ganlikun	0:13413ea9a877	630	hspi->State = HAL_SPI_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	631	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
ganlikun	0:13413ea9a877	632	return HAL_SPI_TransmitReceive(hspi,pData,pData,Size,Timeout);
ganlikun	0:13413ea9a877	633	}
ganlikun	0:13413ea9a877	634
ganlikun	0:13413ea9a877	635	/* Process Locked */
ganlikun	0:13413ea9a877	636	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	637
ganlikun	0:13413ea9a877	638	/* Init tickstart for timeout management*/
ganlikun	0:13413ea9a877	639	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	640
ganlikun	0:13413ea9a877	641	if(hspi->State != HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	642	{
ganlikun	0:13413ea9a877	643	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	644	goto error;
ganlikun	0:13413ea9a877	645	}
ganlikun	0:13413ea9a877	646
ganlikun	0:13413ea9a877	647	if((pData == NULL ) \|\| (Size == 0))
ganlikun	0:13413ea9a877	648	{
ganlikun	0:13413ea9a877	649	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	650	goto error;
ganlikun	0:13413ea9a877	651	}
ganlikun	0:13413ea9a877	652
ganlikun	0:13413ea9a877	653	/* Set the transaction information */
ganlikun	0:13413ea9a877	654	hspi->State = HAL_SPI_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	655	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	656	hspi->pRxBuffPtr = (uint8_t *)pData;
ganlikun	0:13413ea9a877	657	hspi->RxXferSize = Size;
ganlikun	0:13413ea9a877	658	hspi->RxXferCount = Size;
ganlikun	0:13413ea9a877	659
ganlikun	0:13413ea9a877	660	/Init field not used in handle to zero /
ganlikun	0:13413ea9a877	661	hspi->pTxBuffPtr = (uint8_t *)NULL;
ganlikun	0:13413ea9a877	662	hspi->TxXferSize = 0U;
ganlikun	0:13413ea9a877	663	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	664	hspi->RxISR = NULL;
ganlikun	0:13413ea9a877	665	hspi->TxISR = NULL;
ganlikun	0:13413ea9a877	666
ganlikun	0:13413ea9a877	667	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	668	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	669	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	670	{
ganlikun	0:13413ea9a877	671	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	672	/* this is done to handle the CRCNEXT before the latest data */
ganlikun	0:13413ea9a877	673	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	674	}
ganlikun	0:13413ea9a877	675	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	676
ganlikun	0:13413ea9a877	677	/* Configure communication direction: 1Line */
ganlikun	0:13413ea9a877	678	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
ganlikun	0:13413ea9a877	679	{
ganlikun	0:13413ea9a877	680	SPI_1LINE_RX(hspi);
ganlikun	0:13413ea9a877	681	}
ganlikun	0:13413ea9a877	682
ganlikun	0:13413ea9a877	683	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	684	if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	685	{
ganlikun	0:13413ea9a877	686	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	687	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	688	}
ganlikun	0:13413ea9a877	689
ganlikun	0:13413ea9a877	690	/* Receive data in 8 Bit mode */
ganlikun	0:13413ea9a877	691	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
ganlikun	0:13413ea9a877	692	{
ganlikun	0:13413ea9a877	693	/* Transfer loop */
ganlikun	0:13413ea9a877	694	while(hspi->RxXferCount > 0U)
ganlikun	0:13413ea9a877	695	{
ganlikun	0:13413ea9a877	696	/* Check the RXNE flag */
ganlikun	0:13413ea9a877	697	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
ganlikun	0:13413ea9a877	698	{
ganlikun	0:13413ea9a877	699	/* read the received data */
ganlikun	0:13413ea9a877	700	(* (uint8_t )pData)= (__IO uint8_t *)&hspi->Instance->DR;
ganlikun	0:13413ea9a877	701	pData += sizeof(uint8_t);
ganlikun	0:13413ea9a877	702	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	703	}
ganlikun	0:13413ea9a877	704	else
ganlikun	0:13413ea9a877	705	{
ganlikun	0:13413ea9a877	706	/* Timeout management */
ganlikun	0:13413ea9a877	707	if((Timeout == 0U) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
ganlikun	0:13413ea9a877	708	{
ganlikun	0:13413ea9a877	709	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	710	goto error;
ganlikun	0:13413ea9a877	711	}
ganlikun	0:13413ea9a877	712	}
ganlikun	0:13413ea9a877	713	}
ganlikun	0:13413ea9a877	714	}
ganlikun	0:13413ea9a877	715	else
ganlikun	0:13413ea9a877	716	{
ganlikun	0:13413ea9a877	717	/* Transfer loop */
ganlikun	0:13413ea9a877	718	while(hspi->RxXferCount > 0U)
ganlikun	0:13413ea9a877	719	{
ganlikun	0:13413ea9a877	720	/* Check the RXNE flag */
ganlikun	0:13413ea9a877	721	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
ganlikun	0:13413ea9a877	722	{
ganlikun	0:13413ea9a877	723	((uint16_t)pData) = hspi->Instance->DR;
ganlikun	0:13413ea9a877	724	pData += sizeof(uint16_t);
ganlikun	0:13413ea9a877	725	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	726	}
ganlikun	0:13413ea9a877	727	else
ganlikun	0:13413ea9a877	728	{
ganlikun	0:13413ea9a877	729	/* Timeout management */
ganlikun	0:13413ea9a877	730	if((Timeout == 0U) \|\| ((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout)))
ganlikun	0:13413ea9a877	731	{
ganlikun	0:13413ea9a877	732	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	733	goto error;
ganlikun	0:13413ea9a877	734	}
ganlikun	0:13413ea9a877	735	}
ganlikun	0:13413ea9a877	736	}
ganlikun	0:13413ea9a877	737	}
ganlikun	0:13413ea9a877	738
ganlikun	0:13413ea9a877	739	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	740	/* Handle the CRC Transmission */
ganlikun	0:13413ea9a877	741	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	742	{
ganlikun	0:13413ea9a877	743	/* freeze the CRC before the latest data */
ganlikun	0:13413ea9a877	744	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	745
ganlikun	0:13413ea9a877	746	/* Read the latest data */
ganlikun	0:13413ea9a877	747	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	748	{
ganlikun	0:13413ea9a877	749	/* the latest data has not been received */
ganlikun	0:13413ea9a877	750	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	751	goto error;
ganlikun	0:13413ea9a877	752	}
ganlikun	0:13413ea9a877	753
ganlikun	0:13413ea9a877	754	/* Receive last data in 16 Bit mode */
ganlikun	0:13413ea9a877	755	if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
ganlikun	0:13413ea9a877	756	{
ganlikun	0:13413ea9a877	757	((uint16_t)pData) = hspi->Instance->DR;
ganlikun	0:13413ea9a877	758	}
ganlikun	0:13413ea9a877	759	/* Receive last data in 8 Bit mode */
ganlikun	0:13413ea9a877	760	else
ganlikun	0:13413ea9a877	761	{
ganlikun	0:13413ea9a877	762	((uint8_t )pData) = (__IO uint8_t )&hspi->Instance->DR;
ganlikun	0:13413ea9a877	763	}
ganlikun	0:13413ea9a877	764
ganlikun	0:13413ea9a877	765	/* Wait the CRC data */
ganlikun	0:13413ea9a877	766	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	767	{
ganlikun	0:13413ea9a877	768	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	769	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	770	goto error;
ganlikun	0:13413ea9a877	771	}
ganlikun	0:13413ea9a877	772
ganlikun	0:13413ea9a877	773	/* Read CRC to Flush DR and RXNE flag */
ganlikun	0:13413ea9a877	774	tmpreg = hspi->Instance->DR;
ganlikun	0:13413ea9a877	775	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	776	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	777	}
ganlikun	0:13413ea9a877	778	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	779
ganlikun	0:13413ea9a877	780	/* Check the end of the transaction */
ganlikun	0:13413ea9a877	781	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
ganlikun	0:13413ea9a877	782	{
ganlikun	0:13413ea9a877	783	/* Disable SPI peripheral */
ganlikun	0:13413ea9a877	784	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	785	}
ganlikun	0:13413ea9a877	786
ganlikun	0:13413ea9a877	787	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	788	/* Check if CRC error occurred */
ganlikun	0:13413ea9a877	789	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
ganlikun	0:13413ea9a877	790	{
ganlikun	0:13413ea9a877	791	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	792	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
ganlikun	0:13413ea9a877	793	}
ganlikun	0:13413ea9a877	794	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	795
ganlikun	0:13413ea9a877	796	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	797	{
ganlikun	0:13413ea9a877	798	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	799	}
ganlikun	0:13413ea9a877	800
ganlikun	0:13413ea9a877	801	error :
ganlikun	0:13413ea9a877	802	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	803	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	804	return errorcode;
ganlikun	0:13413ea9a877	805	}
ganlikun	0:13413ea9a877	806
ganlikun	0:13413ea9a877	807	/**
ganlikun	0:13413ea9a877	808	* @brief Transmit and Receive an amount of data in blocking mode.
ganlikun	0:13413ea9a877	809	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	810	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	811	* @param pTxData: pointer to transmission data buffer
ganlikun	0:13413ea9a877	812	* @param pRxData: pointer to reception data buffer
ganlikun	0:13413ea9a877	813	* @param Size: amount of data to be sent and received
ganlikun	0:13413ea9a877	814	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	815	* @retval HAL status
ganlikun	0:13413ea9a877	816	*/
ganlikun	0:13413ea9a877	817	HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
ganlikun	0:13413ea9a877	818	{
ganlikun	0:13413ea9a877	819	uint32_t tmp = 0U, tmp1 = 0U;
ganlikun	0:13413ea9a877	820	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	821	__IO uint16_t tmpreg1 = 0U;
ganlikun	0:13413ea9a877	822	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	823	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	824	/* Variable used to alternate Rx and Tx during transfer */
ganlikun	0:13413ea9a877	825	uint32_t txallowed = 1U;
ganlikun	0:13413ea9a877	826	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	827
ganlikun	0:13413ea9a877	828	/* Check Direction parameter */
ganlikun	0:13413ea9a877	829	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
ganlikun	0:13413ea9a877	830
ganlikun	0:13413ea9a877	831	/* Process Locked */
ganlikun	0:13413ea9a877	832	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	833
ganlikun	0:13413ea9a877	834	/* Init tickstart for timeout management*/
ganlikun	0:13413ea9a877	835	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	836
ganlikun	0:13413ea9a877	837	tmp = hspi->State;
ganlikun	0:13413ea9a877	838	tmp1 = hspi->Init.Mode;
ganlikun	0:13413ea9a877	839
ganlikun	0:13413ea9a877	840	if(!((tmp == HAL_SPI_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	841	((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
ganlikun	0:13413ea9a877	842	{
ganlikun	0:13413ea9a877	843	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	844	goto error;
ganlikun	0:13413ea9a877	845	}
ganlikun	0:13413ea9a877	846
ganlikun	0:13413ea9a877	847	if((pTxData == NULL) \|\| (pRxData == NULL) \|\| (Size == 0))
ganlikun	0:13413ea9a877	848	{
ganlikun	0:13413ea9a877	849	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	850	goto error;
ganlikun	0:13413ea9a877	851	}
ganlikun	0:13413ea9a877	852
ganlikun	0:13413ea9a877	853	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
ganlikun	0:13413ea9a877	854	if(hspi->State == HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	855	{
ganlikun	0:13413ea9a877	856	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
ganlikun	0:13413ea9a877	857	}
ganlikun	0:13413ea9a877	858
ganlikun	0:13413ea9a877	859	/* Set the transaction information */
ganlikun	0:13413ea9a877	860	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	861	hspi->pRxBuffPtr = (uint8_t *)pRxData;
ganlikun	0:13413ea9a877	862	hspi->RxXferCount = Size;
ganlikun	0:13413ea9a877	863	hspi->RxXferSize = Size;
ganlikun	0:13413ea9a877	864	hspi->pTxBuffPtr = (uint8_t *)pTxData;
ganlikun	0:13413ea9a877	865	hspi->TxXferCount = Size;
ganlikun	0:13413ea9a877	866	hspi->TxXferSize = Size;
ganlikun	0:13413ea9a877	867
ganlikun	0:13413ea9a877	868	/Init field not used in handle to zero /
ganlikun	0:13413ea9a877	869	hspi->RxISR = NULL;
ganlikun	0:13413ea9a877	870	hspi->TxISR = NULL;
ganlikun	0:13413ea9a877	871
ganlikun	0:13413ea9a877	872	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	873	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	874	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	875	{
ganlikun	0:13413ea9a877	876	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	877	}
ganlikun	0:13413ea9a877	878	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	879
ganlikun	0:13413ea9a877	880	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	881	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	882	{
ganlikun	0:13413ea9a877	883	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	884	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	885	}
ganlikun	0:13413ea9a877	886
ganlikun	0:13413ea9a877	887	/* Transmit and Receive data in 16 Bit mode */
ganlikun	0:13413ea9a877	888	if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
ganlikun	0:13413ea9a877	889	{
ganlikun	0:13413ea9a877	890	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| (hspi->TxXferCount == 0x01U))
ganlikun	0:13413ea9a877	891	{
ganlikun	0:13413ea9a877	892	hspi->Instance->DR = ((uint16_t )pTxData);
ganlikun	0:13413ea9a877	893	pTxData += sizeof(uint16_t);
ganlikun	0:13413ea9a877	894	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	895	}
ganlikun	0:13413ea9a877	896	while ((hspi->TxXferCount > 0U) \|\| (hspi->RxXferCount > 0U))
ganlikun	0:13413ea9a877	897	{
ganlikun	0:13413ea9a877	898	/* Check TXE flag */
ganlikun	0:13413ea9a877	899	if(txallowed && (hspi->TxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)))
ganlikun	0:13413ea9a877	900	{
ganlikun	0:13413ea9a877	901	hspi->Instance->DR = ((uint16_t )pTxData);
ganlikun	0:13413ea9a877	902	pTxData += sizeof(uint16_t);
ganlikun	0:13413ea9a877	903	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	904	/* Next Data is a reception (Rx). Tx not allowed */
ganlikun	0:13413ea9a877	905	txallowed = 0U;
ganlikun	0:13413ea9a877	906
ganlikun	0:13413ea9a877	907	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	908	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	909	if((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
ganlikun	0:13413ea9a877	910	{
ganlikun	0:13413ea9a877	911	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	912	}
ganlikun	0:13413ea9a877	913	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	914	}
ganlikun	0:13413ea9a877	915
ganlikun	0:13413ea9a877	916	/* Check RXNE flag */
ganlikun	0:13413ea9a877	917	if((hspi->RxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)))
ganlikun	0:13413ea9a877	918	{
ganlikun	0:13413ea9a877	919	((uint16_t )pRxData) = hspi->Instance->DR;
ganlikun	0:13413ea9a877	920	pRxData += sizeof(uint16_t);
ganlikun	0:13413ea9a877	921	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	922	/* Next Data is a Transmission (Tx). Tx is allowed */
ganlikun	0:13413ea9a877	923	txallowed = 1U;
ganlikun	0:13413ea9a877	924	}
ganlikun	0:13413ea9a877	925	if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout))
ganlikun	0:13413ea9a877	926	{
ganlikun	0:13413ea9a877	927	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	928	goto error;
ganlikun	0:13413ea9a877	929	}
ganlikun	0:13413ea9a877	930	}
ganlikun	0:13413ea9a877	931	}
ganlikun	0:13413ea9a877	932	/* Transmit and Receive data in 8 Bit mode */
ganlikun	0:13413ea9a877	933	else
ganlikun	0:13413ea9a877	934	{
ganlikun	0:13413ea9a877	935	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| (hspi->TxXferCount == 0x01U))
ganlikun	0:13413ea9a877	936	{
ganlikun	0:13413ea9a877	937	((__IO uint8_t)&hspi->Instance->DR) = (*pTxData);
ganlikun	0:13413ea9a877	938	pTxData += sizeof(uint8_t);
ganlikun	0:13413ea9a877	939	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	940	}
ganlikun	0:13413ea9a877	941	while((hspi->TxXferCount > 0U) \|\| (hspi->RxXferCount > 0U))
ganlikun	0:13413ea9a877	942	{
ganlikun	0:13413ea9a877	943	/* check TXE flag */
ganlikun	0:13413ea9a877	944	if(txallowed && (hspi->TxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)))
ganlikun	0:13413ea9a877	945	{
ganlikun	0:13413ea9a877	946	(__IO uint8_t )&hspi->Instance->DR = (*pTxData++);
ganlikun	0:13413ea9a877	947	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	948	/* Next Data is a reception (Rx). Tx not allowed */
ganlikun	0:13413ea9a877	949	txallowed = 0U;
ganlikun	0:13413ea9a877	950
ganlikun	0:13413ea9a877	951	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	952	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	953	if((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
ganlikun	0:13413ea9a877	954	{
ganlikun	0:13413ea9a877	955	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	956	}
ganlikun	0:13413ea9a877	957	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	958	}
ganlikun	0:13413ea9a877	959
ganlikun	0:13413ea9a877	960	/* Wait until RXNE flag is reset */
ganlikun	0:13413ea9a877	961	if((hspi->RxXferCount > 0U) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)))
ganlikun	0:13413ea9a877	962	{
ganlikun	0:13413ea9a877	963	((uint8_t )pRxData++) = hspi->Instance->DR;
ganlikun	0:13413ea9a877	964	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	965	/* Next Data is a Transmission (Tx). Tx is allowed */
ganlikun	0:13413ea9a877	966	txallowed = 1U;
ganlikun	0:13413ea9a877	967	}
ganlikun	0:13413ea9a877	968	if((Timeout != HAL_MAX_DELAY) && ((HAL_GetTick()-tickstart) >= Timeout))
ganlikun	0:13413ea9a877	969	{
ganlikun	0:13413ea9a877	970	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	971	goto error;
ganlikun	0:13413ea9a877	972	}
ganlikun	0:13413ea9a877	973	}
ganlikun	0:13413ea9a877	974	}
ganlikun	0:13413ea9a877	975
ganlikun	0:13413ea9a877	976	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	977	/* Read CRC from DR to close CRC calculation process */
ganlikun	0:13413ea9a877	978	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	979	{
ganlikun	0:13413ea9a877	980	/* Wait until TXE flag */
ganlikun	0:13413ea9a877	981	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	982	{
ganlikun	0:13413ea9a877	983	/* Error on the CRC reception */
ganlikun	0:13413ea9a877	984	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	985	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	986	goto error;
ganlikun	0:13413ea9a877	987	}
ganlikun	0:13413ea9a877	988	/* Read CRC */
ganlikun	0:13413ea9a877	989	tmpreg1 = hspi->Instance->DR;
ganlikun	0:13413ea9a877	990	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	991	UNUSED(tmpreg1);
ganlikun	0:13413ea9a877	992	}
ganlikun	0:13413ea9a877	993
ganlikun	0:13413ea9a877	994	/* Check if CRC error occurred */
ganlikun	0:13413ea9a877	995	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
ganlikun	0:13413ea9a877	996	{
ganlikun	0:13413ea9a877	997	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	998	/* Clear CRC Flag */
ganlikun	0:13413ea9a877	999	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
ganlikun	0:13413ea9a877	1000
ganlikun	0:13413ea9a877	1001	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1002	}
ganlikun	0:13413ea9a877	1003	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	1004
ganlikun	0:13413ea9a877	1005	/* Wait until TXE flag */
ganlikun	0:13413ea9a877	1006	if(SPI_WaitTXEFlagStateUntilTimeout(hspi, Timeout, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	1007	{
ganlikun	0:13413ea9a877	1008	errorcode = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1009	goto error;
ganlikun	0:13413ea9a877	1010	}
ganlikun	0:13413ea9a877	1011
ganlikun	0:13413ea9a877	1012	/* Check Busy flag */
ganlikun	0:13413ea9a877	1013	if(SPI_CheckFlag_BSY(hspi, Timeout, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	1014	{
ganlikun	0:13413ea9a877	1015	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1016	hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
ganlikun	0:13413ea9a877	1017	goto error;
ganlikun	0:13413ea9a877	1018	}
ganlikun	0:13413ea9a877	1019
ganlikun	0:13413ea9a877	1020	/* Clear overrun flag in 2 Lines communication mode because received is not read */
ganlikun	0:13413ea9a877	1021	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
ganlikun	0:13413ea9a877	1022	{
ganlikun	0:13413ea9a877	1023	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	1024	}
ganlikun	0:13413ea9a877	1025
ganlikun	0:13413ea9a877	1026	error :
ganlikun	0:13413ea9a877	1027	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	1028	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1029	return errorcode;
ganlikun	0:13413ea9a877	1030	}
ganlikun	0:13413ea9a877	1031
ganlikun	0:13413ea9a877	1032	/**
ganlikun	0:13413ea9a877	1033	* @brief Transmit an amount of data in non-blocking mode with Interrupt.
ganlikun	0:13413ea9a877	1034	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1035	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	1036	* @param pData: pointer to data buffer
ganlikun	0:13413ea9a877	1037	* @param Size: amount of data to be sent
ganlikun	0:13413ea9a877	1038	* @retval HAL status
ganlikun	0:13413ea9a877	1039	*/
ganlikun	0:13413ea9a877	1040	HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	1041	{
ganlikun	0:13413ea9a877	1042	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	1043
ganlikun	0:13413ea9a877	1044	/* Check Direction parameter */
ganlikun	0:13413ea9a877	1045	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
ganlikun	0:13413ea9a877	1046
ganlikun	0:13413ea9a877	1047	/* Process Locked */
ganlikun	0:13413ea9a877	1048	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1049
ganlikun	0:13413ea9a877	1050	if((pData == NULL) \|\| (Size == 0))
ganlikun	0:13413ea9a877	1051	{
ganlikun	0:13413ea9a877	1052	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1053	goto error;
ganlikun	0:13413ea9a877	1054	}
ganlikun	0:13413ea9a877	1055
ganlikun	0:13413ea9a877	1056	if(hspi->State != HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	1057	{
ganlikun	0:13413ea9a877	1058	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	1059	goto error;
ganlikun	0:13413ea9a877	1060	}
ganlikun	0:13413ea9a877	1061
ganlikun	0:13413ea9a877	1062	/* Set the transaction information */
ganlikun	0:13413ea9a877	1063	hspi->State = HAL_SPI_STATE_BUSY_TX;
ganlikun	0:13413ea9a877	1064	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1065	hspi->pTxBuffPtr = (uint8_t *)pData;
ganlikun	0:13413ea9a877	1066	hspi->TxXferSize = Size;
ganlikun	0:13413ea9a877	1067	hspi->TxXferCount = Size;
ganlikun	0:13413ea9a877	1068
ganlikun	0:13413ea9a877	1069	/* Init field not used in handle to zero */
ganlikun	0:13413ea9a877	1070	hspi->pRxBuffPtr = (uint8_t *)NULL;
ganlikun	0:13413ea9a877	1071	hspi->RxXferSize = 0U;
ganlikun	0:13413ea9a877	1072	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	1073	hspi->RxISR = NULL;
ganlikun	0:13413ea9a877	1074
ganlikun	0:13413ea9a877	1075	/* Set the function for IT treatment */
ganlikun	0:13413ea9a877	1076	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
ganlikun	0:13413ea9a877	1077	{
ganlikun	0:13413ea9a877	1078	hspi->TxISR = SPI_TxISR_16BIT;
ganlikun	0:13413ea9a877	1079	}
ganlikun	0:13413ea9a877	1080	else
ganlikun	0:13413ea9a877	1081	{
ganlikun	0:13413ea9a877	1082	hspi->TxISR = SPI_TxISR_8BIT;
ganlikun	0:13413ea9a877	1083	}
ganlikun	0:13413ea9a877	1084
ganlikun	0:13413ea9a877	1085	/* Configure communication direction : 1Line */
ganlikun	0:13413ea9a877	1086	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
ganlikun	0:13413ea9a877	1087	{
ganlikun	0:13413ea9a877	1088	SPI_1LINE_TX(hspi);
ganlikun	0:13413ea9a877	1089	}
ganlikun	0:13413ea9a877	1090
ganlikun	0:13413ea9a877	1091	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	1092	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	1093	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	1094	{
ganlikun	0:13413ea9a877	1095	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	1096	}
ganlikun	0:13413ea9a877	1097	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	1098
ganlikun	0:13413ea9a877	1099	if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
ganlikun	0:13413ea9a877	1100	{
ganlikun	0:13413ea9a877	1101	/* Enable TXE interrupt */
ganlikun	0:13413ea9a877	1102	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
ganlikun	0:13413ea9a877	1103	}
ganlikun	0:13413ea9a877	1104	else
ganlikun	0:13413ea9a877	1105	{
ganlikun	0:13413ea9a877	1106	/* Enable TXE and ERR interrupt */
ganlikun	0:13413ea9a877	1107	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	1108	}
ganlikun	0:13413ea9a877	1109
ganlikun	0:13413ea9a877	1110	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	1111	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	1112	{
ganlikun	0:13413ea9a877	1113	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	1114	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	1115	}
ganlikun	0:13413ea9a877	1116
ganlikun	0:13413ea9a877	1117	error :
ganlikun	0:13413ea9a877	1118	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1119	return errorcode;
ganlikun	0:13413ea9a877	1120	}
ganlikun	0:13413ea9a877	1121
ganlikun	0:13413ea9a877	1122	/**
ganlikun	0:13413ea9a877	1123	* @brief Receive an amount of data in non-blocking mode with Interrupt.
ganlikun	0:13413ea9a877	1124	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1125	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	1126	* @param pData: pointer to data buffer
ganlikun	0:13413ea9a877	1127	* @param Size: amount of data to be sent
ganlikun	0:13413ea9a877	1128	* @retval HAL status
ganlikun	0:13413ea9a877	1129	*/
ganlikun	0:13413ea9a877	1130	HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	1131	{
ganlikun	0:13413ea9a877	1132	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	1133
ganlikun	0:13413ea9a877	1134	if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
ganlikun	0:13413ea9a877	1135	{
ganlikun	0:13413ea9a877	1136	hspi->State = HAL_SPI_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	1137	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
ganlikun	0:13413ea9a877	1138	return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
ganlikun	0:13413ea9a877	1139	}
ganlikun	0:13413ea9a877	1140
ganlikun	0:13413ea9a877	1141	/* Process Locked */
ganlikun	0:13413ea9a877	1142	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1143
ganlikun	0:13413ea9a877	1144	if(hspi->State != HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	1145	{
ganlikun	0:13413ea9a877	1146	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	1147	goto error;
ganlikun	0:13413ea9a877	1148	}
ganlikun	0:13413ea9a877	1149
ganlikun	0:13413ea9a877	1150	if((pData == NULL) \|\| (Size == 0))
ganlikun	0:13413ea9a877	1151	{
ganlikun	0:13413ea9a877	1152	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1153	goto error;
ganlikun	0:13413ea9a877	1154	}
ganlikun	0:13413ea9a877	1155
ganlikun	0:13413ea9a877	1156	/* Set the transaction information */
ganlikun	0:13413ea9a877	1157	hspi->State = HAL_SPI_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	1158	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1159	hspi->pRxBuffPtr = (uint8_t *)pData;
ganlikun	0:13413ea9a877	1160	hspi->RxXferSize = Size;
ganlikun	0:13413ea9a877	1161	hspi->RxXferCount = Size;
ganlikun	0:13413ea9a877	1162
ganlikun	0:13413ea9a877	1163	/* Init field not used in handle to zero */
ganlikun	0:13413ea9a877	1164	hspi->pTxBuffPtr = (uint8_t *)NULL;
ganlikun	0:13413ea9a877	1165	hspi->TxXferSize = 0U;
ganlikun	0:13413ea9a877	1166	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	1167	hspi->TxISR = NULL;
ganlikun	0:13413ea9a877	1168
ganlikun	0:13413ea9a877	1169	/* Set the function for IT treatment */
ganlikun	0:13413ea9a877	1170	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
ganlikun	0:13413ea9a877	1171	{
ganlikun	0:13413ea9a877	1172	hspi->RxISR = SPI_RxISR_16BIT;
ganlikun	0:13413ea9a877	1173	}
ganlikun	0:13413ea9a877	1174	else
ganlikun	0:13413ea9a877	1175	{
ganlikun	0:13413ea9a877	1176	hspi->RxISR = SPI_RxISR_8BIT;
ganlikun	0:13413ea9a877	1177	}
ganlikun	0:13413ea9a877	1178
ganlikun	0:13413ea9a877	1179	/* Configure communication direction : 1Line */
ganlikun	0:13413ea9a877	1180	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
ganlikun	0:13413ea9a877	1181	{
ganlikun	0:13413ea9a877	1182	SPI_1LINE_RX(hspi);
ganlikun	0:13413ea9a877	1183	}
ganlikun	0:13413ea9a877	1184
ganlikun	0:13413ea9a877	1185	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	1186	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	1187	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	1188	{
ganlikun	0:13413ea9a877	1189	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	1190	}
ganlikun	0:13413ea9a877	1191	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	1192
ganlikun	0:13413ea9a877	1193	/* Enable TXE and ERR interrupt */
ganlikun	0:13413ea9a877	1194	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	1195
ganlikun	0:13413ea9a877	1196	/* Note : The SPI must be enabled after unlocking current process
ganlikun	0:13413ea9a877	1197	to avoid the risk of SPI interrupt handle execution before current
ganlikun	0:13413ea9a877	1198	process unlock */
ganlikun	0:13413ea9a877	1199
ganlikun	0:13413ea9a877	1200	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	1201	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	1202	{
ganlikun	0:13413ea9a877	1203	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	1204	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	1205	}
ganlikun	0:13413ea9a877	1206
ganlikun	0:13413ea9a877	1207	error :
ganlikun	0:13413ea9a877	1208	/* Process Unlocked */
ganlikun	0:13413ea9a877	1209	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1210	return errorcode;
ganlikun	0:13413ea9a877	1211	}
ganlikun	0:13413ea9a877	1212
ganlikun	0:13413ea9a877	1213	/**
ganlikun	0:13413ea9a877	1214	* @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt.
ganlikun	0:13413ea9a877	1215	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1216	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	1217	* @param pTxData: pointer to transmission data buffer
ganlikun	0:13413ea9a877	1218	* @param pRxData: pointer to reception data buffer
ganlikun	0:13413ea9a877	1219	* @param Size: amount of data to be sent and received
ganlikun	0:13413ea9a877	1220	* @retval HAL status
ganlikun	0:13413ea9a877	1221	*/
ganlikun	0:13413ea9a877	1222	HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
ganlikun	0:13413ea9a877	1223	{
ganlikun	0:13413ea9a877	1224	uint32_t tmp = 0U, tmp1 = 0U;
ganlikun	0:13413ea9a877	1225	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	1226
ganlikun	0:13413ea9a877	1227	/* Check Direction parameter */
ganlikun	0:13413ea9a877	1228	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
ganlikun	0:13413ea9a877	1229
ganlikun	0:13413ea9a877	1230	/* Process locked */
ganlikun	0:13413ea9a877	1231	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1232
ganlikun	0:13413ea9a877	1233	tmp = hspi->State;
ganlikun	0:13413ea9a877	1234	tmp1 = hspi->Init.Mode;
ganlikun	0:13413ea9a877	1235
ganlikun	0:13413ea9a877	1236	if(!((tmp == HAL_SPI_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	1237	((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
ganlikun	0:13413ea9a877	1238	{
ganlikun	0:13413ea9a877	1239	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	1240	goto error;
ganlikun	0:13413ea9a877	1241	}
ganlikun	0:13413ea9a877	1242
ganlikun	0:13413ea9a877	1243	if((pTxData == NULL ) \|\| (pRxData == NULL ) \|\| (Size == 0))
ganlikun	0:13413ea9a877	1244	{
ganlikun	0:13413ea9a877	1245	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1246	goto error;
ganlikun	0:13413ea9a877	1247	}
ganlikun	0:13413ea9a877	1248
ganlikun	0:13413ea9a877	1249	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
ganlikun	0:13413ea9a877	1250	if(hspi->State == HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	1251	{
ganlikun	0:13413ea9a877	1252	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
ganlikun	0:13413ea9a877	1253	}
ganlikun	0:13413ea9a877	1254
ganlikun	0:13413ea9a877	1255	/* Set the transaction information */
ganlikun	0:13413ea9a877	1256	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1257	hspi->pTxBuffPtr = (uint8_t *)pTxData;
ganlikun	0:13413ea9a877	1258	hspi->TxXferSize = Size;
ganlikun	0:13413ea9a877	1259	hspi->TxXferCount = Size;
ganlikun	0:13413ea9a877	1260	hspi->pRxBuffPtr = (uint8_t *)pRxData;
ganlikun	0:13413ea9a877	1261	hspi->RxXferSize = Size;
ganlikun	0:13413ea9a877	1262	hspi->RxXferCount = Size;
ganlikun	0:13413ea9a877	1263
ganlikun	0:13413ea9a877	1264	/* Set the function for IT treatment */
ganlikun	0:13413ea9a877	1265	if(hspi->Init.DataSize > SPI_DATASIZE_8BIT )
ganlikun	0:13413ea9a877	1266	{
ganlikun	0:13413ea9a877	1267	hspi->RxISR = SPI_2linesRxISR_16BIT;
ganlikun	0:13413ea9a877	1268	hspi->TxISR = SPI_2linesTxISR_16BIT;
ganlikun	0:13413ea9a877	1269	}
ganlikun	0:13413ea9a877	1270	else
ganlikun	0:13413ea9a877	1271	{
ganlikun	0:13413ea9a877	1272	hspi->RxISR = SPI_2linesRxISR_8BIT;
ganlikun	0:13413ea9a877	1273	hspi->TxISR = SPI_2linesTxISR_8BIT;
ganlikun	0:13413ea9a877	1274	}
ganlikun	0:13413ea9a877	1275
ganlikun	0:13413ea9a877	1276	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	1277	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	1278	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	1279	{
ganlikun	0:13413ea9a877	1280	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	1281	}
ganlikun	0:13413ea9a877	1282	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	1283
ganlikun	0:13413ea9a877	1284	/* Enable TXE, RXNE and ERR interrupt */
ganlikun	0:13413ea9a877	1285	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	1286
ganlikun	0:13413ea9a877	1287	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	1288	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	1289	{
ganlikun	0:13413ea9a877	1290	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	1291	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	1292	}
ganlikun	0:13413ea9a877	1293
ganlikun	0:13413ea9a877	1294	error :
ganlikun	0:13413ea9a877	1295	/* Process Unlocked */
ganlikun	0:13413ea9a877	1296	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1297	return errorcode;
ganlikun	0:13413ea9a877	1298	}
ganlikun	0:13413ea9a877	1299
ganlikun	0:13413ea9a877	1300	/**
ganlikun	0:13413ea9a877	1301	* @brief Transmit an amount of data in non-blocking mode with DMA.
ganlikun	0:13413ea9a877	1302	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1303	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	1304	* @param pData: pointer to data buffer
ganlikun	0:13413ea9a877	1305	* @param Size: amount of data to be sent
ganlikun	0:13413ea9a877	1306	* @retval HAL status
ganlikun	0:13413ea9a877	1307	*/
ganlikun	0:13413ea9a877	1308	HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	1309	{
ganlikun	0:13413ea9a877	1310	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	1311
ganlikun	0:13413ea9a877	1312	/* Check Direction parameter */
ganlikun	0:13413ea9a877	1313	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
ganlikun	0:13413ea9a877	1314
ganlikun	0:13413ea9a877	1315	/* Process Locked */
ganlikun	0:13413ea9a877	1316	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1317
ganlikun	0:13413ea9a877	1318	if(hspi->State != HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	1319	{
ganlikun	0:13413ea9a877	1320	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	1321	goto error;
ganlikun	0:13413ea9a877	1322	}
ganlikun	0:13413ea9a877	1323
ganlikun	0:13413ea9a877	1324	if((pData == NULL) \|\| (Size == 0))
ganlikun	0:13413ea9a877	1325	{
ganlikun	0:13413ea9a877	1326	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1327	goto error;
ganlikun	0:13413ea9a877	1328	}
ganlikun	0:13413ea9a877	1329
ganlikun	0:13413ea9a877	1330	/* Set the transaction information */
ganlikun	0:13413ea9a877	1331	hspi->State = HAL_SPI_STATE_BUSY_TX;
ganlikun	0:13413ea9a877	1332	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1333	hspi->pTxBuffPtr = (uint8_t *)pData;
ganlikun	0:13413ea9a877	1334	hspi->TxXferSize = Size;
ganlikun	0:13413ea9a877	1335	hspi->TxXferCount = Size;
ganlikun	0:13413ea9a877	1336
ganlikun	0:13413ea9a877	1337	/* Init field not used in handle to zero */
ganlikun	0:13413ea9a877	1338	hspi->pRxBuffPtr = (uint8_t *)NULL;
ganlikun	0:13413ea9a877	1339	hspi->TxISR = NULL;
ganlikun	0:13413ea9a877	1340	hspi->RxISR = NULL;
ganlikun	0:13413ea9a877	1341	hspi->RxXferSize = 0U;
ganlikun	0:13413ea9a877	1342	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	1343
ganlikun	0:13413ea9a877	1344	/* Configure communication direction : 1Line */
ganlikun	0:13413ea9a877	1345	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
ganlikun	0:13413ea9a877	1346	{
ganlikun	0:13413ea9a877	1347	SPI_1LINE_TX(hspi);
ganlikun	0:13413ea9a877	1348	}
ganlikun	0:13413ea9a877	1349
ganlikun	0:13413ea9a877	1350	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	1351	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	1352	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	1353	{
ganlikun	0:13413ea9a877	1354	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	1355	}
ganlikun	0:13413ea9a877	1356	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	1357
ganlikun	0:13413ea9a877	1358	/* Set the SPI TxDMA Half transfer complete callback */
ganlikun	0:13413ea9a877	1359	hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
ganlikun	0:13413ea9a877	1360
ganlikun	0:13413ea9a877	1361	/* Set the SPI TxDMA transfer complete callback */
ganlikun	0:13413ea9a877	1362	hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
ganlikun	0:13413ea9a877	1363
ganlikun	0:13413ea9a877	1364	/* Set the DMA error callback */
ganlikun	0:13413ea9a877	1365	hspi->hdmatx->XferErrorCallback = SPI_DMAError;
ganlikun	0:13413ea9a877	1366
ganlikun	0:13413ea9a877	1367	/* Set the DMA AbortCpltCallback */
ganlikun	0:13413ea9a877	1368	hspi->hdmatx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1369
ganlikun	0:13413ea9a877	1370	/* Enable the Tx DMA Stream */
ganlikun	0:13413ea9a877	1371	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
ganlikun	0:13413ea9a877	1372
ganlikun	0:13413ea9a877	1373	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	1374	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	1375	{
ganlikun	0:13413ea9a877	1376	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	1377	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	1378	}
ganlikun	0:13413ea9a877	1379
ganlikun	0:13413ea9a877	1380	/* Enable the SPI Error Interrupt Bit */
ganlikun	0:13413ea9a877	1381	SET_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
ganlikun	0:13413ea9a877	1382
ganlikun	0:13413ea9a877	1383	/* Enable Tx DMA Request */
ganlikun	0:13413ea9a877	1384	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	1385
ganlikun	0:13413ea9a877	1386	error :
ganlikun	0:13413ea9a877	1387	/* Process Unlocked */
ganlikun	0:13413ea9a877	1388	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1389	return errorcode;
ganlikun	0:13413ea9a877	1390	}
ganlikun	0:13413ea9a877	1391
ganlikun	0:13413ea9a877	1392	/**
ganlikun	0:13413ea9a877	1393	* @brief Receive an amount of data in non-blocking mode with DMA.
ganlikun	0:13413ea9a877	1394	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1395	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	1396	* @param pData: pointer to data buffer
ganlikun	0:13413ea9a877	1397	* @note When the CRC feature is enabled the pData Length must be Size + 1.
ganlikun	0:13413ea9a877	1398	* @param Size: amount of data to be sent
ganlikun	0:13413ea9a877	1399	* @retval HAL status
ganlikun	0:13413ea9a877	1400	*/
ganlikun	0:13413ea9a877	1401	HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	1402	{
ganlikun	0:13413ea9a877	1403	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	1404
ganlikun	0:13413ea9a877	1405	if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
ganlikun	0:13413ea9a877	1406	{
ganlikun	0:13413ea9a877	1407	hspi->State = HAL_SPI_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	1408	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
ganlikun	0:13413ea9a877	1409	return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
ganlikun	0:13413ea9a877	1410	}
ganlikun	0:13413ea9a877	1411
ganlikun	0:13413ea9a877	1412	/* Process Locked */
ganlikun	0:13413ea9a877	1413	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1414
ganlikun	0:13413ea9a877	1415	if(hspi->State != HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	1416	{
ganlikun	0:13413ea9a877	1417	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	1418	goto error;
ganlikun	0:13413ea9a877	1419	}
ganlikun	0:13413ea9a877	1420
ganlikun	0:13413ea9a877	1421	if((pData == NULL) \|\| (Size == 0))
ganlikun	0:13413ea9a877	1422	{
ganlikun	0:13413ea9a877	1423	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1424	goto error;
ganlikun	0:13413ea9a877	1425	}
ganlikun	0:13413ea9a877	1426
ganlikun	0:13413ea9a877	1427	/* Set the transaction information */
ganlikun	0:13413ea9a877	1428	hspi->State = HAL_SPI_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	1429	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1430	hspi->pRxBuffPtr = (uint8_t *)pData;
ganlikun	0:13413ea9a877	1431	hspi->RxXferSize = Size;
ganlikun	0:13413ea9a877	1432	hspi->RxXferCount = Size;
ganlikun	0:13413ea9a877	1433
ganlikun	0:13413ea9a877	1434	/Init field not used in handle to zero /
ganlikun	0:13413ea9a877	1435	hspi->RxISR = NULL;
ganlikun	0:13413ea9a877	1436	hspi->TxISR = NULL;
ganlikun	0:13413ea9a877	1437	hspi->TxXferSize = 0U;
ganlikun	0:13413ea9a877	1438	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	1439
ganlikun	0:13413ea9a877	1440	/* Configure communication direction : 1Line */
ganlikun	0:13413ea9a877	1441	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
ganlikun	0:13413ea9a877	1442	{
ganlikun	0:13413ea9a877	1443	SPI_1LINE_RX(hspi);
ganlikun	0:13413ea9a877	1444	}
ganlikun	0:13413ea9a877	1445
ganlikun	0:13413ea9a877	1446	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	1447	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	1448	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	1449	{
ganlikun	0:13413ea9a877	1450	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	1451	}
ganlikun	0:13413ea9a877	1452	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	1453
ganlikun	0:13413ea9a877	1454	/* Set the SPI RxDMA Half transfer complete callback */
ganlikun	0:13413ea9a877	1455	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
ganlikun	0:13413ea9a877	1456
ganlikun	0:13413ea9a877	1457	/* Set the SPI Rx DMA transfer complete callback */
ganlikun	0:13413ea9a877	1458	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
ganlikun	0:13413ea9a877	1459
ganlikun	0:13413ea9a877	1460	/* Set the DMA error callback */
ganlikun	0:13413ea9a877	1461	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
ganlikun	0:13413ea9a877	1462
ganlikun	0:13413ea9a877	1463	/* Set the DMA AbortCpltCallback */
ganlikun	0:13413ea9a877	1464	hspi->hdmarx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1465
ganlikun	0:13413ea9a877	1466	/* Enable the Rx DMA Stream */
ganlikun	0:13413ea9a877	1467	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
ganlikun	0:13413ea9a877	1468
ganlikun	0:13413ea9a877	1469	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	1470	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	1471	{
ganlikun	0:13413ea9a877	1472	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	1473	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	1474	}
ganlikun	0:13413ea9a877	1475
ganlikun	0:13413ea9a877	1476	/* Enable the SPI Error Interrupt Bit */
ganlikun	0:13413ea9a877	1477	SET_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
ganlikun	0:13413ea9a877	1478
ganlikun	0:13413ea9a877	1479	/* Enable Rx DMA Request */
ganlikun	0:13413ea9a877	1480	SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1481
ganlikun	0:13413ea9a877	1482	error:
ganlikun	0:13413ea9a877	1483	/* Process Unlocked */
ganlikun	0:13413ea9a877	1484	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1485	return errorcode;
ganlikun	0:13413ea9a877	1486	}
ganlikun	0:13413ea9a877	1487
ganlikun	0:13413ea9a877	1488	/**
ganlikun	0:13413ea9a877	1489	* @brief Transmit and Receive an amount of data in non-blocking mode with DMA.
ganlikun	0:13413ea9a877	1490	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1491	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	1492	* @param pTxData: pointer to transmission data buffer
ganlikun	0:13413ea9a877	1493	* @param pRxData: pointer to reception data buffer
ganlikun	0:13413ea9a877	1494	* @note When the CRC feature is enabled the pRxData Length must be Size + 1
ganlikun	0:13413ea9a877	1495	* @param Size: amount of data to be sent
ganlikun	0:13413ea9a877	1496	* @retval HAL status
ganlikun	0:13413ea9a877	1497	*/
ganlikun	0:13413ea9a877	1498	HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
ganlikun	0:13413ea9a877	1499	{
ganlikun	0:13413ea9a877	1500	uint32_t tmp = 0U, tmp1 = 0U;
ganlikun	0:13413ea9a877	1501	HAL_StatusTypeDef errorcode = HAL_OK;
ganlikun	0:13413ea9a877	1502
ganlikun	0:13413ea9a877	1503	/* Check Direction parameter */
ganlikun	0:13413ea9a877	1504	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
ganlikun	0:13413ea9a877	1505
ganlikun	0:13413ea9a877	1506	/* Process locked */
ganlikun	0:13413ea9a877	1507	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1508
ganlikun	0:13413ea9a877	1509	tmp = hspi->State;
ganlikun	0:13413ea9a877	1510	tmp1 = hspi->Init.Mode;
ganlikun	0:13413ea9a877	1511	if(!((tmp == HAL_SPI_STATE_READY) \|\|
ganlikun	0:13413ea9a877	1512	((tmp1 == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp == HAL_SPI_STATE_BUSY_RX))))
ganlikun	0:13413ea9a877	1513	{
ganlikun	0:13413ea9a877	1514	errorcode = HAL_BUSY;
ganlikun	0:13413ea9a877	1515	goto error;
ganlikun	0:13413ea9a877	1516	}
ganlikun	0:13413ea9a877	1517
ganlikun	0:13413ea9a877	1518	if((pTxData == NULL ) \|\| (pRxData == NULL ) \|\| (Size == 0))
ganlikun	0:13413ea9a877	1519	{
ganlikun	0:13413ea9a877	1520	errorcode = HAL_ERROR;
ganlikun	0:13413ea9a877	1521	goto error;
ganlikun	0:13413ea9a877	1522	}
ganlikun	0:13413ea9a877	1523
ganlikun	0:13413ea9a877	1524	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
ganlikun	0:13413ea9a877	1525	if(hspi->State == HAL_SPI_STATE_READY)
ganlikun	0:13413ea9a877	1526	{
ganlikun	0:13413ea9a877	1527	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
ganlikun	0:13413ea9a877	1528	}
ganlikun	0:13413ea9a877	1529
ganlikun	0:13413ea9a877	1530	/* Set the transaction information */
ganlikun	0:13413ea9a877	1531	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1532	hspi->pTxBuffPtr = (uint8_t*)pTxData;
ganlikun	0:13413ea9a877	1533	hspi->TxXferSize = Size;
ganlikun	0:13413ea9a877	1534	hspi->TxXferCount = Size;
ganlikun	0:13413ea9a877	1535	hspi->pRxBuffPtr = (uint8_t*)pRxData;
ganlikun	0:13413ea9a877	1536	hspi->RxXferSize = Size;
ganlikun	0:13413ea9a877	1537	hspi->RxXferCount = Size;
ganlikun	0:13413ea9a877	1538
ganlikun	0:13413ea9a877	1539	/* Init field not used in handle to zero */
ganlikun	0:13413ea9a877	1540	hspi->RxISR = NULL;
ganlikun	0:13413ea9a877	1541	hspi->TxISR = NULL;
ganlikun	0:13413ea9a877	1542
ganlikun	0:13413ea9a877	1543	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	1544	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	1545	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	1546	{
ganlikun	0:13413ea9a877	1547	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	1548	}
ganlikun	0:13413ea9a877	1549	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	1550
ganlikun	0:13413ea9a877	1551	/* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
ganlikun	0:13413ea9a877	1552	if(hspi->State == HAL_SPI_STATE_BUSY_RX)
ganlikun	0:13413ea9a877	1553	{
ganlikun	0:13413ea9a877	1554	/* Set the SPI Rx DMA Half transfer complete callback */
ganlikun	0:13413ea9a877	1555	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
ganlikun	0:13413ea9a877	1556	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
ganlikun	0:13413ea9a877	1557	}
ganlikun	0:13413ea9a877	1558	else
ganlikun	0:13413ea9a877	1559	{
ganlikun	0:13413ea9a877	1560	/* Set the SPI Tx/Rx DMA Half transfer complete callback */
ganlikun	0:13413ea9a877	1561	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
ganlikun	0:13413ea9a877	1562	hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
ganlikun	0:13413ea9a877	1563	}
ganlikun	0:13413ea9a877	1564
ganlikun	0:13413ea9a877	1565	/* Set the DMA error callback */
ganlikun	0:13413ea9a877	1566	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
ganlikun	0:13413ea9a877	1567
ganlikun	0:13413ea9a877	1568	/* Set the DMA AbortCpltCallback */
ganlikun	0:13413ea9a877	1569	hspi->hdmarx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1570
ganlikun	0:13413ea9a877	1571	/* Enable the Rx DMA Stream */
ganlikun	0:13413ea9a877	1572	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
ganlikun	0:13413ea9a877	1573
ganlikun	0:13413ea9a877	1574	/* Enable Rx DMA Request */
ganlikun	0:13413ea9a877	1575	SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1576
ganlikun	0:13413ea9a877	1577	/* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
ganlikun	0:13413ea9a877	1578	is performed in DMA reception complete callback */
ganlikun	0:13413ea9a877	1579	hspi->hdmatx->XferHalfCpltCallback = NULL;
ganlikun	0:13413ea9a877	1580	hspi->hdmatx->XferCpltCallback = NULL;
ganlikun	0:13413ea9a877	1581	hspi->hdmatx->XferErrorCallback = NULL;
ganlikun	0:13413ea9a877	1582	hspi->hdmatx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1583
ganlikun	0:13413ea9a877	1584	/* Enable the Tx DMA Stream */
ganlikun	0:13413ea9a877	1585	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
ganlikun	0:13413ea9a877	1586
ganlikun	0:13413ea9a877	1587	/* Check if the SPI is already enabled */
ganlikun	0:13413ea9a877	1588	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
ganlikun	0:13413ea9a877	1589	{
ganlikun	0:13413ea9a877	1590	/* Enable SPI peripheral */
ganlikun	0:13413ea9a877	1591	__HAL_SPI_ENABLE(hspi);
ganlikun	0:13413ea9a877	1592	}
ganlikun	0:13413ea9a877	1593	/* Enable the SPI Error Interrupt Bit */
ganlikun	0:13413ea9a877	1594	SET_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
ganlikun	0:13413ea9a877	1595
ganlikun	0:13413ea9a877	1596	/* Enable Tx DMA Request */
ganlikun	0:13413ea9a877	1597	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	1598
ganlikun	0:13413ea9a877	1599	error :
ganlikun	0:13413ea9a877	1600	/* Process Unlocked */
ganlikun	0:13413ea9a877	1601	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1602	return errorcode;
ganlikun	0:13413ea9a877	1603	}
ganlikun	0:13413ea9a877	1604
ganlikun	0:13413ea9a877	1605	/**
ganlikun	0:13413ea9a877	1606	* @brief Abort ongoing transfer (blocking mode).
ganlikun	0:13413ea9a877	1607	* @param hspi SPI handle.
ganlikun	0:13413ea9a877	1608	* @note This procedure could be used for aborting any ongoing transfer (Tx and Rx),
ganlikun	0:13413ea9a877	1609	* started in Interrupt or DMA mode.
ganlikun	0:13413ea9a877	1610	* This procedure performs following operations :
ganlikun	0:13413ea9a877	1611	* - Disable SPI Interrupts (depending of transfer direction)
ganlikun	0:13413ea9a877	1612	* - Disable the DMA transfer in the peripheral register (if enabled)
ganlikun	0:13413ea9a877	1613	* - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
ganlikun	0:13413ea9a877	1614	* - Set handle State to READY
ganlikun	0:13413ea9a877	1615	* @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
ganlikun	0:13413ea9a877	1616	* @note Once transfer is aborted, the __HAL_SPI_CLEAR_OVRFLAG() macro must be called in user application
ganlikun	0:13413ea9a877	1617	* before starting new SPI receive process.
ganlikun	0:13413ea9a877	1618	* @retval HAL status
ganlikun	0:13413ea9a877	1619	*/
ganlikun	0:13413ea9a877	1620	HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	1621	{
ganlikun	0:13413ea9a877	1622	__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
ganlikun	0:13413ea9a877	1623
ganlikun	0:13413ea9a877	1624	/* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
ganlikun	0:13413ea9a877	1625	if(HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
ganlikun	0:13413ea9a877	1626	{
ganlikun	0:13413ea9a877	1627	hspi->TxISR = SPI_AbortTx_ISR;
ganlikun	0:13413ea9a877	1628	}
ganlikun	0:13413ea9a877	1629
ganlikun	0:13413ea9a877	1630	if(HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
ganlikun	0:13413ea9a877	1631	{
ganlikun	0:13413ea9a877	1632	hspi->RxISR = SPI_AbortRx_ISR;
ganlikun	0:13413ea9a877	1633	}
ganlikun	0:13413ea9a877	1634
ganlikun	0:13413ea9a877	1635	/* Clear ERRIE interrupts in case of DMA Mode */
ganlikun	0:13413ea9a877	1636	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
ganlikun	0:13413ea9a877	1637
ganlikun	0:13413ea9a877	1638	/* Disable the SPI DMA Tx or SPI DMA Rx request if enabled */
ganlikun	0:13413ea9a877	1639	if ((HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) \|\| (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)))
ganlikun	0:13413ea9a877	1640	{
ganlikun	0:13413ea9a877	1641	/* Abort the SPI DMA Tx channel : use blocking DMA Abort API (no callback) */
ganlikun	0:13413ea9a877	1642	if(hspi->hdmatx != NULL)
ganlikun	0:13413ea9a877	1643	{
ganlikun	0:13413ea9a877	1644	/* Set the SPI DMA Abort callback :
ganlikun	0:13413ea9a877	1645	will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
ganlikun	0:13413ea9a877	1646	hspi->hdmatx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1647
ganlikun	0:13413ea9a877	1648	/* Abort DMA Tx Handle linked to SPI Peripheral */
ganlikun	0:13413ea9a877	1649	HAL_DMA_Abort(hspi->hdmatx);
ganlikun	0:13413ea9a877	1650
ganlikun	0:13413ea9a877	1651	/* Disable Tx DMA Request */
ganlikun	0:13413ea9a877	1652	CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN));
ganlikun	0:13413ea9a877	1653
ganlikun	0:13413ea9a877	1654	/* Wait until TXE flag is set */
ganlikun	0:13413ea9a877	1655	do
ganlikun	0:13413ea9a877	1656	{
ganlikun	0:13413ea9a877	1657	if(count-- == 0U)
ganlikun	0:13413ea9a877	1658	{
ganlikun	0:13413ea9a877	1659	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	1660	break;
ganlikun	0:13413ea9a877	1661	}
ganlikun	0:13413ea9a877	1662	}
ganlikun	0:13413ea9a877	1663	while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
ganlikun	0:13413ea9a877	1664	}
ganlikun	0:13413ea9a877	1665	/* Abort the SPI DMA Rx channel : use blocking DMA Abort API (no callback) */
ganlikun	0:13413ea9a877	1666	if(hspi->hdmarx != NULL)
ganlikun	0:13413ea9a877	1667	{
ganlikun	0:13413ea9a877	1668	/* Set the SPI DMA Abort callback :
ganlikun	0:13413ea9a877	1669	will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
ganlikun	0:13413ea9a877	1670	hspi->hdmarx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1671
ganlikun	0:13413ea9a877	1672	/* Abort DMA Rx Handle linked to SPI Peripheral */
ganlikun	0:13413ea9a877	1673	HAL_DMA_Abort(hspi->hdmarx);
ganlikun	0:13413ea9a877	1674
ganlikun	0:13413ea9a877	1675	/* Disable peripheral */
ganlikun	0:13413ea9a877	1676	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	1677
ganlikun	0:13413ea9a877	1678	/* Disable Rx DMA Request */
ganlikun	0:13413ea9a877	1679	CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN));
ganlikun	0:13413ea9a877	1680
ganlikun	0:13413ea9a877	1681	}
ganlikun	0:13413ea9a877	1682	}
ganlikun	0:13413ea9a877	1683	/* Reset Tx and Rx transfer counters */
ganlikun	0:13413ea9a877	1684	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	1685	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	1686
ganlikun	0:13413ea9a877	1687	/* Reset errorCode */
ganlikun	0:13413ea9a877	1688	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1689
ganlikun	0:13413ea9a877	1690	/* Clear the Error flags in the SR register */
ganlikun	0:13413ea9a877	1691	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	1692	__HAL_SPI_CLEAR_FREFLAG(hspi);
ganlikun	0:13413ea9a877	1693
ganlikun	0:13413ea9a877	1694	/* Restore hspi->state to ready */
ganlikun	0:13413ea9a877	1695	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	1696
ganlikun	0:13413ea9a877	1697	return HAL_OK;
ganlikun	0:13413ea9a877	1698	}
ganlikun	0:13413ea9a877	1699
ganlikun	0:13413ea9a877	1700	/**
ganlikun	0:13413ea9a877	1701	* @brief Abort ongoing transfer (Interrupt mode).
ganlikun	0:13413ea9a877	1702	* @param hspi SPI handle.
ganlikun	0:13413ea9a877	1703	* @note This procedure could be used for aborting any ongoing transfer (Tx and Rx),
ganlikun	0:13413ea9a877	1704	* started in Interrupt or DMA mode.
ganlikun	0:13413ea9a877	1705	* This procedure performs following operations :
ganlikun	0:13413ea9a877	1706	* - Disable SPI Interrupts (depending of transfer direction)
ganlikun	0:13413ea9a877	1707	* - Disable the DMA transfer in the peripheral register (if enabled)
ganlikun	0:13413ea9a877	1708	* - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
ganlikun	0:13413ea9a877	1709	* - Set handle State to READY
ganlikun	0:13413ea9a877	1710	* - At abort completion, call user abort complete callback
ganlikun	0:13413ea9a877	1711	* @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
ganlikun	0:13413ea9a877	1712	* considered as completed only when user abort complete callback is executed (not when exiting function).
ganlikun	0:13413ea9a877	1713	* @note Once transfer is aborted, the __HAL_SPI_CLEAR_OVRFLAG() macro must be called in user application
ganlikun	0:13413ea9a877	1714	* before starting new SPI receive process.
ganlikun	0:13413ea9a877	1715	* @retval HAL status
ganlikun	0:13413ea9a877	1716	*/
ganlikun	0:13413ea9a877	1717	HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	1718	{
ganlikun	0:13413ea9a877	1719	uint32_t abortcplt;
ganlikun	0:13413ea9a877	1720
ganlikun	0:13413ea9a877	1721	/* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */
ganlikun	0:13413ea9a877	1722	if(HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
ganlikun	0:13413ea9a877	1723	{
ganlikun	0:13413ea9a877	1724	hspi->TxISR = SPI_AbortTx_ISR;
ganlikun	0:13413ea9a877	1725	}
ganlikun	0:13413ea9a877	1726
ganlikun	0:13413ea9a877	1727	if(HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
ganlikun	0:13413ea9a877	1728	{
ganlikun	0:13413ea9a877	1729	hspi->RxISR = SPI_AbortRx_ISR;
ganlikun	0:13413ea9a877	1730	}
ganlikun	0:13413ea9a877	1731
ganlikun	0:13413ea9a877	1732	/* Clear ERRIE interrupts in case of DMA Mode */
ganlikun	0:13413ea9a877	1733	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
ganlikun	0:13413ea9a877	1734
ganlikun	0:13413ea9a877	1735	abortcplt = 1U;
ganlikun	0:13413ea9a877	1736
ganlikun	0:13413ea9a877	1737	/* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks should be initialised
ganlikun	0:13413ea9a877	1738	before any call to DMA Abort functions */
ganlikun	0:13413ea9a877	1739	/* DMA Tx Handle is valid */
ganlikun	0:13413ea9a877	1740	if(hspi->hdmatx != NULL)
ganlikun	0:13413ea9a877	1741	{
ganlikun	0:13413ea9a877	1742	/* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
ganlikun	0:13413ea9a877	1743	Otherwise, set it to NULL */
ganlikun	0:13413ea9a877	1744	if(HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
ganlikun	0:13413ea9a877	1745	{
ganlikun	0:13413ea9a877	1746	hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback;
ganlikun	0:13413ea9a877	1747	}
ganlikun	0:13413ea9a877	1748	else
ganlikun	0:13413ea9a877	1749	{
ganlikun	0:13413ea9a877	1750	hspi->hdmatx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1751	}
ganlikun	0:13413ea9a877	1752	}
ganlikun	0:13413ea9a877	1753	/* DMA Rx Handle is valid */
ganlikun	0:13413ea9a877	1754	if(hspi->hdmarx != NULL)
ganlikun	0:13413ea9a877	1755	{
ganlikun	0:13413ea9a877	1756	/* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
ganlikun	0:13413ea9a877	1757	Otherwise, set it to NULL */
ganlikun	0:13413ea9a877	1758	if(HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
ganlikun	0:13413ea9a877	1759	{
ganlikun	0:13413ea9a877	1760	hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback;
ganlikun	0:13413ea9a877	1761	}
ganlikun	0:13413ea9a877	1762	else
ganlikun	0:13413ea9a877	1763	{
ganlikun	0:13413ea9a877	1764	hspi->hdmarx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1765	}
ganlikun	0:13413ea9a877	1766	}
ganlikun	0:13413ea9a877	1767
ganlikun	0:13413ea9a877	1768	/* Disable the SPI DMA Tx or the SPI Rx request if enabled */
ganlikun	0:13413ea9a877	1769	if((HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN)) && (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN)))
ganlikun	0:13413ea9a877	1770	{
ganlikun	0:13413ea9a877	1771	/* Abort the SPI DMA Tx channel */
ganlikun	0:13413ea9a877	1772	if(hspi->hdmatx != NULL)
ganlikun	0:13413ea9a877	1773	{
ganlikun	0:13413ea9a877	1774	/* Abort DMA Tx Handle linked to SPI Peripheral */
ganlikun	0:13413ea9a877	1775	if(HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
ganlikun	0:13413ea9a877	1776	{
ganlikun	0:13413ea9a877	1777	hspi->hdmatx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1778	}
ganlikun	0:13413ea9a877	1779	else
ganlikun	0:13413ea9a877	1780	{
ganlikun	0:13413ea9a877	1781	abortcplt = 0U;
ganlikun	0:13413ea9a877	1782	}
ganlikun	0:13413ea9a877	1783	}
ganlikun	0:13413ea9a877	1784	/* Abort the SPI DMA Rx channel */
ganlikun	0:13413ea9a877	1785	if(hspi->hdmarx != NULL)
ganlikun	0:13413ea9a877	1786	{
ganlikun	0:13413ea9a877	1787	/* Abort DMA Rx Handle linked to SPI Peripheral */
ganlikun	0:13413ea9a877	1788	if(HAL_DMA_Abort_IT(hspi->hdmarx)!= HAL_OK)
ganlikun	0:13413ea9a877	1789	{
ganlikun	0:13413ea9a877	1790	hspi->hdmarx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1791	abortcplt = 1U;
ganlikun	0:13413ea9a877	1792	}
ganlikun	0:13413ea9a877	1793	else
ganlikun	0:13413ea9a877	1794	{
ganlikun	0:13413ea9a877	1795	abortcplt = 0U;
ganlikun	0:13413ea9a877	1796	}
ganlikun	0:13413ea9a877	1797	}
ganlikun	0:13413ea9a877	1798	}
ganlikun	0:13413ea9a877	1799
ganlikun	0:13413ea9a877	1800	/* Disable the SPI DMA Tx or the SPI Rx request if enabled */
ganlikun	0:13413ea9a877	1801	if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
ganlikun	0:13413ea9a877	1802	{
ganlikun	0:13413ea9a877	1803	/* Abort the SPI DMA Tx channel */
ganlikun	0:13413ea9a877	1804	if(hspi->hdmatx != NULL)
ganlikun	0:13413ea9a877	1805	{
ganlikun	0:13413ea9a877	1806	/* Abort DMA Tx Handle linked to SPI Peripheral */
ganlikun	0:13413ea9a877	1807	if(HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
ganlikun	0:13413ea9a877	1808	{
ganlikun	0:13413ea9a877	1809	hspi->hdmatx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1810	}
ganlikun	0:13413ea9a877	1811	else
ganlikun	0:13413ea9a877	1812	{
ganlikun	0:13413ea9a877	1813	abortcplt = 0U;
ganlikun	0:13413ea9a877	1814	}
ganlikun	0:13413ea9a877	1815	}
ganlikun	0:13413ea9a877	1816	}
ganlikun	0:13413ea9a877	1817	/* Disable the SPI DMA Tx or the SPI Rx request if enabled */
ganlikun	0:13413ea9a877	1818	if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
ganlikun	0:13413ea9a877	1819	{
ganlikun	0:13413ea9a877	1820	/* Abort the SPI DMA Rx channel */
ganlikun	0:13413ea9a877	1821	if(hspi->hdmarx != NULL)
ganlikun	0:13413ea9a877	1822	{
ganlikun	0:13413ea9a877	1823	/* Abort DMA Rx Handle linked to SPI Peripheral */
ganlikun	0:13413ea9a877	1824	if(HAL_DMA_Abort_IT(hspi->hdmarx)!= HAL_OK)
ganlikun	0:13413ea9a877	1825	{
ganlikun	0:13413ea9a877	1826	hspi->hdmarx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	1827	}
ganlikun	0:13413ea9a877	1828	else
ganlikun	0:13413ea9a877	1829	{
ganlikun	0:13413ea9a877	1830	abortcplt = 0U;
ganlikun	0:13413ea9a877	1831	}
ganlikun	0:13413ea9a877	1832	}
ganlikun	0:13413ea9a877	1833	}
ganlikun	0:13413ea9a877	1834
ganlikun	0:13413ea9a877	1835	if(abortcplt == 1U)
ganlikun	0:13413ea9a877	1836	{
ganlikun	0:13413ea9a877	1837	/* Reset Tx and Rx transfer counters */
ganlikun	0:13413ea9a877	1838	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	1839	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	1840
ganlikun	0:13413ea9a877	1841	/* Reset errorCode */
ganlikun	0:13413ea9a877	1842	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	1843
ganlikun	0:13413ea9a877	1844	/* Clear the Error flags in the SR register */
ganlikun	0:13413ea9a877	1845	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	1846	__HAL_SPI_CLEAR_FREFLAG(hspi);
ganlikun	0:13413ea9a877	1847
ganlikun	0:13413ea9a877	1848	/* Restore hspi->State to Ready */
ganlikun	0:13413ea9a877	1849	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	1850
ganlikun	0:13413ea9a877	1851	/* As no DMA to be aborted, call directly user Abort complete callback */
ganlikun	0:13413ea9a877	1852	HAL_SPI_AbortCpltCallback(hspi);
ganlikun	0:13413ea9a877	1853	}
ganlikun	0:13413ea9a877	1854	return HAL_OK;
ganlikun	0:13413ea9a877	1855	}
ganlikun	0:13413ea9a877	1856
ganlikun	0:13413ea9a877	1857	/**
ganlikun	0:13413ea9a877	1858	* @brief Pause the DMA Transfer.
ganlikun	0:13413ea9a877	1859	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1860	* the configuration information for the specified SPI module.
ganlikun	0:13413ea9a877	1861	* @retval HAL status
ganlikun	0:13413ea9a877	1862	*/
ganlikun	0:13413ea9a877	1863	HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	1864	{
ganlikun	0:13413ea9a877	1865	/* Process Locked */
ganlikun	0:13413ea9a877	1866	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1867
ganlikun	0:13413ea9a877	1868	/* Disable the SPI DMA Tx & Rx requests */
ganlikun	0:13413ea9a877	1869	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1870
ganlikun	0:13413ea9a877	1871	/* Process Unlocked */
ganlikun	0:13413ea9a877	1872	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1873
ganlikun	0:13413ea9a877	1874	return HAL_OK;
ganlikun	0:13413ea9a877	1875	}
ganlikun	0:13413ea9a877	1876
ganlikun	0:13413ea9a877	1877	/**
ganlikun	0:13413ea9a877	1878	* @brief Resume the DMA Transfer.
ganlikun	0:13413ea9a877	1879	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1880	* the configuration information for the specified SPI module.
ganlikun	0:13413ea9a877	1881	* @retval HAL status
ganlikun	0:13413ea9a877	1882	*/
ganlikun	0:13413ea9a877	1883	HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	1884	{
ganlikun	0:13413ea9a877	1885	/* Process Locked */
ganlikun	0:13413ea9a877	1886	__HAL_LOCK(hspi);
ganlikun	0:13413ea9a877	1887
ganlikun	0:13413ea9a877	1888	/* Enable the SPI DMA Tx & Rx requests */
ganlikun	0:13413ea9a877	1889	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1890
ganlikun	0:13413ea9a877	1891	/* Process Unlocked */
ganlikun	0:13413ea9a877	1892	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	1893
ganlikun	0:13413ea9a877	1894	return HAL_OK;
ganlikun	0:13413ea9a877	1895	}
ganlikun	0:13413ea9a877	1896
ganlikun	0:13413ea9a877	1897	/**
ganlikun	0:13413ea9a877	1898	* @brief Stop the DMA Transfer.
ganlikun	0:13413ea9a877	1899	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1900	* the configuration information for the specified SPI module.
ganlikun	0:13413ea9a877	1901	* @retval HAL status
ganlikun	0:13413ea9a877	1902	*/
ganlikun	0:13413ea9a877	1903	HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	1904	{
ganlikun	0:13413ea9a877	1905	/* The Lock is not implemented on this API to allow the user application
ganlikun	0:13413ea9a877	1906	to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
ganlikun	0:13413ea9a877	1907	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
ganlikun	0:13413ea9a877	1908	and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
ganlikun	0:13413ea9a877	1909	*/
ganlikun	0:13413ea9a877	1910
ganlikun	0:13413ea9a877	1911	/* Abort the SPI DMA tx Stream */
ganlikun	0:13413ea9a877	1912	if(hspi->hdmatx != NULL)
ganlikun	0:13413ea9a877	1913	{
ganlikun	0:13413ea9a877	1914	HAL_DMA_Abort(hspi->hdmatx);
ganlikun	0:13413ea9a877	1915	}
ganlikun	0:13413ea9a877	1916	/* Abort the SPI DMA rx Stream */
ganlikun	0:13413ea9a877	1917	if(hspi->hdmarx != NULL)
ganlikun	0:13413ea9a877	1918	{
ganlikun	0:13413ea9a877	1919	HAL_DMA_Abort(hspi->hdmarx);
ganlikun	0:13413ea9a877	1920	}
ganlikun	0:13413ea9a877	1921
ganlikun	0:13413ea9a877	1922	/* Disable the SPI DMA Tx & Rx requests */
ganlikun	0:13413ea9a877	1923	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1924	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	1925	return HAL_OK;
ganlikun	0:13413ea9a877	1926	}
ganlikun	0:13413ea9a877	1927
ganlikun	0:13413ea9a877	1928	/**
ganlikun	0:13413ea9a877	1929	* @brief Handle SPI interrupt request.
ganlikun	0:13413ea9a877	1930	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1931	* the configuration information for the specified SPI module.
ganlikun	0:13413ea9a877	1932	* @retval None
ganlikun	0:13413ea9a877	1933	*/
ganlikun	0:13413ea9a877	1934	void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	1935	{
ganlikun	0:13413ea9a877	1936	uint32_t itsource = hspi->Instance->CR2;
ganlikun	0:13413ea9a877	1937	uint32_t itflag = hspi->Instance->SR;
ganlikun	0:13413ea9a877	1938
ganlikun	0:13413ea9a877	1939	/* SPI in mode Receiver ----------------------------------------------------*/
ganlikun	0:13413ea9a877	1940	if(((itflag & SPI_FLAG_OVR) == RESET) &&
ganlikun	0:13413ea9a877	1941	((itflag & SPI_FLAG_RXNE) != RESET) && ((itsource & SPI_IT_RXNE) != RESET))
ganlikun	0:13413ea9a877	1942	{
ganlikun	0:13413ea9a877	1943	hspi->RxISR(hspi);
ganlikun	0:13413ea9a877	1944	return;
ganlikun	0:13413ea9a877	1945	}
ganlikun	0:13413ea9a877	1946
ganlikun	0:13413ea9a877	1947	/* SPI in mode Transmitter -------------------------------------------------*/
ganlikun	0:13413ea9a877	1948	if(((itflag & SPI_FLAG_TXE) != RESET) && ((itsource & SPI_IT_TXE) != RESET))
ganlikun	0:13413ea9a877	1949	{
ganlikun	0:13413ea9a877	1950	hspi->TxISR(hspi);
ganlikun	0:13413ea9a877	1951	return;
ganlikun	0:13413ea9a877	1952	}
ganlikun	0:13413ea9a877	1953
ganlikun	0:13413ea9a877	1954	/* SPI in Error Treatment --------------------------------------------------*/
ganlikun	0:13413ea9a877	1955	if(((itflag & (SPI_FLAG_MODF \| SPI_FLAG_OVR \| SPI_FLAG_FRE)) != RESET) && ((itsource & SPI_IT_ERR) != RESET))
ganlikun	0:13413ea9a877	1956	{
ganlikun	0:13413ea9a877	1957	/* SPI Overrun error interrupt occurred ----------------------------------*/
ganlikun	0:13413ea9a877	1958	if((itflag & SPI_FLAG_OVR) != RESET)
ganlikun	0:13413ea9a877	1959	{
ganlikun	0:13413ea9a877	1960	if(hspi->State != HAL_SPI_STATE_BUSY_TX)
ganlikun	0:13413ea9a877	1961	{
ganlikun	0:13413ea9a877	1962	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
ganlikun	0:13413ea9a877	1963	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	1964	}
ganlikun	0:13413ea9a877	1965	else
ganlikun	0:13413ea9a877	1966	{
ganlikun	0:13413ea9a877	1967	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	1968	return;
ganlikun	0:13413ea9a877	1969	}
ganlikun	0:13413ea9a877	1970	}
ganlikun	0:13413ea9a877	1971
ganlikun	0:13413ea9a877	1972	/* SPI Mode Fault error interrupt occurred -------------------------------*/
ganlikun	0:13413ea9a877	1973	if((itflag & SPI_FLAG_MODF) != RESET)
ganlikun	0:13413ea9a877	1974	{
ganlikun	0:13413ea9a877	1975	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
ganlikun	0:13413ea9a877	1976	__HAL_SPI_CLEAR_MODFFLAG(hspi);
ganlikun	0:13413ea9a877	1977	}
ganlikun	0:13413ea9a877	1978
ganlikun	0:13413ea9a877	1979	/* SPI Frame error interrupt occurred ------------------------------------*/
ganlikun	0:13413ea9a877	1980	if((itflag & SPI_FLAG_FRE) != RESET)
ganlikun	0:13413ea9a877	1981	{
ganlikun	0:13413ea9a877	1982	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
ganlikun	0:13413ea9a877	1983	__HAL_SPI_CLEAR_FREFLAG(hspi);
ganlikun	0:13413ea9a877	1984	}
ganlikun	0:13413ea9a877	1985
ganlikun	0:13413ea9a877	1986	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	1987	{
ganlikun	0:13413ea9a877	1988	/* Disable all interrupts */
ganlikun	0:13413ea9a877	1989	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE \| SPI_IT_TXE \| SPI_IT_ERR);
ganlikun	0:13413ea9a877	1990
ganlikun	0:13413ea9a877	1991	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	1992	/* Disable the SPI DMA requests if enabled */
ganlikun	0:13413ea9a877	1993	if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN))\|\|(HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
ganlikun	0:13413ea9a877	1994	{
ganlikun	0:13413ea9a877	1995	CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN));
ganlikun	0:13413ea9a877	1996
ganlikun	0:13413ea9a877	1997	/* Abort the SPI DMA Rx channel */
ganlikun	0:13413ea9a877	1998	if(hspi->hdmarx != NULL)
ganlikun	0:13413ea9a877	1999	{
ganlikun	0:13413ea9a877	2000	/* Set the SPI DMA Abort callback :
ganlikun	0:13413ea9a877	2001	will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
ganlikun	0:13413ea9a877	2002	hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
ganlikun	0:13413ea9a877	2003	HAL_DMA_Abort_IT(hspi->hdmarx);
ganlikun	0:13413ea9a877	2004	}
ganlikun	0:13413ea9a877	2005	/* Abort the SPI DMA Tx channel */
ganlikun	0:13413ea9a877	2006	if(hspi->hdmatx != NULL)
ganlikun	0:13413ea9a877	2007	{
ganlikun	0:13413ea9a877	2008	/* Set the SPI DMA Abort callback :
ganlikun	0:13413ea9a877	2009	will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
ganlikun	0:13413ea9a877	2010	hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
ganlikun	0:13413ea9a877	2011	HAL_DMA_Abort_IT(hspi->hdmatx);
ganlikun	0:13413ea9a877	2012	}
ganlikun	0:13413ea9a877	2013	}
ganlikun	0:13413ea9a877	2014	else
ganlikun	0:13413ea9a877	2015	{
ganlikun	0:13413ea9a877	2016	/* Call user error callback */
ganlikun	0:13413ea9a877	2017	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	2018	}
ganlikun	0:13413ea9a877	2019	}
ganlikun	0:13413ea9a877	2020	return;
ganlikun	0:13413ea9a877	2021	}
ganlikun	0:13413ea9a877	2022	}
ganlikun	0:13413ea9a877	2023
ganlikun	0:13413ea9a877	2024	/**
ganlikun	0:13413ea9a877	2025	* @brief Tx Transfer completed callback.
ganlikun	0:13413ea9a877	2026	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2027	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2028	* @retval None
ganlikun	0:13413ea9a877	2029	*/
ganlikun	0:13413ea9a877	2030	__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2031	{
ganlikun	0:13413ea9a877	2032	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2033	UNUSED(hspi);
ganlikun	0:13413ea9a877	2034	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2035	the HAL_SPI_TxCpltCallback should be implemented in the user file
ganlikun	0:13413ea9a877	2036	*/
ganlikun	0:13413ea9a877	2037	}
ganlikun	0:13413ea9a877	2038
ganlikun	0:13413ea9a877	2039	/**
ganlikun	0:13413ea9a877	2040	* @brief Rx Transfer completed callback.
ganlikun	0:13413ea9a877	2041	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2042	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2043	* @retval None
ganlikun	0:13413ea9a877	2044	*/
ganlikun	0:13413ea9a877	2045	__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2046	{
ganlikun	0:13413ea9a877	2047	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2048	UNUSED(hspi);
ganlikun	0:13413ea9a877	2049	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2050	the HAL_SPI_RxCpltCallback should be implemented in the user file
ganlikun	0:13413ea9a877	2051	*/
ganlikun	0:13413ea9a877	2052	}
ganlikun	0:13413ea9a877	2053
ganlikun	0:13413ea9a877	2054	/**
ganlikun	0:13413ea9a877	2055	* @brief Tx and Rx Transfer completed callback.
ganlikun	0:13413ea9a877	2056	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2057	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2058	* @retval None
ganlikun	0:13413ea9a877	2059	*/
ganlikun	0:13413ea9a877	2060	__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2061	{
ganlikun	0:13413ea9a877	2062	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2063	UNUSED(hspi);
ganlikun	0:13413ea9a877	2064	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2065	the HAL_SPI_TxRxCpltCallback should be implemented in the user file
ganlikun	0:13413ea9a877	2066	*/
ganlikun	0:13413ea9a877	2067	}
ganlikun	0:13413ea9a877	2068
ganlikun	0:13413ea9a877	2069	/**
ganlikun	0:13413ea9a877	2070	* @brief Tx Half Transfer completed callback.
ganlikun	0:13413ea9a877	2071	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2072	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2073	* @retval None
ganlikun	0:13413ea9a877	2074	*/
ganlikun	0:13413ea9a877	2075	__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2076	{
ganlikun	0:13413ea9a877	2077	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2078	UNUSED(hspi);
ganlikun	0:13413ea9a877	2079	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2080	the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
ganlikun	0:13413ea9a877	2081	*/
ganlikun	0:13413ea9a877	2082	}
ganlikun	0:13413ea9a877	2083
ganlikun	0:13413ea9a877	2084	/**
ganlikun	0:13413ea9a877	2085	* @brief Rx Half Transfer completed callback.
ganlikun	0:13413ea9a877	2086	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2087	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2088	* @retval None
ganlikun	0:13413ea9a877	2089	*/
ganlikun	0:13413ea9a877	2090	__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2091	{
ganlikun	0:13413ea9a877	2092	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2093	UNUSED(hspi);
ganlikun	0:13413ea9a877	2094	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2095	the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
ganlikun	0:13413ea9a877	2096	*/
ganlikun	0:13413ea9a877	2097	}
ganlikun	0:13413ea9a877	2098
ganlikun	0:13413ea9a877	2099	/**
ganlikun	0:13413ea9a877	2100	* @brief Tx and Rx Half Transfer callback.
ganlikun	0:13413ea9a877	2101	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2102	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2103	* @retval None
ganlikun	0:13413ea9a877	2104	*/
ganlikun	0:13413ea9a877	2105	__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2106	{
ganlikun	0:13413ea9a877	2107	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2108	UNUSED(hspi);
ganlikun	0:13413ea9a877	2109	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2110	the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
ganlikun	0:13413ea9a877	2111	*/
ganlikun	0:13413ea9a877	2112	}
ganlikun	0:13413ea9a877	2113
ganlikun	0:13413ea9a877	2114	/**
ganlikun	0:13413ea9a877	2115	* @brief SPI error callback.
ganlikun	0:13413ea9a877	2116	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2117	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2118	* @retval None
ganlikun	0:13413ea9a877	2119	*/
ganlikun	0:13413ea9a877	2120	__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2121	{
ganlikun	0:13413ea9a877	2122	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2123	UNUSED(hspi);
ganlikun	0:13413ea9a877	2124	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2125	the HAL_SPI_ErrorCallback should be implemented in the user file
ganlikun	0:13413ea9a877	2126	*/
ganlikun	0:13413ea9a877	2127	/* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
ganlikun	0:13413ea9a877	2128	and user can use HAL_SPI_GetError() API to check the latest error occurred
ganlikun	0:13413ea9a877	2129	*/
ganlikun	0:13413ea9a877	2130	}
ganlikun	0:13413ea9a877	2131
ganlikun	0:13413ea9a877	2132	/**
ganlikun	0:13413ea9a877	2133	* @brief SPI Abort Complete callback.
ganlikun	0:13413ea9a877	2134	* @param hspi SPI handle.
ganlikun	0:13413ea9a877	2135	* @retval None
ganlikun	0:13413ea9a877	2136	*/
ganlikun	0:13413ea9a877	2137	__weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2138	{
ganlikun	0:13413ea9a877	2139	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	2140	UNUSED(hspi);
ganlikun	0:13413ea9a877	2141
ganlikun	0:13413ea9a877	2142	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	2143	the HAL_SPI_AbortCpltCallback can be implemented in the user file.
ganlikun	0:13413ea9a877	2144	*/
ganlikun	0:13413ea9a877	2145	}
ganlikun	0:13413ea9a877	2146
ganlikun	0:13413ea9a877	2147	/**
ganlikun	0:13413ea9a877	2148	* @}
ganlikun	0:13413ea9a877	2149	*/
ganlikun	0:13413ea9a877	2150
ganlikun	0:13413ea9a877	2151	/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
ganlikun	0:13413ea9a877	2152	* @brief SPI control functions
ganlikun	0:13413ea9a877	2153	*
ganlikun	0:13413ea9a877	2154	@verbatim
ganlikun	0:13413ea9a877	2155	===============================================================================
ganlikun	0:13413ea9a877	2156	##### Peripheral State and Errors functions #####
ganlikun	0:13413ea9a877	2157	===============================================================================
ganlikun	0:13413ea9a877	2158	[..]
ganlikun	0:13413ea9a877	2159	This subsection provides a set of functions allowing to control the SPI.
ganlikun	0:13413ea9a877	2160	(+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
ganlikun	0:13413ea9a877	2161	(+) HAL_SPI_GetError() check in run-time Errors occurring during communication
ganlikun	0:13413ea9a877	2162	@endverbatim
ganlikun	0:13413ea9a877	2163	* @{
ganlikun	0:13413ea9a877	2164	*/
ganlikun	0:13413ea9a877	2165
ganlikun	0:13413ea9a877	2166	/**
ganlikun	0:13413ea9a877	2167	* @brief Return the SPI handle state.
ganlikun	0:13413ea9a877	2168	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2169	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2170	* @retval SPI state
ganlikun	0:13413ea9a877	2171	*/
ganlikun	0:13413ea9a877	2172	HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2173	{
ganlikun	0:13413ea9a877	2174	/* Return SPI handle state */
ganlikun	0:13413ea9a877	2175	return hspi->State;
ganlikun	0:13413ea9a877	2176	}
ganlikun	0:13413ea9a877	2177
ganlikun	0:13413ea9a877	2178	/**
ganlikun	0:13413ea9a877	2179	* @brief Return the SPI error code.
ganlikun	0:13413ea9a877	2180	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2181	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2182	* @retval SPI error code in bitmap format
ganlikun	0:13413ea9a877	2183	*/
ganlikun	0:13413ea9a877	2184	uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2185	{
ganlikun	0:13413ea9a877	2186	/* Return SPI ErrorCode */
ganlikun	0:13413ea9a877	2187	return hspi->ErrorCode;
ganlikun	0:13413ea9a877	2188	}
ganlikun	0:13413ea9a877	2189
ganlikun	0:13413ea9a877	2190	/**
ganlikun	0:13413ea9a877	2191	* @}
ganlikun	0:13413ea9a877	2192	*/
ganlikun	0:13413ea9a877	2193
ganlikun	0:13413ea9a877	2194	/**
ganlikun	0:13413ea9a877	2195	* @}
ganlikun	0:13413ea9a877	2196	*/
ganlikun	0:13413ea9a877	2197
ganlikun	0:13413ea9a877	2198	/** @addtogroup SPI_Private_Functions
ganlikun	0:13413ea9a877	2199	* @brief Private functions
ganlikun	0:13413ea9a877	2200	* @{
ganlikun	0:13413ea9a877	2201	*/
ganlikun	0:13413ea9a877	2202
ganlikun	0:13413ea9a877	2203	/**
ganlikun	0:13413ea9a877	2204	* @brief DMA SPI transmit process complete callback.
ganlikun	0:13413ea9a877	2205	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2206	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	2207	* @retval None
ganlikun	0:13413ea9a877	2208	*/
ganlikun	0:13413ea9a877	2209	static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2210	{
ganlikun	0:13413ea9a877	2211	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2212	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	2213
ganlikun	0:13413ea9a877	2214	/* Init tickstart for timeout managment*/
ganlikun	0:13413ea9a877	2215	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	2216
ganlikun	0:13413ea9a877	2217	/* DMA Normal Mode */
ganlikun	0:13413ea9a877	2218	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
ganlikun	0:13413ea9a877	2219	{
ganlikun	0:13413ea9a877	2220	/* Disable Tx DMA Request */
ganlikun	0:13413ea9a877	2221	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	2222
ganlikun	0:13413ea9a877	2223	/* Check the end of the transaction */
ganlikun	0:13413ea9a877	2224	if(SPI_CheckFlag_BSY(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	2225	{
ganlikun	0:13413ea9a877	2226	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	2227	}
ganlikun	0:13413ea9a877	2228
ganlikun	0:13413ea9a877	2229	/* Clear overrun flag in 2 Lines communication mode because received data is not read */
ganlikun	0:13413ea9a877	2230	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
ganlikun	0:13413ea9a877	2231	{
ganlikun	0:13413ea9a877	2232	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	2233	}
ganlikun	0:13413ea9a877	2234
ganlikun	0:13413ea9a877	2235	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	2236	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2237
ganlikun	0:13413ea9a877	2238	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	2239	{
ganlikun	0:13413ea9a877	2240	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	2241	return;
ganlikun	0:13413ea9a877	2242	}
ganlikun	0:13413ea9a877	2243	}
ganlikun	0:13413ea9a877	2244	HAL_SPI_TxCpltCallback(hspi);
ganlikun	0:13413ea9a877	2245	}
ganlikun	0:13413ea9a877	2246
ganlikun	0:13413ea9a877	2247	/**
ganlikun	0:13413ea9a877	2248	* @brief DMA SPI receive process complete callback.
ganlikun	0:13413ea9a877	2249	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2250	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	2251	* @retval None
ganlikun	0:13413ea9a877	2252	*/
ganlikun	0:13413ea9a877	2253	static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2254	{
ganlikun	0:13413ea9a877	2255	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2256	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2257	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	2258	__IO uint16_t tmpreg = 0U;
ganlikun	0:13413ea9a877	2259
ganlikun	0:13413ea9a877	2260	/* Init tickstart for timeout management*/
ganlikun	0:13413ea9a877	2261	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	2262	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2263
ganlikun	0:13413ea9a877	2264	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
ganlikun	0:13413ea9a877	2265	{
ganlikun	0:13413ea9a877	2266	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2267	/* CRC handling */
ganlikun	0:13413ea9a877	2268	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2269	{
ganlikun	0:13413ea9a877	2270	/* Wait until RXNE flag */
ganlikun	0:13413ea9a877	2271	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SPI_FLAG_RXNE, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	2272	{
ganlikun	0:13413ea9a877	2273	/* Error on the CRC reception */
ganlikun	0:13413ea9a877	2274	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	2275	}
ganlikun	0:13413ea9a877	2276	/* Read CRC */
ganlikun	0:13413ea9a877	2277	tmpreg = hspi->Instance->DR;
ganlikun	0:13413ea9a877	2278	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	2279	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	2280	}
ganlikun	0:13413ea9a877	2281	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2282
ganlikun	0:13413ea9a877	2283	/* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
ganlikun	0:13413ea9a877	2284	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	2285
ganlikun	0:13413ea9a877	2286	/* Check the end of the transaction */
ganlikun	0:13413ea9a877	2287	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
ganlikun	0:13413ea9a877	2288	{
ganlikun	0:13413ea9a877	2289	/* Disable SPI peripheral */
ganlikun	0:13413ea9a877	2290	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	2291	}
ganlikun	0:13413ea9a877	2292
ganlikun	0:13413ea9a877	2293	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	2294	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2295
ganlikun	0:13413ea9a877	2296	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2297	/* Check if CRC error occurred */
ganlikun	0:13413ea9a877	2298	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
ganlikun	0:13413ea9a877	2299	{
ganlikun	0:13413ea9a877	2300	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	2301	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
ganlikun	0:13413ea9a877	2302	}
ganlikun	0:13413ea9a877	2303	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2304
ganlikun	0:13413ea9a877	2305	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	2306	{
ganlikun	0:13413ea9a877	2307	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	2308	return;
ganlikun	0:13413ea9a877	2309	}
ganlikun	0:13413ea9a877	2310	}
ganlikun	0:13413ea9a877	2311	HAL_SPI_RxCpltCallback(hspi);
ganlikun	0:13413ea9a877	2312	}
ganlikun	0:13413ea9a877	2313
ganlikun	0:13413ea9a877	2314	/**
ganlikun	0:13413ea9a877	2315	* @brief DMA SPI transmit receive process complete callback.
ganlikun	0:13413ea9a877	2316	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2317	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	2318	* @retval None
ganlikun	0:13413ea9a877	2319	*/
ganlikun	0:13413ea9a877	2320	static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2321	{
ganlikun	0:13413ea9a877	2322	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2323	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	2324	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2325	__IO int16_t tmpreg = 0U;
ganlikun	0:13413ea9a877	2326	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2327	/* Init tickstart for timeout management*/
ganlikun	0:13413ea9a877	2328	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	2329
ganlikun	0:13413ea9a877	2330	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
ganlikun	0:13413ea9a877	2331	{
ganlikun	0:13413ea9a877	2332	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2333	/* CRC handling */
ganlikun	0:13413ea9a877	2334	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2335	{
ganlikun	0:13413ea9a877	2336	/* Wait the CRC data */
ganlikun	0:13413ea9a877	2337	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	2338	{
ganlikun	0:13413ea9a877	2339	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	2340	}
ganlikun	0:13413ea9a877	2341	/* Read CRC to Flush DR and RXNE flag */
ganlikun	0:13413ea9a877	2342	tmpreg = hspi->Instance->DR;
ganlikun	0:13413ea9a877	2343	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	2344	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	2345	}
ganlikun	0:13413ea9a877	2346	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2347	/* Check the end of the transaction */
ganlikun	0:13413ea9a877	2348	if(SPI_CheckFlag_BSY(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	2349	{
ganlikun	0:13413ea9a877	2350	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	2351	}
ganlikun	0:13413ea9a877	2352
ganlikun	0:13413ea9a877	2353	/* Disable Rx/Tx DMA Request */
ganlikun	0:13413ea9a877	2354	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	2355
ganlikun	0:13413ea9a877	2356	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	2357	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	2358	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2359
ganlikun	0:13413ea9a877	2360	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2361	/* Check if CRC error occurred */
ganlikun	0:13413ea9a877	2362	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
ganlikun	0:13413ea9a877	2363	{
ganlikun	0:13413ea9a877	2364	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	2365	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
ganlikun	0:13413ea9a877	2366	}
ganlikun	0:13413ea9a877	2367	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2368
ganlikun	0:13413ea9a877	2369	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	2370	{
ganlikun	0:13413ea9a877	2371	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	2372	return;
ganlikun	0:13413ea9a877	2373	}
ganlikun	0:13413ea9a877	2374	}
ganlikun	0:13413ea9a877	2375	HAL_SPI_TxRxCpltCallback(hspi);
ganlikun	0:13413ea9a877	2376	}
ganlikun	0:13413ea9a877	2377
ganlikun	0:13413ea9a877	2378	/**
ganlikun	0:13413ea9a877	2379	* @brief DMA SPI half transmit process complete callback.
ganlikun	0:13413ea9a877	2380	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2381	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	2382	* @retval None
ganlikun	0:13413ea9a877	2383	*/
ganlikun	0:13413ea9a877	2384	static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2385	{
ganlikun	0:13413ea9a877	2386	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2387
ganlikun	0:13413ea9a877	2388	HAL_SPI_TxHalfCpltCallback(hspi);
ganlikun	0:13413ea9a877	2389	}
ganlikun	0:13413ea9a877	2390
ganlikun	0:13413ea9a877	2391	/**
ganlikun	0:13413ea9a877	2392	* @brief DMA SPI half receive process complete callback
ganlikun	0:13413ea9a877	2393	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2394	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	2395	* @retval None
ganlikun	0:13413ea9a877	2396	*/
ganlikun	0:13413ea9a877	2397	static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2398	{
ganlikun	0:13413ea9a877	2399	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2400
ganlikun	0:13413ea9a877	2401	HAL_SPI_RxHalfCpltCallback(hspi);
ganlikun	0:13413ea9a877	2402	}
ganlikun	0:13413ea9a877	2403
ganlikun	0:13413ea9a877	2404	/**
ganlikun	0:13413ea9a877	2405	* @brief DMA SPI half transmit receive process complete callback.
ganlikun	0:13413ea9a877	2406	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2407	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	2408	* @retval None
ganlikun	0:13413ea9a877	2409	*/
ganlikun	0:13413ea9a877	2410	static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2411	{
ganlikun	0:13413ea9a877	2412	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2413
ganlikun	0:13413ea9a877	2414	HAL_SPI_TxRxHalfCpltCallback(hspi);
ganlikun	0:13413ea9a877	2415	}
ganlikun	0:13413ea9a877	2416
ganlikun	0:13413ea9a877	2417	/**
ganlikun	0:13413ea9a877	2418	* @brief DMA SPI communication error callback.
ganlikun	0:13413ea9a877	2419	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2420	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	2421	* @retval None
ganlikun	0:13413ea9a877	2422	*/
ganlikun	0:13413ea9a877	2423	static void SPI_DMAError(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2424	{
ganlikun	0:13413ea9a877	2425	SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2426
ganlikun	0:13413ea9a877	2427	/* Stop the disable DMA transfer on SPI side */
ganlikun	0:13413ea9a877	2428	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN \| SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	2429
ganlikun	0:13413ea9a877	2430	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
ganlikun	0:13413ea9a877	2431	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2432	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	2433	}
ganlikun	0:13413ea9a877	2434
ganlikun	0:13413ea9a877	2435	/**
ganlikun	0:13413ea9a877	2436	* @brief DMA SPI communication abort callback, when initiated by HAL services on Error
ganlikun	0:13413ea9a877	2437	* (To be called at end of DMA Abort procedure following error occurrence).
ganlikun	0:13413ea9a877	2438	* @param hdma DMA handle.
ganlikun	0:13413ea9a877	2439	* @retval None
ganlikun	0:13413ea9a877	2440	*/
ganlikun	0:13413ea9a877	2441	static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2442	{
ganlikun	0:13413ea9a877	2443	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2444	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	2445	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	2446
ganlikun	0:13413ea9a877	2447	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	2448	}
ganlikun	0:13413ea9a877	2449
ganlikun	0:13413ea9a877	2450	/**
ganlikun	0:13413ea9a877	2451	* @brief DMA SPI Tx communication abort callback, when initiated by user
ganlikun	0:13413ea9a877	2452	* (To be called at end of DMA Tx Abort procedure following user abort request).
ganlikun	0:13413ea9a877	2453	* @note When this callback is executed, User Abort complete call back is called only if no
ganlikun	0:13413ea9a877	2454	* Abort still ongoing for Rx DMA Handle.
ganlikun	0:13413ea9a877	2455	* @param hdma DMA handle.
ganlikun	0:13413ea9a877	2456	* @retval None
ganlikun	0:13413ea9a877	2457	*/
ganlikun	0:13413ea9a877	2458	static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2459	{
ganlikun	0:13413ea9a877	2460	__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
ganlikun	0:13413ea9a877	2461	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2462
ganlikun	0:13413ea9a877	2463	hspi->hdmatx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	2464
ganlikun	0:13413ea9a877	2465	/* Disable Tx DMA Request */
ganlikun	0:13413ea9a877	2466	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN );
ganlikun	0:13413ea9a877	2467
ganlikun	0:13413ea9a877	2468	/* Wait until TXE flag is set */
ganlikun	0:13413ea9a877	2469	do
ganlikun	0:13413ea9a877	2470	{
ganlikun	0:13413ea9a877	2471	if(count-- == 0U)
ganlikun	0:13413ea9a877	2472	{
ganlikun	0:13413ea9a877	2473	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	2474	break;
ganlikun	0:13413ea9a877	2475	}
ganlikun	0:13413ea9a877	2476	}
ganlikun	0:13413ea9a877	2477	while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
ganlikun	0:13413ea9a877	2478
ganlikun	0:13413ea9a877	2479	/* Check if an Abort process is still ongoing */
ganlikun	0:13413ea9a877	2480	if(hspi->hdmarx != NULL)
ganlikun	0:13413ea9a877	2481	{
ganlikun	0:13413ea9a877	2482	if(hspi->hdmarx->XferAbortCallback != NULL)
ganlikun	0:13413ea9a877	2483	{
ganlikun	0:13413ea9a877	2484	return;
ganlikun	0:13413ea9a877	2485	}
ganlikun	0:13413ea9a877	2486	}
ganlikun	0:13413ea9a877	2487
ganlikun	0:13413ea9a877	2488	/* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
ganlikun	0:13413ea9a877	2489	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	2490	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	2491
ganlikun	0:13413ea9a877	2492	/* Reset errorCode */
ganlikun	0:13413ea9a877	2493	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	2494
ganlikun	0:13413ea9a877	2495	/* Clear the Error flags in the SR register */
ganlikun	0:13413ea9a877	2496	__HAL_SPI_CLEAR_FREFLAG(hspi);
ganlikun	0:13413ea9a877	2497
ganlikun	0:13413ea9a877	2498	/* Restore hspi->State to Ready */
ganlikun	0:13413ea9a877	2499	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2500
ganlikun	0:13413ea9a877	2501	/* Call user Abort complete callback */
ganlikun	0:13413ea9a877	2502	HAL_SPI_AbortCpltCallback(hspi);
ganlikun	0:13413ea9a877	2503	}
ganlikun	0:13413ea9a877	2504
ganlikun	0:13413ea9a877	2505	/**
ganlikun	0:13413ea9a877	2506	* @brief DMA SPI Rx communication abort callback, when initiated by user
ganlikun	0:13413ea9a877	2507	* (To be called at end of DMA Rx Abort procedure following user abort request).
ganlikun	0:13413ea9a877	2508	* @note When this callback is executed, User Abort complete call back is called only if no
ganlikun	0:13413ea9a877	2509	* Abort still ongoing for Tx DMA Handle.
ganlikun	0:13413ea9a877	2510	* @param hdma DMA handle.
ganlikun	0:13413ea9a877	2511	* @retval None
ganlikun	0:13413ea9a877	2512	*/
ganlikun	0:13413ea9a877	2513	static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	2514	{
ganlikun	0:13413ea9a877	2515	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	2516
ganlikun	0:13413ea9a877	2517	/* Disable SPI Peripheral */
ganlikun	0:13413ea9a877	2518	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	2519
ganlikun	0:13413ea9a877	2520	hspi->hdmarx->XferAbortCallback = NULL;
ganlikun	0:13413ea9a877	2521
ganlikun	0:13413ea9a877	2522	/* Disable Rx DMA Request */
ganlikun	0:13413ea9a877	2523	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	2524
ganlikun	0:13413ea9a877	2525	/* Check if an Abort process is still ongoing */
ganlikun	0:13413ea9a877	2526	if(hspi->hdmatx != NULL)
ganlikun	0:13413ea9a877	2527	{
ganlikun	0:13413ea9a877	2528	if(hspi->hdmatx->XferAbortCallback != NULL)
ganlikun	0:13413ea9a877	2529	{
ganlikun	0:13413ea9a877	2530	return;
ganlikun	0:13413ea9a877	2531	}
ganlikun	0:13413ea9a877	2532	}
ganlikun	0:13413ea9a877	2533
ganlikun	0:13413ea9a877	2534	/* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
ganlikun	0:13413ea9a877	2535	hspi->RxXferCount = 0U;
ganlikun	0:13413ea9a877	2536	hspi->TxXferCount = 0U;
ganlikun	0:13413ea9a877	2537
ganlikun	0:13413ea9a877	2538	/* Reset errorCode */
ganlikun	0:13413ea9a877	2539	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
ganlikun	0:13413ea9a877	2540
ganlikun	0:13413ea9a877	2541	/* Clear the Error flags in the SR register */
ganlikun	0:13413ea9a877	2542	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	2543	__HAL_SPI_CLEAR_FREFLAG(hspi);
ganlikun	0:13413ea9a877	2544
ganlikun	0:13413ea9a877	2545	/* Restore hspi->State to Ready */
ganlikun	0:13413ea9a877	2546	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2547
ganlikun	0:13413ea9a877	2548	/* Call user Abort complete callback */
ganlikun	0:13413ea9a877	2549	HAL_SPI_AbortCpltCallback(hspi);
ganlikun	0:13413ea9a877	2550	}
ganlikun	0:13413ea9a877	2551
ganlikun	0:13413ea9a877	2552	/**
ganlikun	0:13413ea9a877	2553	* @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
ganlikun	0:13413ea9a877	2554	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2555	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2556	* @retval None
ganlikun	0:13413ea9a877	2557	*/
ganlikun	0:13413ea9a877	2558	static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2559	{
ganlikun	0:13413ea9a877	2560	/* Receive data in 8bit mode */
ganlikun	0:13413ea9a877	2561	hspi->pRxBuffPtr++ = ((__IO uint8_t *)&hspi->Instance->DR);
ganlikun	0:13413ea9a877	2562	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	2563
ganlikun	0:13413ea9a877	2564	/* check end of the reception */
ganlikun	0:13413ea9a877	2565	if(hspi->RxXferCount == 0U)
ganlikun	0:13413ea9a877	2566	{
ganlikun	0:13413ea9a877	2567	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2568	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2569	{
ganlikun	0:13413ea9a877	2570	hspi->RxISR = SPI_2linesRxISR_8BITCRC;
ganlikun	0:13413ea9a877	2571	return;
ganlikun	0:13413ea9a877	2572	}
ganlikun	0:13413ea9a877	2573	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2574
ganlikun	0:13413ea9a877	2575	/* Disable RXNE interrupt */
ganlikun	0:13413ea9a877	2576	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	2577
ganlikun	0:13413ea9a877	2578	if(hspi->TxXferCount == 0U)
ganlikun	0:13413ea9a877	2579	{
ganlikun	0:13413ea9a877	2580	SPI_CloseRxTx_ISR(hspi);
ganlikun	0:13413ea9a877	2581	}
ganlikun	0:13413ea9a877	2582	}
ganlikun	0:13413ea9a877	2583	}
ganlikun	0:13413ea9a877	2584
ganlikun	0:13413ea9a877	2585	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2586	/**
ganlikun	0:13413ea9a877	2587	* @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
ganlikun	0:13413ea9a877	2588	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2589	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2590	* @retval None
ganlikun	0:13413ea9a877	2591	*/
ganlikun	0:13413ea9a877	2592	static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2593	{
ganlikun	0:13413ea9a877	2594	__IO uint8_t tmpreg = 0U;
ganlikun	0:13413ea9a877	2595
ganlikun	0:13413ea9a877	2596	/* Read data register to flush CRC */
ganlikun	0:13413ea9a877	2597	tmpreg = ((__IO uint8_t )&hspi->Instance->DR);
ganlikun	0:13413ea9a877	2598
ganlikun	0:13413ea9a877	2599	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	2600
ganlikun	0:13413ea9a877	2601	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	2602
ganlikun	0:13413ea9a877	2603	/* Disable RXNE interrupt */
ganlikun	0:13413ea9a877	2604	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	2605
ganlikun	0:13413ea9a877	2606	if(hspi->TxXferCount == 0U)
ganlikun	0:13413ea9a877	2607	{
ganlikun	0:13413ea9a877	2608	SPI_CloseRxTx_ISR(hspi);
ganlikun	0:13413ea9a877	2609	}
ganlikun	0:13413ea9a877	2610	}
ganlikun	0:13413ea9a877	2611	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2612
ganlikun	0:13413ea9a877	2613	/**
ganlikun	0:13413ea9a877	2614	* @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode.
ganlikun	0:13413ea9a877	2615	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2616	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2617	* @retval None
ganlikun	0:13413ea9a877	2618	*/
ganlikun	0:13413ea9a877	2619	static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2620	{
ganlikun	0:13413ea9a877	2621	(__IO uint8_t )&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
ganlikun	0:13413ea9a877	2622	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	2623
ganlikun	0:13413ea9a877	2624	/* check the end of the transmission */
ganlikun	0:13413ea9a877	2625	if(hspi->TxXferCount == 0U)
ganlikun	0:13413ea9a877	2626	{
ganlikun	0:13413ea9a877	2627	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2628	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2629	{
ganlikun	0:13413ea9a877	2630	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	2631	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
ganlikun	0:13413ea9a877	2632	return;
ganlikun	0:13413ea9a877	2633	}
ganlikun	0:13413ea9a877	2634	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2635
ganlikun	0:13413ea9a877	2636	/* Disable TXE interrupt */
ganlikun	0:13413ea9a877	2637	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
ganlikun	0:13413ea9a877	2638
ganlikun	0:13413ea9a877	2639	if(hspi->RxXferCount == 0U)
ganlikun	0:13413ea9a877	2640	{
ganlikun	0:13413ea9a877	2641	SPI_CloseRxTx_ISR(hspi);
ganlikun	0:13413ea9a877	2642	}
ganlikun	0:13413ea9a877	2643	}
ganlikun	0:13413ea9a877	2644	}
ganlikun	0:13413ea9a877	2645
ganlikun	0:13413ea9a877	2646	/**
ganlikun	0:13413ea9a877	2647	* @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode.
ganlikun	0:13413ea9a877	2648	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2649	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2650	* @retval None
ganlikun	0:13413ea9a877	2651	*/
ganlikun	0:13413ea9a877	2652	static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2653	{
ganlikun	0:13413ea9a877	2654	/* Receive data in 16 Bit mode */
ganlikun	0:13413ea9a877	2655	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
ganlikun	0:13413ea9a877	2656	hspi->pRxBuffPtr += sizeof(uint16_t);
ganlikun	0:13413ea9a877	2657	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	2658
ganlikun	0:13413ea9a877	2659	if(hspi->RxXferCount == 0U)
ganlikun	0:13413ea9a877	2660	{
ganlikun	0:13413ea9a877	2661	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2662	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2663	{
ganlikun	0:13413ea9a877	2664	hspi->RxISR = SPI_2linesRxISR_16BITCRC;
ganlikun	0:13413ea9a877	2665	return;
ganlikun	0:13413ea9a877	2666	}
ganlikun	0:13413ea9a877	2667	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2668
ganlikun	0:13413ea9a877	2669	/* Disable RXNE interrupt */
ganlikun	0:13413ea9a877	2670	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
ganlikun	0:13413ea9a877	2671
ganlikun	0:13413ea9a877	2672	if(hspi->TxXferCount == 0U)
ganlikun	0:13413ea9a877	2673	{
ganlikun	0:13413ea9a877	2674	SPI_CloseRxTx_ISR(hspi);
ganlikun	0:13413ea9a877	2675	}
ganlikun	0:13413ea9a877	2676	}
ganlikun	0:13413ea9a877	2677	}
ganlikun	0:13413ea9a877	2678
ganlikun	0:13413ea9a877	2679	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2680	/**
ganlikun	0:13413ea9a877	2681	* @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode.
ganlikun	0:13413ea9a877	2682	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2683	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2684	* @retval None
ganlikun	0:13413ea9a877	2685	*/
ganlikun	0:13413ea9a877	2686	static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2687	{
ganlikun	0:13413ea9a877	2688	/* Receive data in 16 Bit mode */
ganlikun	0:13413ea9a877	2689	__IO uint16_t tmpreg = 0U;
ganlikun	0:13413ea9a877	2690
ganlikun	0:13413ea9a877	2691	/* Read data register to flush CRC */
ganlikun	0:13413ea9a877	2692	tmpreg = hspi->Instance->DR;
ganlikun	0:13413ea9a877	2693
ganlikun	0:13413ea9a877	2694	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	2695	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	2696
ganlikun	0:13413ea9a877	2697	/* Disable RXNE interrupt */
ganlikun	0:13413ea9a877	2698	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
ganlikun	0:13413ea9a877	2699
ganlikun	0:13413ea9a877	2700	SPI_CloseRxTx_ISR(hspi);
ganlikun	0:13413ea9a877	2701	}
ganlikun	0:13413ea9a877	2702	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2703
ganlikun	0:13413ea9a877	2704	/**
ganlikun	0:13413ea9a877	2705	* @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode.
ganlikun	0:13413ea9a877	2706	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2707	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2708	* @retval None
ganlikun	0:13413ea9a877	2709	*/
ganlikun	0:13413ea9a877	2710	static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2711	{
ganlikun	0:13413ea9a877	2712	/* Transmit data in 16 Bit mode */
ganlikun	0:13413ea9a877	2713	hspi->Instance->DR = ((uint16_t )hspi->pTxBuffPtr);
ganlikun	0:13413ea9a877	2714	hspi->pTxBuffPtr += sizeof(uint16_t);
ganlikun	0:13413ea9a877	2715	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	2716
ganlikun	0:13413ea9a877	2717	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	2718	if(hspi->TxXferCount == 0U)
ganlikun	0:13413ea9a877	2719	{
ganlikun	0:13413ea9a877	2720	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2721	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2722	{
ganlikun	0:13413ea9a877	2723	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	2724	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
ganlikun	0:13413ea9a877	2725	return;
ganlikun	0:13413ea9a877	2726	}
ganlikun	0:13413ea9a877	2727	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2728
ganlikun	0:13413ea9a877	2729	/* Disable TXE interrupt */
ganlikun	0:13413ea9a877	2730	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
ganlikun	0:13413ea9a877	2731
ganlikun	0:13413ea9a877	2732	if(hspi->RxXferCount == 0U)
ganlikun	0:13413ea9a877	2733	{
ganlikun	0:13413ea9a877	2734	SPI_CloseRxTx_ISR(hspi);
ganlikun	0:13413ea9a877	2735	}
ganlikun	0:13413ea9a877	2736	}
ganlikun	0:13413ea9a877	2737	}
ganlikun	0:13413ea9a877	2738
ganlikun	0:13413ea9a877	2739	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2740	/**
ganlikun	0:13413ea9a877	2741	* @brief Manage the CRC 8-bit receive in Interrupt context.
ganlikun	0:13413ea9a877	2742	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2743	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2744	* @retval None
ganlikun	0:13413ea9a877	2745	*/
ganlikun	0:13413ea9a877	2746	static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2747	{
ganlikun	0:13413ea9a877	2748	__IO uint8_t tmpreg = 0U;
ganlikun	0:13413ea9a877	2749
ganlikun	0:13413ea9a877	2750	/* Read data register to flush CRC */
ganlikun	0:13413ea9a877	2751	tmpreg = ((__IO uint8_t)&hspi->Instance->DR);
ganlikun	0:13413ea9a877	2752
ganlikun	0:13413ea9a877	2753	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	2754	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	2755
ganlikun	0:13413ea9a877	2756	SPI_CloseRx_ISR(hspi);
ganlikun	0:13413ea9a877	2757	}
ganlikun	0:13413ea9a877	2758	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2759
ganlikun	0:13413ea9a877	2760	/**
ganlikun	0:13413ea9a877	2761	* @brief Manage the receive 8-bit in Interrupt context.
ganlikun	0:13413ea9a877	2762	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2763	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2764	* @retval None
ganlikun	0:13413ea9a877	2765	*/
ganlikun	0:13413ea9a877	2766	static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2767	{
ganlikun	0:13413ea9a877	2768	hspi->pRxBuffPtr++ = ((__IO uint8_t *)&hspi->Instance->DR);
ganlikun	0:13413ea9a877	2769	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	2770
ganlikun	0:13413ea9a877	2771	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2772	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	2773	if((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
ganlikun	0:13413ea9a877	2774	{
ganlikun	0:13413ea9a877	2775	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	2776	}
ganlikun	0:13413ea9a877	2777	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2778
ganlikun	0:13413ea9a877	2779	if(hspi->RxXferCount == 0U)
ganlikun	0:13413ea9a877	2780	{
ganlikun	0:13413ea9a877	2781	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2782	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2783	{
ganlikun	0:13413ea9a877	2784	hspi->RxISR = SPI_RxISR_8BITCRC;
ganlikun	0:13413ea9a877	2785	return;
ganlikun	0:13413ea9a877	2786	}
ganlikun	0:13413ea9a877	2787	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2788	SPI_CloseRx_ISR(hspi);
ganlikun	0:13413ea9a877	2789	}
ganlikun	0:13413ea9a877	2790	}
ganlikun	0:13413ea9a877	2791
ganlikun	0:13413ea9a877	2792	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2793	/**
ganlikun	0:13413ea9a877	2794	* @brief Manage the CRC 16-bit receive in Interrupt context.
ganlikun	0:13413ea9a877	2795	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2796	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2797	* @retval None
ganlikun	0:13413ea9a877	2798	*/
ganlikun	0:13413ea9a877	2799	static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2800	{
ganlikun	0:13413ea9a877	2801	__IO uint16_t tmpreg = 0U;
ganlikun	0:13413ea9a877	2802
ganlikun	0:13413ea9a877	2803	/* Read data register to flush CRC */
ganlikun	0:13413ea9a877	2804	tmpreg = hspi->Instance->DR;
ganlikun	0:13413ea9a877	2805
ganlikun	0:13413ea9a877	2806	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	2807	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	2808
ganlikun	0:13413ea9a877	2809	/* Disable RXNE and ERR interrupt */
ganlikun	0:13413ea9a877	2810	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	2811
ganlikun	0:13413ea9a877	2812	SPI_CloseRx_ISR(hspi);
ganlikun	0:13413ea9a877	2813	}
ganlikun	0:13413ea9a877	2814	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2815
ganlikun	0:13413ea9a877	2816	/**
ganlikun	0:13413ea9a877	2817	* @brief Manage the 16-bit receive in Interrupt context.
ganlikun	0:13413ea9a877	2818	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2819	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2820	* @retval None
ganlikun	0:13413ea9a877	2821	*/
ganlikun	0:13413ea9a877	2822	static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2823	{
ganlikun	0:13413ea9a877	2824	((uint16_t )hspi->pRxBuffPtr) = hspi->Instance->DR;
ganlikun	0:13413ea9a877	2825	hspi->pRxBuffPtr += sizeof(uint16_t);
ganlikun	0:13413ea9a877	2826	hspi->RxXferCount--;
ganlikun	0:13413ea9a877	2827
ganlikun	0:13413ea9a877	2828	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2829	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	2830	if((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
ganlikun	0:13413ea9a877	2831	{
ganlikun	0:13413ea9a877	2832	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	2833	}
ganlikun	0:13413ea9a877	2834	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2835
ganlikun	0:13413ea9a877	2836	if(hspi->RxXferCount == 0U)
ganlikun	0:13413ea9a877	2837	{
ganlikun	0:13413ea9a877	2838	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2839	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2840	{
ganlikun	0:13413ea9a877	2841	hspi->RxISR = SPI_RxISR_16BITCRC;
ganlikun	0:13413ea9a877	2842	return;
ganlikun	0:13413ea9a877	2843	}
ganlikun	0:13413ea9a877	2844	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2845	SPI_CloseRx_ISR(hspi);
ganlikun	0:13413ea9a877	2846	}
ganlikun	0:13413ea9a877	2847	}
ganlikun	0:13413ea9a877	2848
ganlikun	0:13413ea9a877	2849	/**
ganlikun	0:13413ea9a877	2850	* @brief Handle the data 8-bit transmit in Interrupt mode.
ganlikun	0:13413ea9a877	2851	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2852	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2853	* @retval None
ganlikun	0:13413ea9a877	2854	*/
ganlikun	0:13413ea9a877	2855	static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2856	{
ganlikun	0:13413ea9a877	2857	(__IO uint8_t )&hspi->Instance->DR = (*hspi->pTxBuffPtr++);
ganlikun	0:13413ea9a877	2858	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	2859
ganlikun	0:13413ea9a877	2860	if(hspi->TxXferCount == 0U)
ganlikun	0:13413ea9a877	2861	{
ganlikun	0:13413ea9a877	2862	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2863	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2864	{
ganlikun	0:13413ea9a877	2865	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	2866	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	2867	}
ganlikun	0:13413ea9a877	2868	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2869	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE));
ganlikun	0:13413ea9a877	2870	SPI_CloseTx_ISR(hspi);
ganlikun	0:13413ea9a877	2871	}
ganlikun	0:13413ea9a877	2872	}
ganlikun	0:13413ea9a877	2873
ganlikun	0:13413ea9a877	2874	/**
ganlikun	0:13413ea9a877	2875	* @brief Handle the data 16-bit transmit in Interrupt mode.
ganlikun	0:13413ea9a877	2876	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2877	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2878	* @retval None
ganlikun	0:13413ea9a877	2879	*/
ganlikun	0:13413ea9a877	2880	static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	2881	{
ganlikun	0:13413ea9a877	2882	/* Transmit data in 16 Bit mode */
ganlikun	0:13413ea9a877	2883	hspi->Instance->DR = ((uint16_t )hspi->pTxBuffPtr);
ganlikun	0:13413ea9a877	2884	hspi->pTxBuffPtr += sizeof(uint16_t);
ganlikun	0:13413ea9a877	2885	hspi->TxXferCount--;
ganlikun	0:13413ea9a877	2886
ganlikun	0:13413ea9a877	2887	if(hspi->TxXferCount == 0U)
ganlikun	0:13413ea9a877	2888	{
ganlikun	0:13413ea9a877	2889	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	2890	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2891	{
ganlikun	0:13413ea9a877	2892	/* Enable CRC Transmission */
ganlikun	0:13413ea9a877	2893	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
ganlikun	0:13413ea9a877	2894	}
ganlikun	0:13413ea9a877	2895	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	2896	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE));
ganlikun	0:13413ea9a877	2897	SPI_CloseTx_ISR(hspi);
ganlikun	0:13413ea9a877	2898	}
ganlikun	0:13413ea9a877	2899	}
ganlikun	0:13413ea9a877	2900
ganlikun	0:13413ea9a877	2901	/**
ganlikun	0:13413ea9a877	2902	* @brief Handle SPI Communication Timeout.
ganlikun	0:13413ea9a877	2903	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2904	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2905	* @param Flag: SPI flag to check
ganlikun	0:13413ea9a877	2906	* @param State: flag state to check
ganlikun	0:13413ea9a877	2907	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	2908	* @param Tickstart: tick start value
ganlikun	0:13413ea9a877	2909	* @retval HAL status
ganlikun	0:13413ea9a877	2910	*/
ganlikun	0:13413ea9a877	2911	static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, uint32_t State, uint32_t Timeout, uint32_t Tickstart)
ganlikun	0:13413ea9a877	2912	{
ganlikun	0:13413ea9a877	2913	while((hspi->Instance->SR & Flag) != State)
ganlikun	0:13413ea9a877	2914	{
ganlikun	0:13413ea9a877	2915	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	2916	{
ganlikun	0:13413ea9a877	2917	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) >= Timeout))
ganlikun	0:13413ea9a877	2918	{
ganlikun	0:13413ea9a877	2919	/* Disable the SPI and reset the CRC: the CRC value should be cleared
ganlikun	0:13413ea9a877	2920	on both master and slave sides in order to resynchronize the master
ganlikun	0:13413ea9a877	2921	and slave for their respective CRC calculation */
ganlikun	0:13413ea9a877	2922
ganlikun	0:13413ea9a877	2923	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
ganlikun	0:13413ea9a877	2924	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	2925
ganlikun	0:13413ea9a877	2926	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
ganlikun	0:13413ea9a877	2927	{
ganlikun	0:13413ea9a877	2928	/* Disable SPI peripheral */
ganlikun	0:13413ea9a877	2929	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	2930	}
ganlikun	0:13413ea9a877	2931
ganlikun	0:13413ea9a877	2932	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	2933	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2934	{
ganlikun	0:13413ea9a877	2935	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	2936	}
ganlikun	0:13413ea9a877	2937
ganlikun	0:13413ea9a877	2938	hspi->State= HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2939
ganlikun	0:13413ea9a877	2940	/* Process Unlocked */
ganlikun	0:13413ea9a877	2941	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	2942
ganlikun	0:13413ea9a877	2943	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	2944	}
ganlikun	0:13413ea9a877	2945	}
ganlikun	0:13413ea9a877	2946	}
ganlikun	0:13413ea9a877	2947
ganlikun	0:13413ea9a877	2948	return HAL_OK;
ganlikun	0:13413ea9a877	2949	}
ganlikun	0:13413ea9a877	2950
ganlikun	0:13413ea9a877	2951	/**
ganlikun	0:13413ea9a877	2952	* @brief Handle SPI Communication Timeout.
ganlikun	0:13413ea9a877	2953	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2954	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	2955	* @param Flag: SPI TXE flag to check
ganlikun	0:13413ea9a877	2956	* @param State: flag state to check
ganlikun	0:13413ea9a877	2957	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	2958	* @param Tickstart: tick start value
ganlikun	0:13413ea9a877	2959	* @retval HAL status
ganlikun	0:13413ea9a877	2960	*/
ganlikun	0:13413ea9a877	2961	static HAL_StatusTypeDef SPI_WaitTXEFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
ganlikun	0:13413ea9a877	2962	{
ganlikun	0:13413ea9a877	2963	while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET)
ganlikun	0:13413ea9a877	2964	{
ganlikun	0:13413ea9a877	2965	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	2966	{
ganlikun	0:13413ea9a877	2967	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) >= Timeout))
ganlikun	0:13413ea9a877	2968	{
ganlikun	0:13413ea9a877	2969	/* Disable the SPI and reset the CRC: the CRC value should be cleared
ganlikun	0:13413ea9a877	2970	on both master and slave sides in order to resynchronize the master
ganlikun	0:13413ea9a877	2971	and slave for their respective CRC calculation */
ganlikun	0:13413ea9a877	2972
ganlikun	0:13413ea9a877	2973	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
ganlikun	0:13413ea9a877	2974	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	2975
ganlikun	0:13413ea9a877	2976	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
ganlikun	0:13413ea9a877	2977	{
ganlikun	0:13413ea9a877	2978	/* Disable SPI peripheral */
ganlikun	0:13413ea9a877	2979	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	2980	}
ganlikun	0:13413ea9a877	2981
ganlikun	0:13413ea9a877	2982	/* Reset CRC Calculation */
ganlikun	0:13413ea9a877	2983	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
ganlikun	0:13413ea9a877	2984	{
ganlikun	0:13413ea9a877	2985	SPI_RESET_CRC(hspi);
ganlikun	0:13413ea9a877	2986	}
ganlikun	0:13413ea9a877	2987
ganlikun	0:13413ea9a877	2988	hspi->State= HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	2989
ganlikun	0:13413ea9a877	2990	/* Process Unlocked */
ganlikun	0:13413ea9a877	2991	__HAL_UNLOCK(hspi);
ganlikun	0:13413ea9a877	2992
ganlikun	0:13413ea9a877	2993	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	2994	}
ganlikun	0:13413ea9a877	2995	}
ganlikun	0:13413ea9a877	2996	}
ganlikun	0:13413ea9a877	2997
ganlikun	0:13413ea9a877	2998	return HAL_OK;
ganlikun	0:13413ea9a877	2999	}
ganlikun	0:13413ea9a877	3000
ganlikun	0:13413ea9a877	3001	/**
ganlikun	0:13413ea9a877	3002	* @brief Handle to check BSY flag before start a new transaction.
ganlikun	0:13413ea9a877	3003	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	3004	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	3005	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	3006	* @param Tickstart: tick start value
ganlikun	0:13413ea9a877	3007	* @retval HAL status
ganlikun	0:13413ea9a877	3008	*/
ganlikun	0:13413ea9a877	3009	static HAL_StatusTypeDef SPI_CheckFlag_BSY(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
ganlikun	0:13413ea9a877	3010	{
ganlikun	0:13413ea9a877	3011	/* Control the BSY flag */
ganlikun	0:13413ea9a877	3012	if(SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	3013	{
ganlikun	0:13413ea9a877	3014	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	3015	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	3016	}
ganlikun	0:13413ea9a877	3017	return HAL_OK;
ganlikun	0:13413ea9a877	3018	}
ganlikun	0:13413ea9a877	3019
ganlikun	0:13413ea9a877	3020	/**
ganlikun	0:13413ea9a877	3021	* @brief Handle the end of the RXTX transaction.
ganlikun	0:13413ea9a877	3022	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	3023	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	3024	* @retval None
ganlikun	0:13413ea9a877	3025	*/
ganlikun	0:13413ea9a877	3026	static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	3027	{
ganlikun	0:13413ea9a877	3028	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	3029	__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
ganlikun	0:13413ea9a877	3030	/* Init tickstart for timeout managment*/
ganlikun	0:13413ea9a877	3031	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	3032
ganlikun	0:13413ea9a877	3033	/* Disable ERR interrupt */
ganlikun	0:13413ea9a877	3034	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
ganlikun	0:13413ea9a877	3035
ganlikun	0:13413ea9a877	3036	/* Wait until TXE flag is set */
ganlikun	0:13413ea9a877	3037	do
ganlikun	0:13413ea9a877	3038	{
ganlikun	0:13413ea9a877	3039	if(count-- == 0U)
ganlikun	0:13413ea9a877	3040	{
ganlikun	0:13413ea9a877	3041	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	3042	break;
ganlikun	0:13413ea9a877	3043	}
ganlikun	0:13413ea9a877	3044	}
ganlikun	0:13413ea9a877	3045	while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
ganlikun	0:13413ea9a877	3046
ganlikun	0:13413ea9a877	3047	/* Check the end of the transaction */
ganlikun	0:13413ea9a877	3048	if(SPI_CheckFlag_BSY(hspi, SPI_DEFAULT_TIMEOUT, tickstart)!=HAL_OK)
ganlikun	0:13413ea9a877	3049	{
ganlikun	0:13413ea9a877	3050	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	3051	}
ganlikun	0:13413ea9a877	3052
ganlikun	0:13413ea9a877	3053	/* Clear overrun flag in 2 Lines communication mode because received is not read */
ganlikun	0:13413ea9a877	3054	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
ganlikun	0:13413ea9a877	3055	{
ganlikun	0:13413ea9a877	3056	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	3057	}
ganlikun	0:13413ea9a877	3058
ganlikun	0:13413ea9a877	3059	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	3060	/* Check if CRC error occurred */
ganlikun	0:13413ea9a877	3061	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
ganlikun	0:13413ea9a877	3062	{
ganlikun	0:13413ea9a877	3063	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	3064	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	3065	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
ganlikun	0:13413ea9a877	3066	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	3067	}
ganlikun	0:13413ea9a877	3068	else
ganlikun	0:13413ea9a877	3069	{
ganlikun	0:13413ea9a877	3070	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	3071	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	3072	{
ganlikun	0:13413ea9a877	3073	if(hspi->State == HAL_SPI_STATE_BUSY_RX)
ganlikun	0:13413ea9a877	3074	{
ganlikun	0:13413ea9a877	3075	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	3076	HAL_SPI_RxCpltCallback(hspi);
ganlikun	0:13413ea9a877	3077	}
ganlikun	0:13413ea9a877	3078	else
ganlikun	0:13413ea9a877	3079	{
ganlikun	0:13413ea9a877	3080	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	3081	HAL_SPI_TxRxCpltCallback(hspi);
ganlikun	0:13413ea9a877	3082	}
ganlikun	0:13413ea9a877	3083	}
ganlikun	0:13413ea9a877	3084	else
ganlikun	0:13413ea9a877	3085	{
ganlikun	0:13413ea9a877	3086	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	3087	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	3088	}
ganlikun	0:13413ea9a877	3089	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	3090	}
ganlikun	0:13413ea9a877	3091	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	3092	}
ganlikun	0:13413ea9a877	3093
ganlikun	0:13413ea9a877	3094	/**
ganlikun	0:13413ea9a877	3095	* @brief Handle the end of the RX transaction.
ganlikun	0:13413ea9a877	3096	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	3097	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	3098	* @retval None
ganlikun	0:13413ea9a877	3099	*/
ganlikun	0:13413ea9a877	3100	static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	3101	{
ganlikun	0:13413ea9a877	3102	/* Disable RXNE and ERR interrupt */
ganlikun	0:13413ea9a877	3103	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	3104
ganlikun	0:13413ea9a877	3105	/* Check the end of the transaction */
ganlikun	0:13413ea9a877	3106	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
ganlikun	0:13413ea9a877	3107	{
ganlikun	0:13413ea9a877	3108	/* Disable SPI peripheral */
ganlikun	0:13413ea9a877	3109	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	3110	}
ganlikun	0:13413ea9a877	3111
ganlikun	0:13413ea9a877	3112	/* Clear overrun flag in 2 Lines communication mode because received is not read */
ganlikun	0:13413ea9a877	3113	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
ganlikun	0:13413ea9a877	3114	{
ganlikun	0:13413ea9a877	3115	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	3116	}
ganlikun	0:13413ea9a877	3117	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	3118
ganlikun	0:13413ea9a877	3119	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	3120	/* Check if CRC error occurred */
ganlikun	0:13413ea9a877	3121	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
ganlikun	0:13413ea9a877	3122	{
ganlikun	0:13413ea9a877	3123	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
ganlikun	0:13413ea9a877	3124	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
ganlikun	0:13413ea9a877	3125	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	3126	}
ganlikun	0:13413ea9a877	3127	else
ganlikun	0:13413ea9a877	3128	{
ganlikun	0:13413ea9a877	3129	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	3130	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	3131	{
ganlikun	0:13413ea9a877	3132	HAL_SPI_RxCpltCallback(hspi);
ganlikun	0:13413ea9a877	3133	}
ganlikun	0:13413ea9a877	3134	else
ganlikun	0:13413ea9a877	3135	{
ganlikun	0:13413ea9a877	3136	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	3137	}
ganlikun	0:13413ea9a877	3138	#if (USE_SPI_CRC != 0U)
ganlikun	0:13413ea9a877	3139	}
ganlikun	0:13413ea9a877	3140	#endif /* USE_SPI_CRC */
ganlikun	0:13413ea9a877	3141	}
ganlikun	0:13413ea9a877	3142
ganlikun	0:13413ea9a877	3143	/**
ganlikun	0:13413ea9a877	3144	* @brief Handle the end of the TX transaction.
ganlikun	0:13413ea9a877	3145	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	3146	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	3147	* @retval None
ganlikun	0:13413ea9a877	3148	*/
ganlikun	0:13413ea9a877	3149	static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	3150	{
ganlikun	0:13413ea9a877	3151	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	3152	__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
ganlikun	0:13413ea9a877	3153
ganlikun	0:13413ea9a877	3154	/* Init tickstart for timeout management*/
ganlikun	0:13413ea9a877	3155	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	3156
ganlikun	0:13413ea9a877	3157	/* Wait until TXE flag is set */
ganlikun	0:13413ea9a877	3158	do
ganlikun	0:13413ea9a877	3159	{
ganlikun	0:13413ea9a877	3160	if(count-- == 0U)
ganlikun	0:13413ea9a877	3161	{
ganlikun	0:13413ea9a877	3162	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	3163	break;
ganlikun	0:13413ea9a877	3164	}
ganlikun	0:13413ea9a877	3165	}
ganlikun	0:13413ea9a877	3166	while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
ganlikun	0:13413ea9a877	3167
ganlikun	0:13413ea9a877	3168	/* Disable TXE and ERR interrupt */
ganlikun	0:13413ea9a877	3169	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_ERR));
ganlikun	0:13413ea9a877	3170
ganlikun	0:13413ea9a877	3171	/* Check Busy flag */
ganlikun	0:13413ea9a877	3172	if(SPI_CheckFlag_BSY(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
ganlikun	0:13413ea9a877	3173	{
ganlikun	0:13413ea9a877	3174	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	3175	}
ganlikun	0:13413ea9a877	3176
ganlikun	0:13413ea9a877	3177	/* Clear overrun flag in 2 Lines communication mode because received is not read */
ganlikun	0:13413ea9a877	3178	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
ganlikun	0:13413ea9a877	3179	{
ganlikun	0:13413ea9a877	3180	__HAL_SPI_CLEAR_OVRFLAG(hspi);
ganlikun	0:13413ea9a877	3181	}
ganlikun	0:13413ea9a877	3182
ganlikun	0:13413ea9a877	3183	hspi->State = HAL_SPI_STATE_READY;
ganlikun	0:13413ea9a877	3184	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
ganlikun	0:13413ea9a877	3185	{
ganlikun	0:13413ea9a877	3186	HAL_SPI_ErrorCallback(hspi);
ganlikun	0:13413ea9a877	3187	}
ganlikun	0:13413ea9a877	3188	else
ganlikun	0:13413ea9a877	3189	{
ganlikun	0:13413ea9a877	3190	HAL_SPI_TxCpltCallback(hspi);
ganlikun	0:13413ea9a877	3191	}
ganlikun	0:13413ea9a877	3192	}
ganlikun	0:13413ea9a877	3193
ganlikun	0:13413ea9a877	3194	/**
ganlikun	0:13413ea9a877	3195	* @}
ganlikun	0:13413ea9a877	3196	*/
ganlikun	0:13413ea9a877	3197
ganlikun	0:13413ea9a877	3198	/**
ganlikun	0:13413ea9a877	3199	* @brief Handle abort a Tx or Rx transaction.
ganlikun	0:13413ea9a877	3200	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	3201	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	3202	* @retval None
ganlikun	0:13413ea9a877	3203	*/
ganlikun	0:13413ea9a877	3204	static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	3205	{
ganlikun	0:13413ea9a877	3206	__IO uint32_t tmpreg = 0U;
ganlikun	0:13413ea9a877	3207	__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
ganlikun	0:13413ea9a877	3208
ganlikun	0:13413ea9a877	3209	/* Wait until TXE flag is set */
ganlikun	0:13413ea9a877	3210	do
ganlikun	0:13413ea9a877	3211	{
ganlikun	0:13413ea9a877	3212	if(count-- == 0U)
ganlikun	0:13413ea9a877	3213	{
ganlikun	0:13413ea9a877	3214	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
ganlikun	0:13413ea9a877	3215	break;
ganlikun	0:13413ea9a877	3216	}
ganlikun	0:13413ea9a877	3217	}
ganlikun	0:13413ea9a877	3218	while((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
ganlikun	0:13413ea9a877	3219
ganlikun	0:13413ea9a877	3220	/* Disable SPI Peripheral */
ganlikun	0:13413ea9a877	3221	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	3222
ganlikun	0:13413ea9a877	3223	/* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
ganlikun	0:13413ea9a877	3224	CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE \| SPI_CR2_RXNEIE \| SPI_CR2_ERRIE));
ganlikun	0:13413ea9a877	3225
ganlikun	0:13413ea9a877	3226	/* Flush DR Register */
ganlikun	0:13413ea9a877	3227	tmpreg = ((__IO uint32_t )&hspi->Instance->DR);
ganlikun	0:13413ea9a877	3228
ganlikun	0:13413ea9a877	3229	/* To avoid GCC warning */
ganlikun	0:13413ea9a877	3230	UNUSED(tmpreg);
ganlikun	0:13413ea9a877	3231	}
ganlikun	0:13413ea9a877	3232
ganlikun	0:13413ea9a877	3233	/**
ganlikun	0:13413ea9a877	3234	* @brief Handle abort a Tx or Rx transaction.
ganlikun	0:13413ea9a877	3235	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	3236	* the configuration information for SPI module.
ganlikun	0:13413ea9a877	3237	* @retval None
ganlikun	0:13413ea9a877	3238	*/
ganlikun	0:13413ea9a877	3239	static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi)
ganlikun	0:13413ea9a877	3240	{
ganlikun	0:13413ea9a877	3241	/* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
ganlikun	0:13413ea9a877	3242	CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE \| SPI_CR2_RXNEIE \| SPI_CR2_ERRIE));
ganlikun	0:13413ea9a877	3243
ganlikun	0:13413ea9a877	3244	/* Disable SPI Peripheral */
ganlikun	0:13413ea9a877	3245	__HAL_SPI_DISABLE(hspi);
ganlikun	0:13413ea9a877	3246	}
ganlikun	0:13413ea9a877	3247	/**
ganlikun	0:13413ea9a877	3248	* @}
ganlikun	0:13413ea9a877	3249	*/
ganlikun	0:13413ea9a877	3250	#endif /* HAL_SPI_MODULE_ENABLED */
ganlikun	0:13413ea9a877	3251
ganlikun	0:13413ea9a877	3252	/**
ganlikun	0:13413ea9a877	3253	* @}
ganlikun	0:13413ea9a877	3254	*/
ganlikun	0:13413ea9a877	3255
ganlikun	0:13413ea9a877	3256	/**
ganlikun	0:13413ea9a877	3257	* @}
ganlikun	0:13413ea9a877	3258	*/
ganlikun	0:13413ea9a877	3259
ganlikun	0:13413ea9a877	3260	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	3261

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Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	1

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_spi.c@0:13413ea9a877, 2022-06-12 (annotated)

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