Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sdram.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_sdram.c
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief SDRAM HAL module driver.
ganlikun 0:13413ea9a877 8 * This file provides a generic firmware to drive SDRAM memories mounted
ganlikun 0:13413ea9a877 9 * as external device.
ganlikun 0:13413ea9a877 10 *
ganlikun 0:13413ea9a877 11 @verbatim
ganlikun 0:13413ea9a877 12 ==============================================================================
ganlikun 0:13413ea9a877 13 ##### How to use this driver #####
ganlikun 0:13413ea9a877 14 ==============================================================================
ganlikun 0:13413ea9a877 15 [..]
ganlikun 0:13413ea9a877 16 This driver is a generic layered driver which contains a set of APIs used to
ganlikun 0:13413ea9a877 17 control SDRAM memories. It uses the FMC layer functions to interface
ganlikun 0:13413ea9a877 18 with SDRAM devices.
ganlikun 0:13413ea9a877 19 The following sequence should be followed to configure the FMC to interface
ganlikun 0:13413ea9a877 20 with SDRAM memories:
ganlikun 0:13413ea9a877 21
ganlikun 0:13413ea9a877 22 (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
ganlikun 0:13413ea9a877 23 SDRAM_HandleTypeDef hdsram
ganlikun 0:13413ea9a877 24
ganlikun 0:13413ea9a877 25 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
ganlikun 0:13413ea9a877 26 values of the structure member.
ganlikun 0:13413ea9a877 27
ganlikun 0:13413ea9a877 28 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
ganlikun 0:13413ea9a877 29 base register instance for NOR or SDRAM device
ganlikun 0:13413ea9a877 30
ganlikun 0:13413ea9a877 31 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
ganlikun 0:13413ea9a877 32 FMC_SDRAM_TimingTypeDef Timing;
ganlikun 0:13413ea9a877 33 and fill its fields with the allowed values of the structure member.
ganlikun 0:13413ea9a877 34
ganlikun 0:13413ea9a877 35 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
ganlikun 0:13413ea9a877 36 performs the following sequence:
ganlikun 0:13413ea9a877 37
ganlikun 0:13413ea9a877 38 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
ganlikun 0:13413ea9a877 39 (##) Control register configuration using the FMC SDRAM interface function
ganlikun 0:13413ea9a877 40 FMC_SDRAM_Init()
ganlikun 0:13413ea9a877 41 (##) Timing register configuration using the FMC SDRAM interface function
ganlikun 0:13413ea9a877 42 FMC_SDRAM_Timing_Init()
ganlikun 0:13413ea9a877 43 (##) Program the SDRAM external device by applying its initialization sequence
ganlikun 0:13413ea9a877 44 according to the device plugged in your hardware. This step is mandatory
ganlikun 0:13413ea9a877 45 for accessing the SDRAM device.
ganlikun 0:13413ea9a877 46
ganlikun 0:13413ea9a877 47 (#) At this stage you can perform read/write accesses from/to the memory connected
ganlikun 0:13413ea9a877 48 to the SDRAM Bank. You can perform either polling or DMA transfer using the
ganlikun 0:13413ea9a877 49 following APIs:
ganlikun 0:13413ea9a877 50 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
ganlikun 0:13413ea9a877 51 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
ganlikun 0:13413ea9a877 52
ganlikun 0:13413ea9a877 53 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
ganlikun 0:13413ea9a877 54 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
ganlikun 0:13413ea9a877 55 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
ganlikun 0:13413ea9a877 56 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
ganlikun 0:13413ea9a877 57 structure.
ganlikun 0:13413ea9a877 58
ganlikun 0:13413ea9a877 59 (#) You can continuously monitor the SDRAM device HAL state by calling the function
ganlikun 0:13413ea9a877 60 HAL_SDRAM_GetState()
ganlikun 0:13413ea9a877 61
ganlikun 0:13413ea9a877 62 @endverbatim
ganlikun 0:13413ea9a877 63 ******************************************************************************
ganlikun 0:13413ea9a877 64 * @attention
ganlikun 0:13413ea9a877 65 *
ganlikun 0:13413ea9a877 66 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 67 *
ganlikun 0:13413ea9a877 68 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 69 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 70 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 71 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 72 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 73 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 74 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 75 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 76 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 77 * without specific prior written permission.
ganlikun 0:13413ea9a877 78 *
ganlikun 0:13413ea9a877 79 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 80 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 81 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 82 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 83 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 84 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 85 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 86 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 87 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 88 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 89 *
ganlikun 0:13413ea9a877 90 ******************************************************************************
ganlikun 0:13413ea9a877 91 */
ganlikun 0:13413ea9a877 92
ganlikun 0:13413ea9a877 93 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 94 #include "stm32f4xx_hal.h"
ganlikun 0:13413ea9a877 95
ganlikun 0:13413ea9a877 96 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 97 * @{
ganlikun 0:13413ea9a877 98 */
ganlikun 0:13413ea9a877 99
ganlikun 0:13413ea9a877 100 /** @defgroup SDRAM SDRAM
ganlikun 0:13413ea9a877 101 * @brief SDRAM driver modules
ganlikun 0:13413ea9a877 102 * @{
ganlikun 0:13413ea9a877 103 */
ganlikun 0:13413ea9a877 104 #ifdef HAL_SDRAM_MODULE_ENABLED
ganlikun 0:13413ea9a877 105 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 106 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 107
ganlikun 0:13413ea9a877 108 /* Private typedef -----------------------------------------------------------*/
ganlikun 0:13413ea9a877 109 /* Private define ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 110 /* Private macro -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 111 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 112 /* Private functions ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 113 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 114 /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
ganlikun 0:13413ea9a877 115 * @{
ganlikun 0:13413ea9a877 116 */
ganlikun 0:13413ea9a877 117
ganlikun 0:13413ea9a877 118 /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
ganlikun 0:13413ea9a877 119 * @brief Initialization and Configuration functions
ganlikun 0:13413ea9a877 120 *
ganlikun 0:13413ea9a877 121 @verbatim
ganlikun 0:13413ea9a877 122 ==============================================================================
ganlikun 0:13413ea9a877 123 ##### SDRAM Initialization and de_initialization functions #####
ganlikun 0:13413ea9a877 124 ==============================================================================
ganlikun 0:13413ea9a877 125 [..]
ganlikun 0:13413ea9a877 126 This section provides functions allowing to initialize/de-initialize
ganlikun 0:13413ea9a877 127 the SDRAM memory
ganlikun 0:13413ea9a877 128
ganlikun 0:13413ea9a877 129 @endverbatim
ganlikun 0:13413ea9a877 130 * @{
ganlikun 0:13413ea9a877 131 */
ganlikun 0:13413ea9a877 132
ganlikun 0:13413ea9a877 133 /**
ganlikun 0:13413ea9a877 134 * @brief Performs the SDRAM device initialization sequence.
ganlikun 0:13413ea9a877 135 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 136 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 137 * @param Timing: Pointer to SDRAM control timing structure
ganlikun 0:13413ea9a877 138 * @retval HAL status
ganlikun 0:13413ea9a877 139 */
ganlikun 0:13413ea9a877 140 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
ganlikun 0:13413ea9a877 141 {
ganlikun 0:13413ea9a877 142 /* Check the SDRAM handle parameter */
ganlikun 0:13413ea9a877 143 if(hsdram == NULL)
ganlikun 0:13413ea9a877 144 {
ganlikun 0:13413ea9a877 145 return HAL_ERROR;
ganlikun 0:13413ea9a877 146 }
ganlikun 0:13413ea9a877 147
ganlikun 0:13413ea9a877 148 if(hsdram->State == HAL_SDRAM_STATE_RESET)
ganlikun 0:13413ea9a877 149 {
ganlikun 0:13413ea9a877 150 /* Allocate lock resource and initialize it */
ganlikun 0:13413ea9a877 151 hsdram->Lock = HAL_UNLOCKED;
ganlikun 0:13413ea9a877 152 /* Initialize the low level hardware (MSP) */
ganlikun 0:13413ea9a877 153 HAL_SDRAM_MspInit(hsdram);
ganlikun 0:13413ea9a877 154 }
ganlikun 0:13413ea9a877 155
ganlikun 0:13413ea9a877 156 /* Initialize the SDRAM controller state */
ganlikun 0:13413ea9a877 157 hsdram->State = HAL_SDRAM_STATE_BUSY;
ganlikun 0:13413ea9a877 158
ganlikun 0:13413ea9a877 159 /* Initialize SDRAM control Interface */
ganlikun 0:13413ea9a877 160 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
ganlikun 0:13413ea9a877 161
ganlikun 0:13413ea9a877 162 /* Initialize SDRAM timing Interface */
ganlikun 0:13413ea9a877 163 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
ganlikun 0:13413ea9a877 164
ganlikun 0:13413ea9a877 165 /* Update the SDRAM controller state */
ganlikun 0:13413ea9a877 166 hsdram->State = HAL_SDRAM_STATE_READY;
ganlikun 0:13413ea9a877 167
ganlikun 0:13413ea9a877 168 return HAL_OK;
ganlikun 0:13413ea9a877 169 }
ganlikun 0:13413ea9a877 170
ganlikun 0:13413ea9a877 171 /**
ganlikun 0:13413ea9a877 172 * @brief Perform the SDRAM device initialization sequence.
ganlikun 0:13413ea9a877 173 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 174 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 175 * @retval HAL status
ganlikun 0:13413ea9a877 176 */
ganlikun 0:13413ea9a877 177 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 178 {
ganlikun 0:13413ea9a877 179 /* Initialize the low level hardware (MSP) */
ganlikun 0:13413ea9a877 180 HAL_SDRAM_MspDeInit(hsdram);
ganlikun 0:13413ea9a877 181
ganlikun 0:13413ea9a877 182 /* Configure the SDRAM registers with their reset values */
ganlikun 0:13413ea9a877 183 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
ganlikun 0:13413ea9a877 184
ganlikun 0:13413ea9a877 185 /* Reset the SDRAM controller state */
ganlikun 0:13413ea9a877 186 hsdram->State = HAL_SDRAM_STATE_RESET;
ganlikun 0:13413ea9a877 187
ganlikun 0:13413ea9a877 188 /* Release Lock */
ganlikun 0:13413ea9a877 189 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 190
ganlikun 0:13413ea9a877 191 return HAL_OK;
ganlikun 0:13413ea9a877 192 }
ganlikun 0:13413ea9a877 193
ganlikun 0:13413ea9a877 194 /**
ganlikun 0:13413ea9a877 195 * @brief SDRAM MSP Init.
ganlikun 0:13413ea9a877 196 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 197 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 198 * @retval None
ganlikun 0:13413ea9a877 199 */
ganlikun 0:13413ea9a877 200 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 201 {
ganlikun 0:13413ea9a877 202 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 203 UNUSED(hsdram);
ganlikun 0:13413ea9a877 204 /* NOTE: This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 205 the HAL_SDRAM_MspInit could be implemented in the user file
ganlikun 0:13413ea9a877 206 */
ganlikun 0:13413ea9a877 207 }
ganlikun 0:13413ea9a877 208
ganlikun 0:13413ea9a877 209 /**
ganlikun 0:13413ea9a877 210 * @brief SDRAM MSP DeInit.
ganlikun 0:13413ea9a877 211 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 212 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 213 * @retval None
ganlikun 0:13413ea9a877 214 */
ganlikun 0:13413ea9a877 215 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 216 {
ganlikun 0:13413ea9a877 217 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 218 UNUSED(hsdram);
ganlikun 0:13413ea9a877 219 /* NOTE: This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 220 the HAL_SDRAM_MspDeInit could be implemented in the user file
ganlikun 0:13413ea9a877 221 */
ganlikun 0:13413ea9a877 222 }
ganlikun 0:13413ea9a877 223
ganlikun 0:13413ea9a877 224 /**
ganlikun 0:13413ea9a877 225 * @brief This function handles SDRAM refresh error interrupt request.
ganlikun 0:13413ea9a877 226 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 227 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 228 * @retval HAL status
ganlikun 0:13413ea9a877 229 */
ganlikun 0:13413ea9a877 230 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 231 {
ganlikun 0:13413ea9a877 232 /* Check SDRAM interrupt Rising edge flag */
ganlikun 0:13413ea9a877 233 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
ganlikun 0:13413ea9a877 234 {
ganlikun 0:13413ea9a877 235 /* SDRAM refresh error interrupt callback */
ganlikun 0:13413ea9a877 236 HAL_SDRAM_RefreshErrorCallback(hsdram);
ganlikun 0:13413ea9a877 237
ganlikun 0:13413ea9a877 238 /* Clear SDRAM refresh error interrupt pending bit */
ganlikun 0:13413ea9a877 239 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
ganlikun 0:13413ea9a877 240 }
ganlikun 0:13413ea9a877 241 }
ganlikun 0:13413ea9a877 242
ganlikun 0:13413ea9a877 243 /**
ganlikun 0:13413ea9a877 244 * @brief SDRAM Refresh error callback.
ganlikun 0:13413ea9a877 245 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 246 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 247 * @retval None
ganlikun 0:13413ea9a877 248 */
ganlikun 0:13413ea9a877 249 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 250 {
ganlikun 0:13413ea9a877 251 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 252 UNUSED(hsdram);
ganlikun 0:13413ea9a877 253 /* NOTE: This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 254 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
ganlikun 0:13413ea9a877 255 */
ganlikun 0:13413ea9a877 256 }
ganlikun 0:13413ea9a877 257
ganlikun 0:13413ea9a877 258 /**
ganlikun 0:13413ea9a877 259 * @brief DMA transfer complete callback.
ganlikun 0:13413ea9a877 260 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 261 * the configuration information for the specified DMA module.
ganlikun 0:13413ea9a877 262 * @retval None
ganlikun 0:13413ea9a877 263 */
ganlikun 0:13413ea9a877 264 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
ganlikun 0:13413ea9a877 265 {
ganlikun 0:13413ea9a877 266 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 267 UNUSED(hdma);
ganlikun 0:13413ea9a877 268 /* NOTE: This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 269 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
ganlikun 0:13413ea9a877 270 */
ganlikun 0:13413ea9a877 271 }
ganlikun 0:13413ea9a877 272
ganlikun 0:13413ea9a877 273 /**
ganlikun 0:13413ea9a877 274 * @brief DMA transfer complete error callback.
ganlikun 0:13413ea9a877 275 * @param hdma: DMA handle
ganlikun 0:13413ea9a877 276 * @retval None
ganlikun 0:13413ea9a877 277 */
ganlikun 0:13413ea9a877 278 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
ganlikun 0:13413ea9a877 279 {
ganlikun 0:13413ea9a877 280 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 281 UNUSED(hdma);
ganlikun 0:13413ea9a877 282 /* NOTE: This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 283 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
ganlikun 0:13413ea9a877 284 */
ganlikun 0:13413ea9a877 285 }
ganlikun 0:13413ea9a877 286 /**
ganlikun 0:13413ea9a877 287 * @}
ganlikun 0:13413ea9a877 288 */
ganlikun 0:13413ea9a877 289
ganlikun 0:13413ea9a877 290 /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
ganlikun 0:13413ea9a877 291 * @brief Input Output and memory control functions
ganlikun 0:13413ea9a877 292 *
ganlikun 0:13413ea9a877 293 @verbatim
ganlikun 0:13413ea9a877 294 ==============================================================================
ganlikun 0:13413ea9a877 295 ##### SDRAM Input and Output functions #####
ganlikun 0:13413ea9a877 296 ==============================================================================
ganlikun 0:13413ea9a877 297 [..]
ganlikun 0:13413ea9a877 298 This section provides functions allowing to use and control the SDRAM memory
ganlikun 0:13413ea9a877 299
ganlikun 0:13413ea9a877 300 @endverbatim
ganlikun 0:13413ea9a877 301 * @{
ganlikun 0:13413ea9a877 302 */
ganlikun 0:13413ea9a877 303
ganlikun 0:13413ea9a877 304 /**
ganlikun 0:13413ea9a877 305 * @brief Reads 8-bit data buffer from the SDRAM memory.
ganlikun 0:13413ea9a877 306 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 307 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 308 * @param pAddress: Pointer to read start address
ganlikun 0:13413ea9a877 309 * @param pDstBuffer: Pointer to destination buffer
ganlikun 0:13413ea9a877 310 * @param BufferSize: Size of the buffer to read from memory
ganlikun 0:13413ea9a877 311 * @retval HAL status
ganlikun 0:13413ea9a877 312 */
ganlikun 0:13413ea9a877 313 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 314 {
ganlikun 0:13413ea9a877 315 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
ganlikun 0:13413ea9a877 316
ganlikun 0:13413ea9a877 317 /* Process Locked */
ganlikun 0:13413ea9a877 318 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 319
ganlikun 0:13413ea9a877 320 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 321 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 322 {
ganlikun 0:13413ea9a877 323 return HAL_BUSY;
ganlikun 0:13413ea9a877 324 }
ganlikun 0:13413ea9a877 325 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
ganlikun 0:13413ea9a877 326 {
ganlikun 0:13413ea9a877 327 return HAL_ERROR;
ganlikun 0:13413ea9a877 328 }
ganlikun 0:13413ea9a877 329
ganlikun 0:13413ea9a877 330 /* Read data from source */
ganlikun 0:13413ea9a877 331 for(; BufferSize != 0U; BufferSize--)
ganlikun 0:13413ea9a877 332 {
ganlikun 0:13413ea9a877 333 *pDstBuffer = *(__IO uint8_t *)pSdramAddress;
ganlikun 0:13413ea9a877 334 pDstBuffer++;
ganlikun 0:13413ea9a877 335 pSdramAddress++;
ganlikun 0:13413ea9a877 336 }
ganlikun 0:13413ea9a877 337
ganlikun 0:13413ea9a877 338 /* Process Unlocked */
ganlikun 0:13413ea9a877 339 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 340
ganlikun 0:13413ea9a877 341 return HAL_OK;
ganlikun 0:13413ea9a877 342 }
ganlikun 0:13413ea9a877 343
ganlikun 0:13413ea9a877 344 /**
ganlikun 0:13413ea9a877 345 * @brief Writes 8-bit data buffer to SDRAM memory.
ganlikun 0:13413ea9a877 346 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 347 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 348 * @param pAddress: Pointer to write start address
ganlikun 0:13413ea9a877 349 * @param pSrcBuffer: Pointer to source buffer to write
ganlikun 0:13413ea9a877 350 * @param BufferSize: Size of the buffer to write to memory
ganlikun 0:13413ea9a877 351 * @retval HAL status
ganlikun 0:13413ea9a877 352 */
ganlikun 0:13413ea9a877 353 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 354 {
ganlikun 0:13413ea9a877 355 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
ganlikun 0:13413ea9a877 356 uint32_t tmp = 0U;
ganlikun 0:13413ea9a877 357
ganlikun 0:13413ea9a877 358 /* Process Locked */
ganlikun 0:13413ea9a877 359 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 360
ganlikun 0:13413ea9a877 361 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 362 tmp = hsdram->State;
ganlikun 0:13413ea9a877 363
ganlikun 0:13413ea9a877 364 if(tmp == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 365 {
ganlikun 0:13413ea9a877 366 return HAL_BUSY;
ganlikun 0:13413ea9a877 367 }
ganlikun 0:13413ea9a877 368 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
ganlikun 0:13413ea9a877 369 {
ganlikun 0:13413ea9a877 370 return HAL_ERROR;
ganlikun 0:13413ea9a877 371 }
ganlikun 0:13413ea9a877 372
ganlikun 0:13413ea9a877 373 /* Write data to memory */
ganlikun 0:13413ea9a877 374 for(; BufferSize != 0U; BufferSize--)
ganlikun 0:13413ea9a877 375 {
ganlikun 0:13413ea9a877 376 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
ganlikun 0:13413ea9a877 377 pSrcBuffer++;
ganlikun 0:13413ea9a877 378 pSdramAddress++;
ganlikun 0:13413ea9a877 379 }
ganlikun 0:13413ea9a877 380
ganlikun 0:13413ea9a877 381 /* Process Unlocked */
ganlikun 0:13413ea9a877 382 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 383
ganlikun 0:13413ea9a877 384 return HAL_OK;
ganlikun 0:13413ea9a877 385 }
ganlikun 0:13413ea9a877 386
ganlikun 0:13413ea9a877 387 /**
ganlikun 0:13413ea9a877 388 * @brief Reads 16-bit data buffer from the SDRAM memory.
ganlikun 0:13413ea9a877 389 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 390 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 391 * @param pAddress: Pointer to read start address
ganlikun 0:13413ea9a877 392 * @param pDstBuffer: Pointer to destination buffer
ganlikun 0:13413ea9a877 393 * @param BufferSize: Size of the buffer to read from memory
ganlikun 0:13413ea9a877 394 * @retval HAL status
ganlikun 0:13413ea9a877 395 */
ganlikun 0:13413ea9a877 396 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 397 {
ganlikun 0:13413ea9a877 398 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
ganlikun 0:13413ea9a877 399
ganlikun 0:13413ea9a877 400 /* Process Locked */
ganlikun 0:13413ea9a877 401 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 402
ganlikun 0:13413ea9a877 403 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 404 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 405 {
ganlikun 0:13413ea9a877 406 return HAL_BUSY;
ganlikun 0:13413ea9a877 407 }
ganlikun 0:13413ea9a877 408 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
ganlikun 0:13413ea9a877 409 {
ganlikun 0:13413ea9a877 410 return HAL_ERROR;
ganlikun 0:13413ea9a877 411 }
ganlikun 0:13413ea9a877 412
ganlikun 0:13413ea9a877 413 /* Read data from source */
ganlikun 0:13413ea9a877 414 for(; BufferSize != 0U; BufferSize--)
ganlikun 0:13413ea9a877 415 {
ganlikun 0:13413ea9a877 416 *pDstBuffer = *(__IO uint16_t *)pSdramAddress;
ganlikun 0:13413ea9a877 417 pDstBuffer++;
ganlikun 0:13413ea9a877 418 pSdramAddress++;
ganlikun 0:13413ea9a877 419 }
ganlikun 0:13413ea9a877 420
ganlikun 0:13413ea9a877 421 /* Process Unlocked */
ganlikun 0:13413ea9a877 422 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 423
ganlikun 0:13413ea9a877 424 return HAL_OK;
ganlikun 0:13413ea9a877 425 }
ganlikun 0:13413ea9a877 426
ganlikun 0:13413ea9a877 427 /**
ganlikun 0:13413ea9a877 428 * @brief Writes 16-bit data buffer to SDRAM memory.
ganlikun 0:13413ea9a877 429 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 430 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 431 * @param pAddress: Pointer to write start address
ganlikun 0:13413ea9a877 432 * @param pSrcBuffer: Pointer to source buffer to write
ganlikun 0:13413ea9a877 433 * @param BufferSize: Size of the buffer to write to memory
ganlikun 0:13413ea9a877 434 * @retval HAL status
ganlikun 0:13413ea9a877 435 */
ganlikun 0:13413ea9a877 436 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 437 {
ganlikun 0:13413ea9a877 438 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
ganlikun 0:13413ea9a877 439 uint32_t tmp = 0U;
ganlikun 0:13413ea9a877 440
ganlikun 0:13413ea9a877 441 /* Process Locked */
ganlikun 0:13413ea9a877 442 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 443
ganlikun 0:13413ea9a877 444 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 445 tmp = hsdram->State;
ganlikun 0:13413ea9a877 446
ganlikun 0:13413ea9a877 447 if(tmp == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 448 {
ganlikun 0:13413ea9a877 449 return HAL_BUSY;
ganlikun 0:13413ea9a877 450 }
ganlikun 0:13413ea9a877 451 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
ganlikun 0:13413ea9a877 452 {
ganlikun 0:13413ea9a877 453 return HAL_ERROR;
ganlikun 0:13413ea9a877 454 }
ganlikun 0:13413ea9a877 455
ganlikun 0:13413ea9a877 456 /* Write data to memory */
ganlikun 0:13413ea9a877 457 for(; BufferSize != 0U; BufferSize--)
ganlikun 0:13413ea9a877 458 {
ganlikun 0:13413ea9a877 459 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer;
ganlikun 0:13413ea9a877 460 pSrcBuffer++;
ganlikun 0:13413ea9a877 461 pSdramAddress++;
ganlikun 0:13413ea9a877 462 }
ganlikun 0:13413ea9a877 463
ganlikun 0:13413ea9a877 464 /* Process Unlocked */
ganlikun 0:13413ea9a877 465 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 466
ganlikun 0:13413ea9a877 467 return HAL_OK;
ganlikun 0:13413ea9a877 468 }
ganlikun 0:13413ea9a877 469
ganlikun 0:13413ea9a877 470 /**
ganlikun 0:13413ea9a877 471 * @brief Reads 32-bit data buffer from the SDRAM memory.
ganlikun 0:13413ea9a877 472 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 473 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 474 * @param pAddress: Pointer to read start address
ganlikun 0:13413ea9a877 475 * @param pDstBuffer: Pointer to destination buffer
ganlikun 0:13413ea9a877 476 * @param BufferSize: Size of the buffer to read from memory
ganlikun 0:13413ea9a877 477 * @retval HAL status
ganlikun 0:13413ea9a877 478 */
ganlikun 0:13413ea9a877 479 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 480 {
ganlikun 0:13413ea9a877 481 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
ganlikun 0:13413ea9a877 482
ganlikun 0:13413ea9a877 483 /* Process Locked */
ganlikun 0:13413ea9a877 484 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 485
ganlikun 0:13413ea9a877 486 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 487 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 488 {
ganlikun 0:13413ea9a877 489 return HAL_BUSY;
ganlikun 0:13413ea9a877 490 }
ganlikun 0:13413ea9a877 491 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
ganlikun 0:13413ea9a877 492 {
ganlikun 0:13413ea9a877 493 return HAL_ERROR;
ganlikun 0:13413ea9a877 494 }
ganlikun 0:13413ea9a877 495
ganlikun 0:13413ea9a877 496 /* Read data from source */
ganlikun 0:13413ea9a877 497 for(; BufferSize != 0U; BufferSize--)
ganlikun 0:13413ea9a877 498 {
ganlikun 0:13413ea9a877 499 *pDstBuffer = *(__IO uint32_t *)pSdramAddress;
ganlikun 0:13413ea9a877 500 pDstBuffer++;
ganlikun 0:13413ea9a877 501 pSdramAddress++;
ganlikun 0:13413ea9a877 502 }
ganlikun 0:13413ea9a877 503
ganlikun 0:13413ea9a877 504 /* Process Unlocked */
ganlikun 0:13413ea9a877 505 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 506
ganlikun 0:13413ea9a877 507 return HAL_OK;
ganlikun 0:13413ea9a877 508 }
ganlikun 0:13413ea9a877 509
ganlikun 0:13413ea9a877 510 /**
ganlikun 0:13413ea9a877 511 * @brief Writes 32-bit data buffer to SDRAM memory.
ganlikun 0:13413ea9a877 512 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 513 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 514 * @param pAddress: Pointer to write start address
ganlikun 0:13413ea9a877 515 * @param pSrcBuffer: Pointer to source buffer to write
ganlikun 0:13413ea9a877 516 * @param BufferSize: Size of the buffer to write to memory
ganlikun 0:13413ea9a877 517 * @retval HAL status
ganlikun 0:13413ea9a877 518 */
ganlikun 0:13413ea9a877 519 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 520 {
ganlikun 0:13413ea9a877 521 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
ganlikun 0:13413ea9a877 522 uint32_t tmp = 0U;
ganlikun 0:13413ea9a877 523
ganlikun 0:13413ea9a877 524 /* Process Locked */
ganlikun 0:13413ea9a877 525 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 526
ganlikun 0:13413ea9a877 527 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 528 tmp = hsdram->State;
ganlikun 0:13413ea9a877 529
ganlikun 0:13413ea9a877 530 if(tmp == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 531 {
ganlikun 0:13413ea9a877 532 return HAL_BUSY;
ganlikun 0:13413ea9a877 533 }
ganlikun 0:13413ea9a877 534 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
ganlikun 0:13413ea9a877 535 {
ganlikun 0:13413ea9a877 536 return HAL_ERROR;
ganlikun 0:13413ea9a877 537 }
ganlikun 0:13413ea9a877 538
ganlikun 0:13413ea9a877 539 /* Write data to memory */
ganlikun 0:13413ea9a877 540 for(; BufferSize != 0U; BufferSize--)
ganlikun 0:13413ea9a877 541 {
ganlikun 0:13413ea9a877 542 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer;
ganlikun 0:13413ea9a877 543 pSrcBuffer++;
ganlikun 0:13413ea9a877 544 pSdramAddress++;
ganlikun 0:13413ea9a877 545 }
ganlikun 0:13413ea9a877 546
ganlikun 0:13413ea9a877 547 /* Process Unlocked */
ganlikun 0:13413ea9a877 548 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 549
ganlikun 0:13413ea9a877 550 return HAL_OK;
ganlikun 0:13413ea9a877 551 }
ganlikun 0:13413ea9a877 552
ganlikun 0:13413ea9a877 553 /**
ganlikun 0:13413ea9a877 554 * @brief Reads a Words data from the SDRAM memory using DMA transfer.
ganlikun 0:13413ea9a877 555 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 556 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 557 * @param pAddress: Pointer to read start address
ganlikun 0:13413ea9a877 558 * @param pDstBuffer: Pointer to destination buffer
ganlikun 0:13413ea9a877 559 * @param BufferSize: Size of the buffer to read from memory
ganlikun 0:13413ea9a877 560 * @retval HAL status
ganlikun 0:13413ea9a877 561 */
ganlikun 0:13413ea9a877 562 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 563 {
ganlikun 0:13413ea9a877 564 uint32_t tmp = 0U;
ganlikun 0:13413ea9a877 565
ganlikun 0:13413ea9a877 566 /* Process Locked */
ganlikun 0:13413ea9a877 567 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 568
ganlikun 0:13413ea9a877 569 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 570 tmp = hsdram->State;
ganlikun 0:13413ea9a877 571
ganlikun 0:13413ea9a877 572 if(tmp == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 573 {
ganlikun 0:13413ea9a877 574 return HAL_BUSY;
ganlikun 0:13413ea9a877 575 }
ganlikun 0:13413ea9a877 576 else if(tmp == HAL_SDRAM_STATE_PRECHARGED)
ganlikun 0:13413ea9a877 577 {
ganlikun 0:13413ea9a877 578 return HAL_ERROR;
ganlikun 0:13413ea9a877 579 }
ganlikun 0:13413ea9a877 580
ganlikun 0:13413ea9a877 581 /* Configure DMA user callbacks */
ganlikun 0:13413ea9a877 582 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
ganlikun 0:13413ea9a877 583 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
ganlikun 0:13413ea9a877 584
ganlikun 0:13413ea9a877 585 /* Enable the DMA Stream */
ganlikun 0:13413ea9a877 586 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
ganlikun 0:13413ea9a877 587
ganlikun 0:13413ea9a877 588 /* Process Unlocked */
ganlikun 0:13413ea9a877 589 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 590
ganlikun 0:13413ea9a877 591 return HAL_OK;
ganlikun 0:13413ea9a877 592 }
ganlikun 0:13413ea9a877 593
ganlikun 0:13413ea9a877 594 /**
ganlikun 0:13413ea9a877 595 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
ganlikun 0:13413ea9a877 596 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 597 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 598 * @param pAddress: Pointer to write start address
ganlikun 0:13413ea9a877 599 * @param pSrcBuffer: Pointer to source buffer to write
ganlikun 0:13413ea9a877 600 * @param BufferSize: Size of the buffer to write to memory
ganlikun 0:13413ea9a877 601 * @retval HAL status
ganlikun 0:13413ea9a877 602 */
ganlikun 0:13413ea9a877 603 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
ganlikun 0:13413ea9a877 604 {
ganlikun 0:13413ea9a877 605 uint32_t tmp = 0U;
ganlikun 0:13413ea9a877 606
ganlikun 0:13413ea9a877 607 /* Process Locked */
ganlikun 0:13413ea9a877 608 __HAL_LOCK(hsdram);
ganlikun 0:13413ea9a877 609
ganlikun 0:13413ea9a877 610 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 611 tmp = hsdram->State;
ganlikun 0:13413ea9a877 612
ganlikun 0:13413ea9a877 613 if(tmp == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 614 {
ganlikun 0:13413ea9a877 615 return HAL_BUSY;
ganlikun 0:13413ea9a877 616 }
ganlikun 0:13413ea9a877 617 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
ganlikun 0:13413ea9a877 618 {
ganlikun 0:13413ea9a877 619 return HAL_ERROR;
ganlikun 0:13413ea9a877 620 }
ganlikun 0:13413ea9a877 621
ganlikun 0:13413ea9a877 622 /* Configure DMA user callbacks */
ganlikun 0:13413ea9a877 623 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
ganlikun 0:13413ea9a877 624 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
ganlikun 0:13413ea9a877 625
ganlikun 0:13413ea9a877 626 /* Enable the DMA Stream */
ganlikun 0:13413ea9a877 627 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
ganlikun 0:13413ea9a877 628
ganlikun 0:13413ea9a877 629 /* Process Unlocked */
ganlikun 0:13413ea9a877 630 __HAL_UNLOCK(hsdram);
ganlikun 0:13413ea9a877 631
ganlikun 0:13413ea9a877 632 return HAL_OK;
ganlikun 0:13413ea9a877 633 }
ganlikun 0:13413ea9a877 634 /**
ganlikun 0:13413ea9a877 635 * @}
ganlikun 0:13413ea9a877 636 */
ganlikun 0:13413ea9a877 637
ganlikun 0:13413ea9a877 638 /** @defgroup SDRAM_Exported_Functions_Group3 Control functions
ganlikun 0:13413ea9a877 639 * @brief management functions
ganlikun 0:13413ea9a877 640 *
ganlikun 0:13413ea9a877 641 @verbatim
ganlikun 0:13413ea9a877 642 ==============================================================================
ganlikun 0:13413ea9a877 643 ##### SDRAM Control functions #####
ganlikun 0:13413ea9a877 644 ==============================================================================
ganlikun 0:13413ea9a877 645 [..]
ganlikun 0:13413ea9a877 646 This subsection provides a set of functions allowing to control dynamically
ganlikun 0:13413ea9a877 647 the SDRAM interface.
ganlikun 0:13413ea9a877 648
ganlikun 0:13413ea9a877 649 @endverbatim
ganlikun 0:13413ea9a877 650 * @{
ganlikun 0:13413ea9a877 651 */
ganlikun 0:13413ea9a877 652
ganlikun 0:13413ea9a877 653 /**
ganlikun 0:13413ea9a877 654 * @brief Enables dynamically SDRAM write protection.
ganlikun 0:13413ea9a877 655 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 656 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 657 * @retval HAL status
ganlikun 0:13413ea9a877 658 */
ganlikun 0:13413ea9a877 659 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 660 {
ganlikun 0:13413ea9a877 661 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 662 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 663 {
ganlikun 0:13413ea9a877 664 return HAL_BUSY;
ganlikun 0:13413ea9a877 665 }
ganlikun 0:13413ea9a877 666
ganlikun 0:13413ea9a877 667 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 668 hsdram->State = HAL_SDRAM_STATE_BUSY;
ganlikun 0:13413ea9a877 669
ganlikun 0:13413ea9a877 670 /* Enable write protection */
ganlikun 0:13413ea9a877 671 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
ganlikun 0:13413ea9a877 672
ganlikun 0:13413ea9a877 673 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 674 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
ganlikun 0:13413ea9a877 675
ganlikun 0:13413ea9a877 676 return HAL_OK;
ganlikun 0:13413ea9a877 677 }
ganlikun 0:13413ea9a877 678
ganlikun 0:13413ea9a877 679 /**
ganlikun 0:13413ea9a877 680 * @brief Disables dynamically SDRAM write protection.
ganlikun 0:13413ea9a877 681 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 682 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 683 * @retval HAL status
ganlikun 0:13413ea9a877 684 */
ganlikun 0:13413ea9a877 685 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 686 {
ganlikun 0:13413ea9a877 687 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 688 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 689 {
ganlikun 0:13413ea9a877 690 return HAL_BUSY;
ganlikun 0:13413ea9a877 691 }
ganlikun 0:13413ea9a877 692
ganlikun 0:13413ea9a877 693 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 694 hsdram->State = HAL_SDRAM_STATE_BUSY;
ganlikun 0:13413ea9a877 695
ganlikun 0:13413ea9a877 696 /* Disable write protection */
ganlikun 0:13413ea9a877 697 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
ganlikun 0:13413ea9a877 698
ganlikun 0:13413ea9a877 699 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 700 hsdram->State = HAL_SDRAM_STATE_READY;
ganlikun 0:13413ea9a877 701
ganlikun 0:13413ea9a877 702 return HAL_OK;
ganlikun 0:13413ea9a877 703 }
ganlikun 0:13413ea9a877 704
ganlikun 0:13413ea9a877 705 /**
ganlikun 0:13413ea9a877 706 * @brief Sends Command to the SDRAM bank.
ganlikun 0:13413ea9a877 707 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 708 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 709 * @param Command: SDRAM command structure
ganlikun 0:13413ea9a877 710 * @param Timeout: Timeout duration
ganlikun 0:13413ea9a877 711 * @retval HAL status
ganlikun 0:13413ea9a877 712 */
ganlikun 0:13413ea9a877 713 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
ganlikun 0:13413ea9a877 714 {
ganlikun 0:13413ea9a877 715 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 716 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 717 {
ganlikun 0:13413ea9a877 718 return HAL_BUSY;
ganlikun 0:13413ea9a877 719 }
ganlikun 0:13413ea9a877 720
ganlikun 0:13413ea9a877 721 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 722 hsdram->State = HAL_SDRAM_STATE_BUSY;
ganlikun 0:13413ea9a877 723
ganlikun 0:13413ea9a877 724 /* Send SDRAM command */
ganlikun 0:13413ea9a877 725 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
ganlikun 0:13413ea9a877 726
ganlikun 0:13413ea9a877 727 /* Update the SDRAM controller state */
ganlikun 0:13413ea9a877 728 if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
ganlikun 0:13413ea9a877 729 {
ganlikun 0:13413ea9a877 730 hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
ganlikun 0:13413ea9a877 731 }
ganlikun 0:13413ea9a877 732 else
ganlikun 0:13413ea9a877 733 {
ganlikun 0:13413ea9a877 734 hsdram->State = HAL_SDRAM_STATE_READY;
ganlikun 0:13413ea9a877 735 }
ganlikun 0:13413ea9a877 736
ganlikun 0:13413ea9a877 737 return HAL_OK;
ganlikun 0:13413ea9a877 738 }
ganlikun 0:13413ea9a877 739
ganlikun 0:13413ea9a877 740 /**
ganlikun 0:13413ea9a877 741 * @brief Programs the SDRAM Memory Refresh rate.
ganlikun 0:13413ea9a877 742 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 743 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 744 * @param RefreshRate: The SDRAM refresh rate value
ganlikun 0:13413ea9a877 745 * @retval HAL status
ganlikun 0:13413ea9a877 746 */
ganlikun 0:13413ea9a877 747 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
ganlikun 0:13413ea9a877 748 {
ganlikun 0:13413ea9a877 749 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 750 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 751 {
ganlikun 0:13413ea9a877 752 return HAL_BUSY;
ganlikun 0:13413ea9a877 753 }
ganlikun 0:13413ea9a877 754
ganlikun 0:13413ea9a877 755 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 756 hsdram->State = HAL_SDRAM_STATE_BUSY;
ganlikun 0:13413ea9a877 757
ganlikun 0:13413ea9a877 758 /* Program the refresh rate */
ganlikun 0:13413ea9a877 759 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
ganlikun 0:13413ea9a877 760
ganlikun 0:13413ea9a877 761 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 762 hsdram->State = HAL_SDRAM_STATE_READY;
ganlikun 0:13413ea9a877 763
ganlikun 0:13413ea9a877 764 return HAL_OK;
ganlikun 0:13413ea9a877 765 }
ganlikun 0:13413ea9a877 766
ganlikun 0:13413ea9a877 767 /**
ganlikun 0:13413ea9a877 768 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
ganlikun 0:13413ea9a877 769 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 770 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 771 * @param AutoRefreshNumber: The SDRAM auto Refresh number
ganlikun 0:13413ea9a877 772 * @retval HAL status
ganlikun 0:13413ea9a877 773 */
ganlikun 0:13413ea9a877 774 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
ganlikun 0:13413ea9a877 775 {
ganlikun 0:13413ea9a877 776 /* Check the SDRAM controller state */
ganlikun 0:13413ea9a877 777 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
ganlikun 0:13413ea9a877 778 {
ganlikun 0:13413ea9a877 779 return HAL_BUSY;
ganlikun 0:13413ea9a877 780 }
ganlikun 0:13413ea9a877 781
ganlikun 0:13413ea9a877 782 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 783 hsdram->State = HAL_SDRAM_STATE_BUSY;
ganlikun 0:13413ea9a877 784
ganlikun 0:13413ea9a877 785 /* Set the Auto-Refresh number */
ganlikun 0:13413ea9a877 786 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber);
ganlikun 0:13413ea9a877 787
ganlikun 0:13413ea9a877 788 /* Update the SDRAM state */
ganlikun 0:13413ea9a877 789 hsdram->State = HAL_SDRAM_STATE_READY;
ganlikun 0:13413ea9a877 790
ganlikun 0:13413ea9a877 791 return HAL_OK;
ganlikun 0:13413ea9a877 792 }
ganlikun 0:13413ea9a877 793
ganlikun 0:13413ea9a877 794 /**
ganlikun 0:13413ea9a877 795 * @brief Returns the SDRAM memory current mode.
ganlikun 0:13413ea9a877 796 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 797 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 798 * @retval The SDRAM memory mode.
ganlikun 0:13413ea9a877 799 */
ganlikun 0:13413ea9a877 800 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 801 {
ganlikun 0:13413ea9a877 802 /* Return the SDRAM memory current mode */
ganlikun 0:13413ea9a877 803 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
ganlikun 0:13413ea9a877 804 }
ganlikun 0:13413ea9a877 805
ganlikun 0:13413ea9a877 806 /**
ganlikun 0:13413ea9a877 807 * @}
ganlikun 0:13413ea9a877 808 */
ganlikun 0:13413ea9a877 809
ganlikun 0:13413ea9a877 810 /** @defgroup SDRAM_Exported_Functions_Group4 State functions
ganlikun 0:13413ea9a877 811 * @brief Peripheral State functions
ganlikun 0:13413ea9a877 812 *
ganlikun 0:13413ea9a877 813 @verbatim
ganlikun 0:13413ea9a877 814 ==============================================================================
ganlikun 0:13413ea9a877 815 ##### SDRAM State functions #####
ganlikun 0:13413ea9a877 816 ==============================================================================
ganlikun 0:13413ea9a877 817 [..]
ganlikun 0:13413ea9a877 818 This subsection permits to get in run-time the status of the SDRAM controller
ganlikun 0:13413ea9a877 819 and the data flow.
ganlikun 0:13413ea9a877 820
ganlikun 0:13413ea9a877 821 @endverbatim
ganlikun 0:13413ea9a877 822 * @{
ganlikun 0:13413ea9a877 823 */
ganlikun 0:13413ea9a877 824
ganlikun 0:13413ea9a877 825 /**
ganlikun 0:13413ea9a877 826 * @brief Returns the SDRAM state.
ganlikun 0:13413ea9a877 827 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 828 * the configuration information for SDRAM module.
ganlikun 0:13413ea9a877 829 * @retval HAL state
ganlikun 0:13413ea9a877 830 */
ganlikun 0:13413ea9a877 831 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
ganlikun 0:13413ea9a877 832 {
ganlikun 0:13413ea9a877 833 return hsdram->State;
ganlikun 0:13413ea9a877 834 }
ganlikun 0:13413ea9a877 835
ganlikun 0:13413ea9a877 836 /**
ganlikun 0:13413ea9a877 837 * @}
ganlikun 0:13413ea9a877 838 */
ganlikun 0:13413ea9a877 839
ganlikun 0:13413ea9a877 840 /**
ganlikun 0:13413ea9a877 841 * @}
ganlikun 0:13413ea9a877 842 */
ganlikun 0:13413ea9a877 843 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 844 #endif /* HAL_SDRAM_MODULE_ENABLED */
ganlikun 0:13413ea9a877 845 /**
ganlikun 0:13413ea9a877 846 * @}
ganlikun 0:13413ea9a877 847 */
ganlikun 0:13413ea9a877 848
ganlikun 0:13413ea9a877 849 /**
ganlikun 0:13413ea9a877 850 * @}
ganlikun 0:13413ea9a877 851 */
ganlikun 0:13413ea9a877 852
ganlikun 0:13413ea9a877 853 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 854