Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

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ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_pwr.c
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief PWR HAL module driver.
ganlikun 0:13413ea9a877 8 * This file provides firmware functions to manage the following
ganlikun 0:13413ea9a877 9 * functionalities of the Power Controller (PWR) peripheral:
ganlikun 0:13413ea9a877 10 * + Initialization and de-initialization functions
ganlikun 0:13413ea9a877 11 * + Peripheral Control functions
ganlikun 0:13413ea9a877 12 *
ganlikun 0:13413ea9a877 13 ******************************************************************************
ganlikun 0:13413ea9a877 14 * @attention
ganlikun 0:13413ea9a877 15 *
ganlikun 0:13413ea9a877 16 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 17 *
ganlikun 0:13413ea9a877 18 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 19 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 20 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 21 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 23 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 24 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 26 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 27 * without specific prior written permission.
ganlikun 0:13413ea9a877 28 *
ganlikun 0:13413ea9a877 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 39 *
ganlikun 0:13413ea9a877 40 ******************************************************************************
ganlikun 0:13413ea9a877 41 */
ganlikun 0:13413ea9a877 42
ganlikun 0:13413ea9a877 43 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 44 #include "stm32f4xx_hal.h"
ganlikun 0:13413ea9a877 45
ganlikun 0:13413ea9a877 46 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 47 * @{
ganlikun 0:13413ea9a877 48 */
ganlikun 0:13413ea9a877 49
ganlikun 0:13413ea9a877 50 /** @defgroup PWR PWR
ganlikun 0:13413ea9a877 51 * @brief PWR HAL module driver
ganlikun 0:13413ea9a877 52 * @{
ganlikun 0:13413ea9a877 53 */
ganlikun 0:13413ea9a877 54
ganlikun 0:13413ea9a877 55 #ifdef HAL_PWR_MODULE_ENABLED
ganlikun 0:13413ea9a877 56
ganlikun 0:13413ea9a877 57 /* Private typedef -----------------------------------------------------------*/
ganlikun 0:13413ea9a877 58 /* Private define ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 59 /** @addtogroup PWR_Private_Constants
ganlikun 0:13413ea9a877 60 * @{
ganlikun 0:13413ea9a877 61 */
ganlikun 0:13413ea9a877 62
ganlikun 0:13413ea9a877 63 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
ganlikun 0:13413ea9a877 64 * @{
ganlikun 0:13413ea9a877 65 */
ganlikun 0:13413ea9a877 66 #define PVD_MODE_IT 0x00010000U
ganlikun 0:13413ea9a877 67 #define PVD_MODE_EVT 0x00020000U
ganlikun 0:13413ea9a877 68 #define PVD_RISING_EDGE 0x00000001U
ganlikun 0:13413ea9a877 69 #define PVD_FALLING_EDGE 0x00000002U
ganlikun 0:13413ea9a877 70 /**
ganlikun 0:13413ea9a877 71 * @}
ganlikun 0:13413ea9a877 72 */
ganlikun 0:13413ea9a877 73
ganlikun 0:13413ea9a877 74 /**
ganlikun 0:13413ea9a877 75 * @}
ganlikun 0:13413ea9a877 76 */
ganlikun 0:13413ea9a877 77 /* Private macro -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 78 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 79 /* Private function prototypes -----------------------------------------------*/
ganlikun 0:13413ea9a877 80 /* Private functions ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 81
ganlikun 0:13413ea9a877 82 /** @defgroup PWR_Exported_Functions PWR Exported Functions
ganlikun 0:13413ea9a877 83 * @{
ganlikun 0:13413ea9a877 84 */
ganlikun 0:13413ea9a877 85
ganlikun 0:13413ea9a877 86 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
ganlikun 0:13413ea9a877 87 * @brief Initialization and de-initialization functions
ganlikun 0:13413ea9a877 88 *
ganlikun 0:13413ea9a877 89 @verbatim
ganlikun 0:13413ea9a877 90 ===============================================================================
ganlikun 0:13413ea9a877 91 ##### Initialization and de-initialization functions #####
ganlikun 0:13413ea9a877 92 ===============================================================================
ganlikun 0:13413ea9a877 93 [..]
ganlikun 0:13413ea9a877 94 After reset, the backup domain (RTC registers, RTC backup data
ganlikun 0:13413ea9a877 95 registers and backup SRAM) is protected against possible unwanted
ganlikun 0:13413ea9a877 96 write accesses.
ganlikun 0:13413ea9a877 97 To enable access to the RTC Domain and RTC registers, proceed as follows:
ganlikun 0:13413ea9a877 98 (+) Enable the Power Controller (PWR) APB1 interface clock using the
ganlikun 0:13413ea9a877 99 __HAL_RCC_PWR_CLK_ENABLE() macro.
ganlikun 0:13413ea9a877 100 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
ganlikun 0:13413ea9a877 101
ganlikun 0:13413ea9a877 102 @endverbatim
ganlikun 0:13413ea9a877 103 * @{
ganlikun 0:13413ea9a877 104 */
ganlikun 0:13413ea9a877 105
ganlikun 0:13413ea9a877 106 /**
ganlikun 0:13413ea9a877 107 * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
ganlikun 0:13413ea9a877 108 * @retval None
ganlikun 0:13413ea9a877 109 */
ganlikun 0:13413ea9a877 110 void HAL_PWR_DeInit(void)
ganlikun 0:13413ea9a877 111 {
ganlikun 0:13413ea9a877 112 __HAL_RCC_PWR_FORCE_RESET();
ganlikun 0:13413ea9a877 113 __HAL_RCC_PWR_RELEASE_RESET();
ganlikun 0:13413ea9a877 114 }
ganlikun 0:13413ea9a877 115
ganlikun 0:13413ea9a877 116 /**
ganlikun 0:13413ea9a877 117 * @brief Enables access to the backup domain (RTC registers, RTC
ganlikun 0:13413ea9a877 118 * backup data registers and backup SRAM).
ganlikun 0:13413ea9a877 119 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
ganlikun 0:13413ea9a877 120 * Backup Domain Access should be kept enabled.
ganlikun 0:13413ea9a877 121 * @retval None
ganlikun 0:13413ea9a877 122 */
ganlikun 0:13413ea9a877 123 void HAL_PWR_EnableBkUpAccess(void)
ganlikun 0:13413ea9a877 124 {
ganlikun 0:13413ea9a877 125 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
ganlikun 0:13413ea9a877 126 }
ganlikun 0:13413ea9a877 127
ganlikun 0:13413ea9a877 128 /**
ganlikun 0:13413ea9a877 129 * @brief Disables access to the backup domain (RTC registers, RTC
ganlikun 0:13413ea9a877 130 * backup data registers and backup SRAM).
ganlikun 0:13413ea9a877 131 * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the
ganlikun 0:13413ea9a877 132 * Backup Domain Access should be kept enabled.
ganlikun 0:13413ea9a877 133 * @retval None
ganlikun 0:13413ea9a877 134 */
ganlikun 0:13413ea9a877 135 void HAL_PWR_DisableBkUpAccess(void)
ganlikun 0:13413ea9a877 136 {
ganlikun 0:13413ea9a877 137 *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
ganlikun 0:13413ea9a877 138 }
ganlikun 0:13413ea9a877 139
ganlikun 0:13413ea9a877 140 /**
ganlikun 0:13413ea9a877 141 * @}
ganlikun 0:13413ea9a877 142 */
ganlikun 0:13413ea9a877 143
ganlikun 0:13413ea9a877 144 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
ganlikun 0:13413ea9a877 145 * @brief Low Power modes configuration functions
ganlikun 0:13413ea9a877 146 *
ganlikun 0:13413ea9a877 147 @verbatim
ganlikun 0:13413ea9a877 148
ganlikun 0:13413ea9a877 149 ===============================================================================
ganlikun 0:13413ea9a877 150 ##### Peripheral Control functions #####
ganlikun 0:13413ea9a877 151 ===============================================================================
ganlikun 0:13413ea9a877 152
ganlikun 0:13413ea9a877 153 *** PVD configuration ***
ganlikun 0:13413ea9a877 154 =========================
ganlikun 0:13413ea9a877 155 [..]
ganlikun 0:13413ea9a877 156 (+) The PVD is used to monitor the VDD power supply by comparing it to a
ganlikun 0:13413ea9a877 157 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
ganlikun 0:13413ea9a877 158 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
ganlikun 0:13413ea9a877 159 than the PVD threshold. This event is internally connected to the EXTI
ganlikun 0:13413ea9a877 160 line16 and can generate an interrupt if enabled. This is done through
ganlikun 0:13413ea9a877 161 __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
ganlikun 0:13413ea9a877 162 (+) The PVD is stopped in Standby mode.
ganlikun 0:13413ea9a877 163
ganlikun 0:13413ea9a877 164 *** Wake-up pin configuration ***
ganlikun 0:13413ea9a877 165 ================================
ganlikun 0:13413ea9a877 166 [..]
ganlikun 0:13413ea9a877 167 (+) Wake-up pin is used to wake up the system from Standby mode. This pin is
ganlikun 0:13413ea9a877 168 forced in input pull-down configuration and is active on rising edges.
ganlikun 0:13413ea9a877 169 (+) There is one Wake-up pin: Wake-up Pin 1 on PA.00.
ganlikun 0:13413ea9a877 170 (++) For STM32F446xx there are two Wake-Up pins: Pin1 on PA.00 and Pin2 on PC.13
ganlikun 0:13413ea9a877 171 (++) For STM32F410xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx there are three Wake-Up pins: Pin1 on PA.00, Pin2 on PC.00 and Pin3 on PC.01
ganlikun 0:13413ea9a877 172
ganlikun 0:13413ea9a877 173 *** Low Power modes configuration ***
ganlikun 0:13413ea9a877 174 =====================================
ganlikun 0:13413ea9a877 175 [..]
ganlikun 0:13413ea9a877 176 The devices feature 3 low-power modes:
ganlikun 0:13413ea9a877 177 (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
ganlikun 0:13413ea9a877 178 (+) Stop mode: all clocks are stopped, regulator running, regulator
ganlikun 0:13413ea9a877 179 in low power mode
ganlikun 0:13413ea9a877 180 (+) Standby mode: 1.2V domain powered off.
ganlikun 0:13413ea9a877 181
ganlikun 0:13413ea9a877 182 *** Sleep mode ***
ganlikun 0:13413ea9a877 183 ==================
ganlikun 0:13413ea9a877 184 [..]
ganlikun 0:13413ea9a877 185 (+) Entry:
ganlikun 0:13413ea9a877 186 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI)
ganlikun 0:13413ea9a877 187 functions with
ganlikun 0:13413ea9a877 188 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
ganlikun 0:13413ea9a877 189 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
ganlikun 0:13413ea9a877 190
ganlikun 0:13413ea9a877 191 -@@- The Regulator parameter is not used for the STM32F4 family
ganlikun 0:13413ea9a877 192 and is kept as parameter just to maintain compatibility with the
ganlikun 0:13413ea9a877 193 lower power families (STM32L).
ganlikun 0:13413ea9a877 194 (+) Exit:
ganlikun 0:13413ea9a877 195 Any peripheral interrupt acknowledged by the nested vectored interrupt
ganlikun 0:13413ea9a877 196 controller (NVIC) can wake up the device from Sleep mode.
ganlikun 0:13413ea9a877 197
ganlikun 0:13413ea9a877 198 *** Stop mode ***
ganlikun 0:13413ea9a877 199 =================
ganlikun 0:13413ea9a877 200 [..]
ganlikun 0:13413ea9a877 201 In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI,
ganlikun 0:13413ea9a877 202 and the HSE RC oscillators are disabled. Internal SRAM and register contents
ganlikun 0:13413ea9a877 203 are preserved.
ganlikun 0:13413ea9a877 204 The voltage regulator can be configured either in normal or low-power mode.
ganlikun 0:13413ea9a877 205 To minimize the consumption In Stop mode, FLASH can be powered off before
ganlikun 0:13413ea9a877 206 entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function.
ganlikun 0:13413ea9a877 207 It can be switched on again by software after exiting the Stop mode using
ganlikun 0:13413ea9a877 208 the HAL_PWREx_DisableFlashPowerDown() function.
ganlikun 0:13413ea9a877 209
ganlikun 0:13413ea9a877 210 (+) Entry:
ganlikun 0:13413ea9a877 211 The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON)
ganlikun 0:13413ea9a877 212 function with:
ganlikun 0:13413ea9a877 213 (++) Main regulator ON.
ganlikun 0:13413ea9a877 214 (++) Low Power regulator ON.
ganlikun 0:13413ea9a877 215 (+) Exit:
ganlikun 0:13413ea9a877 216 Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
ganlikun 0:13413ea9a877 217
ganlikun 0:13413ea9a877 218 *** Standby mode ***
ganlikun 0:13413ea9a877 219 ====================
ganlikun 0:13413ea9a877 220 [..]
ganlikun 0:13413ea9a877 221 (+)
ganlikun 0:13413ea9a877 222 The Standby mode allows to achieve the lowest power consumption. It is based
ganlikun 0:13413ea9a877 223 on the Cortex-M4 deep sleep mode, with the voltage regulator disabled.
ganlikun 0:13413ea9a877 224 The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and
ganlikun 0:13413ea9a877 225 the HSE oscillator are also switched off. SRAM and register contents are lost
ganlikun 0:13413ea9a877 226 except for the RTC registers, RTC backup registers, backup SRAM and Standby
ganlikun 0:13413ea9a877 227 circuitry.
ganlikun 0:13413ea9a877 228
ganlikun 0:13413ea9a877 229 The voltage regulator is OFF.
ganlikun 0:13413ea9a877 230
ganlikun 0:13413ea9a877 231 (++) Entry:
ganlikun 0:13413ea9a877 232 (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
ganlikun 0:13413ea9a877 233 (++) Exit:
ganlikun 0:13413ea9a877 234 (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up,
ganlikun 0:13413ea9a877 235 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
ganlikun 0:13413ea9a877 236
ganlikun 0:13413ea9a877 237 *** Auto-wake-up (AWU) from low-power mode ***
ganlikun 0:13413ea9a877 238 =============================================
ganlikun 0:13413ea9a877 239 [..]
ganlikun 0:13413ea9a877 240
ganlikun 0:13413ea9a877 241 (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
ganlikun 0:13413ea9a877 242 Wake-up event, a tamper event or a time-stamp event, without depending on
ganlikun 0:13413ea9a877 243 an external interrupt (Auto-wake-up mode).
ganlikun 0:13413ea9a877 244
ganlikun 0:13413ea9a877 245 (+) RTC auto-wake-up (AWU) from the Stop and Standby modes
ganlikun 0:13413ea9a877 246
ganlikun 0:13413ea9a877 247 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
ganlikun 0:13413ea9a877 248 configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
ganlikun 0:13413ea9a877 249
ganlikun 0:13413ea9a877 250 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
ganlikun 0:13413ea9a877 251 is necessary to configure the RTC to detect the tamper or time stamp event using the
ganlikun 0:13413ea9a877 252 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
ganlikun 0:13413ea9a877 253
ganlikun 0:13413ea9a877 254 (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to
ganlikun 0:13413ea9a877 255 configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
ganlikun 0:13413ea9a877 256
ganlikun 0:13413ea9a877 257 @endverbatim
ganlikun 0:13413ea9a877 258 * @{
ganlikun 0:13413ea9a877 259 */
ganlikun 0:13413ea9a877 260
ganlikun 0:13413ea9a877 261 /**
ganlikun 0:13413ea9a877 262 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
ganlikun 0:13413ea9a877 263 * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
ganlikun 0:13413ea9a877 264 * information for the PVD.
ganlikun 0:13413ea9a877 265 * @note Refer to the electrical characteristics of your device datasheet for
ganlikun 0:13413ea9a877 266 * more details about the voltage threshold corresponding to each
ganlikun 0:13413ea9a877 267 * detection level.
ganlikun 0:13413ea9a877 268 * @retval None
ganlikun 0:13413ea9a877 269 */
ganlikun 0:13413ea9a877 270 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
ganlikun 0:13413ea9a877 271 {
ganlikun 0:13413ea9a877 272 /* Check the parameters */
ganlikun 0:13413ea9a877 273 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
ganlikun 0:13413ea9a877 274 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
ganlikun 0:13413ea9a877 275
ganlikun 0:13413ea9a877 276 /* Set PLS[7:5] bits according to PVDLevel value */
ganlikun 0:13413ea9a877 277 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
ganlikun 0:13413ea9a877 278
ganlikun 0:13413ea9a877 279 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
ganlikun 0:13413ea9a877 280 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
ganlikun 0:13413ea9a877 281 __HAL_PWR_PVD_EXTI_DISABLE_IT();
ganlikun 0:13413ea9a877 282 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
ganlikun 0:13413ea9a877 283 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
ganlikun 0:13413ea9a877 284
ganlikun 0:13413ea9a877 285 /* Configure interrupt mode */
ganlikun 0:13413ea9a877 286 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
ganlikun 0:13413ea9a877 287 {
ganlikun 0:13413ea9a877 288 __HAL_PWR_PVD_EXTI_ENABLE_IT();
ganlikun 0:13413ea9a877 289 }
ganlikun 0:13413ea9a877 290
ganlikun 0:13413ea9a877 291 /* Configure event mode */
ganlikun 0:13413ea9a877 292 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
ganlikun 0:13413ea9a877 293 {
ganlikun 0:13413ea9a877 294 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
ganlikun 0:13413ea9a877 295 }
ganlikun 0:13413ea9a877 296
ganlikun 0:13413ea9a877 297 /* Configure the edge */
ganlikun 0:13413ea9a877 298 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
ganlikun 0:13413ea9a877 299 {
ganlikun 0:13413ea9a877 300 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
ganlikun 0:13413ea9a877 301 }
ganlikun 0:13413ea9a877 302
ganlikun 0:13413ea9a877 303 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
ganlikun 0:13413ea9a877 304 {
ganlikun 0:13413ea9a877 305 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
ganlikun 0:13413ea9a877 306 }
ganlikun 0:13413ea9a877 307 }
ganlikun 0:13413ea9a877 308
ganlikun 0:13413ea9a877 309 /**
ganlikun 0:13413ea9a877 310 * @brief Enables the Power Voltage Detector(PVD).
ganlikun 0:13413ea9a877 311 * @retval None
ganlikun 0:13413ea9a877 312 */
ganlikun 0:13413ea9a877 313 void HAL_PWR_EnablePVD(void)
ganlikun 0:13413ea9a877 314 {
ganlikun 0:13413ea9a877 315 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
ganlikun 0:13413ea9a877 316 }
ganlikun 0:13413ea9a877 317
ganlikun 0:13413ea9a877 318 /**
ganlikun 0:13413ea9a877 319 * @brief Disables the Power Voltage Detector(PVD).
ganlikun 0:13413ea9a877 320 * @retval None
ganlikun 0:13413ea9a877 321 */
ganlikun 0:13413ea9a877 322 void HAL_PWR_DisablePVD(void)
ganlikun 0:13413ea9a877 323 {
ganlikun 0:13413ea9a877 324 *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
ganlikun 0:13413ea9a877 325 }
ganlikun 0:13413ea9a877 326
ganlikun 0:13413ea9a877 327 /**
ganlikun 0:13413ea9a877 328 * @brief Enables the Wake-up PINx functionality.
ganlikun 0:13413ea9a877 329 * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
ganlikun 0:13413ea9a877 330 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 331 * @arg PWR_WAKEUP_PIN1
ganlikun 0:13413ea9a877 332 * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices
ganlikun 0:13413ea9a877 333 * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx devices
ganlikun 0:13413ea9a877 334 * @retval None
ganlikun 0:13413ea9a877 335 */
ganlikun 0:13413ea9a877 336 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
ganlikun 0:13413ea9a877 337 {
ganlikun 0:13413ea9a877 338 /* Check the parameter */
ganlikun 0:13413ea9a877 339 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
ganlikun 0:13413ea9a877 340
ganlikun 0:13413ea9a877 341 /* Enable the wake up pin */
ganlikun 0:13413ea9a877 342 SET_BIT(PWR->CSR, WakeUpPinx);
ganlikun 0:13413ea9a877 343 }
ganlikun 0:13413ea9a877 344
ganlikun 0:13413ea9a877 345 /**
ganlikun 0:13413ea9a877 346 * @brief Disables the Wake-up PINx functionality.
ganlikun 0:13413ea9a877 347 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
ganlikun 0:13413ea9a877 348 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 349 * @arg PWR_WAKEUP_PIN1
ganlikun 0:13413ea9a877 350 * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices
ganlikun 0:13413ea9a877 351 * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412Zx/STM32F412Rx/STM32F412Vx/STM32F412Cx devices
ganlikun 0:13413ea9a877 352 * @retval None
ganlikun 0:13413ea9a877 353 */
ganlikun 0:13413ea9a877 354 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
ganlikun 0:13413ea9a877 355 {
ganlikun 0:13413ea9a877 356 /* Check the parameter */
ganlikun 0:13413ea9a877 357 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
ganlikun 0:13413ea9a877 358
ganlikun 0:13413ea9a877 359 /* Disable the wake up pin */
ganlikun 0:13413ea9a877 360 CLEAR_BIT(PWR->CSR, WakeUpPinx);
ganlikun 0:13413ea9a877 361 }
ganlikun 0:13413ea9a877 362
ganlikun 0:13413ea9a877 363 /**
ganlikun 0:13413ea9a877 364 * @brief Enters Sleep mode.
ganlikun 0:13413ea9a877 365 *
ganlikun 0:13413ea9a877 366 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
ganlikun 0:13413ea9a877 367 *
ganlikun 0:13413ea9a877 368 * @note In Sleep mode, the systick is stopped to avoid exit from this mode with
ganlikun 0:13413ea9a877 369 * systick interrupt when used as time base for Timeout
ganlikun 0:13413ea9a877 370 *
ganlikun 0:13413ea9a877 371 * @param Regulator: Specifies the regulator state in SLEEP mode.
ganlikun 0:13413ea9a877 372 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 373 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
ganlikun 0:13413ea9a877 374 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
ganlikun 0:13413ea9a877 375 * @note This parameter is not used for the STM32F4 family and is kept as parameter
ganlikun 0:13413ea9a877 376 * just to maintain compatibility with the lower power families.
ganlikun 0:13413ea9a877 377 * @param SLEEPEntry: Specifies if SLEEP mode in entered with WFI or WFE instruction.
ganlikun 0:13413ea9a877 378 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 379 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
ganlikun 0:13413ea9a877 380 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
ganlikun 0:13413ea9a877 381 * @retval None
ganlikun 0:13413ea9a877 382 */
ganlikun 0:13413ea9a877 383 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
ganlikun 0:13413ea9a877 384 {
ganlikun 0:13413ea9a877 385 /* Check the parameters */
ganlikun 0:13413ea9a877 386 assert_param(IS_PWR_REGULATOR(Regulator));
ganlikun 0:13413ea9a877 387 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
ganlikun 0:13413ea9a877 388
ganlikun 0:13413ea9a877 389 /* Clear SLEEPDEEP bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 390 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
ganlikun 0:13413ea9a877 391
ganlikun 0:13413ea9a877 392 /* Select SLEEP mode entry -------------------------------------------------*/
ganlikun 0:13413ea9a877 393 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
ganlikun 0:13413ea9a877 394 {
ganlikun 0:13413ea9a877 395 /* Request Wait For Interrupt */
ganlikun 0:13413ea9a877 396 __WFI();
ganlikun 0:13413ea9a877 397 }
ganlikun 0:13413ea9a877 398 else
ganlikun 0:13413ea9a877 399 {
ganlikun 0:13413ea9a877 400 /* Request Wait For Event */
ganlikun 0:13413ea9a877 401 __SEV();
ganlikun 0:13413ea9a877 402 __WFE();
ganlikun 0:13413ea9a877 403 __WFE();
ganlikun 0:13413ea9a877 404 }
ganlikun 0:13413ea9a877 405 }
ganlikun 0:13413ea9a877 406
ganlikun 0:13413ea9a877 407 /**
ganlikun 0:13413ea9a877 408 * @brief Enters Stop mode.
ganlikun 0:13413ea9a877 409 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
ganlikun 0:13413ea9a877 410 * @note When exiting Stop mode by issuing an interrupt or a wake-up event,
ganlikun 0:13413ea9a877 411 * the HSI RC oscillator is selected as system clock.
ganlikun 0:13413ea9a877 412 * @note When the voltage regulator operates in low power mode, an additional
ganlikun 0:13413ea9a877 413 * startup delay is incurred when waking up from Stop mode.
ganlikun 0:13413ea9a877 414 * By keeping the internal regulator ON during Stop mode, the consumption
ganlikun 0:13413ea9a877 415 * is higher although the startup time is reduced.
ganlikun 0:13413ea9a877 416 * @param Regulator: Specifies the regulator state in Stop mode.
ganlikun 0:13413ea9a877 417 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 418 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
ganlikun 0:13413ea9a877 419 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
ganlikun 0:13413ea9a877 420 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
ganlikun 0:13413ea9a877 421 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 422 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
ganlikun 0:13413ea9a877 423 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
ganlikun 0:13413ea9a877 424 * @retval None
ganlikun 0:13413ea9a877 425 */
ganlikun 0:13413ea9a877 426 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
ganlikun 0:13413ea9a877 427 {
ganlikun 0:13413ea9a877 428 /* Check the parameters */
ganlikun 0:13413ea9a877 429 assert_param(IS_PWR_REGULATOR(Regulator));
ganlikun 0:13413ea9a877 430 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
ganlikun 0:13413ea9a877 431
ganlikun 0:13413ea9a877 432 /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */
ganlikun 0:13413ea9a877 433 MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator);
ganlikun 0:13413ea9a877 434
ganlikun 0:13413ea9a877 435 /* Set SLEEPDEEP bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 436 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
ganlikun 0:13413ea9a877 437
ganlikun 0:13413ea9a877 438 /* Select Stop mode entry --------------------------------------------------*/
ganlikun 0:13413ea9a877 439 if(STOPEntry == PWR_STOPENTRY_WFI)
ganlikun 0:13413ea9a877 440 {
ganlikun 0:13413ea9a877 441 /* Request Wait For Interrupt */
ganlikun 0:13413ea9a877 442 __WFI();
ganlikun 0:13413ea9a877 443 }
ganlikun 0:13413ea9a877 444 else
ganlikun 0:13413ea9a877 445 {
ganlikun 0:13413ea9a877 446 /* Request Wait For Event */
ganlikun 0:13413ea9a877 447 __SEV();
ganlikun 0:13413ea9a877 448 __WFE();
ganlikun 0:13413ea9a877 449 __WFE();
ganlikun 0:13413ea9a877 450 }
ganlikun 0:13413ea9a877 451 /* Reset SLEEPDEEP bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 452 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
ganlikun 0:13413ea9a877 453 }
ganlikun 0:13413ea9a877 454
ganlikun 0:13413ea9a877 455 /**
ganlikun 0:13413ea9a877 456 * @brief Enters Standby mode.
ganlikun 0:13413ea9a877 457 * @note In Standby mode, all I/O pins are high impedance except for:
ganlikun 0:13413ea9a877 458 * - Reset pad (still available)
ganlikun 0:13413ea9a877 459 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
ganlikun 0:13413ea9a877 460 * Alarm out, or RTC clock calibration out.
ganlikun 0:13413ea9a877 461 * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp.
ganlikun 0:13413ea9a877 462 * - WKUP pin 1 (PA0) if enabled.
ganlikun 0:13413ea9a877 463 * @retval None
ganlikun 0:13413ea9a877 464 */
ganlikun 0:13413ea9a877 465 void HAL_PWR_EnterSTANDBYMode(void)
ganlikun 0:13413ea9a877 466 {
ganlikun 0:13413ea9a877 467 /* Select Standby mode */
ganlikun 0:13413ea9a877 468 SET_BIT(PWR->CR, PWR_CR_PDDS);
ganlikun 0:13413ea9a877 469
ganlikun 0:13413ea9a877 470 /* Set SLEEPDEEP bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 471 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
ganlikun 0:13413ea9a877 472
ganlikun 0:13413ea9a877 473 /* This option is used to ensure that store operations are completed */
ganlikun 0:13413ea9a877 474 #if defined ( __CC_ARM)
ganlikun 0:13413ea9a877 475 __force_stores();
ganlikun 0:13413ea9a877 476 #endif
ganlikun 0:13413ea9a877 477 /* Request Wait For Interrupt */
ganlikun 0:13413ea9a877 478 __WFI();
ganlikun 0:13413ea9a877 479 }
ganlikun 0:13413ea9a877 480
ganlikun 0:13413ea9a877 481 /**
ganlikun 0:13413ea9a877 482 * @brief This function handles the PWR PVD interrupt request.
ganlikun 0:13413ea9a877 483 * @note This API should be called under the PVD_IRQHandler().
ganlikun 0:13413ea9a877 484 * @retval None
ganlikun 0:13413ea9a877 485 */
ganlikun 0:13413ea9a877 486 void HAL_PWR_PVD_IRQHandler(void)
ganlikun 0:13413ea9a877 487 {
ganlikun 0:13413ea9a877 488 /* Check PWR Exti flag */
ganlikun 0:13413ea9a877 489 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
ganlikun 0:13413ea9a877 490 {
ganlikun 0:13413ea9a877 491 /* PWR PVD interrupt user callback */
ganlikun 0:13413ea9a877 492 HAL_PWR_PVDCallback();
ganlikun 0:13413ea9a877 493
ganlikun 0:13413ea9a877 494 /* Clear PWR Exti pending bit */
ganlikun 0:13413ea9a877 495 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
ganlikun 0:13413ea9a877 496 }
ganlikun 0:13413ea9a877 497 }
ganlikun 0:13413ea9a877 498
ganlikun 0:13413ea9a877 499 /**
ganlikun 0:13413ea9a877 500 * @brief PWR PVD interrupt callback
ganlikun 0:13413ea9a877 501 * @retval None
ganlikun 0:13413ea9a877 502 */
ganlikun 0:13413ea9a877 503 __weak void HAL_PWR_PVDCallback(void)
ganlikun 0:13413ea9a877 504 {
ganlikun 0:13413ea9a877 505 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 506 the HAL_PWR_PVDCallback could be implemented in the user file
ganlikun 0:13413ea9a877 507 */
ganlikun 0:13413ea9a877 508 }
ganlikun 0:13413ea9a877 509
ganlikun 0:13413ea9a877 510 /**
ganlikun 0:13413ea9a877 511 * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
ganlikun 0:13413ea9a877 512 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
ganlikun 0:13413ea9a877 513 * re-enters SLEEP mode when an interruption handling is over.
ganlikun 0:13413ea9a877 514 * Setting this bit is useful when the processor is expected to run only on
ganlikun 0:13413ea9a877 515 * interruptions handling.
ganlikun 0:13413ea9a877 516 * @retval None
ganlikun 0:13413ea9a877 517 */
ganlikun 0:13413ea9a877 518 void HAL_PWR_EnableSleepOnExit(void)
ganlikun 0:13413ea9a877 519 {
ganlikun 0:13413ea9a877 520 /* Set SLEEPONEXIT bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 521 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
ganlikun 0:13413ea9a877 522 }
ganlikun 0:13413ea9a877 523
ganlikun 0:13413ea9a877 524 /**
ganlikun 0:13413ea9a877 525 * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
ganlikun 0:13413ea9a877 526 * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
ganlikun 0:13413ea9a877 527 * re-enters SLEEP mode when an interruption handling is over.
ganlikun 0:13413ea9a877 528 * @retval None
ganlikun 0:13413ea9a877 529 */
ganlikun 0:13413ea9a877 530 void HAL_PWR_DisableSleepOnExit(void)
ganlikun 0:13413ea9a877 531 {
ganlikun 0:13413ea9a877 532 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 533 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
ganlikun 0:13413ea9a877 534 }
ganlikun 0:13413ea9a877 535
ganlikun 0:13413ea9a877 536 /**
ganlikun 0:13413ea9a877 537 * @brief Enables CORTEX M4 SEVONPEND bit.
ganlikun 0:13413ea9a877 538 * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
ganlikun 0:13413ea9a877 539 * WFE to wake up when an interrupt moves from inactive to pended.
ganlikun 0:13413ea9a877 540 * @retval None
ganlikun 0:13413ea9a877 541 */
ganlikun 0:13413ea9a877 542 void HAL_PWR_EnableSEVOnPend(void)
ganlikun 0:13413ea9a877 543 {
ganlikun 0:13413ea9a877 544 /* Set SEVONPEND bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 545 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
ganlikun 0:13413ea9a877 546 }
ganlikun 0:13413ea9a877 547
ganlikun 0:13413ea9a877 548 /**
ganlikun 0:13413ea9a877 549 * @brief Disables CORTEX M4 SEVONPEND bit.
ganlikun 0:13413ea9a877 550 * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
ganlikun 0:13413ea9a877 551 * WFE to wake up when an interrupt moves from inactive to pended.
ganlikun 0:13413ea9a877 552 * @retval None
ganlikun 0:13413ea9a877 553 */
ganlikun 0:13413ea9a877 554 void HAL_PWR_DisableSEVOnPend(void)
ganlikun 0:13413ea9a877 555 {
ganlikun 0:13413ea9a877 556 /* Clear SEVONPEND bit of Cortex System Control Register */
ganlikun 0:13413ea9a877 557 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
ganlikun 0:13413ea9a877 558 }
ganlikun 0:13413ea9a877 559
ganlikun 0:13413ea9a877 560 /**
ganlikun 0:13413ea9a877 561 * @}
ganlikun 0:13413ea9a877 562 */
ganlikun 0:13413ea9a877 563
ganlikun 0:13413ea9a877 564 /**
ganlikun 0:13413ea9a877 565 * @}
ganlikun 0:13413ea9a877 566 */
ganlikun 0:13413ea9a877 567
ganlikun 0:13413ea9a877 568 #endif /* HAL_PWR_MODULE_ENABLED */
ganlikun 0:13413ea9a877 569 /**
ganlikun 0:13413ea9a877 570 * @}
ganlikun 0:13413ea9a877 571 */
ganlikun 0:13413ea9a877 572
ganlikun 0:13413ea9a877 573 /**
ganlikun 0:13413ea9a877 574 * @}
ganlikun 0:13413ea9a877 575 */
ganlikun 0:13413ea9a877 576
ganlikun 0:13413ea9a877 577 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 578