Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nor.h@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

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ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_nor.h
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief Header file of NOR HAL module.
ganlikun 0:13413ea9a877 8 ******************************************************************************
ganlikun 0:13413ea9a877 9 * @attention
ganlikun 0:13413ea9a877 10 *
ganlikun 0:13413ea9a877 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 12 *
ganlikun 0:13413ea9a877 13 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 14 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 15 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 16 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 18 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 19 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 21 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 22 * without specific prior written permission.
ganlikun 0:13413ea9a877 23 *
ganlikun 0:13413ea9a877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 34 *
ganlikun 0:13413ea9a877 35 ******************************************************************************
ganlikun 0:13413ea9a877 36 */
ganlikun 0:13413ea9a877 37
ganlikun 0:13413ea9a877 38 /* Define to prevent recursive inclusion -------------------------------------*/
ganlikun 0:13413ea9a877 39 #ifndef __STM32F4xx_HAL_NOR_H
ganlikun 0:13413ea9a877 40 #define __STM32F4xx_HAL_NOR_H
ganlikun 0:13413ea9a877 41
ganlikun 0:13413ea9a877 42 #ifdef __cplusplus
ganlikun 0:13413ea9a877 43 extern "C" {
ganlikun 0:13413ea9a877 44 #endif
ganlikun 0:13413ea9a877 45
ganlikun 0:13413ea9a877 46 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 48 defined(STM32F412Vx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 49 #include "stm32f4xx_ll_fsmc.h"
ganlikun 0:13413ea9a877 50 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 51
ganlikun 0:13413ea9a877 52 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 53 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 54 #include "stm32f4xx_ll_fmc.h"
ganlikun 0:13413ea9a877 55 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 56
ganlikun 0:13413ea9a877 57 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 58 * @{
ganlikun 0:13413ea9a877 59 */
ganlikun 0:13413ea9a877 60
ganlikun 0:13413ea9a877 61 /** @addtogroup NOR
ganlikun 0:13413ea9a877 62 * @{
ganlikun 0:13413ea9a877 63 */
ganlikun 0:13413ea9a877 64
ganlikun 0:13413ea9a877 65 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
ganlikun 0:13413ea9a877 66 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 67 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 68 defined(STM32F412Vx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 69
ganlikun 0:13413ea9a877 70 /* Exported typedef ----------------------------------------------------------*/
ganlikun 0:13413ea9a877 71 /** @defgroup NOR_Exported_Types NOR Exported Types
ganlikun 0:13413ea9a877 72 * @{
ganlikun 0:13413ea9a877 73 */
ganlikun 0:13413ea9a877 74
ganlikun 0:13413ea9a877 75 /**
ganlikun 0:13413ea9a877 76 * @brief HAL SRAM State structures definition
ganlikun 0:13413ea9a877 77 */
ganlikun 0:13413ea9a877 78 typedef enum
ganlikun 0:13413ea9a877 79 {
ganlikun 0:13413ea9a877 80 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
ganlikun 0:13413ea9a877 81 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
ganlikun 0:13413ea9a877 82 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
ganlikun 0:13413ea9a877 83 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
ganlikun 0:13413ea9a877 84 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
ganlikun 0:13413ea9a877 85 }HAL_NOR_StateTypeDef;
ganlikun 0:13413ea9a877 86
ganlikun 0:13413ea9a877 87 /**
ganlikun 0:13413ea9a877 88 * @brief FMC NOR Status typedef
ganlikun 0:13413ea9a877 89 */
ganlikun 0:13413ea9a877 90 typedef enum
ganlikun 0:13413ea9a877 91 {
ganlikun 0:13413ea9a877 92 HAL_NOR_STATUS_SUCCESS = 0U,
ganlikun 0:13413ea9a877 93 HAL_NOR_STATUS_ONGOING,
ganlikun 0:13413ea9a877 94 HAL_NOR_STATUS_ERROR,
ganlikun 0:13413ea9a877 95 HAL_NOR_STATUS_TIMEOUT
ganlikun 0:13413ea9a877 96 }HAL_NOR_StatusTypeDef;
ganlikun 0:13413ea9a877 97
ganlikun 0:13413ea9a877 98 /**
ganlikun 0:13413ea9a877 99 * @brief FMC NOR ID typedef
ganlikun 0:13413ea9a877 100 */
ganlikun 0:13413ea9a877 101 typedef struct
ganlikun 0:13413ea9a877 102 {
ganlikun 0:13413ea9a877 103 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
ganlikun 0:13413ea9a877 104
ganlikun 0:13413ea9a877 105 uint16_t Device_Code1;
ganlikun 0:13413ea9a877 106
ganlikun 0:13413ea9a877 107 uint16_t Device_Code2;
ganlikun 0:13413ea9a877 108
ganlikun 0:13413ea9a877 109 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
ganlikun 0:13413ea9a877 110 These codes can be accessed by performing read operations with specific
ganlikun 0:13413ea9a877 111 control signals and addresses set.They can also be accessed by issuing
ganlikun 0:13413ea9a877 112 an Auto Select command */
ganlikun 0:13413ea9a877 113 }NOR_IDTypeDef;
ganlikun 0:13413ea9a877 114
ganlikun 0:13413ea9a877 115 /**
ganlikun 0:13413ea9a877 116 * @brief FMC NOR CFI typedef
ganlikun 0:13413ea9a877 117 */
ganlikun 0:13413ea9a877 118 typedef struct
ganlikun 0:13413ea9a877 119 {
ganlikun 0:13413ea9a877 120 /*!< Defines the information stored in the memory's Common flash interface
ganlikun 0:13413ea9a877 121 which contains a description of various electrical and timing parameters,
ganlikun 0:13413ea9a877 122 density information and functions supported by the memory */
ganlikun 0:13413ea9a877 123
ganlikun 0:13413ea9a877 124 uint16_t CFI_1;
ganlikun 0:13413ea9a877 125
ganlikun 0:13413ea9a877 126 uint16_t CFI_2;
ganlikun 0:13413ea9a877 127
ganlikun 0:13413ea9a877 128 uint16_t CFI_3;
ganlikun 0:13413ea9a877 129
ganlikun 0:13413ea9a877 130 uint16_t CFI_4;
ganlikun 0:13413ea9a877 131 }NOR_CFITypeDef;
ganlikun 0:13413ea9a877 132
ganlikun 0:13413ea9a877 133 /**
ganlikun 0:13413ea9a877 134 * @brief NOR handle Structure definition
ganlikun 0:13413ea9a877 135 */
ganlikun 0:13413ea9a877 136 typedef struct
ganlikun 0:13413ea9a877 137 {
ganlikun 0:13413ea9a877 138 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
ganlikun 0:13413ea9a877 139
ganlikun 0:13413ea9a877 140 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
ganlikun 0:13413ea9a877 141
ganlikun 0:13413ea9a877 142 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
ganlikun 0:13413ea9a877 143
ganlikun 0:13413ea9a877 144 HAL_LockTypeDef Lock; /*!< NOR locking object */
ganlikun 0:13413ea9a877 145
ganlikun 0:13413ea9a877 146 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
ganlikun 0:13413ea9a877 147
ganlikun 0:13413ea9a877 148 }NOR_HandleTypeDef;
ganlikun 0:13413ea9a877 149 /**
ganlikun 0:13413ea9a877 150 * @}
ganlikun 0:13413ea9a877 151 */
ganlikun 0:13413ea9a877 152
ganlikun 0:13413ea9a877 153 /* Exported constants --------------------------------------------------------*/
ganlikun 0:13413ea9a877 154 /* Exported macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 155 /** @defgroup NOR_Exported_Macros NOR Exported Macros
ganlikun 0:13413ea9a877 156 * @{
ganlikun 0:13413ea9a877 157 */
ganlikun 0:13413ea9a877 158 /** @brief Reset NOR handle state
ganlikun 0:13413ea9a877 159 * @param __HANDLE__: specifies the NOR handle.
ganlikun 0:13413ea9a877 160 * @retval None
ganlikun 0:13413ea9a877 161 */
ganlikun 0:13413ea9a877 162 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
ganlikun 0:13413ea9a877 163 /**
ganlikun 0:13413ea9a877 164 * @}
ganlikun 0:13413ea9a877 165 */
ganlikun 0:13413ea9a877 166
ganlikun 0:13413ea9a877 167 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 168 /** @addtogroup NOR_Exported_Functions
ganlikun 0:13413ea9a877 169 * @{
ganlikun 0:13413ea9a877 170 */
ganlikun 0:13413ea9a877 171
ganlikun 0:13413ea9a877 172 /** @addtogroup NOR_Exported_Functions_Group1
ganlikun 0:13413ea9a877 173 * @{
ganlikun 0:13413ea9a877 174 */
ganlikun 0:13413ea9a877 175 /* Initialization/de-initialization functions ********************************/
ganlikun 0:13413ea9a877 176 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
ganlikun 0:13413ea9a877 177 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
ganlikun 0:13413ea9a877 178 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
ganlikun 0:13413ea9a877 179 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
ganlikun 0:13413ea9a877 180 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
ganlikun 0:13413ea9a877 181 /**
ganlikun 0:13413ea9a877 182 * @}
ganlikun 0:13413ea9a877 183 */
ganlikun 0:13413ea9a877 184
ganlikun 0:13413ea9a877 185 /** @addtogroup NOR_Exported_Functions_Group2
ganlikun 0:13413ea9a877 186 * @{
ganlikun 0:13413ea9a877 187 */
ganlikun 0:13413ea9a877 188 /* I/O operation functions ***************************************************/
ganlikun 0:13413ea9a877 189 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
ganlikun 0:13413ea9a877 190 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
ganlikun 0:13413ea9a877 191 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
ganlikun 0:13413ea9a877 192 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
ganlikun 0:13413ea9a877 193
ganlikun 0:13413ea9a877 194 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
ganlikun 0:13413ea9a877 195 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
ganlikun 0:13413ea9a877 196
ganlikun 0:13413ea9a877 197 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
ganlikun 0:13413ea9a877 198 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
ganlikun 0:13413ea9a877 199 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
ganlikun 0:13413ea9a877 200 /**
ganlikun 0:13413ea9a877 201 * @}
ganlikun 0:13413ea9a877 202 */
ganlikun 0:13413ea9a877 203
ganlikun 0:13413ea9a877 204 /** @addtogroup NOR_Exported_Functions_Group3
ganlikun 0:13413ea9a877 205 * @{
ganlikun 0:13413ea9a877 206 */
ganlikun 0:13413ea9a877 207 /* NOR Control functions *****************************************************/
ganlikun 0:13413ea9a877 208 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
ganlikun 0:13413ea9a877 209 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
ganlikun 0:13413ea9a877 210 /**
ganlikun 0:13413ea9a877 211 * @}
ganlikun 0:13413ea9a877 212 */
ganlikun 0:13413ea9a877 213
ganlikun 0:13413ea9a877 214 /** @addtogroup NOR_Exported_Functions_Group4
ganlikun 0:13413ea9a877 215 * @{
ganlikun 0:13413ea9a877 216 */
ganlikun 0:13413ea9a877 217 /* NOR State functions ********************************************************/
ganlikun 0:13413ea9a877 218 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
ganlikun 0:13413ea9a877 219 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
ganlikun 0:13413ea9a877 220 /**
ganlikun 0:13413ea9a877 221 * @}
ganlikun 0:13413ea9a877 222 */
ganlikun 0:13413ea9a877 223
ganlikun 0:13413ea9a877 224 /**
ganlikun 0:13413ea9a877 225 * @}
ganlikun 0:13413ea9a877 226 */
ganlikun 0:13413ea9a877 227
ganlikun 0:13413ea9a877 228 /* Private types -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 229 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 230 /* Private constants ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 231 /** @defgroup NOR_Private_Constants NOR Private Constants
ganlikun 0:13413ea9a877 232 * @{
ganlikun 0:13413ea9a877 233 */
ganlikun 0:13413ea9a877 234 /* NOR device IDs addresses */
ganlikun 0:13413ea9a877 235 #define MC_ADDRESS ((uint16_t)0x0000)
ganlikun 0:13413ea9a877 236 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
ganlikun 0:13413ea9a877 237 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
ganlikun 0:13413ea9a877 238 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
ganlikun 0:13413ea9a877 239
ganlikun 0:13413ea9a877 240 /* NOR CFI IDs addresses */
ganlikun 0:13413ea9a877 241 #define CFI1_ADDRESS ((uint16_t)0x0061)
ganlikun 0:13413ea9a877 242 #define CFI2_ADDRESS ((uint16_t)0x0062)
ganlikun 0:13413ea9a877 243 #define CFI3_ADDRESS ((uint16_t)0x0063)
ganlikun 0:13413ea9a877 244 #define CFI4_ADDRESS ((uint16_t)0x0064)
ganlikun 0:13413ea9a877 245
ganlikun 0:13413ea9a877 246 /* NOR operation wait timeout */
ganlikun 0:13413ea9a877 247 #define NOR_TMEOUT ((uint16_t)0xFFFF)
ganlikun 0:13413ea9a877 248
ganlikun 0:13413ea9a877 249 /* NOR memory data width */
ganlikun 0:13413ea9a877 250 #define NOR_MEMORY_8B ((uint8_t)0x00)
ganlikun 0:13413ea9a877 251 #define NOR_MEMORY_16B ((uint8_t)0x01)
ganlikun 0:13413ea9a877 252
ganlikun 0:13413ea9a877 253 /* NOR memory device read/write start address */
ganlikun 0:13413ea9a877 254 #define NOR_MEMORY_ADRESS1 0x60000000U
ganlikun 0:13413ea9a877 255 #define NOR_MEMORY_ADRESS2 0x64000000U
ganlikun 0:13413ea9a877 256 #define NOR_MEMORY_ADRESS3 0x68000000U
ganlikun 0:13413ea9a877 257 #define NOR_MEMORY_ADRESS4 0x6C000000U
ganlikun 0:13413ea9a877 258 /**
ganlikun 0:13413ea9a877 259 * @}
ganlikun 0:13413ea9a877 260 */
ganlikun 0:13413ea9a877 261
ganlikun 0:13413ea9a877 262 /* Private macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 263 /** @defgroup NOR_Private_Macros NOR Private Macros
ganlikun 0:13413ea9a877 264 * @{
ganlikun 0:13413ea9a877 265 */
ganlikun 0:13413ea9a877 266 /**
ganlikun 0:13413ea9a877 267 * @brief NOR memory address shifting.
ganlikun 0:13413ea9a877 268 * @param __NOR_ADDRESS__: NOR base address
ganlikun 0:13413ea9a877 269 * @param NOR_MEMORY_WIDTH: NOR memory width
ganlikun 0:13413ea9a877 270 * @param ADDRESS: NOR memory address
ganlikun 0:13413ea9a877 271 * @retval NOR shifted address value
ganlikun 0:13413ea9a877 272 */
ganlikun 0:13413ea9a877 273 #define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (uint32_t)(((NOR_MEMORY_WIDTH) == NOR_MEMORY_16B)? ((uint32_t)((__NOR_ADDRESS__) + (2U * (ADDRESS)))):\
ganlikun 0:13413ea9a877 274 ((uint32_t)((__NOR_ADDRESS__) + (ADDRESS))))
ganlikun 0:13413ea9a877 275
ganlikun 0:13413ea9a877 276 /**
ganlikun 0:13413ea9a877 277 * @brief NOR memory write data to specified address.
ganlikun 0:13413ea9a877 278 * @param ADDRESS: NOR memory address
ganlikun 0:13413ea9a877 279 * @param DATA: Data to write
ganlikun 0:13413ea9a877 280 * @retval None
ganlikun 0:13413ea9a877 281 */
ganlikun 0:13413ea9a877 282 #define NOR_WRITE(ADDRESS, DATA) (*(__IO uint16_t *)((uint32_t)(ADDRESS)) = (DATA))
ganlikun 0:13413ea9a877 283
ganlikun 0:13413ea9a877 284 /**
ganlikun 0:13413ea9a877 285 * @}
ganlikun 0:13413ea9a877 286 */
ganlikun 0:13413ea9a877 287 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
ganlikun 0:13413ea9a877 288 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
ganlikun 0:13413ea9a877 289 STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
ganlikun 0:13413ea9a877 290 STM32F412Vx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 291 /**
ganlikun 0:13413ea9a877 292 * @}
ganlikun 0:13413ea9a877 293 */
ganlikun 0:13413ea9a877 294
ganlikun 0:13413ea9a877 295 /**
ganlikun 0:13413ea9a877 296 * @}
ganlikun 0:13413ea9a877 297 */
ganlikun 0:13413ea9a877 298
ganlikun 0:13413ea9a877 299 #ifdef __cplusplus
ganlikun 0:13413ea9a877 300 }
ganlikun 0:13413ea9a877 301 #endif
ganlikun 0:13413ea9a877 302
ganlikun 0:13413ea9a877 303 #endif /* __STM32F4xx_HAL_NOR_H */
ganlikun 0:13413ea9a877 304
ganlikun 0:13413ea9a877 305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 306