Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nor.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_nor.c
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief NOR HAL module driver.
ganlikun 0:13413ea9a877 8 * This file provides a generic firmware to drive NOR memories mounted
ganlikun 0:13413ea9a877 9 * as external device.
ganlikun 0:13413ea9a877 10 *
ganlikun 0:13413ea9a877 11 @verbatim
ganlikun 0:13413ea9a877 12 ==============================================================================
ganlikun 0:13413ea9a877 13 ##### How to use this driver #####
ganlikun 0:13413ea9a877 14 ==============================================================================
ganlikun 0:13413ea9a877 15 [..]
ganlikun 0:13413ea9a877 16 This driver is a generic layered driver which contains a set of APIs used to
ganlikun 0:13413ea9a877 17 control NOR flash memories. It uses the FMC/FSMC layer functions to interface
ganlikun 0:13413ea9a877 18 with NOR devices. This driver is used as follows:
ganlikun 0:13413ea9a877 19
ganlikun 0:13413ea9a877 20 (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()
ganlikun 0:13413ea9a877 21 with control and timing parameters for both normal and extended mode.
ganlikun 0:13413ea9a877 22
ganlikun 0:13413ea9a877 23 (+) Read NOR flash memory manufacturer code and device IDs using the function
ganlikun 0:13413ea9a877 24 HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef
ganlikun 0:13413ea9a877 25 structure declared by the function caller.
ganlikun 0:13413ea9a877 26
ganlikun 0:13413ea9a877 27 (+) Access NOR flash memory by read/write data unit operations using the functions
ganlikun 0:13413ea9a877 28 HAL_NOR_Read(), HAL_NOR_Program().
ganlikun 0:13413ea9a877 29
ganlikun 0:13413ea9a877 30 (+) Perform NOR flash erase block/chip operations using the functions
ganlikun 0:13413ea9a877 31 HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().
ganlikun 0:13413ea9a877 32
ganlikun 0:13413ea9a877 33 (+) Read the NOR flash CFI (common flash interface) IDs using the function
ganlikun 0:13413ea9a877 34 HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef
ganlikun 0:13413ea9a877 35 structure declared by the function caller.
ganlikun 0:13413ea9a877 36
ganlikun 0:13413ea9a877 37 (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/
ganlikun 0:13413ea9a877 38 HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation
ganlikun 0:13413ea9a877 39
ganlikun 0:13413ea9a877 40 (+) You can monitor the NOR device HAL state by calling the function
ganlikun 0:13413ea9a877 41 HAL_NOR_GetState()
ganlikun 0:13413ea9a877 42 [..]
ganlikun 0:13413ea9a877 43 (@) This driver is a set of generic APIs which handle standard NOR flash operations.
ganlikun 0:13413ea9a877 44 If a NOR flash device contains different operations and/or implementations,
ganlikun 0:13413ea9a877 45 it should be implemented separately.
ganlikun 0:13413ea9a877 46
ganlikun 0:13413ea9a877 47 *** NOR HAL driver macros list ***
ganlikun 0:13413ea9a877 48 =============================================
ganlikun 0:13413ea9a877 49 [..]
ganlikun 0:13413ea9a877 50 Below the list of most used macros in NOR HAL driver.
ganlikun 0:13413ea9a877 51
ganlikun 0:13413ea9a877 52 (+) NOR_WRITE : NOR memory write data to specified address
ganlikun 0:13413ea9a877 53
ganlikun 0:13413ea9a877 54 @endverbatim
ganlikun 0:13413ea9a877 55 ******************************************************************************
ganlikun 0:13413ea9a877 56 * @attention
ganlikun 0:13413ea9a877 57 *
ganlikun 0:13413ea9a877 58 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 59 *
ganlikun 0:13413ea9a877 60 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 61 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 62 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 63 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 64 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 65 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 66 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 67 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 68 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 69 * without specific prior written permission.
ganlikun 0:13413ea9a877 70 *
ganlikun 0:13413ea9a877 71 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 72 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 73 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 74 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 75 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 76 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 78 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 79 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 80 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 81 *
ganlikun 0:13413ea9a877 82 ******************************************************************************
ganlikun 0:13413ea9a877 83 */
ganlikun 0:13413ea9a877 84
ganlikun 0:13413ea9a877 85 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 86 #include "stm32f4xx_hal.h"
ganlikun 0:13413ea9a877 87
ganlikun 0:13413ea9a877 88 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 89 * @{
ganlikun 0:13413ea9a877 90 */
ganlikun 0:13413ea9a877 91
ganlikun 0:13413ea9a877 92 /** @defgroup NOR NOR
ganlikun 0:13413ea9a877 93 * @brief NOR driver modules
ganlikun 0:13413ea9a877 94 * @{
ganlikun 0:13413ea9a877 95 */
ganlikun 0:13413ea9a877 96 #ifdef HAL_NOR_MODULE_ENABLED
ganlikun 0:13413ea9a877 97 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
ganlikun 0:13413ea9a877 98 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 99 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 100 defined(STM32F412Vx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 101 /* Private typedef -----------------------------------------------------------*/
ganlikun 0:13413ea9a877 102 /* Private define ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 103
ganlikun 0:13413ea9a877 104 /** @defgroup NOR_Private_Defines NOR Private Defines
ganlikun 0:13413ea9a877 105 * @{
ganlikun 0:13413ea9a877 106 */
ganlikun 0:13413ea9a877 107
ganlikun 0:13413ea9a877 108 /* Constants to define address to set to write a command */
ganlikun 0:13413ea9a877 109 #define NOR_CMD_ADDRESS_FIRST (uint16_t)0x0555
ganlikun 0:13413ea9a877 110 #define NOR_CMD_ADDRESS_FIRST_CFI (uint16_t)0x0055
ganlikun 0:13413ea9a877 111 #define NOR_CMD_ADDRESS_SECOND (uint16_t)0x02AA
ganlikun 0:13413ea9a877 112 #define NOR_CMD_ADDRESS_THIRD (uint16_t)0x0555
ganlikun 0:13413ea9a877 113 #define NOR_CMD_ADDRESS_FOURTH (uint16_t)0x0555
ganlikun 0:13413ea9a877 114 #define NOR_CMD_ADDRESS_FIFTH (uint16_t)0x02AA
ganlikun 0:13413ea9a877 115 #define NOR_CMD_ADDRESS_SIXTH (uint16_t)0x0555
ganlikun 0:13413ea9a877 116
ganlikun 0:13413ea9a877 117 /* Constants to define data to program a command */
ganlikun 0:13413ea9a877 118 #define NOR_CMD_DATA_READ_RESET (uint16_t)0x00F0
ganlikun 0:13413ea9a877 119 #define NOR_CMD_DATA_FIRST (uint16_t)0x00AA
ganlikun 0:13413ea9a877 120 #define NOR_CMD_DATA_SECOND (uint16_t)0x0055
ganlikun 0:13413ea9a877 121 #define NOR_CMD_DATA_AUTO_SELECT (uint16_t)0x0090
ganlikun 0:13413ea9a877 122 #define NOR_CMD_DATA_PROGRAM (uint16_t)0x00A0
ganlikun 0:13413ea9a877 123 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD (uint16_t)0x0080
ganlikun 0:13413ea9a877 124 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH (uint16_t)0x00AA
ganlikun 0:13413ea9a877 125 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH (uint16_t)0x0055
ganlikun 0:13413ea9a877 126 #define NOR_CMD_DATA_CHIP_ERASE (uint16_t)0x0010
ganlikun 0:13413ea9a877 127 #define NOR_CMD_DATA_CFI (uint16_t)0x0098
ganlikun 0:13413ea9a877 128
ganlikun 0:13413ea9a877 129 #define NOR_CMD_DATA_BUFFER_AND_PROG (uint8_t)0x25
ganlikun 0:13413ea9a877 130 #define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM (uint8_t)0x29
ganlikun 0:13413ea9a877 131 #define NOR_CMD_DATA_BLOCK_ERASE (uint8_t)0x30
ganlikun 0:13413ea9a877 132
ganlikun 0:13413ea9a877 133 /* Mask on NOR STATUS REGISTER */
ganlikun 0:13413ea9a877 134 #define NOR_MASK_STATUS_DQ5 (uint16_t)0x0020
ganlikun 0:13413ea9a877 135 #define NOR_MASK_STATUS_DQ6 (uint16_t)0x0040
ganlikun 0:13413ea9a877 136
ganlikun 0:13413ea9a877 137 /**
ganlikun 0:13413ea9a877 138 * @}
ganlikun 0:13413ea9a877 139 */
ganlikun 0:13413ea9a877 140
ganlikun 0:13413ea9a877 141 /* Private macro -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 142 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 143 /** @defgroup NOR_Private_Variables NOR Private Variables
ganlikun 0:13413ea9a877 144 * @{
ganlikun 0:13413ea9a877 145 */
ganlikun 0:13413ea9a877 146
ganlikun 0:13413ea9a877 147 static uint32_t uwNORMemoryDataWidth = NOR_MEMORY_8B;
ganlikun 0:13413ea9a877 148
ganlikun 0:13413ea9a877 149 /**
ganlikun 0:13413ea9a877 150 * @}
ganlikun 0:13413ea9a877 151 */
ganlikun 0:13413ea9a877 152
ganlikun 0:13413ea9a877 153 /* Private functions ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 154 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 155 /** @defgroup NOR_Exported_Functions NOR Exported Functions
ganlikun 0:13413ea9a877 156 * @{
ganlikun 0:13413ea9a877 157 */
ganlikun 0:13413ea9a877 158
ganlikun 0:13413ea9a877 159 /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
ganlikun 0:13413ea9a877 160 * @brief Initialization and Configuration functions
ganlikun 0:13413ea9a877 161 *
ganlikun 0:13413ea9a877 162 @verbatim
ganlikun 0:13413ea9a877 163 ==============================================================================
ganlikun 0:13413ea9a877 164 ##### NOR Initialization and de_initialization functions #####
ganlikun 0:13413ea9a877 165 ==============================================================================
ganlikun 0:13413ea9a877 166 [..]
ganlikun 0:13413ea9a877 167 This section provides functions allowing to initialize/de-initialize
ganlikun 0:13413ea9a877 168 the NOR memory
ganlikun 0:13413ea9a877 169
ganlikun 0:13413ea9a877 170 @endverbatim
ganlikun 0:13413ea9a877 171 * @{
ganlikun 0:13413ea9a877 172 */
ganlikun 0:13413ea9a877 173
ganlikun 0:13413ea9a877 174 /**
ganlikun 0:13413ea9a877 175 * @brief Perform the NOR memory Initialization sequence
ganlikun 0:13413ea9a877 176 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 177 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 178 * @param Timing: pointer to NOR control timing structure
ganlikun 0:13413ea9a877 179 * @param ExtTiming: pointer to NOR extended mode timing structure
ganlikun 0:13413ea9a877 180 * @retval HAL status
ganlikun 0:13413ea9a877 181 */
ganlikun 0:13413ea9a877 182 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
ganlikun 0:13413ea9a877 183 {
ganlikun 0:13413ea9a877 184 /* Check the NOR handle parameter */
ganlikun 0:13413ea9a877 185 if(hnor == NULL)
ganlikun 0:13413ea9a877 186 {
ganlikun 0:13413ea9a877 187 return HAL_ERROR;
ganlikun 0:13413ea9a877 188 }
ganlikun 0:13413ea9a877 189
ganlikun 0:13413ea9a877 190 if(hnor->State == HAL_NOR_STATE_RESET)
ganlikun 0:13413ea9a877 191 {
ganlikun 0:13413ea9a877 192 /* Allocate lock resource and initialize it */
ganlikun 0:13413ea9a877 193 hnor->Lock = HAL_UNLOCKED;
ganlikun 0:13413ea9a877 194 /* Initialize the low level hardware (MSP) */
ganlikun 0:13413ea9a877 195 HAL_NOR_MspInit(hnor);
ganlikun 0:13413ea9a877 196 }
ganlikun 0:13413ea9a877 197
ganlikun 0:13413ea9a877 198 /* Initialize NOR control Interface */
ganlikun 0:13413ea9a877 199 FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
ganlikun 0:13413ea9a877 200
ganlikun 0:13413ea9a877 201 /* Initialize NOR timing Interface */
ganlikun 0:13413ea9a877 202 FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
ganlikun 0:13413ea9a877 203
ganlikun 0:13413ea9a877 204 /* Initialize NOR extended mode timing Interface */
ganlikun 0:13413ea9a877 205 FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
ganlikun 0:13413ea9a877 206
ganlikun 0:13413ea9a877 207 /* Enable the NORSRAM device */
ganlikun 0:13413ea9a877 208 __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
ganlikun 0:13413ea9a877 209
ganlikun 0:13413ea9a877 210 /* Initialize NOR Memory Data Width*/
ganlikun 0:13413ea9a877 211 if (hnor->Init.MemoryDataWidth == FMC_NORSRAM_MEM_BUS_WIDTH_8)
ganlikun 0:13413ea9a877 212 {
ganlikun 0:13413ea9a877 213 uwNORMemoryDataWidth = NOR_MEMORY_8B;
ganlikun 0:13413ea9a877 214 }
ganlikun 0:13413ea9a877 215 else
ganlikun 0:13413ea9a877 216 {
ganlikun 0:13413ea9a877 217 uwNORMemoryDataWidth = NOR_MEMORY_16B;
ganlikun 0:13413ea9a877 218 }
ganlikun 0:13413ea9a877 219
ganlikun 0:13413ea9a877 220 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 221 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 222
ganlikun 0:13413ea9a877 223 return HAL_OK;
ganlikun 0:13413ea9a877 224 }
ganlikun 0:13413ea9a877 225
ganlikun 0:13413ea9a877 226 /**
ganlikun 0:13413ea9a877 227 * @brief Perform NOR memory De-Initialization sequence
ganlikun 0:13413ea9a877 228 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 229 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 230 * @retval HAL status
ganlikun 0:13413ea9a877 231 */
ganlikun 0:13413ea9a877 232 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
ganlikun 0:13413ea9a877 233 {
ganlikun 0:13413ea9a877 234 /* De-Initialize the low level hardware (MSP) */
ganlikun 0:13413ea9a877 235 HAL_NOR_MspDeInit(hnor);
ganlikun 0:13413ea9a877 236
ganlikun 0:13413ea9a877 237 /* Configure the NOR registers with their reset values */
ganlikun 0:13413ea9a877 238 FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
ganlikun 0:13413ea9a877 239
ganlikun 0:13413ea9a877 240 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 241 hnor->State = HAL_NOR_STATE_RESET;
ganlikun 0:13413ea9a877 242
ganlikun 0:13413ea9a877 243 /* Release Lock */
ganlikun 0:13413ea9a877 244 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 245
ganlikun 0:13413ea9a877 246 return HAL_OK;
ganlikun 0:13413ea9a877 247 }
ganlikun 0:13413ea9a877 248
ganlikun 0:13413ea9a877 249 /**
ganlikun 0:13413ea9a877 250 * @brief NOR MSP Init
ganlikun 0:13413ea9a877 251 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 252 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 253 * @retval None
ganlikun 0:13413ea9a877 254 */
ganlikun 0:13413ea9a877 255 __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
ganlikun 0:13413ea9a877 256 {
ganlikun 0:13413ea9a877 257 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 258 UNUSED(hnor);
ganlikun 0:13413ea9a877 259 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 260 the HAL_NOR_MspInit could be implemented in the user file
ganlikun 0:13413ea9a877 261 */
ganlikun 0:13413ea9a877 262 }
ganlikun 0:13413ea9a877 263
ganlikun 0:13413ea9a877 264 /**
ganlikun 0:13413ea9a877 265 * @brief NOR MSP DeInit
ganlikun 0:13413ea9a877 266 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 267 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 268 * @retval None
ganlikun 0:13413ea9a877 269 */
ganlikun 0:13413ea9a877 270 __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
ganlikun 0:13413ea9a877 271 {
ganlikun 0:13413ea9a877 272 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 273 UNUSED(hnor);
ganlikun 0:13413ea9a877 274 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 275 the HAL_NOR_MspDeInit could be implemented in the user file
ganlikun 0:13413ea9a877 276 */
ganlikun 0:13413ea9a877 277 }
ganlikun 0:13413ea9a877 278
ganlikun 0:13413ea9a877 279 /**
ganlikun 0:13413ea9a877 280 * @brief NOR MSP Wait for Ready/Busy signal
ganlikun 0:13413ea9a877 281 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 282 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 283 * @param Timeout: Maximum timeout value
ganlikun 0:13413ea9a877 284 * @retval None
ganlikun 0:13413ea9a877 285 */
ganlikun 0:13413ea9a877 286 __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
ganlikun 0:13413ea9a877 287 {
ganlikun 0:13413ea9a877 288 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 289 UNUSED(hnor);
ganlikun 0:13413ea9a877 290 UNUSED(Timeout);
ganlikun 0:13413ea9a877 291
ganlikun 0:13413ea9a877 292 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 293 the HAL_NOR_MspWait could be implemented in the user file
ganlikun 0:13413ea9a877 294 */
ganlikun 0:13413ea9a877 295 }
ganlikun 0:13413ea9a877 296
ganlikun 0:13413ea9a877 297 /**
ganlikun 0:13413ea9a877 298 * @}
ganlikun 0:13413ea9a877 299 */
ganlikun 0:13413ea9a877 300
ganlikun 0:13413ea9a877 301 /** @defgroup NOR_Exported_Functions_Group2 Input and Output functions
ganlikun 0:13413ea9a877 302 * @brief Input Output and memory control functions
ganlikun 0:13413ea9a877 303 *
ganlikun 0:13413ea9a877 304 @verbatim
ganlikun 0:13413ea9a877 305 ==============================================================================
ganlikun 0:13413ea9a877 306 ##### NOR Input and Output functions #####
ganlikun 0:13413ea9a877 307 ==============================================================================
ganlikun 0:13413ea9a877 308 [..]
ganlikun 0:13413ea9a877 309 This section provides functions allowing to use and control the NOR memory
ganlikun 0:13413ea9a877 310
ganlikun 0:13413ea9a877 311 @endverbatim
ganlikun 0:13413ea9a877 312 * @{
ganlikun 0:13413ea9a877 313 */
ganlikun 0:13413ea9a877 314
ganlikun 0:13413ea9a877 315 /**
ganlikun 0:13413ea9a877 316 * @brief Read NOR flash IDs
ganlikun 0:13413ea9a877 317 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 318 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 319 * @param pNOR_ID : pointer to NOR ID structure
ganlikun 0:13413ea9a877 320 * @retval HAL status
ganlikun 0:13413ea9a877 321 */
ganlikun 0:13413ea9a877 322 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
ganlikun 0:13413ea9a877 323 {
ganlikun 0:13413ea9a877 324 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 325
ganlikun 0:13413ea9a877 326 /* Process Locked */
ganlikun 0:13413ea9a877 327 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 328
ganlikun 0:13413ea9a877 329 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 330 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 331 {
ganlikun 0:13413ea9a877 332 return HAL_BUSY;
ganlikun 0:13413ea9a877 333 }
ganlikun 0:13413ea9a877 334
ganlikun 0:13413ea9a877 335 /* Select the NOR device address */
ganlikun 0:13413ea9a877 336 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 337 {
ganlikun 0:13413ea9a877 338 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 339 }
ganlikun 0:13413ea9a877 340 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 341 {
ganlikun 0:13413ea9a877 342 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 343 }
ganlikun 0:13413ea9a877 344 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 345 {
ganlikun 0:13413ea9a877 346 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 347 }
ganlikun 0:13413ea9a877 348 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 349 {
ganlikun 0:13413ea9a877 350 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 351 }
ganlikun 0:13413ea9a877 352
ganlikun 0:13413ea9a877 353 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 354 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 355
ganlikun 0:13413ea9a877 356 /* Send read ID command */
ganlikun 0:13413ea9a877 357 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
ganlikun 0:13413ea9a877 358 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
ganlikun 0:13413ea9a877 359 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
ganlikun 0:13413ea9a877 360
ganlikun 0:13413ea9a877 361 /* Read the NOR IDs */
ganlikun 0:13413ea9a877 362 pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS);
ganlikun 0:13413ea9a877 363 pNOR_ID->Device_Code1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE1_ADDR);
ganlikun 0:13413ea9a877 364 pNOR_ID->Device_Code2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE2_ADDR);
ganlikun 0:13413ea9a877 365 pNOR_ID->Device_Code3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE3_ADDR);
ganlikun 0:13413ea9a877 366
ganlikun 0:13413ea9a877 367 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 368 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 369
ganlikun 0:13413ea9a877 370 /* Process unlocked */
ganlikun 0:13413ea9a877 371 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 372
ganlikun 0:13413ea9a877 373 return HAL_OK;
ganlikun 0:13413ea9a877 374 }
ganlikun 0:13413ea9a877 375
ganlikun 0:13413ea9a877 376 /**
ganlikun 0:13413ea9a877 377 * @brief Returns the NOR memory to Read mode.
ganlikun 0:13413ea9a877 378 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 379 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 380 * @retval HAL status
ganlikun 0:13413ea9a877 381 */
ganlikun 0:13413ea9a877 382 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
ganlikun 0:13413ea9a877 383 {
ganlikun 0:13413ea9a877 384 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 385
ganlikun 0:13413ea9a877 386 /* Process Locked */
ganlikun 0:13413ea9a877 387 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 388
ganlikun 0:13413ea9a877 389 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 390 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 391 {
ganlikun 0:13413ea9a877 392 return HAL_BUSY;
ganlikun 0:13413ea9a877 393 }
ganlikun 0:13413ea9a877 394
ganlikun 0:13413ea9a877 395 /* Select the NOR device address */
ganlikun 0:13413ea9a877 396 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 397 {
ganlikun 0:13413ea9a877 398 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 399 }
ganlikun 0:13413ea9a877 400 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 401 {
ganlikun 0:13413ea9a877 402 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 403 }
ganlikun 0:13413ea9a877 404 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 405 {
ganlikun 0:13413ea9a877 406 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 407 }
ganlikun 0:13413ea9a877 408 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 409 {
ganlikun 0:13413ea9a877 410 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 411 }
ganlikun 0:13413ea9a877 412
ganlikun 0:13413ea9a877 413 NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);
ganlikun 0:13413ea9a877 414
ganlikun 0:13413ea9a877 415 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 416 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 417
ganlikun 0:13413ea9a877 418 /* Process unlocked */
ganlikun 0:13413ea9a877 419 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 420
ganlikun 0:13413ea9a877 421 return HAL_OK;
ganlikun 0:13413ea9a877 422 }
ganlikun 0:13413ea9a877 423
ganlikun 0:13413ea9a877 424 /**
ganlikun 0:13413ea9a877 425 * @brief Read data from NOR memory
ganlikun 0:13413ea9a877 426 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 427 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 428 * @param pAddress: pointer to Device address
ganlikun 0:13413ea9a877 429 * @param pData : pointer to read data
ganlikun 0:13413ea9a877 430 * @retval HAL status
ganlikun 0:13413ea9a877 431 */
ganlikun 0:13413ea9a877 432 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
ganlikun 0:13413ea9a877 433 {
ganlikun 0:13413ea9a877 434 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 435
ganlikun 0:13413ea9a877 436 /* Process Locked */
ganlikun 0:13413ea9a877 437 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 438
ganlikun 0:13413ea9a877 439 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 440 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 441 {
ganlikun 0:13413ea9a877 442 return HAL_BUSY;
ganlikun 0:13413ea9a877 443 }
ganlikun 0:13413ea9a877 444
ganlikun 0:13413ea9a877 445 /* Select the NOR device address */
ganlikun 0:13413ea9a877 446 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 447 {
ganlikun 0:13413ea9a877 448 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 449 }
ganlikun 0:13413ea9a877 450 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 451 {
ganlikun 0:13413ea9a877 452 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 453 }
ganlikun 0:13413ea9a877 454 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 455 {
ganlikun 0:13413ea9a877 456 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 457 }
ganlikun 0:13413ea9a877 458 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 459 {
ganlikun 0:13413ea9a877 460 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 461 }
ganlikun 0:13413ea9a877 462
ganlikun 0:13413ea9a877 463 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 464 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 465
ganlikun 0:13413ea9a877 466 /* Send read data command */
ganlikun 0:13413ea9a877 467 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
ganlikun 0:13413ea9a877 468 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
ganlikun 0:13413ea9a877 469 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
ganlikun 0:13413ea9a877 470
ganlikun 0:13413ea9a877 471 /* Read the data */
ganlikun 0:13413ea9a877 472 *pData = *(__IO uint32_t *)(uint32_t)pAddress;
ganlikun 0:13413ea9a877 473
ganlikun 0:13413ea9a877 474 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 475 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 476
ganlikun 0:13413ea9a877 477 /* Process unlocked */
ganlikun 0:13413ea9a877 478 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 479
ganlikun 0:13413ea9a877 480 return HAL_OK;
ganlikun 0:13413ea9a877 481 }
ganlikun 0:13413ea9a877 482
ganlikun 0:13413ea9a877 483 /**
ganlikun 0:13413ea9a877 484 * @brief Program data to NOR memory
ganlikun 0:13413ea9a877 485 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 486 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 487 * @param pAddress: Device address
ganlikun 0:13413ea9a877 488 * @param pData : pointer to the data to write
ganlikun 0:13413ea9a877 489 * @retval HAL status
ganlikun 0:13413ea9a877 490 */
ganlikun 0:13413ea9a877 491 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
ganlikun 0:13413ea9a877 492 {
ganlikun 0:13413ea9a877 493 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 494
ganlikun 0:13413ea9a877 495 /* Process Locked */
ganlikun 0:13413ea9a877 496 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 497
ganlikun 0:13413ea9a877 498 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 499 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 500 {
ganlikun 0:13413ea9a877 501 return HAL_BUSY;
ganlikun 0:13413ea9a877 502 }
ganlikun 0:13413ea9a877 503
ganlikun 0:13413ea9a877 504 /* Select the NOR device address */
ganlikun 0:13413ea9a877 505 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 506 {
ganlikun 0:13413ea9a877 507 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 508 }
ganlikun 0:13413ea9a877 509 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 510 {
ganlikun 0:13413ea9a877 511 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 512 }
ganlikun 0:13413ea9a877 513 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 514 {
ganlikun 0:13413ea9a877 515 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 516 }
ganlikun 0:13413ea9a877 517 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 518 {
ganlikun 0:13413ea9a877 519 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 520 }
ganlikun 0:13413ea9a877 521
ganlikun 0:13413ea9a877 522 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 523 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 524
ganlikun 0:13413ea9a877 525 /* Send program data command */
ganlikun 0:13413ea9a877 526 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
ganlikun 0:13413ea9a877 527 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
ganlikun 0:13413ea9a877 528 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
ganlikun 0:13413ea9a877 529
ganlikun 0:13413ea9a877 530 /* Write the data */
ganlikun 0:13413ea9a877 531 NOR_WRITE(pAddress, *pData);
ganlikun 0:13413ea9a877 532
ganlikun 0:13413ea9a877 533 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 534 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 535
ganlikun 0:13413ea9a877 536 /* Process unlocked */
ganlikun 0:13413ea9a877 537 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 538
ganlikun 0:13413ea9a877 539 return HAL_OK;
ganlikun 0:13413ea9a877 540 }
ganlikun 0:13413ea9a877 541
ganlikun 0:13413ea9a877 542 /**
ganlikun 0:13413ea9a877 543 * @brief Reads a half-word buffer from the NOR memory.
ganlikun 0:13413ea9a877 544 * @param hnor: pointer to the NOR handle
ganlikun 0:13413ea9a877 545 * @param uwAddress: NOR memory internal address to read from.
ganlikun 0:13413ea9a877 546 * @param pData: pointer to the buffer that receives the data read from the
ganlikun 0:13413ea9a877 547 * NOR memory.
ganlikun 0:13413ea9a877 548 * @param uwBufferSize : number of Half word to read.
ganlikun 0:13413ea9a877 549 * @retval HAL status
ganlikun 0:13413ea9a877 550 */
ganlikun 0:13413ea9a877 551 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
ganlikun 0:13413ea9a877 552 {
ganlikun 0:13413ea9a877 553 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 554
ganlikun 0:13413ea9a877 555 /* Process Locked */
ganlikun 0:13413ea9a877 556 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 557
ganlikun 0:13413ea9a877 558 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 559 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 560 {
ganlikun 0:13413ea9a877 561 return HAL_BUSY;
ganlikun 0:13413ea9a877 562 }
ganlikun 0:13413ea9a877 563
ganlikun 0:13413ea9a877 564 /* Select the NOR device address */
ganlikun 0:13413ea9a877 565 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 566 {
ganlikun 0:13413ea9a877 567 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 568 }
ganlikun 0:13413ea9a877 569 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 570 {
ganlikun 0:13413ea9a877 571 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 572 }
ganlikun 0:13413ea9a877 573 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 574 {
ganlikun 0:13413ea9a877 575 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 576 }
ganlikun 0:13413ea9a877 577 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 578 {
ganlikun 0:13413ea9a877 579 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 580 }
ganlikun 0:13413ea9a877 581
ganlikun 0:13413ea9a877 582 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 583 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 584
ganlikun 0:13413ea9a877 585 /* Send read data command */
ganlikun 0:13413ea9a877 586 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
ganlikun 0:13413ea9a877 587 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
ganlikun 0:13413ea9a877 588 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
ganlikun 0:13413ea9a877 589
ganlikun 0:13413ea9a877 590 /* Read buffer */
ganlikun 0:13413ea9a877 591 while( uwBufferSize > 0U)
ganlikun 0:13413ea9a877 592 {
ganlikun 0:13413ea9a877 593 *pData++ = *(__IO uint16_t *)uwAddress;
ganlikun 0:13413ea9a877 594 uwAddress += 2U;
ganlikun 0:13413ea9a877 595 uwBufferSize--;
ganlikun 0:13413ea9a877 596 }
ganlikun 0:13413ea9a877 597
ganlikun 0:13413ea9a877 598 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 599 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 600
ganlikun 0:13413ea9a877 601 /* Process unlocked */
ganlikun 0:13413ea9a877 602 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 603
ganlikun 0:13413ea9a877 604 return HAL_OK;
ganlikun 0:13413ea9a877 605 }
ganlikun 0:13413ea9a877 606
ganlikun 0:13413ea9a877 607 /**
ganlikun 0:13413ea9a877 608 * @brief Writes a half-word buffer to the NOR memory. This function must be used
ganlikun 0:13413ea9a877 609 only with S29GL128P NOR memory.
ganlikun 0:13413ea9a877 610 * @param hnor: pointer to the NOR handle
ganlikun 0:13413ea9a877 611 * @param uwAddress: NOR memory internal start write address
ganlikun 0:13413ea9a877 612 * @param pData: pointer to source data buffer.
ganlikun 0:13413ea9a877 613 * @param uwBufferSize: Size of the buffer to write
ganlikun 0:13413ea9a877 614 * @retval HAL status
ganlikun 0:13413ea9a877 615 */
ganlikun 0:13413ea9a877 616 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
ganlikun 0:13413ea9a877 617 {
ganlikun 0:13413ea9a877 618 uint16_t * p_currentaddress = (uint16_t *)NULL;
ganlikun 0:13413ea9a877 619 uint16_t * p_endaddress = (uint16_t *)NULL;
ganlikun 0:13413ea9a877 620 uint32_t lastloadedaddress = 0U, deviceaddress = 0U;
ganlikun 0:13413ea9a877 621
ganlikun 0:13413ea9a877 622 /* Process Locked */
ganlikun 0:13413ea9a877 623 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 624
ganlikun 0:13413ea9a877 625 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 626 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 627 {
ganlikun 0:13413ea9a877 628 return HAL_BUSY;
ganlikun 0:13413ea9a877 629 }
ganlikun 0:13413ea9a877 630
ganlikun 0:13413ea9a877 631 /* Select the NOR device address */
ganlikun 0:13413ea9a877 632 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 633 {
ganlikun 0:13413ea9a877 634 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 635 }
ganlikun 0:13413ea9a877 636 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 637 {
ganlikun 0:13413ea9a877 638 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 639 }
ganlikun 0:13413ea9a877 640 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 641 {
ganlikun 0:13413ea9a877 642 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 643 }
ganlikun 0:13413ea9a877 644 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 645 {
ganlikun 0:13413ea9a877 646 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 647 }
ganlikun 0:13413ea9a877 648
ganlikun 0:13413ea9a877 649 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 650 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 651
ganlikun 0:13413ea9a877 652 /* Initialize variables */
ganlikun 0:13413ea9a877 653 p_currentaddress = (uint16_t*)((uint32_t)(uwAddress));
ganlikun 0:13413ea9a877 654 p_endaddress = p_currentaddress + (uwBufferSize-1U);
ganlikun 0:13413ea9a877 655 lastloadedaddress = (uint32_t)(uwAddress);
ganlikun 0:13413ea9a877 656
ganlikun 0:13413ea9a877 657 /* Issue unlock command sequence */
ganlikun 0:13413ea9a877 658 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
ganlikun 0:13413ea9a877 659 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
ganlikun 0:13413ea9a877 660
ganlikun 0:13413ea9a877 661 /* Write Buffer Load Command */
ganlikun 0:13413ea9a877 662 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
ganlikun 0:13413ea9a877 663 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, uwAddress), (uwBufferSize - 1U));
ganlikun 0:13413ea9a877 664
ganlikun 0:13413ea9a877 665 /* Load Data into NOR Buffer */
ganlikun 0:13413ea9a877 666 while(p_currentaddress <= p_endaddress)
ganlikun 0:13413ea9a877 667 {
ganlikun 0:13413ea9a877 668 /* Store last loaded address & data value (for polling) */
ganlikun 0:13413ea9a877 669 lastloadedaddress = (uint32_t)p_currentaddress;
ganlikun 0:13413ea9a877 670
ganlikun 0:13413ea9a877 671 NOR_WRITE(p_currentaddress, *pData++);
ganlikun 0:13413ea9a877 672
ganlikun 0:13413ea9a877 673 p_currentaddress ++;
ganlikun 0:13413ea9a877 674 }
ganlikun 0:13413ea9a877 675
ganlikun 0:13413ea9a877 676 NOR_WRITE((uint32_t)(lastloadedaddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM);
ganlikun 0:13413ea9a877 677
ganlikun 0:13413ea9a877 678 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 679 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 680
ganlikun 0:13413ea9a877 681 /* Process unlocked */
ganlikun 0:13413ea9a877 682 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 683
ganlikun 0:13413ea9a877 684 return HAL_OK;
ganlikun 0:13413ea9a877 685
ganlikun 0:13413ea9a877 686 }
ganlikun 0:13413ea9a877 687
ganlikun 0:13413ea9a877 688 /**
ganlikun 0:13413ea9a877 689 * @brief Erase the specified block of the NOR memory
ganlikun 0:13413ea9a877 690 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 691 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 692 * @param BlockAddress : Block to erase address
ganlikun 0:13413ea9a877 693 * @param Address: Device address
ganlikun 0:13413ea9a877 694 * @retval HAL status
ganlikun 0:13413ea9a877 695 */
ganlikun 0:13413ea9a877 696 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
ganlikun 0:13413ea9a877 697 {
ganlikun 0:13413ea9a877 698 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 699
ganlikun 0:13413ea9a877 700 /* Process Locked */
ganlikun 0:13413ea9a877 701 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 702
ganlikun 0:13413ea9a877 703 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 704 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 705 {
ganlikun 0:13413ea9a877 706 return HAL_BUSY;
ganlikun 0:13413ea9a877 707 }
ganlikun 0:13413ea9a877 708
ganlikun 0:13413ea9a877 709 /* Select the NOR device address */
ganlikun 0:13413ea9a877 710 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 711 {
ganlikun 0:13413ea9a877 712 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 713 }
ganlikun 0:13413ea9a877 714 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 715 {
ganlikun 0:13413ea9a877 716 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 717 }
ganlikun 0:13413ea9a877 718 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 719 {
ganlikun 0:13413ea9a877 720 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 721 }
ganlikun 0:13413ea9a877 722 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 723 {
ganlikun 0:13413ea9a877 724 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 725 }
ganlikun 0:13413ea9a877 726
ganlikun 0:13413ea9a877 727 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 728 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 729
ganlikun 0:13413ea9a877 730 /* Send block erase command sequence */
ganlikun 0:13413ea9a877 731 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
ganlikun 0:13413ea9a877 732 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
ganlikun 0:13413ea9a877 733 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
ganlikun 0:13413ea9a877 734 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
ganlikun 0:13413ea9a877 735 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
ganlikun 0:13413ea9a877 736 NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
ganlikun 0:13413ea9a877 737
ganlikun 0:13413ea9a877 738 /* Check the NOR memory status and update the controller state */
ganlikun 0:13413ea9a877 739 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 740
ganlikun 0:13413ea9a877 741 /* Process unlocked */
ganlikun 0:13413ea9a877 742 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 743
ganlikun 0:13413ea9a877 744 return HAL_OK;
ganlikun 0:13413ea9a877 745
ganlikun 0:13413ea9a877 746 }
ganlikun 0:13413ea9a877 747
ganlikun 0:13413ea9a877 748 /**
ganlikun 0:13413ea9a877 749 * @brief Erase the entire NOR chip.
ganlikun 0:13413ea9a877 750 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 751 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 752 * @param Address : Device address
ganlikun 0:13413ea9a877 753 * @retval HAL status
ganlikun 0:13413ea9a877 754 */
ganlikun 0:13413ea9a877 755 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
ganlikun 0:13413ea9a877 756 {
ganlikun 0:13413ea9a877 757 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 758
ganlikun 0:13413ea9a877 759 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 760 UNUSED(Address);
ganlikun 0:13413ea9a877 761
ganlikun 0:13413ea9a877 762 /* Process Locked */
ganlikun 0:13413ea9a877 763 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 764
ganlikun 0:13413ea9a877 765 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 766 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 767 {
ganlikun 0:13413ea9a877 768 return HAL_BUSY;
ganlikun 0:13413ea9a877 769 }
ganlikun 0:13413ea9a877 770
ganlikun 0:13413ea9a877 771 /* Select the NOR device address */
ganlikun 0:13413ea9a877 772 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 773 {
ganlikun 0:13413ea9a877 774 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 775 }
ganlikun 0:13413ea9a877 776 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 777 {
ganlikun 0:13413ea9a877 778 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 779 }
ganlikun 0:13413ea9a877 780 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 781 {
ganlikun 0:13413ea9a877 782 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 783 }
ganlikun 0:13413ea9a877 784 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 785 {
ganlikun 0:13413ea9a877 786 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 787 }
ganlikun 0:13413ea9a877 788
ganlikun 0:13413ea9a877 789 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 790 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 791
ganlikun 0:13413ea9a877 792 /* Send NOR chip erase command sequence */
ganlikun 0:13413ea9a877 793 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
ganlikun 0:13413ea9a877 794 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
ganlikun 0:13413ea9a877 795 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
ganlikun 0:13413ea9a877 796 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
ganlikun 0:13413ea9a877 797 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
ganlikun 0:13413ea9a877 798 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
ganlikun 0:13413ea9a877 799
ganlikun 0:13413ea9a877 800 /* Check the NOR memory status and update the controller state */
ganlikun 0:13413ea9a877 801 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 802
ganlikun 0:13413ea9a877 803 /* Process unlocked */
ganlikun 0:13413ea9a877 804 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 805
ganlikun 0:13413ea9a877 806 return HAL_OK;
ganlikun 0:13413ea9a877 807 }
ganlikun 0:13413ea9a877 808
ganlikun 0:13413ea9a877 809 /**
ganlikun 0:13413ea9a877 810 * @brief Read NOR flash CFI IDs
ganlikun 0:13413ea9a877 811 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 812 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 813 * @param pNOR_CFI : pointer to NOR CFI IDs structure
ganlikun 0:13413ea9a877 814 * @retval HAL status
ganlikun 0:13413ea9a877 815 */
ganlikun 0:13413ea9a877 816 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
ganlikun 0:13413ea9a877 817 {
ganlikun 0:13413ea9a877 818 uint32_t deviceaddress = 0U;
ganlikun 0:13413ea9a877 819
ganlikun 0:13413ea9a877 820 /* Process Locked */
ganlikun 0:13413ea9a877 821 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 822
ganlikun 0:13413ea9a877 823 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 824 if(hnor->State == HAL_NOR_STATE_BUSY)
ganlikun 0:13413ea9a877 825 {
ganlikun 0:13413ea9a877 826 return HAL_BUSY;
ganlikun 0:13413ea9a877 827 }
ganlikun 0:13413ea9a877 828
ganlikun 0:13413ea9a877 829 /* Select the NOR device address */
ganlikun 0:13413ea9a877 830 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
ganlikun 0:13413ea9a877 831 {
ganlikun 0:13413ea9a877 832 deviceaddress = NOR_MEMORY_ADRESS1;
ganlikun 0:13413ea9a877 833 }
ganlikun 0:13413ea9a877 834 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
ganlikun 0:13413ea9a877 835 {
ganlikun 0:13413ea9a877 836 deviceaddress = NOR_MEMORY_ADRESS2;
ganlikun 0:13413ea9a877 837 }
ganlikun 0:13413ea9a877 838 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
ganlikun 0:13413ea9a877 839 {
ganlikun 0:13413ea9a877 840 deviceaddress = NOR_MEMORY_ADRESS3;
ganlikun 0:13413ea9a877 841 }
ganlikun 0:13413ea9a877 842 else /* FMC_NORSRAM_BANK4 */
ganlikun 0:13413ea9a877 843 {
ganlikun 0:13413ea9a877 844 deviceaddress = NOR_MEMORY_ADRESS4;
ganlikun 0:13413ea9a877 845 }
ganlikun 0:13413ea9a877 846
ganlikun 0:13413ea9a877 847 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 848 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 849
ganlikun 0:13413ea9a877 850 /* Send read CFI query command */
ganlikun 0:13413ea9a877 851 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
ganlikun 0:13413ea9a877 852
ganlikun 0:13413ea9a877 853 /* read the NOR CFI information */
ganlikun 0:13413ea9a877 854 pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI1_ADDRESS);
ganlikun 0:13413ea9a877 855 pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI2_ADDRESS);
ganlikun 0:13413ea9a877 856 pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI3_ADDRESS);
ganlikun 0:13413ea9a877 857 pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI4_ADDRESS);
ganlikun 0:13413ea9a877 858
ganlikun 0:13413ea9a877 859 /* Check the NOR controller state */
ganlikun 0:13413ea9a877 860 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 861
ganlikun 0:13413ea9a877 862 /* Process unlocked */
ganlikun 0:13413ea9a877 863 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 864
ganlikun 0:13413ea9a877 865 return HAL_OK;
ganlikun 0:13413ea9a877 866 }
ganlikun 0:13413ea9a877 867
ganlikun 0:13413ea9a877 868 /**
ganlikun 0:13413ea9a877 869 * @}
ganlikun 0:13413ea9a877 870 */
ganlikun 0:13413ea9a877 871
ganlikun 0:13413ea9a877 872 /** @defgroup NOR_Exported_Functions_Group3 NOR Control functions
ganlikun 0:13413ea9a877 873 * @brief management functions
ganlikun 0:13413ea9a877 874 *
ganlikun 0:13413ea9a877 875 @verbatim
ganlikun 0:13413ea9a877 876 ==============================================================================
ganlikun 0:13413ea9a877 877 ##### NOR Control functions #####
ganlikun 0:13413ea9a877 878 ==============================================================================
ganlikun 0:13413ea9a877 879 [..]
ganlikun 0:13413ea9a877 880 This subsection provides a set of functions allowing to control dynamically
ganlikun 0:13413ea9a877 881 the NOR interface.
ganlikun 0:13413ea9a877 882
ganlikun 0:13413ea9a877 883 @endverbatim
ganlikun 0:13413ea9a877 884 * @{
ganlikun 0:13413ea9a877 885 */
ganlikun 0:13413ea9a877 886
ganlikun 0:13413ea9a877 887 /**
ganlikun 0:13413ea9a877 888 * @brief Enables dynamically NOR write operation.
ganlikun 0:13413ea9a877 889 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 890 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 891 * @retval HAL status
ganlikun 0:13413ea9a877 892 */
ganlikun 0:13413ea9a877 893 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
ganlikun 0:13413ea9a877 894 {
ganlikun 0:13413ea9a877 895 /* Process Locked */
ganlikun 0:13413ea9a877 896 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 897
ganlikun 0:13413ea9a877 898 /* Enable write operation */
ganlikun 0:13413ea9a877 899 FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank);
ganlikun 0:13413ea9a877 900
ganlikun 0:13413ea9a877 901 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 902 hnor->State = HAL_NOR_STATE_READY;
ganlikun 0:13413ea9a877 903
ganlikun 0:13413ea9a877 904 /* Process unlocked */
ganlikun 0:13413ea9a877 905 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 906
ganlikun 0:13413ea9a877 907 return HAL_OK;
ganlikun 0:13413ea9a877 908 }
ganlikun 0:13413ea9a877 909
ganlikun 0:13413ea9a877 910 /**
ganlikun 0:13413ea9a877 911 * @brief Disables dynamically NOR write operation.
ganlikun 0:13413ea9a877 912 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 913 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 914 * @retval HAL status
ganlikun 0:13413ea9a877 915 */
ganlikun 0:13413ea9a877 916 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
ganlikun 0:13413ea9a877 917 {
ganlikun 0:13413ea9a877 918 /* Process Locked */
ganlikun 0:13413ea9a877 919 __HAL_LOCK(hnor);
ganlikun 0:13413ea9a877 920
ganlikun 0:13413ea9a877 921 /* Update the SRAM controller state */
ganlikun 0:13413ea9a877 922 hnor->State = HAL_NOR_STATE_BUSY;
ganlikun 0:13413ea9a877 923
ganlikun 0:13413ea9a877 924 /* Disable write operation */
ganlikun 0:13413ea9a877 925 FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
ganlikun 0:13413ea9a877 926
ganlikun 0:13413ea9a877 927 /* Update the NOR controller state */
ganlikun 0:13413ea9a877 928 hnor->State = HAL_NOR_STATE_PROTECTED;
ganlikun 0:13413ea9a877 929
ganlikun 0:13413ea9a877 930 /* Process unlocked */
ganlikun 0:13413ea9a877 931 __HAL_UNLOCK(hnor);
ganlikun 0:13413ea9a877 932
ganlikun 0:13413ea9a877 933 return HAL_OK;
ganlikun 0:13413ea9a877 934 }
ganlikun 0:13413ea9a877 935
ganlikun 0:13413ea9a877 936 /**
ganlikun 0:13413ea9a877 937 * @}
ganlikun 0:13413ea9a877 938 */
ganlikun 0:13413ea9a877 939
ganlikun 0:13413ea9a877 940 /** @defgroup NOR_Exported_Functions_Group4 NOR State functions
ganlikun 0:13413ea9a877 941 * @brief Peripheral State functions
ganlikun 0:13413ea9a877 942 *
ganlikun 0:13413ea9a877 943 @verbatim
ganlikun 0:13413ea9a877 944 ==============================================================================
ganlikun 0:13413ea9a877 945 ##### NOR State functions #####
ganlikun 0:13413ea9a877 946 ==============================================================================
ganlikun 0:13413ea9a877 947 [..]
ganlikun 0:13413ea9a877 948 This subsection permits to get in run-time the status of the NOR controller
ganlikun 0:13413ea9a877 949 and the data flow.
ganlikun 0:13413ea9a877 950
ganlikun 0:13413ea9a877 951 @endverbatim
ganlikun 0:13413ea9a877 952 * @{
ganlikun 0:13413ea9a877 953 */
ganlikun 0:13413ea9a877 954
ganlikun 0:13413ea9a877 955 /**
ganlikun 0:13413ea9a877 956 * @brief return the NOR controller state
ganlikun 0:13413ea9a877 957 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 958 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 959 * @retval NOR controller state
ganlikun 0:13413ea9a877 960 */
ganlikun 0:13413ea9a877 961 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
ganlikun 0:13413ea9a877 962 {
ganlikun 0:13413ea9a877 963 return hnor->State;
ganlikun 0:13413ea9a877 964 }
ganlikun 0:13413ea9a877 965
ganlikun 0:13413ea9a877 966 /**
ganlikun 0:13413ea9a877 967 * @brief Returns the NOR operation status.
ganlikun 0:13413ea9a877 968 * @param hnor: pointer to a NOR_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 969 * the configuration information for NOR module.
ganlikun 0:13413ea9a877 970 * @param Address: Device address
ganlikun 0:13413ea9a877 971 * @param Timeout: NOR programming Timeout
ganlikun 0:13413ea9a877 972 * @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
ganlikun 0:13413ea9a877 973 * or HAL_NOR_STATUS_TIMEOUT
ganlikun 0:13413ea9a877 974 */
ganlikun 0:13413ea9a877 975 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout)
ganlikun 0:13413ea9a877 976 {
ganlikun 0:13413ea9a877 977 HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING;
ganlikun 0:13413ea9a877 978 uint16_t tmpSR1 = 0, tmpSR2 = 0;
ganlikun 0:13413ea9a877 979 uint32_t tickstart = 0U;
ganlikun 0:13413ea9a877 980
ganlikun 0:13413ea9a877 981 /* Poll on NOR memory Ready/Busy signal ------------------------------------*/
ganlikun 0:13413ea9a877 982 HAL_NOR_MspWait(hnor, Timeout);
ganlikun 0:13413ea9a877 983
ganlikun 0:13413ea9a877 984 /* Get the NOR memory operation status -------------------------------------*/
ganlikun 0:13413ea9a877 985
ganlikun 0:13413ea9a877 986 /* Get tick */
ganlikun 0:13413ea9a877 987 tickstart = HAL_GetTick();
ganlikun 0:13413ea9a877 988 while((status != HAL_NOR_STATUS_SUCCESS ) && (status != HAL_NOR_STATUS_TIMEOUT))
ganlikun 0:13413ea9a877 989 {
ganlikun 0:13413ea9a877 990 /* Check for the Timeout */
ganlikun 0:13413ea9a877 991 if(Timeout != HAL_MAX_DELAY)
ganlikun 0:13413ea9a877 992 {
ganlikun 0:13413ea9a877 993 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
ganlikun 0:13413ea9a877 994 {
ganlikun 0:13413ea9a877 995 status = HAL_NOR_STATUS_TIMEOUT;
ganlikun 0:13413ea9a877 996 }
ganlikun 0:13413ea9a877 997 }
ganlikun 0:13413ea9a877 998
ganlikun 0:13413ea9a877 999 /* Read NOR status register (DQ6 and DQ5) */
ganlikun 0:13413ea9a877 1000 tmpSR1 = *(__IO uint16_t *)Address;
ganlikun 0:13413ea9a877 1001 tmpSR2 = *(__IO uint16_t *)Address;
ganlikun 0:13413ea9a877 1002
ganlikun 0:13413ea9a877 1003 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
ganlikun 0:13413ea9a877 1004 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
ganlikun 0:13413ea9a877 1005 {
ganlikun 0:13413ea9a877 1006 return HAL_NOR_STATUS_SUCCESS ;
ganlikun 0:13413ea9a877 1007 }
ganlikun 0:13413ea9a877 1008
ganlikun 0:13413ea9a877 1009 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
ganlikun 0:13413ea9a877 1010 {
ganlikun 0:13413ea9a877 1011 status = HAL_NOR_STATUS_ONGOING;
ganlikun 0:13413ea9a877 1012 }
ganlikun 0:13413ea9a877 1013
ganlikun 0:13413ea9a877 1014 tmpSR1 = *(__IO uint16_t *)Address;
ganlikun 0:13413ea9a877 1015 tmpSR2 = *(__IO uint16_t *)Address;
ganlikun 0:13413ea9a877 1016
ganlikun 0:13413ea9a877 1017 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
ganlikun 0:13413ea9a877 1018 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
ganlikun 0:13413ea9a877 1019 {
ganlikun 0:13413ea9a877 1020 return HAL_NOR_STATUS_SUCCESS;
ganlikun 0:13413ea9a877 1021 }
ganlikun 0:13413ea9a877 1022 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
ganlikun 0:13413ea9a877 1023 {
ganlikun 0:13413ea9a877 1024 return HAL_NOR_STATUS_ERROR;
ganlikun 0:13413ea9a877 1025 }
ganlikun 0:13413ea9a877 1026 }
ganlikun 0:13413ea9a877 1027
ganlikun 0:13413ea9a877 1028 /* Return the operation status */
ganlikun 0:13413ea9a877 1029 return status;
ganlikun 0:13413ea9a877 1030 }
ganlikun 0:13413ea9a877 1031
ganlikun 0:13413ea9a877 1032 /**
ganlikun 0:13413ea9a877 1033 * @}
ganlikun 0:13413ea9a877 1034 */
ganlikun 0:13413ea9a877 1035
ganlikun 0:13413ea9a877 1036 /**
ganlikun 0:13413ea9a877 1037 * @}
ganlikun 0:13413ea9a877 1038 */
ganlikun 0:13413ea9a877 1039 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx ||\
ganlikun 0:13413ea9a877 1040 STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
ganlikun 0:13413ea9a877 1041 STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 1042 #endif /* HAL_NOR_MODULE_ENABLED */
ganlikun 0:13413ea9a877 1043 /**
ganlikun 0:13413ea9a877 1044 * @}
ganlikun 0:13413ea9a877 1045 */
ganlikun 0:13413ea9a877 1046
ganlikun 0:13413ea9a877 1047 /**
ganlikun 0:13413ea9a877 1048 * @}
ganlikun 0:13413ea9a877 1049 */
ganlikun 0:13413ea9a877 1050
ganlikun 0:13413ea9a877 1051 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 1052