Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nand.h@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

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ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_nand.h
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief Header file of NAND HAL module.
ganlikun 0:13413ea9a877 8 ******************************************************************************
ganlikun 0:13413ea9a877 9 * @attention
ganlikun 0:13413ea9a877 10 *
ganlikun 0:13413ea9a877 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 12 *
ganlikun 0:13413ea9a877 13 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 14 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 15 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 16 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 18 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 19 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 21 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 22 * without specific prior written permission.
ganlikun 0:13413ea9a877 23 *
ganlikun 0:13413ea9a877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 34 *
ganlikun 0:13413ea9a877 35 ******************************************************************************
ganlikun 0:13413ea9a877 36 */
ganlikun 0:13413ea9a877 37
ganlikun 0:13413ea9a877 38 /* Define to prevent recursive inclusion -------------------------------------*/
ganlikun 0:13413ea9a877 39 #ifndef __STM32F4xx_HAL_NAND_H
ganlikun 0:13413ea9a877 40 #define __STM32F4xx_HAL_NAND_H
ganlikun 0:13413ea9a877 41
ganlikun 0:13413ea9a877 42 #ifdef __cplusplus
ganlikun 0:13413ea9a877 43 extern "C" {
ganlikun 0:13413ea9a877 44 #endif
ganlikun 0:13413ea9a877 45
ganlikun 0:13413ea9a877 46 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
ganlikun 0:13413ea9a877 48 #include "stm32f4xx_ll_fsmc.h"
ganlikun 0:13413ea9a877 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
ganlikun 0:13413ea9a877 50
ganlikun 0:13413ea9a877 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 52 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 53 #include "stm32f4xx_ll_fmc.h"
ganlikun 0:13413ea9a877 54 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
ganlikun 0:13413ea9a877 55 STM32F479xx */
ganlikun 0:13413ea9a877 56
ganlikun 0:13413ea9a877 57 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 58 * @{
ganlikun 0:13413ea9a877 59 */
ganlikun 0:13413ea9a877 60
ganlikun 0:13413ea9a877 61 /** @addtogroup NAND
ganlikun 0:13413ea9a877 62 * @{
ganlikun 0:13413ea9a877 63 */
ganlikun 0:13413ea9a877 64
ganlikun 0:13413ea9a877 65 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
ganlikun 0:13413ea9a877 66 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
ganlikun 0:13413ea9a877 67 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 68
ganlikun 0:13413ea9a877 69 /* Exported typedef ----------------------------------------------------------*/
ganlikun 0:13413ea9a877 70 /* Exported types ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 71 /** @defgroup NAND_Exported_Types NAND Exported Types
ganlikun 0:13413ea9a877 72 * @{
ganlikun 0:13413ea9a877 73 */
ganlikun 0:13413ea9a877 74
ganlikun 0:13413ea9a877 75 /**
ganlikun 0:13413ea9a877 76 * @brief HAL NAND State structures definition
ganlikun 0:13413ea9a877 77 */
ganlikun 0:13413ea9a877 78 typedef enum
ganlikun 0:13413ea9a877 79 {
ganlikun 0:13413ea9a877 80 HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
ganlikun 0:13413ea9a877 81 HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
ganlikun 0:13413ea9a877 82 HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
ganlikun 0:13413ea9a877 83 HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
ganlikun 0:13413ea9a877 84 }HAL_NAND_StateTypeDef;
ganlikun 0:13413ea9a877 85
ganlikun 0:13413ea9a877 86 /**
ganlikun 0:13413ea9a877 87 * @brief NAND Memory electronic signature Structure definition
ganlikun 0:13413ea9a877 88 */
ganlikun 0:13413ea9a877 89 typedef struct
ganlikun 0:13413ea9a877 90 {
ganlikun 0:13413ea9a877 91 /*<! NAND memory electronic signature maker and device IDs */
ganlikun 0:13413ea9a877 92
ganlikun 0:13413ea9a877 93 uint8_t Maker_Id;
ganlikun 0:13413ea9a877 94
ganlikun 0:13413ea9a877 95 uint8_t Device_Id;
ganlikun 0:13413ea9a877 96
ganlikun 0:13413ea9a877 97 uint8_t Third_Id;
ganlikun 0:13413ea9a877 98
ganlikun 0:13413ea9a877 99 uint8_t Fourth_Id;
ganlikun 0:13413ea9a877 100 }NAND_IDTypeDef;
ganlikun 0:13413ea9a877 101
ganlikun 0:13413ea9a877 102 /**
ganlikun 0:13413ea9a877 103 * @brief NAND Memory address Structure definition
ganlikun 0:13413ea9a877 104 */
ganlikun 0:13413ea9a877 105 typedef struct
ganlikun 0:13413ea9a877 106 {
ganlikun 0:13413ea9a877 107 uint16_t Page; /*!< NAND memory Page address */
ganlikun 0:13413ea9a877 108
ganlikun 0:13413ea9a877 109 uint16_t Plane; /*!< NAND memory Plane address */
ganlikun 0:13413ea9a877 110
ganlikun 0:13413ea9a877 111 uint16_t Block; /*!< NAND memory Block address */
ganlikun 0:13413ea9a877 112
ganlikun 0:13413ea9a877 113 }NAND_AddressTypeDef;
ganlikun 0:13413ea9a877 114
ganlikun 0:13413ea9a877 115 /**
ganlikun 0:13413ea9a877 116 * @brief NAND Memory info Structure definition
ganlikun 0:13413ea9a877 117 */
ganlikun 0:13413ea9a877 118 typedef struct
ganlikun 0:13413ea9a877 119 {
ganlikun 0:13413ea9a877 120 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes
ganlikun 0:13413ea9a877 121 for 8 bits adressing or words for 16 bits addressing */
ganlikun 0:13413ea9a877 122
ganlikun 0:13413ea9a877 123 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes
ganlikun 0:13413ea9a877 124 for 8 bits adressing or words for 16 bits addressing */
ganlikun 0:13413ea9a877 125
ganlikun 0:13413ea9a877 126 uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */
ganlikun 0:13413ea9a877 127
ganlikun 0:13413ea9a877 128 uint32_t BlockNbr; /*!< NAND memory number of total blocks */
ganlikun 0:13413ea9a877 129
ganlikun 0:13413ea9a877 130 uint32_t PlaneNbr; /*!< NAND memory number of planes */
ganlikun 0:13413ea9a877 131
ganlikun 0:13413ea9a877 132 uint32_t PlaneSize; /*!< NAND memory plane size measured in number of blocks */
ganlikun 0:13413ea9a877 133
ganlikun 0:13413ea9a877 134 FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
ganlikun 0:13413ea9a877 135 parameter is mandatory for some NAND parts after the read
ganlikun 0:13413ea9a877 136 command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
ganlikun 0:13413ea9a877 137 Example: Toshiba THTH58BYG3S0HBAI6.
ganlikun 0:13413ea9a877 138 This parameter could be ENABLE or DISABLE
ganlikun 0:13413ea9a877 139 Please check the Read Mode sequnece in the NAND device datasheet */
ganlikun 0:13413ea9a877 140 }NAND_DeviceConfigTypeDef;
ganlikun 0:13413ea9a877 141
ganlikun 0:13413ea9a877 142 /**
ganlikun 0:13413ea9a877 143 * @brief NAND handle Structure definition
ganlikun 0:13413ea9a877 144 */
ganlikun 0:13413ea9a877 145 typedef struct
ganlikun 0:13413ea9a877 146 {
ganlikun 0:13413ea9a877 147 FMC_NAND_TypeDef *Instance; /*!< Register base address */
ganlikun 0:13413ea9a877 148
ganlikun 0:13413ea9a877 149 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
ganlikun 0:13413ea9a877 150
ganlikun 0:13413ea9a877 151 HAL_LockTypeDef Lock; /*!< NAND locking object */
ganlikun 0:13413ea9a877 152
ganlikun 0:13413ea9a877 153 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
ganlikun 0:13413ea9a877 154
ganlikun 0:13413ea9a877 155 NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
ganlikun 0:13413ea9a877 156
ganlikun 0:13413ea9a877 157 }NAND_HandleTypeDef;
ganlikun 0:13413ea9a877 158 /**
ganlikun 0:13413ea9a877 159 * @}
ganlikun 0:13413ea9a877 160 */
ganlikun 0:13413ea9a877 161
ganlikun 0:13413ea9a877 162 /* Exported constants --------------------------------------------------------*/
ganlikun 0:13413ea9a877 163 /* Exported macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 164 /** @defgroup NAND_Exported_Macros NAND Exported Macros
ganlikun 0:13413ea9a877 165 * @{
ganlikun 0:13413ea9a877 166 */
ganlikun 0:13413ea9a877 167
ganlikun 0:13413ea9a877 168 /** @brief Reset NAND handle state
ganlikun 0:13413ea9a877 169 * @param __HANDLE__: specifies the NAND handle.
ganlikun 0:13413ea9a877 170 * @retval None
ganlikun 0:13413ea9a877 171 */
ganlikun 0:13413ea9a877 172 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
ganlikun 0:13413ea9a877 173
ganlikun 0:13413ea9a877 174 /**
ganlikun 0:13413ea9a877 175 * @}
ganlikun 0:13413ea9a877 176 */
ganlikun 0:13413ea9a877 177
ganlikun 0:13413ea9a877 178 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 179 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
ganlikun 0:13413ea9a877 180 * @{
ganlikun 0:13413ea9a877 181 */
ganlikun 0:13413ea9a877 182
ganlikun 0:13413ea9a877 183 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
ganlikun 0:13413ea9a877 184 * @{
ganlikun 0:13413ea9a877 185 */
ganlikun 0:13413ea9a877 186
ganlikun 0:13413ea9a877 187 /* Initialization/de-initialization functions ********************************/
ganlikun 0:13413ea9a877 188 /* Initialization/de-initialization functions ********************************/
ganlikun 0:13413ea9a877 189 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
ganlikun 0:13413ea9a877 190 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 191
ganlikun 0:13413ea9a877 192 HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
ganlikun 0:13413ea9a877 193
ganlikun 0:13413ea9a877 194 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
ganlikun 0:13413ea9a877 195
ganlikun 0:13413ea9a877 196 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 197 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 198 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 199 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 200
ganlikun 0:13413ea9a877 201 /**
ganlikun 0:13413ea9a877 202 * @}
ganlikun 0:13413ea9a877 203 */
ganlikun 0:13413ea9a877 204
ganlikun 0:13413ea9a877 205 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
ganlikun 0:13413ea9a877 206 * @{
ganlikun 0:13413ea9a877 207 */
ganlikun 0:13413ea9a877 208
ganlikun 0:13413ea9a877 209 /* IO operation functions ****************************************************/
ganlikun 0:13413ea9a877 210 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 211
ganlikun 0:13413ea9a877 212 HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
ganlikun 0:13413ea9a877 213 HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
ganlikun 0:13413ea9a877 214 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
ganlikun 0:13413ea9a877 215 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
ganlikun 0:13413ea9a877 216
ganlikun 0:13413ea9a877 217 HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead);
ganlikun 0:13413ea9a877 218 HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite);
ganlikun 0:13413ea9a877 219 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
ganlikun 0:13413ea9a877 220 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
ganlikun 0:13413ea9a877 221
ganlikun 0:13413ea9a877 222 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
ganlikun 0:13413ea9a877 223
ganlikun 0:13413ea9a877 224 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 225 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
ganlikun 0:13413ea9a877 226
ganlikun 0:13413ea9a877 227 /**
ganlikun 0:13413ea9a877 228 * @}
ganlikun 0:13413ea9a877 229 */
ganlikun 0:13413ea9a877 230
ganlikun 0:13413ea9a877 231 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
ganlikun 0:13413ea9a877 232 * @{
ganlikun 0:13413ea9a877 233 */
ganlikun 0:13413ea9a877 234
ganlikun 0:13413ea9a877 235 /* NAND Control functions ****************************************************/
ganlikun 0:13413ea9a877 236 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 237 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 238 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
ganlikun 0:13413ea9a877 239
ganlikun 0:13413ea9a877 240 /**
ganlikun 0:13413ea9a877 241 * @}
ganlikun 0:13413ea9a877 242 */
ganlikun 0:13413ea9a877 243
ganlikun 0:13413ea9a877 244 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
ganlikun 0:13413ea9a877 245 * @{
ganlikun 0:13413ea9a877 246 */
ganlikun 0:13413ea9a877 247 /* NAND State functions *******************************************************/
ganlikun 0:13413ea9a877 248 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
ganlikun 0:13413ea9a877 249 /**
ganlikun 0:13413ea9a877 250 * @}
ganlikun 0:13413ea9a877 251 */
ganlikun 0:13413ea9a877 252
ganlikun 0:13413ea9a877 253 /**
ganlikun 0:13413ea9a877 254 * @}
ganlikun 0:13413ea9a877 255 */
ganlikun 0:13413ea9a877 256
ganlikun 0:13413ea9a877 257 /* Private types -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 258 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 259 /* Private constants ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 260 /** @defgroup NAND_Private_Constants NAND Private Constants
ganlikun 0:13413ea9a877 261 * @{
ganlikun 0:13413ea9a877 262 */
ganlikun 0:13413ea9a877 263 #define NAND_DEVICE1 0x70000000U
ganlikun 0:13413ea9a877 264 #define NAND_DEVICE2 0x80000000U
ganlikun 0:13413ea9a877 265 #define NAND_WRITE_TIMEOUT 0x01000000U
ganlikun 0:13413ea9a877 266
ganlikun 0:13413ea9a877 267 #define CMD_AREA ((uint32_t)(1U<<16U)) /* A16 = CLE high */
ganlikun 0:13413ea9a877 268 #define ADDR_AREA ((uint32_t)(1U<<17U)) /* A17 = ALE high */
ganlikun 0:13413ea9a877 269
ganlikun 0:13413ea9a877 270 #define NAND_CMD_AREA_A ((uint8_t)0x00)
ganlikun 0:13413ea9a877 271 #define NAND_CMD_AREA_B ((uint8_t)0x01)
ganlikun 0:13413ea9a877 272 #define NAND_CMD_AREA_C ((uint8_t)0x50)
ganlikun 0:13413ea9a877 273 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
ganlikun 0:13413ea9a877 274
ganlikun 0:13413ea9a877 275 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
ganlikun 0:13413ea9a877 276 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
ganlikun 0:13413ea9a877 277 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
ganlikun 0:13413ea9a877 278 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
ganlikun 0:13413ea9a877 279 #define NAND_CMD_READID ((uint8_t)0x90)
ganlikun 0:13413ea9a877 280 #define NAND_CMD_STATUS ((uint8_t)0x70)
ganlikun 0:13413ea9a877 281 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
ganlikun 0:13413ea9a877 282 #define NAND_CMD_RESET ((uint8_t)0xFF)
ganlikun 0:13413ea9a877 283
ganlikun 0:13413ea9a877 284 /* NAND memory status */
ganlikun 0:13413ea9a877 285 #define NAND_VALID_ADDRESS 0x00000100U
ganlikun 0:13413ea9a877 286 #define NAND_INVALID_ADDRESS 0x00000200U
ganlikun 0:13413ea9a877 287 #define NAND_TIMEOUT_ERROR 0x00000400U
ganlikun 0:13413ea9a877 288 #define NAND_BUSY 0x00000000U
ganlikun 0:13413ea9a877 289 #define NAND_ERROR 0x00000001U
ganlikun 0:13413ea9a877 290 #define NAND_READY 0x00000040U
ganlikun 0:13413ea9a877 291 /**
ganlikun 0:13413ea9a877 292 * @}
ganlikun 0:13413ea9a877 293 */
ganlikun 0:13413ea9a877 294
ganlikun 0:13413ea9a877 295 /* Private macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 296 /** @defgroup NAND_Private_Macros NAND Private Macros
ganlikun 0:13413ea9a877 297 * @{
ganlikun 0:13413ea9a877 298 */
ganlikun 0:13413ea9a877 299
ganlikun 0:13413ea9a877 300 /**
ganlikun 0:13413ea9a877 301 * @brief NAND memory address computation.
ganlikun 0:13413ea9a877 302 * @param __ADDRESS__: NAND memory address.
ganlikun 0:13413ea9a877 303 * @param __HANDLE__: NAND handle.
ganlikun 0:13413ea9a877 304 * @retval NAND Raw address value
ganlikun 0:13413ea9a877 305 */
ganlikun 0:13413ea9a877 306 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
ganlikun 0:13413ea9a877 307 (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize)))
ganlikun 0:13413ea9a877 308
ganlikun 0:13413ea9a877 309 /**
ganlikun 0:13413ea9a877 310 * @brief NAND memory Column address computation.
ganlikun 0:13413ea9a877 311 * @param __HANDLE__: NAND handle.
ganlikun 0:13413ea9a877 312 * @retval NAND Raw address value
ganlikun 0:13413ea9a877 313 */
ganlikun 0:13413ea9a877 314 #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize)
ganlikun 0:13413ea9a877 315
ganlikun 0:13413ea9a877 316 /**
ganlikun 0:13413ea9a877 317 * @brief NAND memory address cycling.
ganlikun 0:13413ea9a877 318 * @param __ADDRESS__: NAND memory address.
ganlikun 0:13413ea9a877 319 * @retval NAND address cycling value.
ganlikun 0:13413ea9a877 320 */
ganlikun 0:13413ea9a877 321 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
ganlikun 0:13413ea9a877 322 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
ganlikun 0:13413ea9a877 323 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
ganlikun 0:13413ea9a877 324 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
ganlikun 0:13413ea9a877 325
ganlikun 0:13413ea9a877 326 /**
ganlikun 0:13413ea9a877 327 * @brief NAND memory Columns cycling.
ganlikun 0:13413ea9a877 328 * @param __ADDRESS__: NAND memory address.
ganlikun 0:13413ea9a877 329 * @retval NAND Column address cycling value.
ganlikun 0:13413ea9a877 330 */
ganlikun 0:13413ea9a877 331 #define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */
ganlikun 0:13413ea9a877 332 #define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */
ganlikun 0:13413ea9a877 333
ganlikun 0:13413ea9a877 334 /**
ganlikun 0:13413ea9a877 335 * @}
ganlikun 0:13413ea9a877 336 */
ganlikun 0:13413ea9a877 337 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
ganlikun 0:13413ea9a877 338 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
ganlikun 0:13413ea9a877 339 STM32F446xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 340
ganlikun 0:13413ea9a877 341 /**
ganlikun 0:13413ea9a877 342 * @}
ganlikun 0:13413ea9a877 343 */
ganlikun 0:13413ea9a877 344 /**
ganlikun 0:13413ea9a877 345 * @}
ganlikun 0:13413ea9a877 346 */
ganlikun 0:13413ea9a877 347
ganlikun 0:13413ea9a877 348 /**
ganlikun 0:13413ea9a877 349 * @}
ganlikun 0:13413ea9a877 350 */
ganlikun 0:13413ea9a877 351
ganlikun 0:13413ea9a877 352 #ifdef __cplusplus
ganlikun 0:13413ea9a877 353 }
ganlikun 0:13413ea9a877 354 #endif
ganlikun 0:13413ea9a877 355
ganlikun 0:13413ea9a877 356 #endif /* __STM32F4xx_HAL_NAND_H */
ganlikun 0:13413ea9a877 357
ganlikun 0:13413ea9a877 358 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 359