001
targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_mmc.h@0:13413ea9a877, 2022-06-12 (annotated)
- Committer:
- ganlikun
- Date:
- Sun Jun 12 14:02:44 2022 +0000
- Revision:
- 0:13413ea9a877
00
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
ganlikun | 0:13413ea9a877 | 1 | /** |
ganlikun | 0:13413ea9a877 | 2 | ****************************************************************************** |
ganlikun | 0:13413ea9a877 | 3 | * @file stm32f4xx_hal_mmc.h |
ganlikun | 0:13413ea9a877 | 4 | * @author MCD Application Team |
ganlikun | 0:13413ea9a877 | 5 | * @version V1.7.1 |
ganlikun | 0:13413ea9a877 | 6 | * @date 14-April-2017 |
ganlikun | 0:13413ea9a877 | 7 | * @brief Header file of MMC HAL module. |
ganlikun | 0:13413ea9a877 | 8 | ****************************************************************************** |
ganlikun | 0:13413ea9a877 | 9 | * @attention |
ganlikun | 0:13413ea9a877 | 10 | * |
ganlikun | 0:13413ea9a877 | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
ganlikun | 0:13413ea9a877 | 12 | * |
ganlikun | 0:13413ea9a877 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
ganlikun | 0:13413ea9a877 | 14 | * are permitted provided that the following conditions are met: |
ganlikun | 0:13413ea9a877 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
ganlikun | 0:13413ea9a877 | 16 | * this list of conditions and the following disclaimer. |
ganlikun | 0:13413ea9a877 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
ganlikun | 0:13413ea9a877 | 18 | * this list of conditions and the following disclaimer in the documentation |
ganlikun | 0:13413ea9a877 | 19 | * and/or other materials provided with the distribution. |
ganlikun | 0:13413ea9a877 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
ganlikun | 0:13413ea9a877 | 21 | * may be used to endorse or promote products derived from this software |
ganlikun | 0:13413ea9a877 | 22 | * without specific prior written permission. |
ganlikun | 0:13413ea9a877 | 23 | * |
ganlikun | 0:13413ea9a877 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
ganlikun | 0:13413ea9a877 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
ganlikun | 0:13413ea9a877 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
ganlikun | 0:13413ea9a877 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
ganlikun | 0:13413ea9a877 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
ganlikun | 0:13413ea9a877 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
ganlikun | 0:13413ea9a877 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
ganlikun | 0:13413ea9a877 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
ganlikun | 0:13413ea9a877 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
ganlikun | 0:13413ea9a877 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
ganlikun | 0:13413ea9a877 | 34 | * |
ganlikun | 0:13413ea9a877 | 35 | ****************************************************************************** |
ganlikun | 0:13413ea9a877 | 36 | */ |
ganlikun | 0:13413ea9a877 | 37 | |
ganlikun | 0:13413ea9a877 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 39 | #ifndef __STM32F4xx_HAL_MMC_H |
ganlikun | 0:13413ea9a877 | 40 | #define __STM32F4xx_HAL_MMC_H |
ganlikun | 0:13413ea9a877 | 41 | |
ganlikun | 0:13413ea9a877 | 42 | #ifdef __cplusplus |
ganlikun | 0:13413ea9a877 | 43 | extern "C" { |
ganlikun | 0:13413ea9a877 | 44 | #endif |
ganlikun | 0:13413ea9a877 | 45 | |
ganlikun | 0:13413ea9a877 | 46 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
ganlikun | 0:13413ea9a877 | 47 | defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
ganlikun | 0:13413ea9a877 | 48 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ |
ganlikun | 0:13413ea9a877 | 49 | defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
ganlikun | 0:13413ea9a877 | 50 | defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
ganlikun | 0:13413ea9a877 | 51 | |
ganlikun | 0:13413ea9a877 | 52 | /* Includes ------------------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 53 | #include "stm32f4xx_ll_sdmmc.h" |
ganlikun | 0:13413ea9a877 | 54 | |
ganlikun | 0:13413ea9a877 | 55 | /** @addtogroup STM32F4xx_HAL_Driver |
ganlikun | 0:13413ea9a877 | 56 | * @{ |
ganlikun | 0:13413ea9a877 | 57 | */ |
ganlikun | 0:13413ea9a877 | 58 | |
ganlikun | 0:13413ea9a877 | 59 | /** @defgroup MMC MMC |
ganlikun | 0:13413ea9a877 | 60 | * @brief MMC HAL module driver |
ganlikun | 0:13413ea9a877 | 61 | * @{ |
ganlikun | 0:13413ea9a877 | 62 | */ |
ganlikun | 0:13413ea9a877 | 63 | |
ganlikun | 0:13413ea9a877 | 64 | /* Exported types ------------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 65 | /** @defgroup MMC_Exported_Types MMC Exported Types |
ganlikun | 0:13413ea9a877 | 66 | * @{ |
ganlikun | 0:13413ea9a877 | 67 | */ |
ganlikun | 0:13413ea9a877 | 68 | |
ganlikun | 0:13413ea9a877 | 69 | /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure |
ganlikun | 0:13413ea9a877 | 70 | * @{ |
ganlikun | 0:13413ea9a877 | 71 | */ |
ganlikun | 0:13413ea9a877 | 72 | typedef enum |
ganlikun | 0:13413ea9a877 | 73 | { |
ganlikun | 0:13413ea9a877 | 74 | HAL_MMC_STATE_RESET = 0x00000000U, /*!< MMC not yet initialized or disabled */ |
ganlikun | 0:13413ea9a877 | 75 | HAL_MMC_STATE_READY = 0x00000001U, /*!< MMC initialized and ready for use */ |
ganlikun | 0:13413ea9a877 | 76 | HAL_MMC_STATE_TIMEOUT = 0x00000002U, /*!< MMC Timeout state */ |
ganlikun | 0:13413ea9a877 | 77 | HAL_MMC_STATE_BUSY = 0x00000003U, /*!< MMC process ongoing */ |
ganlikun | 0:13413ea9a877 | 78 | HAL_MMC_STATE_PROGRAMMING = 0x00000004U, /*!< MMC Programming State */ |
ganlikun | 0:13413ea9a877 | 79 | HAL_MMC_STATE_RECEIVING = 0x00000005U, /*!< MMC Receinving State */ |
ganlikun | 0:13413ea9a877 | 80 | HAL_MMC_STATE_TRANSFER = 0x00000006U, /*!< MMC Transfert State */ |
ganlikun | 0:13413ea9a877 | 81 | HAL_MMC_STATE_ERROR = 0x0000000FU /*!< MMC is in error state */ |
ganlikun | 0:13413ea9a877 | 82 | }HAL_MMC_StateTypeDef; |
ganlikun | 0:13413ea9a877 | 83 | /** |
ganlikun | 0:13413ea9a877 | 84 | * @} |
ganlikun | 0:13413ea9a877 | 85 | */ |
ganlikun | 0:13413ea9a877 | 86 | |
ganlikun | 0:13413ea9a877 | 87 | /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure |
ganlikun | 0:13413ea9a877 | 88 | * @{ |
ganlikun | 0:13413ea9a877 | 89 | */ |
ganlikun | 0:13413ea9a877 | 90 | typedef enum |
ganlikun | 0:13413ea9a877 | 91 | { |
ganlikun | 0:13413ea9a877 | 92 | HAL_MMC_CARD_READY = 0x00000001U, /*!< Card state is ready */ |
ganlikun | 0:13413ea9a877 | 93 | HAL_MMC_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */ |
ganlikun | 0:13413ea9a877 | 94 | HAL_MMC_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */ |
ganlikun | 0:13413ea9a877 | 95 | HAL_MMC_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */ |
ganlikun | 0:13413ea9a877 | 96 | HAL_MMC_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */ |
ganlikun | 0:13413ea9a877 | 97 | HAL_MMC_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */ |
ganlikun | 0:13413ea9a877 | 98 | HAL_MMC_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */ |
ganlikun | 0:13413ea9a877 | 99 | HAL_MMC_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */ |
ganlikun | 0:13413ea9a877 | 100 | HAL_MMC_CARD_ERROR = 0x000000FFU /*!< Card response Error */ |
ganlikun | 0:13413ea9a877 | 101 | }HAL_MMC_CardStateTypeDef; |
ganlikun | 0:13413ea9a877 | 102 | /** |
ganlikun | 0:13413ea9a877 | 103 | * @} |
ganlikun | 0:13413ea9a877 | 104 | */ |
ganlikun | 0:13413ea9a877 | 105 | |
ganlikun | 0:13413ea9a877 | 106 | /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition |
ganlikun | 0:13413ea9a877 | 107 | * @{ |
ganlikun | 0:13413ea9a877 | 108 | */ |
ganlikun | 0:13413ea9a877 | 109 | #define MMC_InitTypeDef SDIO_InitTypeDef |
ganlikun | 0:13413ea9a877 | 110 | #define MMC_TypeDef SDIO_TypeDef |
ganlikun | 0:13413ea9a877 | 111 | |
ganlikun | 0:13413ea9a877 | 112 | /** |
ganlikun | 0:13413ea9a877 | 113 | * @brief MMC Card Information Structure definition |
ganlikun | 0:13413ea9a877 | 114 | */ |
ganlikun | 0:13413ea9a877 | 115 | typedef struct |
ganlikun | 0:13413ea9a877 | 116 | { |
ganlikun | 0:13413ea9a877 | 117 | uint32_t CardType; /*!< Specifies the card Type */ |
ganlikun | 0:13413ea9a877 | 118 | |
ganlikun | 0:13413ea9a877 | 119 | uint32_t Class; /*!< Specifies the class of the card class */ |
ganlikun | 0:13413ea9a877 | 120 | |
ganlikun | 0:13413ea9a877 | 121 | uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ |
ganlikun | 0:13413ea9a877 | 122 | |
ganlikun | 0:13413ea9a877 | 123 | uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ |
ganlikun | 0:13413ea9a877 | 124 | |
ganlikun | 0:13413ea9a877 | 125 | uint32_t BlockSize; /*!< Specifies one block size in bytes */ |
ganlikun | 0:13413ea9a877 | 126 | |
ganlikun | 0:13413ea9a877 | 127 | uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ |
ganlikun | 0:13413ea9a877 | 128 | |
ganlikun | 0:13413ea9a877 | 129 | uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ |
ganlikun | 0:13413ea9a877 | 130 | |
ganlikun | 0:13413ea9a877 | 131 | }HAL_MMC_CardInfoTypeDef; |
ganlikun | 0:13413ea9a877 | 132 | |
ganlikun | 0:13413ea9a877 | 133 | /** |
ganlikun | 0:13413ea9a877 | 134 | * @brief MMC handle Structure definition |
ganlikun | 0:13413ea9a877 | 135 | */ |
ganlikun | 0:13413ea9a877 | 136 | typedef struct |
ganlikun | 0:13413ea9a877 | 137 | { |
ganlikun | 0:13413ea9a877 | 138 | MMC_TypeDef *Instance; /*!< MMC registers base address */ |
ganlikun | 0:13413ea9a877 | 139 | |
ganlikun | 0:13413ea9a877 | 140 | MMC_InitTypeDef Init; /*!< MMC required parameters */ |
ganlikun | 0:13413ea9a877 | 141 | |
ganlikun | 0:13413ea9a877 | 142 | HAL_LockTypeDef Lock; /*!< MMC locking object */ |
ganlikun | 0:13413ea9a877 | 143 | |
ganlikun | 0:13413ea9a877 | 144 | uint32_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ |
ganlikun | 0:13413ea9a877 | 145 | |
ganlikun | 0:13413ea9a877 | 146 | uint32_t TxXferSize; /*!< MMC Tx Transfer size */ |
ganlikun | 0:13413ea9a877 | 147 | |
ganlikun | 0:13413ea9a877 | 148 | uint32_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ |
ganlikun | 0:13413ea9a877 | 149 | |
ganlikun | 0:13413ea9a877 | 150 | uint32_t RxXferSize; /*!< MMC Rx Transfer size */ |
ganlikun | 0:13413ea9a877 | 151 | |
ganlikun | 0:13413ea9a877 | 152 | __IO uint32_t Context; /*!< MMC transfer context */ |
ganlikun | 0:13413ea9a877 | 153 | |
ganlikun | 0:13413ea9a877 | 154 | __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ |
ganlikun | 0:13413ea9a877 | 155 | |
ganlikun | 0:13413ea9a877 | 156 | __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ |
ganlikun | 0:13413ea9a877 | 157 | |
ganlikun | 0:13413ea9a877 | 158 | DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ |
ganlikun | 0:13413ea9a877 | 159 | |
ganlikun | 0:13413ea9a877 | 160 | DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ |
ganlikun | 0:13413ea9a877 | 161 | |
ganlikun | 0:13413ea9a877 | 162 | HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ |
ganlikun | 0:13413ea9a877 | 163 | |
ganlikun | 0:13413ea9a877 | 164 | uint32_t CSD[4U]; /*!< MMC card specific data table */ |
ganlikun | 0:13413ea9a877 | 165 | |
ganlikun | 0:13413ea9a877 | 166 | uint32_t CID[4U]; /*!< MMC card identification number table */ |
ganlikun | 0:13413ea9a877 | 167 | |
ganlikun | 0:13413ea9a877 | 168 | }MMC_HandleTypeDef; |
ganlikun | 0:13413ea9a877 | 169 | |
ganlikun | 0:13413ea9a877 | 170 | /** |
ganlikun | 0:13413ea9a877 | 171 | * @} |
ganlikun | 0:13413ea9a877 | 172 | */ |
ganlikun | 0:13413ea9a877 | 173 | |
ganlikun | 0:13413ea9a877 | 174 | /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register |
ganlikun | 0:13413ea9a877 | 175 | * @{ |
ganlikun | 0:13413ea9a877 | 176 | */ |
ganlikun | 0:13413ea9a877 | 177 | typedef struct |
ganlikun | 0:13413ea9a877 | 178 | { |
ganlikun | 0:13413ea9a877 | 179 | __IO uint8_t CSDStruct; /*!< CSD structure */ |
ganlikun | 0:13413ea9a877 | 180 | __IO uint8_t SysSpecVersion; /*!< System specification version */ |
ganlikun | 0:13413ea9a877 | 181 | __IO uint8_t Reserved1; /*!< Reserved */ |
ganlikun | 0:13413ea9a877 | 182 | __IO uint8_t TAAC; /*!< Data read access time 1 */ |
ganlikun | 0:13413ea9a877 | 183 | __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
ganlikun | 0:13413ea9a877 | 184 | __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
ganlikun | 0:13413ea9a877 | 185 | __IO uint16_t CardComdClasses; /*!< Card command classes */ |
ganlikun | 0:13413ea9a877 | 186 | __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
ganlikun | 0:13413ea9a877 | 187 | __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
ganlikun | 0:13413ea9a877 | 188 | __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
ganlikun | 0:13413ea9a877 | 189 | __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
ganlikun | 0:13413ea9a877 | 190 | __IO uint8_t DSRImpl; /*!< DSR implemented */ |
ganlikun | 0:13413ea9a877 | 191 | __IO uint8_t Reserved2; /*!< Reserved */ |
ganlikun | 0:13413ea9a877 | 192 | __IO uint32_t DeviceSize; /*!< Device Size */ |
ganlikun | 0:13413ea9a877 | 193 | __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
ganlikun | 0:13413ea9a877 | 194 | __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
ganlikun | 0:13413ea9a877 | 195 | __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
ganlikun | 0:13413ea9a877 | 196 | __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
ganlikun | 0:13413ea9a877 | 197 | __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
ganlikun | 0:13413ea9a877 | 198 | __IO uint8_t EraseGrSize; /*!< Erase group size */ |
ganlikun | 0:13413ea9a877 | 199 | __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
ganlikun | 0:13413ea9a877 | 200 | __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
ganlikun | 0:13413ea9a877 | 201 | __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
ganlikun | 0:13413ea9a877 | 202 | __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
ganlikun | 0:13413ea9a877 | 203 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
ganlikun | 0:13413ea9a877 | 204 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
ganlikun | 0:13413ea9a877 | 205 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
ganlikun | 0:13413ea9a877 | 206 | __IO uint8_t Reserved3; /*!< Reserved */ |
ganlikun | 0:13413ea9a877 | 207 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
ganlikun | 0:13413ea9a877 | 208 | __IO uint8_t FileFormatGrouop; /*!< File format group */ |
ganlikun | 0:13413ea9a877 | 209 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
ganlikun | 0:13413ea9a877 | 210 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
ganlikun | 0:13413ea9a877 | 211 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
ganlikun | 0:13413ea9a877 | 212 | __IO uint8_t FileFormat; /*!< File format */ |
ganlikun | 0:13413ea9a877 | 213 | __IO uint8_t ECC; /*!< ECC code */ |
ganlikun | 0:13413ea9a877 | 214 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
ganlikun | 0:13413ea9a877 | 215 | __IO uint8_t Reserved4; /*!< Always 1 */ |
ganlikun | 0:13413ea9a877 | 216 | |
ganlikun | 0:13413ea9a877 | 217 | }HAL_MMC_CardCSDTypeDef; |
ganlikun | 0:13413ea9a877 | 218 | /** |
ganlikun | 0:13413ea9a877 | 219 | * @} |
ganlikun | 0:13413ea9a877 | 220 | */ |
ganlikun | 0:13413ea9a877 | 221 | |
ganlikun | 0:13413ea9a877 | 222 | /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register |
ganlikun | 0:13413ea9a877 | 223 | * @{ |
ganlikun | 0:13413ea9a877 | 224 | */ |
ganlikun | 0:13413ea9a877 | 225 | typedef struct |
ganlikun | 0:13413ea9a877 | 226 | { |
ganlikun | 0:13413ea9a877 | 227 | __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
ganlikun | 0:13413ea9a877 | 228 | __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
ganlikun | 0:13413ea9a877 | 229 | __IO uint32_t ProdName1; /*!< Product Name part1 */ |
ganlikun | 0:13413ea9a877 | 230 | __IO uint8_t ProdName2; /*!< Product Name part2 */ |
ganlikun | 0:13413ea9a877 | 231 | __IO uint8_t ProdRev; /*!< Product Revision */ |
ganlikun | 0:13413ea9a877 | 232 | __IO uint32_t ProdSN; /*!< Product Serial Number */ |
ganlikun | 0:13413ea9a877 | 233 | __IO uint8_t Reserved1; /*!< Reserved1 */ |
ganlikun | 0:13413ea9a877 | 234 | __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
ganlikun | 0:13413ea9a877 | 235 | __IO uint8_t CID_CRC; /*!< CID CRC */ |
ganlikun | 0:13413ea9a877 | 236 | __IO uint8_t Reserved2; /*!< Always 1 */ |
ganlikun | 0:13413ea9a877 | 237 | |
ganlikun | 0:13413ea9a877 | 238 | }HAL_MMC_CardCIDTypeDef; |
ganlikun | 0:13413ea9a877 | 239 | /** |
ganlikun | 0:13413ea9a877 | 240 | * @} |
ganlikun | 0:13413ea9a877 | 241 | */ |
ganlikun | 0:13413ea9a877 | 242 | |
ganlikun | 0:13413ea9a877 | 243 | /** @defgroup MMC_Exported_Types_Group6 MMC Card Status returned by ACMD13 |
ganlikun | 0:13413ea9a877 | 244 | * @{ |
ganlikun | 0:13413ea9a877 | 245 | */ |
ganlikun | 0:13413ea9a877 | 246 | typedef struct |
ganlikun | 0:13413ea9a877 | 247 | { |
ganlikun | 0:13413ea9a877 | 248 | __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ |
ganlikun | 0:13413ea9a877 | 249 | __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ |
ganlikun | 0:13413ea9a877 | 250 | __IO uint16_t CardType; /*!< Carries information about card type */ |
ganlikun | 0:13413ea9a877 | 251 | __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ |
ganlikun | 0:13413ea9a877 | 252 | __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ |
ganlikun | 0:13413ea9a877 | 253 | __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ |
ganlikun | 0:13413ea9a877 | 254 | __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ |
ganlikun | 0:13413ea9a877 | 255 | __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ |
ganlikun | 0:13413ea9a877 | 256 | __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ |
ganlikun | 0:13413ea9a877 | 257 | __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ |
ganlikun | 0:13413ea9a877 | 258 | |
ganlikun | 0:13413ea9a877 | 259 | }HAL_MMC_CardStatusTypeDef; |
ganlikun | 0:13413ea9a877 | 260 | /** |
ganlikun | 0:13413ea9a877 | 261 | * @} |
ganlikun | 0:13413ea9a877 | 262 | */ |
ganlikun | 0:13413ea9a877 | 263 | |
ganlikun | 0:13413ea9a877 | 264 | /** |
ganlikun | 0:13413ea9a877 | 265 | * @} |
ganlikun | 0:13413ea9a877 | 266 | */ |
ganlikun | 0:13413ea9a877 | 267 | |
ganlikun | 0:13413ea9a877 | 268 | /* Exported constants --------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 269 | /** @defgroup MMC_Exported_Constants Exported Constants |
ganlikun | 0:13413ea9a877 | 270 | * @{ |
ganlikun | 0:13413ea9a877 | 271 | */ |
ganlikun | 0:13413ea9a877 | 272 | |
ganlikun | 0:13413ea9a877 | 273 | #define BLOCKSIZE 512U /*!< Block size is 512 bytes */ |
ganlikun | 0:13413ea9a877 | 274 | |
ganlikun | 0:13413ea9a877 | 275 | #define CAPACITY 0x400000U /*!< Log Block Nuumber for 2 G bytes Cards */ |
ganlikun | 0:13413ea9a877 | 276 | |
ganlikun | 0:13413ea9a877 | 277 | /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition |
ganlikun | 0:13413ea9a877 | 278 | * @{ |
ganlikun | 0:13413ea9a877 | 279 | */ |
ganlikun | 0:13413ea9a877 | 280 | #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
ganlikun | 0:13413ea9a877 | 281 | #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ |
ganlikun | 0:13413ea9a877 | 282 | #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ |
ganlikun | 0:13413ea9a877 | 283 | #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ |
ganlikun | 0:13413ea9a877 | 284 | #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ |
ganlikun | 0:13413ea9a877 | 285 | #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ |
ganlikun | 0:13413ea9a877 | 286 | #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ |
ganlikun | 0:13413ea9a877 | 287 | #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ |
ganlikun | 0:13413ea9a877 | 288 | #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the |
ganlikun | 0:13413ea9a877 | 289 | number of transferred bytes does not match the block length */ |
ganlikun | 0:13413ea9a877 | 290 | #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ |
ganlikun | 0:13413ea9a877 | 291 | #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ |
ganlikun | 0:13413ea9a877 | 292 | #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ |
ganlikun | 0:13413ea9a877 | 293 | #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock |
ganlikun | 0:13413ea9a877 | 294 | command or if there was an attempt to access a locked card */ |
ganlikun | 0:13413ea9a877 | 295 | #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ |
ganlikun | 0:13413ea9a877 | 296 | #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ |
ganlikun | 0:13413ea9a877 | 297 | #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ |
ganlikun | 0:13413ea9a877 | 298 | #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ |
ganlikun | 0:13413ea9a877 | 299 | #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ |
ganlikun | 0:13413ea9a877 | 300 | #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ |
ganlikun | 0:13413ea9a877 | 301 | #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ |
ganlikun | 0:13413ea9a877 | 302 | #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ |
ganlikun | 0:13413ea9a877 | 303 | #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ |
ganlikun | 0:13413ea9a877 | 304 | #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ |
ganlikun | 0:13413ea9a877 | 305 | #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out |
ganlikun | 0:13413ea9a877 | 306 | of erase sequence command was received */ |
ganlikun | 0:13413ea9a877 | 307 | #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ |
ganlikun | 0:13413ea9a877 | 308 | #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ |
ganlikun | 0:13413ea9a877 | 309 | #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ |
ganlikun | 0:13413ea9a877 | 310 | #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ |
ganlikun | 0:13413ea9a877 | 311 | #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
ganlikun | 0:13413ea9a877 | 312 | #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
ganlikun | 0:13413ea9a877 | 313 | #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
ganlikun | 0:13413ea9a877 | 314 | #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
ganlikun | 0:13413ea9a877 | 315 | #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
ganlikun | 0:13413ea9a877 | 316 | |
ganlikun | 0:13413ea9a877 | 317 | /** |
ganlikun | 0:13413ea9a877 | 318 | * @} |
ganlikun | 0:13413ea9a877 | 319 | */ |
ganlikun | 0:13413ea9a877 | 320 | |
ganlikun | 0:13413ea9a877 | 321 | /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration structure |
ganlikun | 0:13413ea9a877 | 322 | * @{ |
ganlikun | 0:13413ea9a877 | 323 | */ |
ganlikun | 0:13413ea9a877 | 324 | #define MMC_CONTEXT_NONE 0x00000000U /*!< None */ |
ganlikun | 0:13413ea9a877 | 325 | #define MMC_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */ |
ganlikun | 0:13413ea9a877 | 326 | #define MMC_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */ |
ganlikun | 0:13413ea9a877 | 327 | #define MMC_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */ |
ganlikun | 0:13413ea9a877 | 328 | #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */ |
ganlikun | 0:13413ea9a877 | 329 | #define MMC_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */ |
ganlikun | 0:13413ea9a877 | 330 | #define MMC_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */ |
ganlikun | 0:13413ea9a877 | 331 | |
ganlikun | 0:13413ea9a877 | 332 | /** |
ganlikun | 0:13413ea9a877 | 333 | * @} |
ganlikun | 0:13413ea9a877 | 334 | */ |
ganlikun | 0:13413ea9a877 | 335 | |
ganlikun | 0:13413ea9a877 | 336 | /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode |
ganlikun | 0:13413ea9a877 | 337 | * @{ |
ganlikun | 0:13413ea9a877 | 338 | */ |
ganlikun | 0:13413ea9a877 | 339 | /** |
ganlikun | 0:13413ea9a877 | 340 | * @brief |
ganlikun | 0:13413ea9a877 | 341 | */ |
ganlikun | 0:13413ea9a877 | 342 | #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */ |
ganlikun | 0:13413ea9a877 | 343 | #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */ |
ganlikun | 0:13413ea9a877 | 344 | #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */ |
ganlikun | 0:13413ea9a877 | 345 | #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */ |
ganlikun | 0:13413ea9a877 | 346 | #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U |
ganlikun | 0:13413ea9a877 | 347 | /** |
ganlikun | 0:13413ea9a877 | 348 | * @} |
ganlikun | 0:13413ea9a877 | 349 | */ |
ganlikun | 0:13413ea9a877 | 350 | |
ganlikun | 0:13413ea9a877 | 351 | /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards |
ganlikun | 0:13413ea9a877 | 352 | * @{ |
ganlikun | 0:13413ea9a877 | 353 | */ |
ganlikun | 0:13413ea9a877 | 354 | #define MMC_HIGH_VOLTAGE_CARD 0x00000000U |
ganlikun | 0:13413ea9a877 | 355 | #define MMC_DUAL_VOLTAGE_CARD 0x00000001U |
ganlikun | 0:13413ea9a877 | 356 | /** |
ganlikun | 0:13413ea9a877 | 357 | * @} |
ganlikun | 0:13413ea9a877 | 358 | */ |
ganlikun | 0:13413ea9a877 | 359 | |
ganlikun | 0:13413ea9a877 | 360 | /** |
ganlikun | 0:13413ea9a877 | 361 | * @} |
ganlikun | 0:13413ea9a877 | 362 | */ |
ganlikun | 0:13413ea9a877 | 363 | |
ganlikun | 0:13413ea9a877 | 364 | /* Exported macro ------------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 365 | /** @defgroup MMC_Exported_macros MMC Exported Macros |
ganlikun | 0:13413ea9a877 | 366 | * @brief macros to handle interrupts and specific clock configurations |
ganlikun | 0:13413ea9a877 | 367 | * @{ |
ganlikun | 0:13413ea9a877 | 368 | */ |
ganlikun | 0:13413ea9a877 | 369 | |
ganlikun | 0:13413ea9a877 | 370 | /** |
ganlikun | 0:13413ea9a877 | 371 | * @brief Enable the MMC device. |
ganlikun | 0:13413ea9a877 | 372 | * @retval None |
ganlikun | 0:13413ea9a877 | 373 | */ |
ganlikun | 0:13413ea9a877 | 374 | #define __HAL_MMC_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance) |
ganlikun | 0:13413ea9a877 | 375 | |
ganlikun | 0:13413ea9a877 | 376 | /** |
ganlikun | 0:13413ea9a877 | 377 | * @brief Disable the MMC device. |
ganlikun | 0:13413ea9a877 | 378 | * @retval None |
ganlikun | 0:13413ea9a877 | 379 | */ |
ganlikun | 0:13413ea9a877 | 380 | #define __HAL_MMC_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance) |
ganlikun | 0:13413ea9a877 | 381 | |
ganlikun | 0:13413ea9a877 | 382 | /** |
ganlikun | 0:13413ea9a877 | 383 | * @brief Enable the SDMMC DMA transfer. |
ganlikun | 0:13413ea9a877 | 384 | * @retval None |
ganlikun | 0:13413ea9a877 | 385 | */ |
ganlikun | 0:13413ea9a877 | 386 | #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance) |
ganlikun | 0:13413ea9a877 | 387 | |
ganlikun | 0:13413ea9a877 | 388 | /** |
ganlikun | 0:13413ea9a877 | 389 | * @brief Disable the SDMMC DMA transfer. |
ganlikun | 0:13413ea9a877 | 390 | * @retval None |
ganlikun | 0:13413ea9a877 | 391 | */ |
ganlikun | 0:13413ea9a877 | 392 | #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance) |
ganlikun | 0:13413ea9a877 | 393 | |
ganlikun | 0:13413ea9a877 | 394 | /** |
ganlikun | 0:13413ea9a877 | 395 | * @brief Enable the MMC device interrupt. |
ganlikun | 0:13413ea9a877 | 396 | * @param __HANDLE__: MMC Handle |
ganlikun | 0:13413ea9a877 | 397 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled. |
ganlikun | 0:13413ea9a877 | 398 | * This parameter can be one or a combination of the following values: |
ganlikun | 0:13413ea9a877 | 399 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 400 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 401 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
ganlikun | 0:13413ea9a877 | 402 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
ganlikun | 0:13413ea9a877 | 403 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
ganlikun | 0:13413ea9a877 | 404 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
ganlikun | 0:13413ea9a877 | 405 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
ganlikun | 0:13413ea9a877 | 406 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
ganlikun | 0:13413ea9a877 | 407 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
ganlikun | 0:13413ea9a877 | 408 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
ganlikun | 0:13413ea9a877 | 409 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
ganlikun | 0:13413ea9a877 | 410 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
ganlikun | 0:13413ea9a877 | 411 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
ganlikun | 0:13413ea9a877 | 412 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
ganlikun | 0:13413ea9a877 | 413 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
ganlikun | 0:13413ea9a877 | 414 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
ganlikun | 0:13413ea9a877 | 415 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
ganlikun | 0:13413ea9a877 | 416 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
ganlikun | 0:13413ea9a877 | 417 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
ganlikun | 0:13413ea9a877 | 418 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
ganlikun | 0:13413ea9a877 | 419 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
ganlikun | 0:13413ea9a877 | 420 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
ganlikun | 0:13413ea9a877 | 421 | * @retval None |
ganlikun | 0:13413ea9a877 | 422 | */ |
ganlikun | 0:13413ea9a877 | 423 | #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
ganlikun | 0:13413ea9a877 | 424 | |
ganlikun | 0:13413ea9a877 | 425 | /** |
ganlikun | 0:13413ea9a877 | 426 | * @brief Disable the MMC device interrupt. |
ganlikun | 0:13413ea9a877 | 427 | * @param __HANDLE__: MMC Handle |
ganlikun | 0:13413ea9a877 | 428 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled. |
ganlikun | 0:13413ea9a877 | 429 | * This parameter can be one or a combination of the following values: |
ganlikun | 0:13413ea9a877 | 430 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 431 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 432 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
ganlikun | 0:13413ea9a877 | 433 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
ganlikun | 0:13413ea9a877 | 434 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
ganlikun | 0:13413ea9a877 | 435 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
ganlikun | 0:13413ea9a877 | 436 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
ganlikun | 0:13413ea9a877 | 437 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
ganlikun | 0:13413ea9a877 | 438 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
ganlikun | 0:13413ea9a877 | 439 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
ganlikun | 0:13413ea9a877 | 440 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
ganlikun | 0:13413ea9a877 | 441 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
ganlikun | 0:13413ea9a877 | 442 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
ganlikun | 0:13413ea9a877 | 443 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
ganlikun | 0:13413ea9a877 | 444 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
ganlikun | 0:13413ea9a877 | 445 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
ganlikun | 0:13413ea9a877 | 446 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
ganlikun | 0:13413ea9a877 | 447 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
ganlikun | 0:13413ea9a877 | 448 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
ganlikun | 0:13413ea9a877 | 449 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
ganlikun | 0:13413ea9a877 | 450 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
ganlikun | 0:13413ea9a877 | 451 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
ganlikun | 0:13413ea9a877 | 452 | * @retval None |
ganlikun | 0:13413ea9a877 | 453 | */ |
ganlikun | 0:13413ea9a877 | 454 | #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
ganlikun | 0:13413ea9a877 | 455 | |
ganlikun | 0:13413ea9a877 | 456 | /** |
ganlikun | 0:13413ea9a877 | 457 | * @brief Check whether the specified MMC flag is set or not. |
ganlikun | 0:13413ea9a877 | 458 | * @param __HANDLE__: MMC Handle |
ganlikun | 0:13413ea9a877 | 459 | * @param __FLAG__: specifies the flag to check. |
ganlikun | 0:13413ea9a877 | 460 | * This parameter can be one of the following values: |
ganlikun | 0:13413ea9a877 | 461 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
ganlikun | 0:13413ea9a877 | 462 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
ganlikun | 0:13413ea9a877 | 463 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
ganlikun | 0:13413ea9a877 | 464 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
ganlikun | 0:13413ea9a877 | 465 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
ganlikun | 0:13413ea9a877 | 466 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
ganlikun | 0:13413ea9a877 | 467 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
ganlikun | 0:13413ea9a877 | 468 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
ganlikun | 0:13413ea9a877 | 469 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
ganlikun | 0:13413ea9a877 | 470 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
ganlikun | 0:13413ea9a877 | 471 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
ganlikun | 0:13413ea9a877 | 472 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
ganlikun | 0:13413ea9a877 | 473 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
ganlikun | 0:13413ea9a877 | 474 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
ganlikun | 0:13413ea9a877 | 475 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
ganlikun | 0:13413ea9a877 | 476 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
ganlikun | 0:13413ea9a877 | 477 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
ganlikun | 0:13413ea9a877 | 478 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
ganlikun | 0:13413ea9a877 | 479 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
ganlikun | 0:13413ea9a877 | 480 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
ganlikun | 0:13413ea9a877 | 481 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
ganlikun | 0:13413ea9a877 | 482 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
ganlikun | 0:13413ea9a877 | 483 | * @retval The new state of MMC FLAG (SET or RESET). |
ganlikun | 0:13413ea9a877 | 484 | */ |
ganlikun | 0:13413ea9a877 | 485 | #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
ganlikun | 0:13413ea9a877 | 486 | |
ganlikun | 0:13413ea9a877 | 487 | /** |
ganlikun | 0:13413ea9a877 | 488 | * @brief Clear the MMC's pending flags. |
ganlikun | 0:13413ea9a877 | 489 | * @param __HANDLE__: MMC Handle |
ganlikun | 0:13413ea9a877 | 490 | * @param __FLAG__: specifies the flag to clear. |
ganlikun | 0:13413ea9a877 | 491 | * This parameter can be one or a combination of the following values: |
ganlikun | 0:13413ea9a877 | 492 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
ganlikun | 0:13413ea9a877 | 493 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
ganlikun | 0:13413ea9a877 | 494 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
ganlikun | 0:13413ea9a877 | 495 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
ganlikun | 0:13413ea9a877 | 496 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
ganlikun | 0:13413ea9a877 | 497 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
ganlikun | 0:13413ea9a877 | 498 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
ganlikun | 0:13413ea9a877 | 499 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
ganlikun | 0:13413ea9a877 | 500 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
ganlikun | 0:13413ea9a877 | 501 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
ganlikun | 0:13413ea9a877 | 502 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
ganlikun | 0:13413ea9a877 | 503 | * @retval None |
ganlikun | 0:13413ea9a877 | 504 | */ |
ganlikun | 0:13413ea9a877 | 505 | #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
ganlikun | 0:13413ea9a877 | 506 | |
ganlikun | 0:13413ea9a877 | 507 | /** |
ganlikun | 0:13413ea9a877 | 508 | * @brief Check whether the specified MMC interrupt has occurred or not. |
ganlikun | 0:13413ea9a877 | 509 | * @param __HANDLE__: MMC Handle |
ganlikun | 0:13413ea9a877 | 510 | * @param __INTERRUPT__: specifies the SDMMC interrupt source to check. |
ganlikun | 0:13413ea9a877 | 511 | * This parameter can be one of the following values: |
ganlikun | 0:13413ea9a877 | 512 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 513 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 514 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
ganlikun | 0:13413ea9a877 | 515 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
ganlikun | 0:13413ea9a877 | 516 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
ganlikun | 0:13413ea9a877 | 517 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
ganlikun | 0:13413ea9a877 | 518 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
ganlikun | 0:13413ea9a877 | 519 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
ganlikun | 0:13413ea9a877 | 520 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
ganlikun | 0:13413ea9a877 | 521 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
ganlikun | 0:13413ea9a877 | 522 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
ganlikun | 0:13413ea9a877 | 523 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
ganlikun | 0:13413ea9a877 | 524 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
ganlikun | 0:13413ea9a877 | 525 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
ganlikun | 0:13413ea9a877 | 526 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
ganlikun | 0:13413ea9a877 | 527 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
ganlikun | 0:13413ea9a877 | 528 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
ganlikun | 0:13413ea9a877 | 529 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
ganlikun | 0:13413ea9a877 | 530 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
ganlikun | 0:13413ea9a877 | 531 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
ganlikun | 0:13413ea9a877 | 532 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
ganlikun | 0:13413ea9a877 | 533 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
ganlikun | 0:13413ea9a877 | 534 | * @retval The new state of MMC IT (SET or RESET). |
ganlikun | 0:13413ea9a877 | 535 | */ |
ganlikun | 0:13413ea9a877 | 536 | #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
ganlikun | 0:13413ea9a877 | 537 | |
ganlikun | 0:13413ea9a877 | 538 | /** |
ganlikun | 0:13413ea9a877 | 539 | * @brief Clear the MMC's interrupt pending bits. |
ganlikun | 0:13413ea9a877 | 540 | * @param __HANDLE__: MMC Handle |
ganlikun | 0:13413ea9a877 | 541 | * @param __INTERRUPT__: specifies the interrupt pending bit to clear. |
ganlikun | 0:13413ea9a877 | 542 | * This parameter can be one or a combination of the following values: |
ganlikun | 0:13413ea9a877 | 543 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 544 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
ganlikun | 0:13413ea9a877 | 545 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
ganlikun | 0:13413ea9a877 | 546 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
ganlikun | 0:13413ea9a877 | 547 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
ganlikun | 0:13413ea9a877 | 548 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
ganlikun | 0:13413ea9a877 | 549 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
ganlikun | 0:13413ea9a877 | 550 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
ganlikun | 0:13413ea9a877 | 551 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt |
ganlikun | 0:13413ea9a877 | 552 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
ganlikun | 0:13413ea9a877 | 553 | * @retval None |
ganlikun | 0:13413ea9a877 | 554 | */ |
ganlikun | 0:13413ea9a877 | 555 | #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
ganlikun | 0:13413ea9a877 | 556 | |
ganlikun | 0:13413ea9a877 | 557 | /** |
ganlikun | 0:13413ea9a877 | 558 | * @} |
ganlikun | 0:13413ea9a877 | 559 | */ |
ganlikun | 0:13413ea9a877 | 560 | |
ganlikun | 0:13413ea9a877 | 561 | /* Exported functions --------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 562 | /** @defgroup MMC_Exported_Functions MMC Exported Functions |
ganlikun | 0:13413ea9a877 | 563 | * @{ |
ganlikun | 0:13413ea9a877 | 564 | */ |
ganlikun | 0:13413ea9a877 | 565 | |
ganlikun | 0:13413ea9a877 | 566 | /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions |
ganlikun | 0:13413ea9a877 | 567 | * @{ |
ganlikun | 0:13413ea9a877 | 568 | */ |
ganlikun | 0:13413ea9a877 | 569 | HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 570 | HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 571 | HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 572 | void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 573 | void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 574 | /** |
ganlikun | 0:13413ea9a877 | 575 | * @} |
ganlikun | 0:13413ea9a877 | 576 | */ |
ganlikun | 0:13413ea9a877 | 577 | |
ganlikun | 0:13413ea9a877 | 578 | /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions |
ganlikun | 0:13413ea9a877 | 579 | * @{ |
ganlikun | 0:13413ea9a877 | 580 | */ |
ganlikun | 0:13413ea9a877 | 581 | /* Blocking mode: Polling */ |
ganlikun | 0:13413ea9a877 | 582 | HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
ganlikun | 0:13413ea9a877 | 583 | HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
ganlikun | 0:13413ea9a877 | 584 | HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); |
ganlikun | 0:13413ea9a877 | 585 | /* Non-Blocking mode: IT */ |
ganlikun | 0:13413ea9a877 | 586 | HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
ganlikun | 0:13413ea9a877 | 587 | HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
ganlikun | 0:13413ea9a877 | 588 | /* Non-Blocking mode: DMA */ |
ganlikun | 0:13413ea9a877 | 589 | HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
ganlikun | 0:13413ea9a877 | 590 | HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
ganlikun | 0:13413ea9a877 | 591 | |
ganlikun | 0:13413ea9a877 | 592 | void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 593 | |
ganlikun | 0:13413ea9a877 | 594 | /* Callback in non blocking modes (DMA) */ |
ganlikun | 0:13413ea9a877 | 595 | void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 596 | void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 597 | void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 598 | void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 599 | /** |
ganlikun | 0:13413ea9a877 | 600 | * @} |
ganlikun | 0:13413ea9a877 | 601 | */ |
ganlikun | 0:13413ea9a877 | 602 | |
ganlikun | 0:13413ea9a877 | 603 | /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions |
ganlikun | 0:13413ea9a877 | 604 | * @{ |
ganlikun | 0:13413ea9a877 | 605 | */ |
ganlikun | 0:13413ea9a877 | 606 | HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); |
ganlikun | 0:13413ea9a877 | 607 | /** |
ganlikun | 0:13413ea9a877 | 608 | * @} |
ganlikun | 0:13413ea9a877 | 609 | */ |
ganlikun | 0:13413ea9a877 | 610 | |
ganlikun | 0:13413ea9a877 | 611 | /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions |
ganlikun | 0:13413ea9a877 | 612 | * @{ |
ganlikun | 0:13413ea9a877 | 613 | */ |
ganlikun | 0:13413ea9a877 | 614 | HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 615 | HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); |
ganlikun | 0:13413ea9a877 | 616 | HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); |
ganlikun | 0:13413ea9a877 | 617 | HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); |
ganlikun | 0:13413ea9a877 | 618 | /** |
ganlikun | 0:13413ea9a877 | 619 | * @} |
ganlikun | 0:13413ea9a877 | 620 | */ |
ganlikun | 0:13413ea9a877 | 621 | |
ganlikun | 0:13413ea9a877 | 622 | /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions |
ganlikun | 0:13413ea9a877 | 623 | * @{ |
ganlikun | 0:13413ea9a877 | 624 | */ |
ganlikun | 0:13413ea9a877 | 625 | HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 626 | uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 627 | /** |
ganlikun | 0:13413ea9a877 | 628 | * @} |
ganlikun | 0:13413ea9a877 | 629 | */ |
ganlikun | 0:13413ea9a877 | 630 | |
ganlikun | 0:13413ea9a877 | 631 | /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management |
ganlikun | 0:13413ea9a877 | 632 | * @{ |
ganlikun | 0:13413ea9a877 | 633 | */ |
ganlikun | 0:13413ea9a877 | 634 | HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 635 | HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); |
ganlikun | 0:13413ea9a877 | 636 | /** |
ganlikun | 0:13413ea9a877 | 637 | * @} |
ganlikun | 0:13413ea9a877 | 638 | */ |
ganlikun | 0:13413ea9a877 | 639 | |
ganlikun | 0:13413ea9a877 | 640 | /* Private types -------------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 641 | /** @defgroup MMC_Private_Types MMC Private Types |
ganlikun | 0:13413ea9a877 | 642 | * @{ |
ganlikun | 0:13413ea9a877 | 643 | */ |
ganlikun | 0:13413ea9a877 | 644 | |
ganlikun | 0:13413ea9a877 | 645 | /** |
ganlikun | 0:13413ea9a877 | 646 | * @} |
ganlikun | 0:13413ea9a877 | 647 | */ |
ganlikun | 0:13413ea9a877 | 648 | |
ganlikun | 0:13413ea9a877 | 649 | /* Private defines -----------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 650 | /** @defgroup MMC_Private_Defines MMC Private Defines |
ganlikun | 0:13413ea9a877 | 651 | * @{ |
ganlikun | 0:13413ea9a877 | 652 | */ |
ganlikun | 0:13413ea9a877 | 653 | |
ganlikun | 0:13413ea9a877 | 654 | /** |
ganlikun | 0:13413ea9a877 | 655 | * @} |
ganlikun | 0:13413ea9a877 | 656 | */ |
ganlikun | 0:13413ea9a877 | 657 | |
ganlikun | 0:13413ea9a877 | 658 | /* Private variables ---------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 659 | /** @defgroup MMC_Private_Variables MMC Private Variables |
ganlikun | 0:13413ea9a877 | 660 | * @{ |
ganlikun | 0:13413ea9a877 | 661 | */ |
ganlikun | 0:13413ea9a877 | 662 | |
ganlikun | 0:13413ea9a877 | 663 | /** |
ganlikun | 0:13413ea9a877 | 664 | * @} |
ganlikun | 0:13413ea9a877 | 665 | */ |
ganlikun | 0:13413ea9a877 | 666 | |
ganlikun | 0:13413ea9a877 | 667 | /* Private constants ---------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 668 | /** @defgroup MMC_Private_Constants MMC Private Constants |
ganlikun | 0:13413ea9a877 | 669 | * @{ |
ganlikun | 0:13413ea9a877 | 670 | */ |
ganlikun | 0:13413ea9a877 | 671 | |
ganlikun | 0:13413ea9a877 | 672 | /** |
ganlikun | 0:13413ea9a877 | 673 | * @} |
ganlikun | 0:13413ea9a877 | 674 | */ |
ganlikun | 0:13413ea9a877 | 675 | |
ganlikun | 0:13413ea9a877 | 676 | /* Private macros ------------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 677 | /** @defgroup MMC_Private_Macros MMC Private Macros |
ganlikun | 0:13413ea9a877 | 678 | * @{ |
ganlikun | 0:13413ea9a877 | 679 | */ |
ganlikun | 0:13413ea9a877 | 680 | |
ganlikun | 0:13413ea9a877 | 681 | /** |
ganlikun | 0:13413ea9a877 | 682 | * @} |
ganlikun | 0:13413ea9a877 | 683 | */ |
ganlikun | 0:13413ea9a877 | 684 | |
ganlikun | 0:13413ea9a877 | 685 | /* Private functions prototypes ----------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 686 | /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes |
ganlikun | 0:13413ea9a877 | 687 | * @{ |
ganlikun | 0:13413ea9a877 | 688 | */ |
ganlikun | 0:13413ea9a877 | 689 | |
ganlikun | 0:13413ea9a877 | 690 | /** |
ganlikun | 0:13413ea9a877 | 691 | * @} |
ganlikun | 0:13413ea9a877 | 692 | */ |
ganlikun | 0:13413ea9a877 | 693 | |
ganlikun | 0:13413ea9a877 | 694 | /* Private functions ---------------------------------------------------------*/ |
ganlikun | 0:13413ea9a877 | 695 | /** @defgroup MMC_Private_Functions MMC Private Functions |
ganlikun | 0:13413ea9a877 | 696 | * @{ |
ganlikun | 0:13413ea9a877 | 697 | */ |
ganlikun | 0:13413ea9a877 | 698 | |
ganlikun | 0:13413ea9a877 | 699 | /** |
ganlikun | 0:13413ea9a877 | 700 | * @} |
ganlikun | 0:13413ea9a877 | 701 | */ |
ganlikun | 0:13413ea9a877 | 702 | |
ganlikun | 0:13413ea9a877 | 703 | /** |
ganlikun | 0:13413ea9a877 | 704 | * @} |
ganlikun | 0:13413ea9a877 | 705 | */ |
ganlikun | 0:13413ea9a877 | 706 | |
ganlikun | 0:13413ea9a877 | 707 | /** |
ganlikun | 0:13413ea9a877 | 708 | * @} |
ganlikun | 0:13413ea9a877 | 709 | */ |
ganlikun | 0:13413ea9a877 | 710 | |
ganlikun | 0:13413ea9a877 | 711 | /** |
ganlikun | 0:13413ea9a877 | 712 | * @} |
ganlikun | 0:13413ea9a877 | 713 | */ |
ganlikun | 0:13413ea9a877 | 714 | |
ganlikun | 0:13413ea9a877 | 715 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || |
ganlikun | 0:13413ea9a877 | 716 | STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || |
ganlikun | 0:13413ea9a877 | 717 | STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
ganlikun | 0:13413ea9a877 | 718 | |
ganlikun | 0:13413ea9a877 | 719 | #ifdef __cplusplus |
ganlikun | 0:13413ea9a877 | 720 | } |
ganlikun | 0:13413ea9a877 | 721 | #endif |
ganlikun | 0:13413ea9a877 | 722 | |
ganlikun | 0:13413ea9a877 | 723 | |
ganlikun | 0:13413ea9a877 | 724 | #endif /* __STM32F4xx_HAL_MMC_H */ |
ganlikun | 0:13413ea9a877 | 725 | |
ganlikun | 0:13413ea9a877 | 726 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
ganlikun | 0:13413ea9a877 | 727 |