001

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

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ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_i2s.h
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief Header file of I2S HAL module.
ganlikun 0:13413ea9a877 8 ******************************************************************************
ganlikun 0:13413ea9a877 9 * @attention
ganlikun 0:13413ea9a877 10 *
ganlikun 0:13413ea9a877 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 12 *
ganlikun 0:13413ea9a877 13 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 14 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 15 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 16 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 18 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 19 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 21 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 22 * without specific prior written permission.
ganlikun 0:13413ea9a877 23 *
ganlikun 0:13413ea9a877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 34 *
ganlikun 0:13413ea9a877 35 ******************************************************************************
ganlikun 0:13413ea9a877 36 */
ganlikun 0:13413ea9a877 37
ganlikun 0:13413ea9a877 38 /* Define to prevent recursive inclusion -------------------------------------*/
ganlikun 0:13413ea9a877 39 #ifndef __STM32F4xx_HAL_I2S_H
ganlikun 0:13413ea9a877 40 #define __STM32F4xx_HAL_I2S_H
ganlikun 0:13413ea9a877 41
ganlikun 0:13413ea9a877 42 #ifdef __cplusplus
ganlikun 0:13413ea9a877 43 extern "C" {
ganlikun 0:13413ea9a877 44 #endif
ganlikun 0:13413ea9a877 45
ganlikun 0:13413ea9a877 46 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 47 #include "stm32f4xx_hal_def.h"
ganlikun 0:13413ea9a877 48
ganlikun 0:13413ea9a877 49 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 50 * @{
ganlikun 0:13413ea9a877 51 */
ganlikun 0:13413ea9a877 52
ganlikun 0:13413ea9a877 53 /** @addtogroup I2S I2S
ganlikun 0:13413ea9a877 54 * @{
ganlikun 0:13413ea9a877 55 */
ganlikun 0:13413ea9a877 56
ganlikun 0:13413ea9a877 57 /* Exported types ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 58 /** @defgroup I2S_Exported_Types I2S Exported Types
ganlikun 0:13413ea9a877 59 * @{
ganlikun 0:13413ea9a877 60 */
ganlikun 0:13413ea9a877 61
ganlikun 0:13413ea9a877 62 /**
ganlikun 0:13413ea9a877 63 * @brief I2S Init structure definition
ganlikun 0:13413ea9a877 64 */
ganlikun 0:13413ea9a877 65 typedef struct
ganlikun 0:13413ea9a877 66 {
ganlikun 0:13413ea9a877 67 uint32_t Mode; /*!< Specifies the I2S operating mode.
ganlikun 0:13413ea9a877 68 This parameter can be a value of @ref I2S_Mode */
ganlikun 0:13413ea9a877 69
ganlikun 0:13413ea9a877 70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
ganlikun 0:13413ea9a877 71 This parameter can be a value of @ref I2S_Standard */
ganlikun 0:13413ea9a877 72
ganlikun 0:13413ea9a877 73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
ganlikun 0:13413ea9a877 74 This parameter can be a value of @ref I2S_Data_Format */
ganlikun 0:13413ea9a877 75
ganlikun 0:13413ea9a877 76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
ganlikun 0:13413ea9a877 77 This parameter can be a value of @ref I2S_MCLK_Output */
ganlikun 0:13413ea9a877 78
ganlikun 0:13413ea9a877 79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
ganlikun 0:13413ea9a877 80 This parameter can be a value of @ref I2S_Audio_Frequency */
ganlikun 0:13413ea9a877 81
ganlikun 0:13413ea9a877 82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
ganlikun 0:13413ea9a877 83 This parameter can be a value of @ref I2S_Clock_Polarity */
ganlikun 0:13413ea9a877 84
ganlikun 0:13413ea9a877 85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
ganlikun 0:13413ea9a877 86 This parameter can be a value of @ref I2S_Clock_Source */
ganlikun 0:13413ea9a877 87
ganlikun 0:13413ea9a877 88 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
ganlikun 0:13413ea9a877 89 This parameter can be a value of @ref I2S_FullDuplex_Mode */
ganlikun 0:13413ea9a877 90
ganlikun 0:13413ea9a877 91 }I2S_InitTypeDef;
ganlikun 0:13413ea9a877 92
ganlikun 0:13413ea9a877 93 /**
ganlikun 0:13413ea9a877 94 * @brief HAL State structures definition
ganlikun 0:13413ea9a877 95 */
ganlikun 0:13413ea9a877 96 typedef enum
ganlikun 0:13413ea9a877 97 {
ganlikun 0:13413ea9a877 98 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
ganlikun 0:13413ea9a877 99 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
ganlikun 0:13413ea9a877 100 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
ganlikun 0:13413ea9a877 101 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
ganlikun 0:13413ea9a877 102 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
ganlikun 0:13413ea9a877 103 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
ganlikun 0:13413ea9a877 104 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
ganlikun 0:13413ea9a877 105 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
ganlikun 0:13413ea9a877 106
ganlikun 0:13413ea9a877 107 }HAL_I2S_StateTypeDef;
ganlikun 0:13413ea9a877 108
ganlikun 0:13413ea9a877 109 /**
ganlikun 0:13413ea9a877 110 * @brief I2S handle Structure definition
ganlikun 0:13413ea9a877 111 */
ganlikun 0:13413ea9a877 112 typedef struct __I2S_HandleTypeDef
ganlikun 0:13413ea9a877 113 {
ganlikun 0:13413ea9a877 114 SPI_TypeDef *Instance; /*!< I2S registers base address */
ganlikun 0:13413ea9a877 115
ganlikun 0:13413ea9a877 116 I2S_InitTypeDef Init; /*!< I2S communication parameters */
ganlikun 0:13413ea9a877 117
ganlikun 0:13413ea9a877 118 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
ganlikun 0:13413ea9a877 119
ganlikun 0:13413ea9a877 120 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
ganlikun 0:13413ea9a877 121
ganlikun 0:13413ea9a877 122 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
ganlikun 0:13413ea9a877 123
ganlikun 0:13413ea9a877 124 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
ganlikun 0:13413ea9a877 125
ganlikun 0:13413ea9a877 126 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
ganlikun 0:13413ea9a877 127
ganlikun 0:13413ea9a877 128 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
ganlikun 0:13413ea9a877 129 (This field is initialized at the
ganlikun 0:13413ea9a877 130 same value as transfer size at the
ganlikun 0:13413ea9a877 131 beginning of the transfer and
ganlikun 0:13413ea9a877 132 decremented when a sample is received
ganlikun 0:13413ea9a877 133 NbSamplesReceived = RxBufferSize-RxBufferCount) */
ganlikun 0:13413ea9a877 134
ganlikun 0:13413ea9a877 135 void (*IrqHandlerISR) (struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */
ganlikun 0:13413ea9a877 136
ganlikun 0:13413ea9a877 137 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
ganlikun 0:13413ea9a877 138
ganlikun 0:13413ea9a877 139 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
ganlikun 0:13413ea9a877 140
ganlikun 0:13413ea9a877 141 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
ganlikun 0:13413ea9a877 142
ganlikun 0:13413ea9a877 143 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
ganlikun 0:13413ea9a877 144
ganlikun 0:13413ea9a877 145 __IO uint32_t ErrorCode; /*!< I2S Error code
ganlikun 0:13413ea9a877 146 This parameter can be a value of @ref I2S_ErrorCode */
ganlikun 0:13413ea9a877 147
ganlikun 0:13413ea9a877 148 }I2S_HandleTypeDef;
ganlikun 0:13413ea9a877 149 /**
ganlikun 0:13413ea9a877 150 * @}
ganlikun 0:13413ea9a877 151 */
ganlikun 0:13413ea9a877 152
ganlikun 0:13413ea9a877 153 /* Exported constants --------------------------------------------------------*/
ganlikun 0:13413ea9a877 154 /** @defgroup I2S_Exported_Constants I2S Exported Constants
ganlikun 0:13413ea9a877 155 * @{
ganlikun 0:13413ea9a877 156 */
ganlikun 0:13413ea9a877 157 /**
ganlikun 0:13413ea9a877 158 * @defgroup I2S_ErrorCode I2S Error Code
ganlikun 0:13413ea9a877 159 * @{
ganlikun 0:13413ea9a877 160 */
ganlikun 0:13413ea9a877 161 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
ganlikun 0:13413ea9a877 162 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
ganlikun 0:13413ea9a877 163 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
ganlikun 0:13413ea9a877 164 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
ganlikun 0:13413ea9a877 165 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
ganlikun 0:13413ea9a877 166 #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
ganlikun 0:13413ea9a877 167 /**
ganlikun 0:13413ea9a877 168 * @}
ganlikun 0:13413ea9a877 169 */
ganlikun 0:13413ea9a877 170
ganlikun 0:13413ea9a877 171 /** @defgroup I2S_Mode I2S Mode
ganlikun 0:13413ea9a877 172 * @{
ganlikun 0:13413ea9a877 173 */
ganlikun 0:13413ea9a877 174 #define I2S_MODE_SLAVE_TX (0x00000000U)
ganlikun 0:13413ea9a877 175 #define I2S_MODE_SLAVE_RX (0x00000100U)
ganlikun 0:13413ea9a877 176 #define I2S_MODE_MASTER_TX (0x00000200U)
ganlikun 0:13413ea9a877 177 #define I2S_MODE_MASTER_RX (0x00000300U)
ganlikun 0:13413ea9a877 178 /**
ganlikun 0:13413ea9a877 179 * @}
ganlikun 0:13413ea9a877 180 */
ganlikun 0:13413ea9a877 181
ganlikun 0:13413ea9a877 182 /** @defgroup I2S_Standard I2S Standard
ganlikun 0:13413ea9a877 183 * @{
ganlikun 0:13413ea9a877 184 */
ganlikun 0:13413ea9a877 185 #define I2S_STANDARD_PHILIPS (0x00000000U)
ganlikun 0:13413ea9a877 186 #define I2S_STANDARD_MSB (0x00000010U)
ganlikun 0:13413ea9a877 187 #define I2S_STANDARD_LSB (0x00000020U)
ganlikun 0:13413ea9a877 188 #define I2S_STANDARD_PCM_SHORT (0x00000030U)
ganlikun 0:13413ea9a877 189 #define I2S_STANDARD_PCM_LONG (0x000000B0U)
ganlikun 0:13413ea9a877 190 /**
ganlikun 0:13413ea9a877 191 * @}
ganlikun 0:13413ea9a877 192 */
ganlikun 0:13413ea9a877 193
ganlikun 0:13413ea9a877 194 /** @defgroup I2S_Data_Format I2S Data Format
ganlikun 0:13413ea9a877 195 * @{
ganlikun 0:13413ea9a877 196 */
ganlikun 0:13413ea9a877 197 #define I2S_DATAFORMAT_16B (0x00000000U)
ganlikun 0:13413ea9a877 198 #define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U)
ganlikun 0:13413ea9a877 199 #define I2S_DATAFORMAT_24B (0x00000003U)
ganlikun 0:13413ea9a877 200 #define I2S_DATAFORMAT_32B (0x00000005U)
ganlikun 0:13413ea9a877 201 /**
ganlikun 0:13413ea9a877 202 * @}
ganlikun 0:13413ea9a877 203 */
ganlikun 0:13413ea9a877 204
ganlikun 0:13413ea9a877 205 /** @defgroup I2S_MCLK_Output I2S Mclk Output
ganlikun 0:13413ea9a877 206 * @{
ganlikun 0:13413ea9a877 207 */
ganlikun 0:13413ea9a877 208 #define I2S_MCLKOUTPUT_ENABLE SPI_I2SPR_MCKOE
ganlikun 0:13413ea9a877 209 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
ganlikun 0:13413ea9a877 210 /**
ganlikun 0:13413ea9a877 211 * @}
ganlikun 0:13413ea9a877 212 */
ganlikun 0:13413ea9a877 213
ganlikun 0:13413ea9a877 214 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
ganlikun 0:13413ea9a877 215 * @{
ganlikun 0:13413ea9a877 216 */
ganlikun 0:13413ea9a877 217 #define I2S_AUDIOFREQ_192K (192000U)
ganlikun 0:13413ea9a877 218 #define I2S_AUDIOFREQ_96K (96000U)
ganlikun 0:13413ea9a877 219 #define I2S_AUDIOFREQ_48K (48000U)
ganlikun 0:13413ea9a877 220 #define I2S_AUDIOFREQ_44K (44100U)
ganlikun 0:13413ea9a877 221 #define I2S_AUDIOFREQ_32K (32000U)
ganlikun 0:13413ea9a877 222 #define I2S_AUDIOFREQ_22K (22050U)
ganlikun 0:13413ea9a877 223 #define I2S_AUDIOFREQ_16K (16000U)
ganlikun 0:13413ea9a877 224 #define I2S_AUDIOFREQ_11K (11025U)
ganlikun 0:13413ea9a877 225 #define I2S_AUDIOFREQ_8K (8000U)
ganlikun 0:13413ea9a877 226 #define I2S_AUDIOFREQ_DEFAULT (2U)
ganlikun 0:13413ea9a877 227 /**
ganlikun 0:13413ea9a877 228 * @}
ganlikun 0:13413ea9a877 229 */
ganlikun 0:13413ea9a877 230
ganlikun 0:13413ea9a877 231 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
ganlikun 0:13413ea9a877 232 * @{
ganlikun 0:13413ea9a877 233 */
ganlikun 0:13413ea9a877 234 #define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
ganlikun 0:13413ea9a877 235 #define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
ganlikun 0:13413ea9a877 236 /**
ganlikun 0:13413ea9a877 237 * @}
ganlikun 0:13413ea9a877 238 */
ganlikun 0:13413ea9a877 239
ganlikun 0:13413ea9a877 240 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
ganlikun 0:13413ea9a877 241 * @{
ganlikun 0:13413ea9a877 242 */
ganlikun 0:13413ea9a877 243 #define I2S_CPOL_LOW (0x00000000U)
ganlikun 0:13413ea9a877 244 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
ganlikun 0:13413ea9a877 245 /**
ganlikun 0:13413ea9a877 246 * @}
ganlikun 0:13413ea9a877 247 */
ganlikun 0:13413ea9a877 248
ganlikun 0:13413ea9a877 249 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
ganlikun 0:13413ea9a877 250 * @{
ganlikun 0:13413ea9a877 251 */
ganlikun 0:13413ea9a877 252 #define I2S_IT_TXE SPI_CR2_TXEIE
ganlikun 0:13413ea9a877 253 #define I2S_IT_RXNE SPI_CR2_RXNEIE
ganlikun 0:13413ea9a877 254 #define I2S_IT_ERR SPI_CR2_ERRIE
ganlikun 0:13413ea9a877 255 /**
ganlikun 0:13413ea9a877 256 * @}
ganlikun 0:13413ea9a877 257 */
ganlikun 0:13413ea9a877 258
ganlikun 0:13413ea9a877 259 /** @defgroup I2S_Flags_Definition I2S Flags Definition
ganlikun 0:13413ea9a877 260 * @{
ganlikun 0:13413ea9a877 261 */
ganlikun 0:13413ea9a877 262 #define I2S_FLAG_TXE SPI_SR_TXE
ganlikun 0:13413ea9a877 263 #define I2S_FLAG_RXNE SPI_SR_RXNE
ganlikun 0:13413ea9a877 264
ganlikun 0:13413ea9a877 265 #define I2S_FLAG_UDR SPI_SR_UDR
ganlikun 0:13413ea9a877 266 #define I2S_FLAG_OVR SPI_SR_OVR
ganlikun 0:13413ea9a877 267 #define I2S_FLAG_FRE SPI_SR_FRE
ganlikun 0:13413ea9a877 268
ganlikun 0:13413ea9a877 269 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
ganlikun 0:13413ea9a877 270 #define I2S_FLAG_BSY SPI_SR_BSY
ganlikun 0:13413ea9a877 271 /**
ganlikun 0:13413ea9a877 272 * @}
ganlikun 0:13413ea9a877 273 */
ganlikun 0:13413ea9a877 274 /** @defgroup I2S_Clock_Source I2S Clock Source Definition
ganlikun 0:13413ea9a877 275 * @{
ganlikun 0:13413ea9a877 276 */
ganlikun 0:13413ea9a877 277 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
ganlikun 0:13413ea9a877 278 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
ganlikun 0:13413ea9a877 279 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
ganlikun 0:13413ea9a877 280 defined(STM32F479xx)
ganlikun 0:13413ea9a877 281 #define I2S_CLOCK_PLL (0x00000000U)
ganlikun 0:13413ea9a877 282 #define I2S_CLOCK_EXTERNAL (0x00000001U)
ganlikun 0:13413ea9a877 283 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
ganlikun 0:13413ea9a877 284 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 285
ganlikun 0:13413ea9a877 286 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
ganlikun 0:13413ea9a877 287 defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 288 #define I2S_CLOCK_PLL (0x00000000U)
ganlikun 0:13413ea9a877 289 #define I2S_CLOCK_EXTERNAL (0x00000001U)
ganlikun 0:13413ea9a877 290 #define I2S_CLOCK_PLLR (0x00000002U)
ganlikun 0:13413ea9a877 291 #define I2S_CLOCK_PLLSRC (0x00000003U)
ganlikun 0:13413ea9a877 292 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 293
ganlikun 0:13413ea9a877 294 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 295 #define I2S_CLOCK_PLLSRC (0x00000000U)
ganlikun 0:13413ea9a877 296 #define I2S_CLOCK_EXTERNAL (0x00000001U)
ganlikun 0:13413ea9a877 297 #define I2S_CLOCK_PLLR (0x00000002U)
ganlikun 0:13413ea9a877 298 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 299 /**
ganlikun 0:13413ea9a877 300 * @}
ganlikun 0:13413ea9a877 301 */
ganlikun 0:13413ea9a877 302
ganlikun 0:13413ea9a877 303 /**
ganlikun 0:13413ea9a877 304 * @}
ganlikun 0:13413ea9a877 305 */
ganlikun 0:13413ea9a877 306
ganlikun 0:13413ea9a877 307 /* Exported macro ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 308 /** @defgroup I2S_Exported_Macros I2S Exported Macros
ganlikun 0:13413ea9a877 309 * @{
ganlikun 0:13413ea9a877 310 */
ganlikun 0:13413ea9a877 311
ganlikun 0:13413ea9a877 312 /** @brief Reset I2S handle state
ganlikun 0:13413ea9a877 313 * @param __HANDLE__: specifies the I2S Handle.
ganlikun 0:13413ea9a877 314 * @retval None
ganlikun 0:13413ea9a877 315 */
ganlikun 0:13413ea9a877 316 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
ganlikun 0:13413ea9a877 317
ganlikun 0:13413ea9a877 318 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
ganlikun 0:13413ea9a877 319 * @param __HANDLE__: specifies the I2S Handle.
ganlikun 0:13413ea9a877 320 * @retval None
ganlikun 0:13413ea9a877 321 */
ganlikun 0:13413ea9a877 322 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
ganlikun 0:13413ea9a877 323 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &=(uint16_t)(~SPI_I2SCFGR_I2SE))
ganlikun 0:13413ea9a877 324
ganlikun 0:13413ea9a877 325 /** @brief Enable or disable the specified I2S interrupts.
ganlikun 0:13413ea9a877 326 * @param __HANDLE__: specifies the I2S Handle.
ganlikun 0:13413ea9a877 327 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
ganlikun 0:13413ea9a877 328 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 329 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
ganlikun 0:13413ea9a877 330 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
ganlikun 0:13413ea9a877 331 * @arg I2S_IT_ERR: Error interrupt enable
ganlikun 0:13413ea9a877 332 * @retval None
ganlikun 0:13413ea9a877 333 */
ganlikun 0:13413ea9a877 334 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
ganlikun 0:13413ea9a877 335 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &=(uint16_t)(~(__INTERRUPT__)))
ganlikun 0:13413ea9a877 336
ganlikun 0:13413ea9a877 337 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
ganlikun 0:13413ea9a877 338 * @param __HANDLE__: specifies the I2S Handle.
ganlikun 0:13413ea9a877 339 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
ganlikun 0:13413ea9a877 340 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
ganlikun 0:13413ea9a877 341 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 342 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
ganlikun 0:13413ea9a877 343 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
ganlikun 0:13413ea9a877 344 * @arg I2S_IT_ERR: Error interrupt enable
ganlikun 0:13413ea9a877 345 * @retval The new state of __IT__ (TRUE or FALSE).
ganlikun 0:13413ea9a877 346 */
ganlikun 0:13413ea9a877 347 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
ganlikun 0:13413ea9a877 348
ganlikun 0:13413ea9a877 349 /** @brief Checks whether the specified I2S flag is set or not.
ganlikun 0:13413ea9a877 350 * @param __HANDLE__: specifies the I2S Handle.
ganlikun 0:13413ea9a877 351 * @param __FLAG__: specifies the flag to check.
ganlikun 0:13413ea9a877 352 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 353 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
ganlikun 0:13413ea9a877 354 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
ganlikun 0:13413ea9a877 355 * @arg I2S_FLAG_UDR: Underrun flag
ganlikun 0:13413ea9a877 356 * @arg I2S_FLAG_OVR: Overrun flag
ganlikun 0:13413ea9a877 357 * @arg I2S_FLAG_FRE: Frame error flag
ganlikun 0:13413ea9a877 358 * @arg I2S_FLAG_CHSIDE: Channel Side flag
ganlikun 0:13413ea9a877 359 * @arg I2S_FLAG_BSY: Busy flag
ganlikun 0:13413ea9a877 360 * @retval The new state of __FLAG__ (TRUE or FALSE).
ganlikun 0:13413ea9a877 361 */
ganlikun 0:13413ea9a877 362 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
ganlikun 0:13413ea9a877 363
ganlikun 0:13413ea9a877 364 /** @brief Clears the I2S OVR pending flag.
ganlikun 0:13413ea9a877 365 * @param __HANDLE__: specifies the I2S Handle.
ganlikun 0:13413ea9a877 366 * @retval None
ganlikun 0:13413ea9a877 367 */
ganlikun 0:13413ea9a877 368 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
ganlikun 0:13413ea9a877 369 do{ \
ganlikun 0:13413ea9a877 370 __IO uint32_t tmpreg = 0x00U; \
ganlikun 0:13413ea9a877 371 tmpreg = (__HANDLE__)->Instance->DR; \
ganlikun 0:13413ea9a877 372 tmpreg = (__HANDLE__)->Instance->SR; \
ganlikun 0:13413ea9a877 373 UNUSED(tmpreg); \
ganlikun 0:13413ea9a877 374 } while(0)
ganlikun 0:13413ea9a877 375
ganlikun 0:13413ea9a877 376 /** @brief Clears the I2S UDR pending flag.
ganlikun 0:13413ea9a877 377 * @param __HANDLE__: specifies the I2S Handle.
ganlikun 0:13413ea9a877 378 * @retval None
ganlikun 0:13413ea9a877 379 */
ganlikun 0:13413ea9a877 380 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
ganlikun 0:13413ea9a877 381 do{ \
ganlikun 0:13413ea9a877 382 __IO uint32_t tmpreg = 0x00U; \
ganlikun 0:13413ea9a877 383 tmpreg = (__HANDLE__)->Instance->SR; \
ganlikun 0:13413ea9a877 384 UNUSED(tmpreg); \
ganlikun 0:13413ea9a877 385 } while(0)
ganlikun 0:13413ea9a877 386 /**
ganlikun 0:13413ea9a877 387 * @}
ganlikun 0:13413ea9a877 388 */
ganlikun 0:13413ea9a877 389
ganlikun 0:13413ea9a877 390 /* Include I2S Extension module */
ganlikun 0:13413ea9a877 391 #include "stm32f4xx_hal_i2s_ex.h"
ganlikun 0:13413ea9a877 392
ganlikun 0:13413ea9a877 393 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 394 /** @defgroup I2S_Exported_Functions I2S Exported Functions
ganlikun 0:13413ea9a877 395 * @{
ganlikun 0:13413ea9a877 396 */
ganlikun 0:13413ea9a877 397
ganlikun 0:13413ea9a877 398 /** @defgroup I2S_Exported_Functions_Group1 I2S Initialization and de-initialization functions
ganlikun 0:13413ea9a877 399 * @{
ganlikun 0:13413ea9a877 400 */
ganlikun 0:13413ea9a877 401 /* Initialization/de-initialization functions **********************************/
ganlikun 0:13413ea9a877 402 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 403 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 404 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 405 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 406 /**
ganlikun 0:13413ea9a877 407 * @}
ganlikun 0:13413ea9a877 408 */
ganlikun 0:13413ea9a877 409
ganlikun 0:13413ea9a877 410 /** @defgroup I2S_Exported_Functions_Group2 I2S IO operation functions
ganlikun 0:13413ea9a877 411 * @{
ganlikun 0:13413ea9a877 412 */
ganlikun 0:13413ea9a877 413 /* I/O operation functions *****************************************************/
ganlikun 0:13413ea9a877 414 /* Blocking mode: Polling */
ganlikun 0:13413ea9a877 415 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
ganlikun 0:13413ea9a877 416 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
ganlikun 0:13413ea9a877 417
ganlikun 0:13413ea9a877 418 /* Non-Blocking mode: Interrupt */
ganlikun 0:13413ea9a877 419 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
ganlikun 0:13413ea9a877 420 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
ganlikun 0:13413ea9a877 421 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 422
ganlikun 0:13413ea9a877 423 /* Non-Blocking mode: DMA */
ganlikun 0:13413ea9a877 424 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
ganlikun 0:13413ea9a877 425 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
ganlikun 0:13413ea9a877 426
ganlikun 0:13413ea9a877 427 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 428 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 429 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 430
ganlikun 0:13413ea9a877 431 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
ganlikun 0:13413ea9a877 432 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 433 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 434 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 435 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 436 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 437 /**
ganlikun 0:13413ea9a877 438 * @}
ganlikun 0:13413ea9a877 439 */
ganlikun 0:13413ea9a877 440
ganlikun 0:13413ea9a877 441 /** @defgroup I2S_Exported_Functions_Group3 I2S Peripheral Control and State functions
ganlikun 0:13413ea9a877 442 * @{
ganlikun 0:13413ea9a877 443 */
ganlikun 0:13413ea9a877 444 /* Peripheral Control and State functions ************************************/
ganlikun 0:13413ea9a877 445 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 446 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
ganlikun 0:13413ea9a877 447 /**
ganlikun 0:13413ea9a877 448 * @}
ganlikun 0:13413ea9a877 449 */
ganlikun 0:13413ea9a877 450
ganlikun 0:13413ea9a877 451 /**
ganlikun 0:13413ea9a877 452 * @}
ganlikun 0:13413ea9a877 453 */
ganlikun 0:13413ea9a877 454
ganlikun 0:13413ea9a877 455 /* Private types -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 456 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 457 /* Private constants ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 458 /** @defgroup I2S_Private_Constants I2S Private Constants
ganlikun 0:13413ea9a877 459 * @{
ganlikun 0:13413ea9a877 460 */
ganlikun 0:13413ea9a877 461
ganlikun 0:13413ea9a877 462 /**
ganlikun 0:13413ea9a877 463 * @}
ganlikun 0:13413ea9a877 464 */
ganlikun 0:13413ea9a877 465
ganlikun 0:13413ea9a877 466 /* Private macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 467 /** @defgroup I2S_Private_Macros I2S Private Macros
ganlikun 0:13413ea9a877 468 * @{
ganlikun 0:13413ea9a877 469 */
ganlikun 0:13413ea9a877 470 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
ganlikun 0:13413ea9a877 471 ((MODE) == I2S_MODE_SLAVE_RX) || \
ganlikun 0:13413ea9a877 472 ((MODE) == I2S_MODE_MASTER_TX) || \
ganlikun 0:13413ea9a877 473 ((MODE) == I2S_MODE_MASTER_RX))
ganlikun 0:13413ea9a877 474
ganlikun 0:13413ea9a877 475 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
ganlikun 0:13413ea9a877 476 ((STANDARD) == I2S_STANDARD_MSB) || \
ganlikun 0:13413ea9a877 477 ((STANDARD) == I2S_STANDARD_LSB) || \
ganlikun 0:13413ea9a877 478 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
ganlikun 0:13413ea9a877 479 ((STANDARD) == I2S_STANDARD_PCM_LONG))
ganlikun 0:13413ea9a877 480
ganlikun 0:13413ea9a877 481 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
ganlikun 0:13413ea9a877 482 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
ganlikun 0:13413ea9a877 483 ((FORMAT) == I2S_DATAFORMAT_24B) || \
ganlikun 0:13413ea9a877 484 ((FORMAT) == I2S_DATAFORMAT_32B))
ganlikun 0:13413ea9a877 485
ganlikun 0:13413ea9a877 486 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
ganlikun 0:13413ea9a877 487 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
ganlikun 0:13413ea9a877 488
ganlikun 0:13413ea9a877 489 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
ganlikun 0:13413ea9a877 490 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
ganlikun 0:13413ea9a877 491 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
ganlikun 0:13413ea9a877 492
ganlikun 0:13413ea9a877 493 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
ganlikun 0:13413ea9a877 494 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
ganlikun 0:13413ea9a877 495
ganlikun 0:13413ea9a877 496 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
ganlikun 0:13413ea9a877 497 ((CPOL) == I2S_CPOL_HIGH))
ganlikun 0:13413ea9a877 498
ganlikun 0:13413ea9a877 499 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
ganlikun 0:13413ea9a877 500 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
ganlikun 0:13413ea9a877 501 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
ganlikun 0:13413ea9a877 502 defined(STM32F479xx)
ganlikun 0:13413ea9a877 503 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
ganlikun 0:13413ea9a877 504 ((CLOCK) == I2S_CLOCK_PLL))
ganlikun 0:13413ea9a877 505 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
ganlikun 0:13413ea9a877 506 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 507
ganlikun 0:13413ea9a877 508 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
ganlikun 0:13413ea9a877 509 defined(STM32F412Rx) || defined(STM32F412Cx) || defined (STM32F413xx) ||\
ganlikun 0:13413ea9a877 510 defined(STM32F423xx)
ganlikun 0:13413ea9a877 511 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
ganlikun 0:13413ea9a877 512 ((CLOCK) == I2S_CLOCK_PLL) ||\
ganlikun 0:13413ea9a877 513 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
ganlikun 0:13413ea9a877 514 ((CLOCK) == I2S_CLOCK_PLLR))
ganlikun 0:13413ea9a877 515 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 516
ganlikun 0:13413ea9a877 517 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 518 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
ganlikun 0:13413ea9a877 519 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
ganlikun 0:13413ea9a877 520 ((CLOCK) == I2S_CLOCK_PLLR))
ganlikun 0:13413ea9a877 521 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 522
ganlikun 0:13413ea9a877 523 /**
ganlikun 0:13413ea9a877 524 * @}
ganlikun 0:13413ea9a877 525 */
ganlikun 0:13413ea9a877 526
ganlikun 0:13413ea9a877 527 /* Private functions ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 528 /**
ganlikun 0:13413ea9a877 529 * @}
ganlikun 0:13413ea9a877 530 */
ganlikun 0:13413ea9a877 531
ganlikun 0:13413ea9a877 532 /**
ganlikun 0:13413ea9a877 533 * @}
ganlikun 0:13413ea9a877 534 */
ganlikun 0:13413ea9a877 535
ganlikun 0:13413ea9a877 536 #ifdef __cplusplus
ganlikun 0:13413ea9a877 537 }
ganlikun 0:13413ea9a877 538 #endif
ganlikun 0:13413ea9a877 539
ganlikun 0:13413ea9a877 540
ganlikun 0:13413ea9a877 541 #endif /* __STM32F4xx_HAL_I2S_H */
ganlikun 0:13413ea9a877 542
ganlikun 0:13413ea9a877 543 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 544