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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

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User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_hal_i2s.c
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief I2S HAL module driver.
ganlikun	0:13413ea9a877	8	* This file provides firmware functions to manage the following
ganlikun	0:13413ea9a877	9	* functionalities of the Integrated Interchip Sound (I2S) peripheral:
ganlikun	0:13413ea9a877	10	* + Initialization and de-initialization functions
ganlikun	0:13413ea9a877	11	* + IO operation functions
ganlikun	0:13413ea9a877	12	* + Peripheral State and Errors functions
ganlikun	0:13413ea9a877	13	@verbatim
ganlikun	0:13413ea9a877	14	===============================================================================
ganlikun	0:13413ea9a877	15	##### How to use this driver #####
ganlikun	0:13413ea9a877	16	===============================================================================
ganlikun	0:13413ea9a877	17	[..]
ganlikun	0:13413ea9a877	18	The I2S HAL driver can be used as follow:
ganlikun	0:13413ea9a877	19
ganlikun	0:13413ea9a877	20	(#) Declare a I2S_HandleTypeDef handle structure.
ganlikun	0:13413ea9a877	21	(#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
ganlikun	0:13413ea9a877	22	(##) Enable the SPIx interface clock.
ganlikun	0:13413ea9a877	23	(##) I2S pins configuration:
ganlikun	0:13413ea9a877	24	(+++) Enable the clock for the I2S GPIOs.
ganlikun	0:13413ea9a877	25	(+++) Configure these I2S pins as alternate function pull-up.
ganlikun	0:13413ea9a877	26	(##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
ganlikun	0:13413ea9a877	27	and HAL_I2S_Receive_IT() APIs).
ganlikun	0:13413ea9a877	28	(+++) Configure the I2Sx interrupt priority.
ganlikun	0:13413ea9a877	29	(+++) Enable the NVIC I2S IRQ handle.
ganlikun	0:13413ea9a877	30	(##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
ganlikun	0:13413ea9a877	31	and HAL_I2S_Receive_DMA() APIs:
ganlikun	0:13413ea9a877	32	(+++) Declare a DMA handle structure for the Tx/Rx stream.
ganlikun	0:13413ea9a877	33	(+++) Enable the DMAx interface clock.
ganlikun	0:13413ea9a877	34	(+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
ganlikun	0:13413ea9a877	35	(+++) Configure the DMA Tx/Rx Stream.
ganlikun	0:13413ea9a877	36	(+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle.
ganlikun	0:13413ea9a877	37	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
ganlikun	0:13413ea9a877	38	DMA Tx/Rx Stream.
ganlikun	0:13413ea9a877	39
ganlikun	0:13413ea9a877	40	(#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
ganlikun	0:13413ea9a877	41	using HAL_I2S_Init() function.
ganlikun	0:13413ea9a877	42
ganlikun	0:13413ea9a877	43	-@- The specific I2S interrupts (Transmission complete interrupt,
ganlikun	0:13413ea9a877	44	RXNE interrupt and Error Interrupts) will be managed using the macros
ganlikun	0:13413ea9a877	45	__HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
ganlikun	0:13413ea9a877	46	-@- Make sure that either:
ganlikun	0:13413ea9a877	47	(+@) I2S PLL is configured or
ganlikun	0:13413ea9a877	48	(+@) External clock source is configured after setting correctly
ganlikun	0:13413ea9a877	49	the define constant EXTERNAL_CLOCK_VALUE in the stm32f4xx_hal_conf.h file.
ganlikun	0:13413ea9a877	50
ganlikun	0:13413ea9a877	51	(#) Three operation modes are available within this driver :
ganlikun	0:13413ea9a877	52
ganlikun	0:13413ea9a877	53	* Polling mode IO operation *
ganlikun	0:13413ea9a877	54	=================================
ganlikun	0:13413ea9a877	55	[..]
ganlikun	0:13413ea9a877	56	(+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
ganlikun	0:13413ea9a877	57	(+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
ganlikun	0:13413ea9a877	58
ganlikun	0:13413ea9a877	59	* Interrupt mode IO operation *
ganlikun	0:13413ea9a877	60	===================================
ganlikun	0:13413ea9a877	61	[..]
ganlikun	0:13413ea9a877	62	(+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
ganlikun	0:13413ea9a877	63	(+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
ganlikun	0:13413ea9a877	64	add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
ganlikun	0:13413ea9a877	65	(+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
ganlikun	0:13413ea9a877	66	add his own code by customization of function pointer HAL_I2S_TxCpltCallback
ganlikun	0:13413ea9a877	67	(+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
ganlikun	0:13413ea9a877	68	(+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
ganlikun	0:13413ea9a877	69	add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
ganlikun	0:13413ea9a877	70	(+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
ganlikun	0:13413ea9a877	71	add his own code by customization of function pointer HAL_I2S_RxCpltCallback
ganlikun	0:13413ea9a877	72	(+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
ganlikun	0:13413ea9a877	73	add his own code by customization of function pointer HAL_I2S_ErrorCallback
ganlikun	0:13413ea9a877	74
ganlikun	0:13413ea9a877	75	* DMA mode IO operation *
ganlikun	0:13413ea9a877	76	==============================
ganlikun	0:13413ea9a877	77	[..]
ganlikun	0:13413ea9a877	78	(+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
ganlikun	0:13413ea9a877	79	(+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
ganlikun	0:13413ea9a877	80	add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
ganlikun	0:13413ea9a877	81	(+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
ganlikun	0:13413ea9a877	82	add his own code by customization of function pointer HAL_I2S_TxCpltCallback
ganlikun	0:13413ea9a877	83	(+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
ganlikun	0:13413ea9a877	84	(+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
ganlikun	0:13413ea9a877	85	add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
ganlikun	0:13413ea9a877	86	(+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
ganlikun	0:13413ea9a877	87	add his own code by customization of function pointer HAL_I2S_RxCpltCallback
ganlikun	0:13413ea9a877	88	(+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
ganlikun	0:13413ea9a877	89	add his own code by customization of function pointer HAL_I2S_ErrorCallback
ganlikun	0:13413ea9a877	90	(+) Pause the DMA Transfer using HAL_I2S_DMAPause()
ganlikun	0:13413ea9a877	91	(+) Resume the DMA Transfer using HAL_I2S_DMAResume()
ganlikun	0:13413ea9a877	92	(+) Stop the DMA Transfer using HAL_I2S_DMAStop()
ganlikun	0:13413ea9a877	93
ganlikun	0:13413ea9a877	94	* I2S HAL driver macros list *
ganlikun	0:13413ea9a877	95	=============================================
ganlikun	0:13413ea9a877	96	[..]
ganlikun	0:13413ea9a877	97	Below the list of most used macros in I2S HAL driver.
ganlikun	0:13413ea9a877	98
ganlikun	0:13413ea9a877	99	(+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
ganlikun	0:13413ea9a877	100	(+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
ganlikun	0:13413ea9a877	101	(+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
ganlikun	0:13413ea9a877	102	(+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
ganlikun	0:13413ea9a877	103	(+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
ganlikun	0:13413ea9a877	104
ganlikun	0:13413ea9a877	105	[..]
ganlikun	0:13413ea9a877	106	(@) You can refer to the I2S HAL driver header file for more useful macros
ganlikun	0:13413ea9a877	107
ganlikun	0:13413ea9a877	108	@endverbatim
ganlikun	0:13413ea9a877	109	******************************************************************************
ganlikun	0:13413ea9a877	110	* @attention
ganlikun	0:13413ea9a877	111	*
ganlikun	0:13413ea9a877	112	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	113	*
ganlikun	0:13413ea9a877	114	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	115	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	116	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	117	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	118	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	119	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	120	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	121	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	122	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	123	* without specific prior written permission.
ganlikun	0:13413ea9a877	124	*
ganlikun	0:13413ea9a877	125	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	126	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	127	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	128	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	129	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	130	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	131	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	132	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	133	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	134	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	135	*
ganlikun	0:13413ea9a877	136	******************************************************************************
ganlikun	0:13413ea9a877	137	*/
ganlikun	0:13413ea9a877	138
ganlikun	0:13413ea9a877	139	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	140	#include "stm32f4xx_hal.h"
ganlikun	0:13413ea9a877	141
ganlikun	0:13413ea9a877	142	/** @addtogroup STM32F4xx_HAL_Driver
ganlikun	0:13413ea9a877	143	* @{
ganlikun	0:13413ea9a877	144	*/
ganlikun	0:13413ea9a877	145
ganlikun	0:13413ea9a877	146	#ifdef HAL_I2S_MODULE_ENABLED
ganlikun	0:13413ea9a877	147
ganlikun	0:13413ea9a877	148	/** @defgroup I2S I2S
ganlikun	0:13413ea9a877	149	* @brief I2S HAL module driver
ganlikun	0:13413ea9a877	150	* @{
ganlikun	0:13413ea9a877	151	*/
ganlikun	0:13413ea9a877	152
ganlikun	0:13413ea9a877	153	/* Private typedef -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	154	/* Private define ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	155	/* Private macro -------------------------------------------------------------*/
ganlikun	0:13413ea9a877	156	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	157	/* Private function prototypes -----------------------------------------------*/
ganlikun	0:13413ea9a877	158
ganlikun	0:13413ea9a877	159	/** @addtogroup I2S_Private_Functions
ganlikun	0:13413ea9a877	160	* @{
ganlikun	0:13413ea9a877	161	*/
ganlikun	0:13413ea9a877	162	static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	163	static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	164	static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	165	static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	166	static void I2S_DMAError(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	167	static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
ganlikun	0:13413ea9a877	168	static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
ganlikun	0:13413ea9a877	169	static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
ganlikun	0:13413ea9a877	170	static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State,
ganlikun	0:13413ea9a877	171	uint32_t Timeout);
ganlikun	0:13413ea9a877	172	/**
ganlikun	0:13413ea9a877	173	* @}
ganlikun	0:13413ea9a877	174	*/
ganlikun	0:13413ea9a877	175
ganlikun	0:13413ea9a877	176	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	177	/** @addtogroup I2S_Exported_Functions I2S Exported Functions
ganlikun	0:13413ea9a877	178	* @{
ganlikun	0:13413ea9a877	179	*/
ganlikun	0:13413ea9a877	180
ganlikun	0:13413ea9a877	181	/** @addtogroup I2S_Exported_Functions_Group1
ganlikun	0:13413ea9a877	182	* @brief Initialization and Configuration functions
ganlikun	0:13413ea9a877	183	*
ganlikun	0:13413ea9a877	184	@verbatim
ganlikun	0:13413ea9a877	185	===============================================================================
ganlikun	0:13413ea9a877	186	##### Initialization and de-initialization functions #####
ganlikun	0:13413ea9a877	187	===============================================================================
ganlikun	0:13413ea9a877	188	[..] This subsection provides a set of functions allowing to initialize and
ganlikun	0:13413ea9a877	189	de-initialize the I2Sx peripheral in simplex mode:
ganlikun	0:13413ea9a877	190
ganlikun	0:13413ea9a877	191	(+) User must Implement HAL_I2S_MspInit() function in which he configures
ganlikun	0:13413ea9a877	192	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
ganlikun	0:13413ea9a877	193
ganlikun	0:13413ea9a877	194	(+) Call the function HAL_I2S_Init() to configure the selected device with
ganlikun	0:13413ea9a877	195	the selected configuration:
ganlikun	0:13413ea9a877	196	(++) Mode
ganlikun	0:13413ea9a877	197	(++) Standard
ganlikun	0:13413ea9a877	198	(++) Data Format
ganlikun	0:13413ea9a877	199	(++) MCLK Output
ganlikun	0:13413ea9a877	200	(++) Audio frequency
ganlikun	0:13413ea9a877	201	(++) Polarity
ganlikun	0:13413ea9a877	202	(++) Full duplex mode
ganlikun	0:13413ea9a877	203
ganlikun	0:13413ea9a877	204	(+) Call the function HAL_I2S_DeInit() to restore the default configuration
ganlikun	0:13413ea9a877	205	of the selected I2Sx peripheral.
ganlikun	0:13413ea9a877	206	@endverbatim
ganlikun	0:13413ea9a877	207	* @{
ganlikun	0:13413ea9a877	208	*/
ganlikun	0:13413ea9a877	209
ganlikun	0:13413ea9a877	210	/**
ganlikun	0:13413ea9a877	211	* @brief Initializes the I2S according to the specified parameters
ganlikun	0:13413ea9a877	212	* in the I2S_InitTypeDef and create the associated handle.
ganlikun	0:13413ea9a877	213	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	214	* the configuration information for I2S module
ganlikun	0:13413ea9a877	215	* @retval HAL status
ganlikun	0:13413ea9a877	216	*/
ganlikun	0:13413ea9a877	217	HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	218	{
ganlikun	0:13413ea9a877	219	uint32_t tmpreg = 0U, i2sdiv = 2U, i2sodd = 0U, packetlength = 16U;
ganlikun	0:13413ea9a877	220	uint32_t tmp = 0U, i2sclk = 0U;
ganlikun	0:13413ea9a877	221
ganlikun	0:13413ea9a877	222	/* Check the I2S handle allocation */
ganlikun	0:13413ea9a877	223	if(hi2s == NULL)
ganlikun	0:13413ea9a877	224	{
ganlikun	0:13413ea9a877	225	return HAL_ERROR;
ganlikun	0:13413ea9a877	226	}
ganlikun	0:13413ea9a877	227
ganlikun	0:13413ea9a877	228	/* Check the I2S parameters */
ganlikun	0:13413ea9a877	229	assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
ganlikun	0:13413ea9a877	230	assert_param(IS_I2S_MODE(hi2s->Init.Mode));
ganlikun	0:13413ea9a877	231	assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
ganlikun	0:13413ea9a877	232	assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
ganlikun	0:13413ea9a877	233	assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
ganlikun	0:13413ea9a877	234	assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
ganlikun	0:13413ea9a877	235	assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
ganlikun	0:13413ea9a877	236	assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
ganlikun	0:13413ea9a877	237
ganlikun	0:13413ea9a877	238	hi2s->State = HAL_I2S_STATE_BUSY;
ganlikun	0:13413ea9a877	239
ganlikun	0:13413ea9a877	240	/* Initialize Default I2S IrqHandler ISR */
ganlikun	0:13413ea9a877	241	hi2s->IrqHandlerISR = I2S_IRQHandler;
ganlikun	0:13413ea9a877	242
ganlikun	0:13413ea9a877	243	/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
ganlikun	0:13413ea9a877	244	HAL_I2S_MspInit(hi2s);
ganlikun	0:13413ea9a877	245
ganlikun	0:13413ea9a877	246	/----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------/
ganlikun	0:13413ea9a877	247	/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
ganlikun	0:13413ea9a877	248	CLEAR_BIT(hi2s->Instance->I2SCFGR,(SPI_I2SCFGR_CHLEN \| SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CKPOL \| \
ganlikun	0:13413ea9a877	249	SPI_I2SCFGR_I2SSTD \| SPI_I2SCFGR_PCMSYNC \| SPI_I2SCFGR_I2SCFG \| \
ganlikun	0:13413ea9a877	250	SPI_I2SCFGR_I2SE \| SPI_I2SCFGR_I2SMOD));
ganlikun	0:13413ea9a877	251	hi2s->Instance->I2SPR = 0x0002U;
ganlikun	0:13413ea9a877	252
ganlikun	0:13413ea9a877	253	/* Get the I2SCFGR register value */
ganlikun	0:13413ea9a877	254	tmpreg = hi2s->Instance->I2SCFGR;
ganlikun	0:13413ea9a877	255
ganlikun	0:13413ea9a877	256	/* If the default frequency value has to be written, reinitialize i2sdiv and i2sodd */
ganlikun	0:13413ea9a877	257	/* If the requested audio frequency is not the default, compute the prescaler */
ganlikun	0:13413ea9a877	258	if(hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
ganlikun	0:13413ea9a877	259	{
ganlikun	0:13413ea9a877	260	/* Check the frame length (For the Prescaler computing) *******************/
ganlikun	0:13413ea9a877	261	/* Set I2S Packet Length value*/
ganlikun	0:13413ea9a877	262	if(hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
ganlikun	0:13413ea9a877	263	{
ganlikun	0:13413ea9a877	264	/* Packet length is 32 bits */
ganlikun	0:13413ea9a877	265	packetlength = 32U;
ganlikun	0:13413ea9a877	266	}
ganlikun	0:13413ea9a877	267	else
ganlikun	0:13413ea9a877	268	{
ganlikun	0:13413ea9a877	269	/* Packet length is 16 bits */
ganlikun	0:13413ea9a877	270	packetlength = 16U;
ganlikun	0:13413ea9a877	271	}
ganlikun	0:13413ea9a877	272
ganlikun	0:13413ea9a877	273	/* I2S standard */
ganlikun	0:13413ea9a877	274	if(hi2s->Init.Standard <= I2S_STANDARD_LSB)
ganlikun	0:13413ea9a877	275	{
ganlikun	0:13413ea9a877	276	/* In I2S standard packet lenght is multiplied by 2 */
ganlikun	0:13413ea9a877	277	packetlength = packetlength * 2U;
ganlikun	0:13413ea9a877	278	}
ganlikun	0:13413ea9a877	279
ganlikun	0:13413ea9a877	280	/* Get I2S source Clock frequency from RCC ********************************/
ganlikun	0:13413ea9a877	281	#if defined(I2S_APB1_APB2_FEATURE)
ganlikun	0:13413ea9a877	282	if(IS_I2S_APB1_INSTANCE(hi2s->Instance))
ganlikun	0:13413ea9a877	283	{
ganlikun	0:13413ea9a877	284	i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S_APB1);
ganlikun	0:13413ea9a877	285	}
ganlikun	0:13413ea9a877	286	else
ganlikun	0:13413ea9a877	287	{
ganlikun	0:13413ea9a877	288	i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S_APB2);
ganlikun	0:13413ea9a877	289	}
ganlikun	0:13413ea9a877	290	#else
ganlikun	0:13413ea9a877	291	i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S);
ganlikun	0:13413ea9a877	292	#endif
ganlikun	0:13413ea9a877	293
ganlikun	0:13413ea9a877	294	/* Compute the Real divider depending on the MCLK output state, with a floating point */
ganlikun	0:13413ea9a877	295	if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
ganlikun	0:13413ea9a877	296	{
ganlikun	0:13413ea9a877	297	/* MCLK output is enabled */
ganlikun	0:13413ea9a877	298	if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
ganlikun	0:13413ea9a877	299	{
ganlikun	0:13413ea9a877	300	tmp = (uint32_t)(((((i2sclk / (packetlength4)) 10) / hi2s->Init.AudioFreq)) + 5);
ganlikun	0:13413ea9a877	301	}
ganlikun	0:13413ea9a877	302	else
ganlikun	0:13413ea9a877	303	{
ganlikun	0:13413ea9a877	304	tmp = (uint32_t)(((((i2sclk / (packetlength8)) 10) / hi2s->Init.AudioFreq)) + 5);
ganlikun	0:13413ea9a877	305	}
ganlikun	0:13413ea9a877	306	}
ganlikun	0:13413ea9a877	307	else
ganlikun	0:13413ea9a877	308	{
ganlikun	0:13413ea9a877	309	/* MCLK output is disabled */
ganlikun	0:13413ea9a877	310	tmp = (uint32_t)(((((i2sclk / packetlength) *10 ) / hi2s->Init.AudioFreq)) + 5);
ganlikun	0:13413ea9a877	311	}
ganlikun	0:13413ea9a877	312
ganlikun	0:13413ea9a877	313	/* Remove the flatting point */
ganlikun	0:13413ea9a877	314	tmp = tmp / 10U;
ganlikun	0:13413ea9a877	315
ganlikun	0:13413ea9a877	316	/* Check the parity of the divider */
ganlikun	0:13413ea9a877	317	i2sodd = (uint16_t)(tmp & (uint16_t)1U);
ganlikun	0:13413ea9a877	318
ganlikun	0:13413ea9a877	319	/* Compute the i2sdiv prescaler */
ganlikun	0:13413ea9a877	320	i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);
ganlikun	0:13413ea9a877	321
ganlikun	0:13413ea9a877	322	/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
ganlikun	0:13413ea9a877	323	i2sodd = (uint32_t) (i2sodd << 8U);
ganlikun	0:13413ea9a877	324	}
ganlikun	0:13413ea9a877	325
ganlikun	0:13413ea9a877	326	/* Test if the divider is 1 or 0 or greater than 0xFF */
ganlikun	0:13413ea9a877	327	if((i2sdiv < 2U) \|\| (i2sdiv > 0xFFU))
ganlikun	0:13413ea9a877	328	{
ganlikun	0:13413ea9a877	329	/* Set the default values */
ganlikun	0:13413ea9a877	330	i2sdiv = 2U;
ganlikun	0:13413ea9a877	331	i2sodd = 0U;
ganlikun	0:13413ea9a877	332
ganlikun	0:13413ea9a877	333	/* Set the error code and execute error callback*/
ganlikun	0:13413ea9a877	334	SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_PRESCALER);
ganlikun	0:13413ea9a877	335	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	336	return HAL_ERROR;
ganlikun	0:13413ea9a877	337	}
ganlikun	0:13413ea9a877	338
ganlikun	0:13413ea9a877	339	/* Write to SPIx I2SPR register the computed value */
ganlikun	0:13413ea9a877	340	hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv \| (uint32_t)(i2sodd \| (uint32_t)hi2s->Init.MCLKOutput));
ganlikun	0:13413ea9a877	341
ganlikun	0:13413ea9a877	342	/* Configure the I2S with the I2S_InitStruct values */
ganlikun	0:13413ea9a877	343	tmpreg \|= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD \| (uint16_t)(hi2s->Init.Mode \| \
ganlikun	0:13413ea9a877	344	(uint16_t)(hi2s->Init.Standard \| (uint16_t)(hi2s->Init.DataFormat \| \
ganlikun	0:13413ea9a877	345	(uint16_t)hi2s->Init.CPOL))));
ganlikun	0:13413ea9a877	346
ganlikun	0:13413ea9a877	347	#if defined(SPI_I2SCFGR_ASTRTEN)
ganlikun	0:13413ea9a877	348	if ((hi2s->Init.Standard == I2S_STANDARD_PCM_SHORT) \|\|(hi2s->Init.Standard == I2S_STANDARD_PCM_LONG))
ganlikun	0:13413ea9a877	349	{
ganlikun	0:13413ea9a877	350	/* Write to SPIx I2SCFGR */
ganlikun	0:13413ea9a877	351	WRITE_REG(hi2s->Instance->I2SCFGR,(tmpreg \| SPI_I2SCFGR_ASTRTEN));
ganlikun	0:13413ea9a877	352	}
ganlikun	0:13413ea9a877	353	else
ganlikun	0:13413ea9a877	354	{
ganlikun	0:13413ea9a877	355	/* Write to SPIx I2SCFGR */
ganlikun	0:13413ea9a877	356	WRITE_REG(hi2s->Instance->I2SCFGR,tmpreg);
ganlikun	0:13413ea9a877	357	}
ganlikun	0:13413ea9a877	358	#else
ganlikun	0:13413ea9a877	359	/* Write to SPIx I2SCFGR */
ganlikun	0:13413ea9a877	360	WRITE_REG(hi2s->Instance->I2SCFGR, tmpreg);
ganlikun	0:13413ea9a877	361	#endif
ganlikun	0:13413ea9a877	362
ganlikun	0:13413ea9a877	363	#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
ganlikun	0:13413ea9a877	364
ganlikun	0:13413ea9a877	365	/* Configure the I2S extended if the full duplex mode is enabled */
ganlikun	0:13413ea9a877	366	assert_param(IS_I2S_FULLDUPLEX_MODE(hi2s->Init.FullDuplexMode));
ganlikun	0:13413ea9a877	367
ganlikun	0:13413ea9a877	368	if(hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
ganlikun	0:13413ea9a877	369	{
ganlikun	0:13413ea9a877	370	/* Set FullDuplex I2S IrqHandler ISR if FULLDUPLEXMODE is enabled */
ganlikun	0:13413ea9a877	371	hi2s->IrqHandlerISR = HAL_I2SEx_FullDuplex_IRQHandler;
ganlikun	0:13413ea9a877	372
ganlikun	0:13413ea9a877	373	/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
ganlikun	0:13413ea9a877	374	CLEAR_BIT(I2SxEXT(hi2s->Instance)->I2SCFGR,(SPI_I2SCFGR_CHLEN \| SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CKPOL \| \
ganlikun	0:13413ea9a877	375	SPI_I2SCFGR_I2SSTD \| SPI_I2SCFGR_PCMSYNC \| SPI_I2SCFGR_I2SCFG \| \
ganlikun	0:13413ea9a877	376	SPI_I2SCFGR_I2SE \| SPI_I2SCFGR_I2SMOD));
ganlikun	0:13413ea9a877	377	I2SxEXT(hi2s->Instance)->I2SPR = 2U;
ganlikun	0:13413ea9a877	378
ganlikun	0:13413ea9a877	379	/* Get the I2SCFGR register value */
ganlikun	0:13413ea9a877	380	tmpreg = I2SxEXT(hi2s->Instance)->I2SCFGR;
ganlikun	0:13413ea9a877	381
ganlikun	0:13413ea9a877	382	/* Get the mode to be configured for the extended I2S */
ganlikun	0:13413ea9a877	383	if((hi2s->Init.Mode == I2S_MODE_MASTER_TX) \|\| (hi2s->Init.Mode == I2S_MODE_SLAVE_TX))
ganlikun	0:13413ea9a877	384	{
ganlikun	0:13413ea9a877	385	tmp = I2S_MODE_SLAVE_RX;
ganlikun	0:13413ea9a877	386	}
ganlikun	0:13413ea9a877	387	else /* I2S_MODE_MASTER_RX \|\| I2S_MODE_SLAVE_RX */
ganlikun	0:13413ea9a877	388	{
ganlikun	0:13413ea9a877	389	tmp = I2S_MODE_SLAVE_TX;
ganlikun	0:13413ea9a877	390	}
ganlikun	0:13413ea9a877	391
ganlikun	0:13413ea9a877	392	/* Configure the I2S Slave with the I2S Master parameter values */
ganlikun	0:13413ea9a877	393	tmpreg \|= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD \| (uint16_t)(tmp \| \
ganlikun	0:13413ea9a877	394	(uint16_t)(hi2s->Init.Standard \| (uint16_t)(hi2s->Init.DataFormat \| \
ganlikun	0:13413ea9a877	395	(uint16_t)hi2s->Init.CPOL))));
ganlikun	0:13413ea9a877	396
ganlikun	0:13413ea9a877	397	/* Write to SPIx I2SCFGR */
ganlikun	0:13413ea9a877	398	WRITE_REG(I2SxEXT(hi2s->Instance)->I2SCFGR,tmpreg);
ganlikun	0:13413ea9a877	399	}
ganlikun	0:13413ea9a877	400	#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
ganlikun	0:13413ea9a877	401
ganlikun	0:13413ea9a877	402	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	403	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	404
ganlikun	0:13413ea9a877	405	return HAL_OK;
ganlikun	0:13413ea9a877	406	}
ganlikun	0:13413ea9a877	407
ganlikun	0:13413ea9a877	408	/**
ganlikun	0:13413ea9a877	409	* @brief DeInitializes the I2S peripheral
ganlikun	0:13413ea9a877	410	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	411	* the configuration information for I2S module
ganlikun	0:13413ea9a877	412	* @retval HAL status
ganlikun	0:13413ea9a877	413	*/
ganlikun	0:13413ea9a877	414	HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	415	{
ganlikun	0:13413ea9a877	416	/* Check the I2S handle allocation */
ganlikun	0:13413ea9a877	417	if(hi2s == NULL)
ganlikun	0:13413ea9a877	418	{
ganlikun	0:13413ea9a877	419	return HAL_ERROR;
ganlikun	0:13413ea9a877	420	}
ganlikun	0:13413ea9a877	421
ganlikun	0:13413ea9a877	422	hi2s->State = HAL_I2S_STATE_BUSY;
ganlikun	0:13413ea9a877	423
ganlikun	0:13413ea9a877	424	/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
ganlikun	0:13413ea9a877	425	HAL_I2S_MspDeInit(hi2s);
ganlikun	0:13413ea9a877	426
ganlikun	0:13413ea9a877	427	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	428	hi2s->State = HAL_I2S_STATE_RESET;
ganlikun	0:13413ea9a877	429
ganlikun	0:13413ea9a877	430	/* Release Lock */
ganlikun	0:13413ea9a877	431	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	432
ganlikun	0:13413ea9a877	433	return HAL_OK;
ganlikun	0:13413ea9a877	434	}
ganlikun	0:13413ea9a877	435
ganlikun	0:13413ea9a877	436	/**
ganlikun	0:13413ea9a877	437	* @brief I2S MSP Init
ganlikun	0:13413ea9a877	438	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	439	* the configuration information for I2S module
ganlikun	0:13413ea9a877	440	* @retval None
ganlikun	0:13413ea9a877	441	*/
ganlikun	0:13413ea9a877	442	__weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	443	{
ganlikun	0:13413ea9a877	444	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	445	UNUSED(hi2s);
ganlikun	0:13413ea9a877	446	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	447	the HAL_I2S_MspInit could be implemented in the user file
ganlikun	0:13413ea9a877	448	*/
ganlikun	0:13413ea9a877	449	}
ganlikun	0:13413ea9a877	450
ganlikun	0:13413ea9a877	451	/**
ganlikun	0:13413ea9a877	452	* @brief I2S MSP DeInit
ganlikun	0:13413ea9a877	453	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	454	* the configuration information for I2S module
ganlikun	0:13413ea9a877	455	* @retval None
ganlikun	0:13413ea9a877	456	*/
ganlikun	0:13413ea9a877	457	__weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	458	{
ganlikun	0:13413ea9a877	459	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	460	UNUSED(hi2s);
ganlikun	0:13413ea9a877	461	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	462	the HAL_I2S_MspDeInit could be implemented in the user file
ganlikun	0:13413ea9a877	463	*/
ganlikun	0:13413ea9a877	464	}
ganlikun	0:13413ea9a877	465	/**
ganlikun	0:13413ea9a877	466	* @}
ganlikun	0:13413ea9a877	467	*/
ganlikun	0:13413ea9a877	468
ganlikun	0:13413ea9a877	469	/** @addtogroup I2S_Exported_Functions_Group2
ganlikun	0:13413ea9a877	470	* @brief Data transfers functions
ganlikun	0:13413ea9a877	471	*
ganlikun	0:13413ea9a877	472	@verbatim
ganlikun	0:13413ea9a877	473	===============================================================================
ganlikun	0:13413ea9a877	474	##### IO operation functions #####
ganlikun	0:13413ea9a877	475	===============================================================================
ganlikun	0:13413ea9a877	476	[..]
ganlikun	0:13413ea9a877	477	This subsection provides a set of functions allowing to manage the I2S data
ganlikun	0:13413ea9a877	478	transfers.
ganlikun	0:13413ea9a877	479
ganlikun	0:13413ea9a877	480	(#) There are two modes of transfer:
ganlikun	0:13413ea9a877	481	(++) Blocking mode : The communication is performed in the polling mode.
ganlikun	0:13413ea9a877	482	The status of all data processing is returned by the same function
ganlikun	0:13413ea9a877	483	after finishing transfer.
ganlikun	0:13413ea9a877	484	(++) No-Blocking mode : The communication is performed using Interrupts
ganlikun	0:13413ea9a877	485	or DMA. These functions return the status of the transfer startup.
ganlikun	0:13413ea9a877	486	The end of the data processing will be indicated through the
ganlikun	0:13413ea9a877	487	dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
ganlikun	0:13413ea9a877	488	using DMA mode.
ganlikun	0:13413ea9a877	489
ganlikun	0:13413ea9a877	490	(#) Blocking mode functions are :
ganlikun	0:13413ea9a877	491	(++) HAL_I2S_Transmit()
ganlikun	0:13413ea9a877	492	(++) HAL_I2S_Receive()
ganlikun	0:13413ea9a877	493
ganlikun	0:13413ea9a877	494	(#) No-Blocking mode functions with Interrupt are :
ganlikun	0:13413ea9a877	495	(++) HAL_I2S_Transmit_IT()
ganlikun	0:13413ea9a877	496	(++) HAL_I2S_Receive_IT()
ganlikun	0:13413ea9a877	497
ganlikun	0:13413ea9a877	498	(#) No-Blocking mode functions with DMA are :
ganlikun	0:13413ea9a877	499	(++) HAL_I2S_Transmit_DMA()
ganlikun	0:13413ea9a877	500	(++) HAL_I2S_Receive_DMA()
ganlikun	0:13413ea9a877	501
ganlikun	0:13413ea9a877	502	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
ganlikun	0:13413ea9a877	503	(++) HAL_I2S_TxCpltCallback()
ganlikun	0:13413ea9a877	504	(++) HAL_I2S_RxCpltCallback()
ganlikun	0:13413ea9a877	505	(++) HAL_I2S_ErrorCallback()
ganlikun	0:13413ea9a877	506
ganlikun	0:13413ea9a877	507	@endverbatim
ganlikun	0:13413ea9a877	508	* @{
ganlikun	0:13413ea9a877	509	*/
ganlikun	0:13413ea9a877	510
ganlikun	0:13413ea9a877	511	/**
ganlikun	0:13413ea9a877	512	* @brief Transmit an amount of data in blocking mode
ganlikun	0:13413ea9a877	513	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	514	* the configuration information for I2S module
ganlikun	0:13413ea9a877	515	* @param pData: a 16-bit pointer to data buffer.
ganlikun	0:13413ea9a877	516	* @param Size: number of data sample to be sent:
ganlikun	0:13413ea9a877	517	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
ganlikun	0:13413ea9a877	518	* configuration phase, the Size parameter means the number of 16-bit data length
ganlikun	0:13413ea9a877	519	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
ganlikun	0:13413ea9a877	520	* the Size parameter means the number of 16-bit data length.
ganlikun	0:13413ea9a877	521	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	522	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
ganlikun	0:13413ea9a877	523	* between Master and Slave(example: audio streaming).
ganlikun	0:13413ea9a877	524	* @retval HAL status
ganlikun	0:13413ea9a877	525	*/
ganlikun	0:13413ea9a877	526	HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout)
ganlikun	0:13413ea9a877	527	{
ganlikun	0:13413ea9a877	528	uint32_t tmp1 = 0U;
ganlikun	0:13413ea9a877	529
ganlikun	0:13413ea9a877	530	if((pData == NULL ) \|\| (Size == 0U))
ganlikun	0:13413ea9a877	531	{
ganlikun	0:13413ea9a877	532	return HAL_ERROR;
ganlikun	0:13413ea9a877	533	}
ganlikun	0:13413ea9a877	534
ganlikun	0:13413ea9a877	535	if(hi2s->State == HAL_I2S_STATE_READY)
ganlikun	0:13413ea9a877	536	{
ganlikun	0:13413ea9a877	537	tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN);
ganlikun	0:13413ea9a877	538
ganlikun	0:13413ea9a877	539	if((tmp1 == I2S_DATAFORMAT_24B) \|\| (tmp1 == I2S_DATAFORMAT_32B))
ganlikun	0:13413ea9a877	540	{
ganlikun	0:13413ea9a877	541	hi2s->TxXferSize = (Size << 1U);
ganlikun	0:13413ea9a877	542	hi2s->TxXferCount = (Size << 1U);
ganlikun	0:13413ea9a877	543	}
ganlikun	0:13413ea9a877	544	else
ganlikun	0:13413ea9a877	545	{
ganlikun	0:13413ea9a877	546	hi2s->TxXferSize = Size;
ganlikun	0:13413ea9a877	547	hi2s->TxXferCount = Size;
ganlikun	0:13413ea9a877	548	}
ganlikun	0:13413ea9a877	549
ganlikun	0:13413ea9a877	550	/* Process Locked */
ganlikun	0:13413ea9a877	551	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	552
ganlikun	0:13413ea9a877	553	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	554	hi2s->State = HAL_I2S_STATE_BUSY_TX;
ganlikun	0:13413ea9a877	555
ganlikun	0:13413ea9a877	556	/* Check if the I2S is already enabled */
ganlikun	0:13413ea9a877	557	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
ganlikun	0:13413ea9a877	558	{
ganlikun	0:13413ea9a877	559	/* Enable I2S peripheral */
ganlikun	0:13413ea9a877	560	__HAL_I2S_ENABLE(hi2s);
ganlikun	0:13413ea9a877	561	}
ganlikun	0:13413ea9a877	562
ganlikun	0:13413ea9a877	563	while(hi2s->TxXferCount > 0U)
ganlikun	0:13413ea9a877	564	{
ganlikun	0:13413ea9a877	565	hi2s->Instance->DR = (*pData++);
ganlikun	0:13413ea9a877	566	hi2s->TxXferCount--;
ganlikun	0:13413ea9a877	567
ganlikun	0:13413ea9a877	568	/* Wait until TXE flag is set */
ganlikun	0:13413ea9a877	569	if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK)
ganlikun	0:13413ea9a877	570	{
ganlikun	0:13413ea9a877	571	/* Set the error code and execute error callback*/
ganlikun	0:13413ea9a877	572	SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT);
ganlikun	0:13413ea9a877	573	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	574	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	575	}
ganlikun	0:13413ea9a877	576
ganlikun	0:13413ea9a877	577	/* Check if an underrun occurs */
ganlikun	0:13413ea9a877	578	if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
ganlikun	0:13413ea9a877	579	{
ganlikun	0:13413ea9a877	580	/* Clear underrun flag */
ganlikun	0:13413ea9a877	581	__HAL_I2S_CLEAR_UDRFLAG(hi2s);
ganlikun	0:13413ea9a877	582	/* Set the I2S State ready */
ganlikun	0:13413ea9a877	583	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	584
ganlikun	0:13413ea9a877	585	/* Process Unlocked */
ganlikun	0:13413ea9a877	586	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	587
ganlikun	0:13413ea9a877	588	/* Set the error code and execute error callback*/
ganlikun	0:13413ea9a877	589	SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
ganlikun	0:13413ea9a877	590	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	591
ganlikun	0:13413ea9a877	592	return HAL_ERROR;
ganlikun	0:13413ea9a877	593	}
ganlikun	0:13413ea9a877	594	}
ganlikun	0:13413ea9a877	595	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	596
ganlikun	0:13413ea9a877	597	/* Process Unlocked */
ganlikun	0:13413ea9a877	598	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	599
ganlikun	0:13413ea9a877	600	return HAL_OK;
ganlikun	0:13413ea9a877	601	}
ganlikun	0:13413ea9a877	602	else
ganlikun	0:13413ea9a877	603	{
ganlikun	0:13413ea9a877	604	return HAL_BUSY;
ganlikun	0:13413ea9a877	605	}
ganlikun	0:13413ea9a877	606	}
ganlikun	0:13413ea9a877	607
ganlikun	0:13413ea9a877	608	/**
ganlikun	0:13413ea9a877	609	* @brief Receive an amount of data in blocking mode
ganlikun	0:13413ea9a877	610	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	611	* the configuration information for I2S module
ganlikun	0:13413ea9a877	612	* @param pData: a 16-bit pointer to data buffer
ganlikun	0:13413ea9a877	613	* @param Size: number of data sample to be sent:
ganlikun	0:13413ea9a877	614	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
ganlikun	0:13413ea9a877	615	* configuration phase, the Size parameter means the number of 16-bit data length
ganlikun	0:13413ea9a877	616	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
ganlikun	0:13413ea9a877	617	* the Size parameter means the number of 16-bit data length.
ganlikun	0:13413ea9a877	618	* @param Timeout: Timeout duration
ganlikun	0:13413ea9a877	619	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
ganlikun	0:13413ea9a877	620	* between Master and Slave(example: audio streaming)
ganlikun	0:13413ea9a877	621	* @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
ganlikun	0:13413ea9a877	622	* in continuous way and as the I2S is not disabled at the end of the I2S transaction
ganlikun	0:13413ea9a877	623	* @retval HAL status
ganlikun	0:13413ea9a877	624	*/
ganlikun	0:13413ea9a877	625	HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size, uint32_t Timeout)
ganlikun	0:13413ea9a877	626	{
ganlikun	0:13413ea9a877	627	uint32_t tmp1 = 0U;
ganlikun	0:13413ea9a877	628
ganlikun	0:13413ea9a877	629	if((pData == NULL ) \|\| (Size == 0U))
ganlikun	0:13413ea9a877	630	{
ganlikun	0:13413ea9a877	631	return HAL_ERROR;
ganlikun	0:13413ea9a877	632	}
ganlikun	0:13413ea9a877	633
ganlikun	0:13413ea9a877	634	if(hi2s->State == HAL_I2S_STATE_READY)
ganlikun	0:13413ea9a877	635	{
ganlikun	0:13413ea9a877	636	tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN);
ganlikun	0:13413ea9a877	637	if((tmp1 == I2S_DATAFORMAT_24B) \|\| (tmp1 == I2S_DATAFORMAT_32B))
ganlikun	0:13413ea9a877	638	{
ganlikun	0:13413ea9a877	639	hi2s->RxXferSize = (Size << 1U);
ganlikun	0:13413ea9a877	640	hi2s->RxXferCount = (Size << 1U);
ganlikun	0:13413ea9a877	641	}
ganlikun	0:13413ea9a877	642	else
ganlikun	0:13413ea9a877	643	{
ganlikun	0:13413ea9a877	644	hi2s->RxXferSize = Size;
ganlikun	0:13413ea9a877	645	hi2s->RxXferCount = Size;
ganlikun	0:13413ea9a877	646	}
ganlikun	0:13413ea9a877	647	/* Process Locked */
ganlikun	0:13413ea9a877	648	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	649
ganlikun	0:13413ea9a877	650	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	651	hi2s->State = HAL_I2S_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	652
ganlikun	0:13413ea9a877	653	/* Check if the I2S is already enabled */
ganlikun	0:13413ea9a877	654	if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
ganlikun	0:13413ea9a877	655	{
ganlikun	0:13413ea9a877	656	/* Enable I2S peripheral */
ganlikun	0:13413ea9a877	657	__HAL_I2S_ENABLE(hi2s);
ganlikun	0:13413ea9a877	658	}
ganlikun	0:13413ea9a877	659
ganlikun	0:13413ea9a877	660	/* Check if Master Receiver mode is selected */
ganlikun	0:13413ea9a877	661	if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
ganlikun	0:13413ea9a877	662	{
ganlikun	0:13413ea9a877	663	/* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
ganlikun	0:13413ea9a877	664	access to the SPI_SR register. */
ganlikun	0:13413ea9a877	665	__HAL_I2S_CLEAR_OVRFLAG(hi2s);
ganlikun	0:13413ea9a877	666	}
ganlikun	0:13413ea9a877	667
ganlikun	0:13413ea9a877	668	/* Receive data */
ganlikun	0:13413ea9a877	669	while(hi2s->RxXferCount > 0U)
ganlikun	0:13413ea9a877	670	{
ganlikun	0:13413ea9a877	671	/* Wait until RXNE flag is set */
ganlikun	0:13413ea9a877	672	if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK)
ganlikun	0:13413ea9a877	673	{
ganlikun	0:13413ea9a877	674	/* Set the error code and execute error callback*/
ganlikun	0:13413ea9a877	675	SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_TIMEOUT);
ganlikun	0:13413ea9a877	676	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	677	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	678	}
ganlikun	0:13413ea9a877	679
ganlikun	0:13413ea9a877	680	/* Check if an overrun occurs */
ganlikun	0:13413ea9a877	681	if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
ganlikun	0:13413ea9a877	682	{
ganlikun	0:13413ea9a877	683	/* Clear overrun flag */
ganlikun	0:13413ea9a877	684	__HAL_I2S_CLEAR_OVRFLAG(hi2s);
ganlikun	0:13413ea9a877	685
ganlikun	0:13413ea9a877	686	/* Set the I2S State ready */
ganlikun	0:13413ea9a877	687	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	688
ganlikun	0:13413ea9a877	689	/* Process Unlocked */
ganlikun	0:13413ea9a877	690	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	691
ganlikun	0:13413ea9a877	692	/* Set the error code and execute error callback*/
ganlikun	0:13413ea9a877	693	SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
ganlikun	0:13413ea9a877	694	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	695
ganlikun	0:13413ea9a877	696	return HAL_ERROR;
ganlikun	0:13413ea9a877	697	}
ganlikun	0:13413ea9a877	698
ganlikun	0:13413ea9a877	699	(*pData++) = hi2s->Instance->DR;
ganlikun	0:13413ea9a877	700	hi2s->RxXferCount--;
ganlikun	0:13413ea9a877	701	}
ganlikun	0:13413ea9a877	702
ganlikun	0:13413ea9a877	703	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	704
ganlikun	0:13413ea9a877	705	/* Process Unlocked */
ganlikun	0:13413ea9a877	706	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	707
ganlikun	0:13413ea9a877	708	return HAL_OK;
ganlikun	0:13413ea9a877	709	}
ganlikun	0:13413ea9a877	710	else
ganlikun	0:13413ea9a877	711	{
ganlikun	0:13413ea9a877	712	return HAL_BUSY;
ganlikun	0:13413ea9a877	713	}
ganlikun	0:13413ea9a877	714	}
ganlikun	0:13413ea9a877	715
ganlikun	0:13413ea9a877	716	/**
ganlikun	0:13413ea9a877	717	* @brief Transmit an amount of data in non-blocking mode with Interrupt
ganlikun	0:13413ea9a877	718	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	719	* the configuration information for I2S module
ganlikun	0:13413ea9a877	720	* @param pData: a 16-bit pointer to data buffer.
ganlikun	0:13413ea9a877	721	* @param Size: number of data sample to be sent:
ganlikun	0:13413ea9a877	722	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
ganlikun	0:13413ea9a877	723	* configuration phase, the Size parameter means the number of 16-bit data length
ganlikun	0:13413ea9a877	724	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
ganlikun	0:13413ea9a877	725	* the Size parameter means the number of 16-bit data length.
ganlikun	0:13413ea9a877	726	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
ganlikun	0:13413ea9a877	727	* between Master and Slave(example: audio streaming).
ganlikun	0:13413ea9a877	728	* @retval HAL status
ganlikun	0:13413ea9a877	729	*/
ganlikun	0:13413ea9a877	730	HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	731	{
ganlikun	0:13413ea9a877	732	uint32_t tmp1 = 0U;
ganlikun	0:13413ea9a877	733
ganlikun	0:13413ea9a877	734	if(hi2s->State == HAL_I2S_STATE_READY)
ganlikun	0:13413ea9a877	735	{
ganlikun	0:13413ea9a877	736	if((pData == NULL) \|\| (Size == 0U))
ganlikun	0:13413ea9a877	737	{
ganlikun	0:13413ea9a877	738	return HAL_ERROR;
ganlikun	0:13413ea9a877	739	}
ganlikun	0:13413ea9a877	740
ganlikun	0:13413ea9a877	741	hi2s->pTxBuffPtr = pData;
ganlikun	0:13413ea9a877	742	tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN);
ganlikun	0:13413ea9a877	743	if((tmp1 == I2S_DATAFORMAT_24B) \|\| (tmp1 == I2S_DATAFORMAT_32B))
ganlikun	0:13413ea9a877	744	{
ganlikun	0:13413ea9a877	745	hi2s->TxXferSize = (Size << 1U);
ganlikun	0:13413ea9a877	746	hi2s->TxXferCount = (Size << 1U);
ganlikun	0:13413ea9a877	747	}
ganlikun	0:13413ea9a877	748	else
ganlikun	0:13413ea9a877	749	{
ganlikun	0:13413ea9a877	750	hi2s->TxXferSize = Size;
ganlikun	0:13413ea9a877	751	hi2s->TxXferCount = Size;
ganlikun	0:13413ea9a877	752	}
ganlikun	0:13413ea9a877	753
ganlikun	0:13413ea9a877	754	/* Process Locked */
ganlikun	0:13413ea9a877	755	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	756
ganlikun	0:13413ea9a877	757	hi2s->State = HAL_I2S_STATE_BUSY_TX;
ganlikun	0:13413ea9a877	758	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	759
ganlikun	0:13413ea9a877	760	/* Enable TXE and ERR interrupt */
ganlikun	0:13413ea9a877	761	__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE \| I2S_IT_ERR));
ganlikun	0:13413ea9a877	762
ganlikun	0:13413ea9a877	763	/* Check if the I2S is already enabled */
ganlikun	0:13413ea9a877	764	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
ganlikun	0:13413ea9a877	765	{
ganlikun	0:13413ea9a877	766	/* Enable I2S peripheral */
ganlikun	0:13413ea9a877	767	__HAL_I2S_ENABLE(hi2s);
ganlikun	0:13413ea9a877	768	}
ganlikun	0:13413ea9a877	769
ganlikun	0:13413ea9a877	770	/* Process Unlocked */
ganlikun	0:13413ea9a877	771	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	772
ganlikun	0:13413ea9a877	773	return HAL_OK;
ganlikun	0:13413ea9a877	774	}
ganlikun	0:13413ea9a877	775	else
ganlikun	0:13413ea9a877	776	{
ganlikun	0:13413ea9a877	777	return HAL_BUSY;
ganlikun	0:13413ea9a877	778	}
ganlikun	0:13413ea9a877	779	}
ganlikun	0:13413ea9a877	780
ganlikun	0:13413ea9a877	781	/**
ganlikun	0:13413ea9a877	782	* @brief Receive an amount of data in non-blocking mode with Interrupt
ganlikun	0:13413ea9a877	783	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	784	* the configuration information for I2S module
ganlikun	0:13413ea9a877	785	* @param pData: a 16-bit pointer to the Receive data buffer.
ganlikun	0:13413ea9a877	786	* @param Size: number of data sample to be sent:
ganlikun	0:13413ea9a877	787	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
ganlikun	0:13413ea9a877	788	* configuration phase, the Size parameter means the number of 16-bit data length
ganlikun	0:13413ea9a877	789	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
ganlikun	0:13413ea9a877	790	* the Size parameter means the number of 16-bit data length.
ganlikun	0:13413ea9a877	791	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
ganlikun	0:13413ea9a877	792	* between Master and Slave(example: audio streaming).
ganlikun	0:13413ea9a877	793	* @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
ganlikun	0:13413ea9a877	794	* between Master and Slave otherwise the I2S interrupt should be optimized.
ganlikun	0:13413ea9a877	795	* @retval HAL status
ganlikun	0:13413ea9a877	796	*/
ganlikun	0:13413ea9a877	797	HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	798	{
ganlikun	0:13413ea9a877	799	uint32_t tmp1 = 0U;
ganlikun	0:13413ea9a877	800
ganlikun	0:13413ea9a877	801	if(hi2s->State == HAL_I2S_STATE_READY)
ganlikun	0:13413ea9a877	802	{
ganlikun	0:13413ea9a877	803	if((pData == NULL) \|\| (Size == 0U))
ganlikun	0:13413ea9a877	804	{
ganlikun	0:13413ea9a877	805	return HAL_ERROR;
ganlikun	0:13413ea9a877	806	}
ganlikun	0:13413ea9a877	807
ganlikun	0:13413ea9a877	808	hi2s->pRxBuffPtr = pData;
ganlikun	0:13413ea9a877	809	tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN);
ganlikun	0:13413ea9a877	810	if((tmp1 == I2S_DATAFORMAT_24B) \|\| (tmp1 == I2S_DATAFORMAT_32B))
ganlikun	0:13413ea9a877	811	{
ganlikun	0:13413ea9a877	812	hi2s->RxXferSize = (Size << 1U);
ganlikun	0:13413ea9a877	813	hi2s->RxXferCount = (Size << 1U);
ganlikun	0:13413ea9a877	814	}
ganlikun	0:13413ea9a877	815	else
ganlikun	0:13413ea9a877	816	{
ganlikun	0:13413ea9a877	817	hi2s->RxXferSize = Size;
ganlikun	0:13413ea9a877	818	hi2s->RxXferCount = Size;
ganlikun	0:13413ea9a877	819	}
ganlikun	0:13413ea9a877	820	/* Process Locked */
ganlikun	0:13413ea9a877	821	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	822
ganlikun	0:13413ea9a877	823	hi2s->State = HAL_I2S_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	824	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	825
ganlikun	0:13413ea9a877	826	/* Enable TXE and ERR interrupt */
ganlikun	0:13413ea9a877	827	__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE \| I2S_IT_ERR));
ganlikun	0:13413ea9a877	828
ganlikun	0:13413ea9a877	829	/* Check if the I2S is already enabled */
ganlikun	0:13413ea9a877	830	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
ganlikun	0:13413ea9a877	831	{
ganlikun	0:13413ea9a877	832	/* Enable I2S peripheral */
ganlikun	0:13413ea9a877	833	__HAL_I2S_ENABLE(hi2s);
ganlikun	0:13413ea9a877	834	}
ganlikun	0:13413ea9a877	835
ganlikun	0:13413ea9a877	836	/* Process Unlocked */
ganlikun	0:13413ea9a877	837	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	838
ganlikun	0:13413ea9a877	839	return HAL_OK;
ganlikun	0:13413ea9a877	840	}
ganlikun	0:13413ea9a877	841
ganlikun	0:13413ea9a877	842	else
ganlikun	0:13413ea9a877	843	{
ganlikun	0:13413ea9a877	844	return HAL_BUSY;
ganlikun	0:13413ea9a877	845	}
ganlikun	0:13413ea9a877	846	}
ganlikun	0:13413ea9a877	847
ganlikun	0:13413ea9a877	848	/**
ganlikun	0:13413ea9a877	849	* @brief Transmit an amount of data in non-blocking mode with DMA
ganlikun	0:13413ea9a877	850	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	851	* the configuration information for I2S module
ganlikun	0:13413ea9a877	852	* @param pData: a 16-bit pointer to the Transmit data buffer.
ganlikun	0:13413ea9a877	853	* @param Size: number of data sample to be sent:
ganlikun	0:13413ea9a877	854	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
ganlikun	0:13413ea9a877	855	* configuration phase, the Size parameter means the number of 16-bit data length
ganlikun	0:13413ea9a877	856	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
ganlikun	0:13413ea9a877	857	* the Size parameter means the number of 16-bit data length.
ganlikun	0:13413ea9a877	858	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
ganlikun	0:13413ea9a877	859	* between Master and Slave(example: audio streaming).
ganlikun	0:13413ea9a877	860	* @retval HAL status
ganlikun	0:13413ea9a877	861	*/
ganlikun	0:13413ea9a877	862	HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	863	{
ganlikun	0:13413ea9a877	864	uint32_t *tmp = NULL;
ganlikun	0:13413ea9a877	865	uint32_t tmp1 = 0U;
ganlikun	0:13413ea9a877	866
ganlikun	0:13413ea9a877	867	if((pData == NULL) \|\| (Size == 0U))
ganlikun	0:13413ea9a877	868	{
ganlikun	0:13413ea9a877	869	return HAL_ERROR;
ganlikun	0:13413ea9a877	870	}
ganlikun	0:13413ea9a877	871
ganlikun	0:13413ea9a877	872	if(hi2s->State == HAL_I2S_STATE_READY)
ganlikun	0:13413ea9a877	873	{
ganlikun	0:13413ea9a877	874	hi2s->pTxBuffPtr = pData;
ganlikun	0:13413ea9a877	875	tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN);
ganlikun	0:13413ea9a877	876	if((tmp1 == I2S_DATAFORMAT_24B) \|\| (tmp1 == I2S_DATAFORMAT_32B))
ganlikun	0:13413ea9a877	877	{
ganlikun	0:13413ea9a877	878	hi2s->TxXferSize = (Size << 1U);
ganlikun	0:13413ea9a877	879	hi2s->TxXferCount = (Size << 1U);
ganlikun	0:13413ea9a877	880	}
ganlikun	0:13413ea9a877	881	else
ganlikun	0:13413ea9a877	882	{
ganlikun	0:13413ea9a877	883	hi2s->TxXferSize = Size;
ganlikun	0:13413ea9a877	884	hi2s->TxXferCount = Size;
ganlikun	0:13413ea9a877	885	}
ganlikun	0:13413ea9a877	886
ganlikun	0:13413ea9a877	887	/* Process Locked */
ganlikun	0:13413ea9a877	888	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	889
ganlikun	0:13413ea9a877	890	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	891	hi2s->State = HAL_I2S_STATE_BUSY_TX;
ganlikun	0:13413ea9a877	892
ganlikun	0:13413ea9a877	893	/* Set the I2S Tx DMA Half transfer complete callback */
ganlikun	0:13413ea9a877	894	hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
ganlikun	0:13413ea9a877	895
ganlikun	0:13413ea9a877	896	/* Set the I2S Tx DMA transfer complete callback */
ganlikun	0:13413ea9a877	897	hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
ganlikun	0:13413ea9a877	898
ganlikun	0:13413ea9a877	899	/* Set the DMA error callback */
ganlikun	0:13413ea9a877	900	hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
ganlikun	0:13413ea9a877	901
ganlikun	0:13413ea9a877	902	/* Enable the Tx DMA Stream */
ganlikun	0:13413ea9a877	903	tmp = (uint32_t*)&pData;
ganlikun	0:13413ea9a877	904	HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
ganlikun	0:13413ea9a877	905
ganlikun	0:13413ea9a877	906	/* Check if the I2S is already enabled */
ganlikun	0:13413ea9a877	907	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
ganlikun	0:13413ea9a877	908	{
ganlikun	0:13413ea9a877	909	/* Enable I2S peripheral */
ganlikun	0:13413ea9a877	910	__HAL_I2S_ENABLE(hi2s);
ganlikun	0:13413ea9a877	911	}
ganlikun	0:13413ea9a877	912
ganlikun	0:13413ea9a877	913	/* Check if the I2S Tx request is already enabled */
ganlikun	0:13413ea9a877	914	if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN)
ganlikun	0:13413ea9a877	915	{
ganlikun	0:13413ea9a877	916	/* Enable Tx DMA Request */
ganlikun	0:13413ea9a877	917	SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	918	}
ganlikun	0:13413ea9a877	919
ganlikun	0:13413ea9a877	920	/* Process Unlocked */
ganlikun	0:13413ea9a877	921	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	922
ganlikun	0:13413ea9a877	923	return HAL_OK;
ganlikun	0:13413ea9a877	924	}
ganlikun	0:13413ea9a877	925	else
ganlikun	0:13413ea9a877	926	{
ganlikun	0:13413ea9a877	927	return HAL_BUSY;
ganlikun	0:13413ea9a877	928	}
ganlikun	0:13413ea9a877	929	}
ganlikun	0:13413ea9a877	930
ganlikun	0:13413ea9a877	931	/**
ganlikun	0:13413ea9a877	932	* @brief Receive an amount of data in non-blocking mode with DMA
ganlikun	0:13413ea9a877	933	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	934	* the configuration information for I2S module
ganlikun	0:13413ea9a877	935	* @param pData: a 16-bit pointer to the Receive data buffer.
ganlikun	0:13413ea9a877	936	* @param Size: number of data sample to be sent:
ganlikun	0:13413ea9a877	937	* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
ganlikun	0:13413ea9a877	938	* configuration phase, the Size parameter means the number of 16-bit data length
ganlikun	0:13413ea9a877	939	* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
ganlikun	0:13413ea9a877	940	* the Size parameter means the number of 16-bit data length.
ganlikun	0:13413ea9a877	941	* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
ganlikun	0:13413ea9a877	942	* between Master and Slave(example: audio streaming).
ganlikun	0:13413ea9a877	943	* @retval HAL status
ganlikun	0:13413ea9a877	944	*/
ganlikun	0:13413ea9a877	945	HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef hi2s, uint16_t pData, uint16_t Size)
ganlikun	0:13413ea9a877	946	{
ganlikun	0:13413ea9a877	947	uint32_t *tmp = NULL;
ganlikun	0:13413ea9a877	948	uint32_t tmp1 = 0U;
ganlikun	0:13413ea9a877	949
ganlikun	0:13413ea9a877	950	if((pData == NULL) \|\| (Size == 0U))
ganlikun	0:13413ea9a877	951	{
ganlikun	0:13413ea9a877	952	return HAL_ERROR;
ganlikun	0:13413ea9a877	953	}
ganlikun	0:13413ea9a877	954
ganlikun	0:13413ea9a877	955	if(hi2s->State == HAL_I2S_STATE_READY)
ganlikun	0:13413ea9a877	956	{
ganlikun	0:13413ea9a877	957	hi2s->pRxBuffPtr = pData;
ganlikun	0:13413ea9a877	958	tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN \| SPI_I2SCFGR_CHLEN);
ganlikun	0:13413ea9a877	959	if((tmp1 == I2S_DATAFORMAT_24B) \|\| (tmp1 == I2S_DATAFORMAT_32B))
ganlikun	0:13413ea9a877	960	{
ganlikun	0:13413ea9a877	961	hi2s->RxXferSize = (Size << 1U);
ganlikun	0:13413ea9a877	962	hi2s->RxXferCount = (Size << 1U);
ganlikun	0:13413ea9a877	963	}
ganlikun	0:13413ea9a877	964	else
ganlikun	0:13413ea9a877	965	{
ganlikun	0:13413ea9a877	966	hi2s->RxXferSize = Size;
ganlikun	0:13413ea9a877	967	hi2s->RxXferCount = Size;
ganlikun	0:13413ea9a877	968	}
ganlikun	0:13413ea9a877	969	/* Process Locked */
ganlikun	0:13413ea9a877	970	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	971
ganlikun	0:13413ea9a877	972	hi2s->State = HAL_I2S_STATE_BUSY_RX;
ganlikun	0:13413ea9a877	973	hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
ganlikun	0:13413ea9a877	974
ganlikun	0:13413ea9a877	975	/* Set the I2S Rx DMA Half transfer complete callback */
ganlikun	0:13413ea9a877	976	hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
ganlikun	0:13413ea9a877	977
ganlikun	0:13413ea9a877	978	/* Set the I2S Rx DMA transfer complete callback */
ganlikun	0:13413ea9a877	979	hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
ganlikun	0:13413ea9a877	980
ganlikun	0:13413ea9a877	981	/* Set the DMA error callback */
ganlikun	0:13413ea9a877	982	hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
ganlikun	0:13413ea9a877	983
ganlikun	0:13413ea9a877	984	/* Check if Master Receiver mode is selected */
ganlikun	0:13413ea9a877	985	if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
ganlikun	0:13413ea9a877	986	{
ganlikun	0:13413ea9a877	987	/* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
ganlikun	0:13413ea9a877	988	access to the SPI_SR register. */
ganlikun	0:13413ea9a877	989	__HAL_I2S_CLEAR_OVRFLAG(hi2s);
ganlikun	0:13413ea9a877	990	}
ganlikun	0:13413ea9a877	991
ganlikun	0:13413ea9a877	992	/* Enable the Rx DMA Stream */
ganlikun	0:13413ea9a877	993	tmp = (uint32_t*)&pData;
ganlikun	0:13413ea9a877	994	HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)tmp, hi2s->RxXferSize);
ganlikun	0:13413ea9a877	995
ganlikun	0:13413ea9a877	996	/* Check if the I2S is already enabled */
ganlikun	0:13413ea9a877	997	if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
ganlikun	0:13413ea9a877	998	{
ganlikun	0:13413ea9a877	999	/* Enable I2S peripheral */
ganlikun	0:13413ea9a877	1000	__HAL_I2S_ENABLE(hi2s);
ganlikun	0:13413ea9a877	1001	}
ganlikun	0:13413ea9a877	1002
ganlikun	0:13413ea9a877	1003	/* Check if the I2S Rx request is already enabled */
ganlikun	0:13413ea9a877	1004	if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN)
ganlikun	0:13413ea9a877	1005	{
ganlikun	0:13413ea9a877	1006	/* Enable Rx DMA Request */
ganlikun	0:13413ea9a877	1007	SET_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1008	}
ganlikun	0:13413ea9a877	1009
ganlikun	0:13413ea9a877	1010	/* Process Unlocked */
ganlikun	0:13413ea9a877	1011	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	1012
ganlikun	0:13413ea9a877	1013	return HAL_OK;
ganlikun	0:13413ea9a877	1014	}
ganlikun	0:13413ea9a877	1015	else
ganlikun	0:13413ea9a877	1016	{
ganlikun	0:13413ea9a877	1017	return HAL_BUSY;
ganlikun	0:13413ea9a877	1018	}
ganlikun	0:13413ea9a877	1019	}
ganlikun	0:13413ea9a877	1020
ganlikun	0:13413ea9a877	1021	/**
ganlikun	0:13413ea9a877	1022	* @brief Pauses the audio stream playing from the Media.
ganlikun	0:13413ea9a877	1023	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1024	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1025	* @retval HAL status
ganlikun	0:13413ea9a877	1026	*/
ganlikun	0:13413ea9a877	1027	HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1028	{
ganlikun	0:13413ea9a877	1029	/* Process Locked */
ganlikun	0:13413ea9a877	1030	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	1031
ganlikun	0:13413ea9a877	1032	if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
ganlikun	0:13413ea9a877	1033	{
ganlikun	0:13413ea9a877	1034	/* Disable the I2S DMA Tx request */
ganlikun	0:13413ea9a877	1035	CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	1036	}
ganlikun	0:13413ea9a877	1037	else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
ganlikun	0:13413ea9a877	1038	{
ganlikun	0:13413ea9a877	1039	/* Disable the I2S DMA Rx request */
ganlikun	0:13413ea9a877	1040	CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1041	}
ganlikun	0:13413ea9a877	1042	#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
ganlikun	0:13413ea9a877	1043	else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
ganlikun	0:13413ea9a877	1044	{
ganlikun	0:13413ea9a877	1045	/* Pause the audio file playing by disabling the I2S DMA request */
ganlikun	0:13413ea9a877	1046	CLEAR_BIT(hi2s->Instance->CR2,(SPI_CR2_TXDMAEN\|SPI_CR2_RXDMAEN));
ganlikun	0:13413ea9a877	1047	CLEAR_BIT(I2SxEXT(hi2s->Instance)->CR2,(SPI_CR2_TXDMAEN\|SPI_CR2_RXDMAEN));
ganlikun	0:13413ea9a877	1048	}
ganlikun	0:13413ea9a877	1049	#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
ganlikun	0:13413ea9a877	1050
ganlikun	0:13413ea9a877	1051	/* Process Unlocked */
ganlikun	0:13413ea9a877	1052	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	1053
ganlikun	0:13413ea9a877	1054	return HAL_OK;
ganlikun	0:13413ea9a877	1055	}
ganlikun	0:13413ea9a877	1056
ganlikun	0:13413ea9a877	1057	/**
ganlikun	0:13413ea9a877	1058	* @brief Resumes the audio stream playing from the Media.
ganlikun	0:13413ea9a877	1059	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1060	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1061	* @retval HAL status
ganlikun	0:13413ea9a877	1062	*/
ganlikun	0:13413ea9a877	1063	HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1064	{
ganlikun	0:13413ea9a877	1065	/* Process Locked */
ganlikun	0:13413ea9a877	1066	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	1067
ganlikun	0:13413ea9a877	1068	if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
ganlikun	0:13413ea9a877	1069	{
ganlikun	0:13413ea9a877	1070	/* Enable the I2S DMA Tx request */
ganlikun	0:13413ea9a877	1071	SET_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	1072	}
ganlikun	0:13413ea9a877	1073	else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
ganlikun	0:13413ea9a877	1074	{
ganlikun	0:13413ea9a877	1075	/* Enable the I2S DMA Rx request */
ganlikun	0:13413ea9a877	1076	SET_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1077	}
ganlikun	0:13413ea9a877	1078	#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
ganlikun	0:13413ea9a877	1079	else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
ganlikun	0:13413ea9a877	1080	{
ganlikun	0:13413ea9a877	1081	/* Pause the audio file playing by disabling the I2S DMA request */
ganlikun	0:13413ea9a877	1082	SET_BIT(hi2s->Instance->CR2,(SPI_CR2_RXDMAEN \| SPI_CR2_TXDMAEN));
ganlikun	0:13413ea9a877	1083	SET_BIT(I2SxEXT(hi2s->Instance)->CR2,(SPI_CR2_RXDMAEN \| SPI_CR2_TXDMAEN));
ganlikun	0:13413ea9a877	1084
ganlikun	0:13413ea9a877	1085	/* If the I2Sext peripheral is still not enabled, enable it */
ganlikun	0:13413ea9a877	1086	if ((I2SxEXT(hi2s->Instance)->I2SCFGR & SPI_I2SCFGR_I2SE) == 0U)
ganlikun	0:13413ea9a877	1087	{
ganlikun	0:13413ea9a877	1088	/* Enable I2Sext peripheral */
ganlikun	0:13413ea9a877	1089	__HAL_I2SEXT_ENABLE(hi2s);
ganlikun	0:13413ea9a877	1090	}
ganlikun	0:13413ea9a877	1091	}
ganlikun	0:13413ea9a877	1092	#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
ganlikun	0:13413ea9a877	1093
ganlikun	0:13413ea9a877	1094	/* If the I2S peripheral is still not enabled, enable it */
ganlikun	0:13413ea9a877	1095	if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0U)
ganlikun	0:13413ea9a877	1096	{
ganlikun	0:13413ea9a877	1097	/* Enable I2S peripheral */
ganlikun	0:13413ea9a877	1098	__HAL_I2S_ENABLE(hi2s);
ganlikun	0:13413ea9a877	1099	}
ganlikun	0:13413ea9a877	1100
ganlikun	0:13413ea9a877	1101	/* Process Unlocked */
ganlikun	0:13413ea9a877	1102	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	1103
ganlikun	0:13413ea9a877	1104	return HAL_OK;
ganlikun	0:13413ea9a877	1105	}
ganlikun	0:13413ea9a877	1106
ganlikun	0:13413ea9a877	1107	/**
ganlikun	0:13413ea9a877	1108	* @brief Resumes the audio stream playing from the Media.
ganlikun	0:13413ea9a877	1109	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1110	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1111	* @retval HAL status
ganlikun	0:13413ea9a877	1112	*/
ganlikun	0:13413ea9a877	1113	HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1114	{
ganlikun	0:13413ea9a877	1115	/* Process Locked */
ganlikun	0:13413ea9a877	1116	__HAL_LOCK(hi2s);
ganlikun	0:13413ea9a877	1117
ganlikun	0:13413ea9a877	1118	if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
ganlikun	0:13413ea9a877	1119	{
ganlikun	0:13413ea9a877	1120	/* Disable the I2S DMA requests */
ganlikun	0:13413ea9a877	1121	CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	1122
ganlikun	0:13413ea9a877	1123	/* Disable the I2S DMA Channel */
ganlikun	0:13413ea9a877	1124	HAL_DMA_Abort(hi2s->hdmatx);
ganlikun	0:13413ea9a877	1125	}
ganlikun	0:13413ea9a877	1126	else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
ganlikun	0:13413ea9a877	1127	{
ganlikun	0:13413ea9a877	1128	/* Disable the I2S DMA requests */
ganlikun	0:13413ea9a877	1129	CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1130
ganlikun	0:13413ea9a877	1131	/* Disable the I2S DMA Channel */
ganlikun	0:13413ea9a877	1132	HAL_DMA_Abort(hi2s->hdmarx);
ganlikun	0:13413ea9a877	1133	}
ganlikun	0:13413ea9a877	1134	#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
ganlikun	0:13413ea9a877	1135	else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
ganlikun	0:13413ea9a877	1136	{
ganlikun	0:13413ea9a877	1137	/* Disable the I2S DMA requests */
ganlikun	0:13413ea9a877	1138	CLEAR_BIT(hi2s->Instance->CR2,(SPI_CR2_RXDMAEN \| SPI_CR2_TXDMAEN));
ganlikun	0:13413ea9a877	1139	CLEAR_BIT(I2SxEXT(hi2s->Instance)->CR2,(SPI_CR2_RXDMAEN \| SPI_CR2_TXDMAEN));
ganlikun	0:13413ea9a877	1140
ganlikun	0:13413ea9a877	1141	/* Disable the I2S DMA Channels */
ganlikun	0:13413ea9a877	1142	HAL_DMA_Abort(hi2s->hdmatx);
ganlikun	0:13413ea9a877	1143	HAL_DMA_Abort(hi2s->hdmarx);
ganlikun	0:13413ea9a877	1144
ganlikun	0:13413ea9a877	1145	/* Disable I2Sext peripheral */
ganlikun	0:13413ea9a877	1146	__HAL_I2SEXT_DISABLE(hi2s);
ganlikun	0:13413ea9a877	1147	}
ganlikun	0:13413ea9a877	1148	#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
ganlikun	0:13413ea9a877	1149
ganlikun	0:13413ea9a877	1150	/* Disable I2S peripheral */
ganlikun	0:13413ea9a877	1151	__HAL_I2S_DISABLE(hi2s);
ganlikun	0:13413ea9a877	1152
ganlikun	0:13413ea9a877	1153	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1154
ganlikun	0:13413ea9a877	1155	/* Process Unlocked */
ganlikun	0:13413ea9a877	1156	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	1157
ganlikun	0:13413ea9a877	1158	return HAL_OK;
ganlikun	0:13413ea9a877	1159	}
ganlikun	0:13413ea9a877	1160
ganlikun	0:13413ea9a877	1161	/**
ganlikun	0:13413ea9a877	1162	* @brief This function handles I2S interrupt request.
ganlikun	0:13413ea9a877	1163	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1164	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1165	* @retval None
ganlikun	0:13413ea9a877	1166	*/
ganlikun	0:13413ea9a877	1167	void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1168	{
ganlikun	0:13413ea9a877	1169	/* Call the IrqHandler ISR set during HAL_I2S_INIT */
ganlikun	0:13413ea9a877	1170	hi2s->IrqHandlerISR(hi2s);
ganlikun	0:13413ea9a877	1171	}
ganlikun	0:13413ea9a877	1172
ganlikun	0:13413ea9a877	1173	/**
ganlikun	0:13413ea9a877	1174	* @brief Tx Transfer Half completed callbacks
ganlikun	0:13413ea9a877	1175	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1176	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1177	* @retval None
ganlikun	0:13413ea9a877	1178	*/
ganlikun	0:13413ea9a877	1179	__weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1180	{
ganlikun	0:13413ea9a877	1181	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1182	UNUSED(hi2s);
ganlikun	0:13413ea9a877	1183	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1184	the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1185	*/
ganlikun	0:13413ea9a877	1186	}
ganlikun	0:13413ea9a877	1187
ganlikun	0:13413ea9a877	1188	/**
ganlikun	0:13413ea9a877	1189	* @brief Tx Transfer completed callbacks
ganlikun	0:13413ea9a877	1190	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1191	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1192	* @retval None
ganlikun	0:13413ea9a877	1193	*/
ganlikun	0:13413ea9a877	1194	__weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1195	{
ganlikun	0:13413ea9a877	1196	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1197	UNUSED(hi2s);
ganlikun	0:13413ea9a877	1198	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1199	the HAL_I2S_TxCpltCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1200	*/
ganlikun	0:13413ea9a877	1201	}
ganlikun	0:13413ea9a877	1202
ganlikun	0:13413ea9a877	1203	/**
ganlikun	0:13413ea9a877	1204	* @brief Rx Transfer half completed callbacks
ganlikun	0:13413ea9a877	1205	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1206	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1207	* @retval None
ganlikun	0:13413ea9a877	1208	*/
ganlikun	0:13413ea9a877	1209	__weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1210	{
ganlikun	0:13413ea9a877	1211	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1212	UNUSED(hi2s);
ganlikun	0:13413ea9a877	1213	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1214	the HAL_I2S_RxCpltCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1215	*/
ganlikun	0:13413ea9a877	1216	}
ganlikun	0:13413ea9a877	1217
ganlikun	0:13413ea9a877	1218	/**
ganlikun	0:13413ea9a877	1219	* @brief Rx Transfer completed callbacks
ganlikun	0:13413ea9a877	1220	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1221	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1222	* @retval None
ganlikun	0:13413ea9a877	1223	*/
ganlikun	0:13413ea9a877	1224	__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1225	{
ganlikun	0:13413ea9a877	1226	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1227	UNUSED(hi2s);
ganlikun	0:13413ea9a877	1228	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1229	the HAL_I2S_RxCpltCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1230	*/
ganlikun	0:13413ea9a877	1231	}
ganlikun	0:13413ea9a877	1232
ganlikun	0:13413ea9a877	1233	/**
ganlikun	0:13413ea9a877	1234	* @brief I2S error callbacks
ganlikun	0:13413ea9a877	1235	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1236	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1237	* @retval None
ganlikun	0:13413ea9a877	1238	*/
ganlikun	0:13413ea9a877	1239	__weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1240	{
ganlikun	0:13413ea9a877	1241	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1242	UNUSED(hi2s);
ganlikun	0:13413ea9a877	1243	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1244	the HAL_I2S_ErrorCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1245	*/
ganlikun	0:13413ea9a877	1246	}
ganlikun	0:13413ea9a877	1247
ganlikun	0:13413ea9a877	1248	/**
ganlikun	0:13413ea9a877	1249	* @}
ganlikun	0:13413ea9a877	1250	*/
ganlikun	0:13413ea9a877	1251
ganlikun	0:13413ea9a877	1252	/** @addtogroup I2S_Exported_Functions_Group3
ganlikun	0:13413ea9a877	1253	* @brief Peripheral State functions
ganlikun	0:13413ea9a877	1254	*
ganlikun	0:13413ea9a877	1255	@verbatim
ganlikun	0:13413ea9a877	1256	===============================================================================
ganlikun	0:13413ea9a877	1257	##### Peripheral State and Errors functions #####
ganlikun	0:13413ea9a877	1258	===============================================================================
ganlikun	0:13413ea9a877	1259	[..]
ganlikun	0:13413ea9a877	1260	This subsection permits to get in run-time the status of the peripheral
ganlikun	0:13413ea9a877	1261	and the data flow.
ganlikun	0:13413ea9a877	1262
ganlikun	0:13413ea9a877	1263	@endverbatim
ganlikun	0:13413ea9a877	1264	* @{
ganlikun	0:13413ea9a877	1265	*/
ganlikun	0:13413ea9a877	1266
ganlikun	0:13413ea9a877	1267	/**
ganlikun	0:13413ea9a877	1268	* @brief Return the I2S state
ganlikun	0:13413ea9a877	1269	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1270	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1271	* @retval HAL state
ganlikun	0:13413ea9a877	1272	*/
ganlikun	0:13413ea9a877	1273	HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1274	{
ganlikun	0:13413ea9a877	1275	return hi2s->State;
ganlikun	0:13413ea9a877	1276	}
ganlikun	0:13413ea9a877	1277
ganlikun	0:13413ea9a877	1278	/**
ganlikun	0:13413ea9a877	1279	* @brief Return the I2S error code
ganlikun	0:13413ea9a877	1280	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1281	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1282	* @retval I2S Error Code
ganlikun	0:13413ea9a877	1283	*/
ganlikun	0:13413ea9a877	1284	uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1285	{
ganlikun	0:13413ea9a877	1286	return hi2s->ErrorCode;
ganlikun	0:13413ea9a877	1287	}
ganlikun	0:13413ea9a877	1288	/**
ganlikun	0:13413ea9a877	1289	* @}
ganlikun	0:13413ea9a877	1290	*/
ganlikun	0:13413ea9a877	1291
ganlikun	0:13413ea9a877	1292	/**
ganlikun	0:13413ea9a877	1293	* @}
ganlikun	0:13413ea9a877	1294	*/
ganlikun	0:13413ea9a877	1295
ganlikun	0:13413ea9a877	1296	/** @addtogroup I2S_Private_Functions I2S Private Functions
ganlikun	0:13413ea9a877	1297	* @{
ganlikun	0:13413ea9a877	1298	*/
ganlikun	0:13413ea9a877	1299	/**
ganlikun	0:13413ea9a877	1300	* @brief DMA I2S transmit process complete callback
ganlikun	0:13413ea9a877	1301	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1302	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1303	* @retval None
ganlikun	0:13413ea9a877	1304	*/
ganlikun	0:13413ea9a877	1305	static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1306	{
ganlikun	0:13413ea9a877	1307	I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	1308
ganlikun	0:13413ea9a877	1309	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
ganlikun	0:13413ea9a877	1310	{
ganlikun	0:13413ea9a877	1311	/* Disable Tx DMA Request */
ganlikun	0:13413ea9a877	1312	CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN);
ganlikun	0:13413ea9a877	1313
ganlikun	0:13413ea9a877	1314	hi2s->TxXferCount = 0U;
ganlikun	0:13413ea9a877	1315	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1316	}
ganlikun	0:13413ea9a877	1317	HAL_I2S_TxCpltCallback(hi2s);
ganlikun	0:13413ea9a877	1318	}
ganlikun	0:13413ea9a877	1319	/**
ganlikun	0:13413ea9a877	1320	* @brief DMA I2S transmit process half complete callback
ganlikun	0:13413ea9a877	1321	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1322	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1323	* @retval None
ganlikun	0:13413ea9a877	1324	*/
ganlikun	0:13413ea9a877	1325	static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1326	{
ganlikun	0:13413ea9a877	1327	I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	1328
ganlikun	0:13413ea9a877	1329	HAL_I2S_TxHalfCpltCallback(hi2s);
ganlikun	0:13413ea9a877	1330	}
ganlikun	0:13413ea9a877	1331
ganlikun	0:13413ea9a877	1332	/**
ganlikun	0:13413ea9a877	1333	* @brief DMA I2S receive process complete callback
ganlikun	0:13413ea9a877	1334	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1335	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1336	* @retval None
ganlikun	0:13413ea9a877	1337	*/
ganlikun	0:13413ea9a877	1338	static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1339	{
ganlikun	0:13413ea9a877	1340	I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	1341
ganlikun	0:13413ea9a877	1342	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
ganlikun	0:13413ea9a877	1343	{
ganlikun	0:13413ea9a877	1344	/* Disable Rx DMA Request */
ganlikun	0:13413ea9a877	1345	CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN);
ganlikun	0:13413ea9a877	1346	hi2s->RxXferCount = 0U;
ganlikun	0:13413ea9a877	1347	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1348	}
ganlikun	0:13413ea9a877	1349	HAL_I2S_RxCpltCallback(hi2s);
ganlikun	0:13413ea9a877	1350	}
ganlikun	0:13413ea9a877	1351
ganlikun	0:13413ea9a877	1352	/**
ganlikun	0:13413ea9a877	1353	* @brief DMA I2S receive process half complete callback
ganlikun	0:13413ea9a877	1354	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1355	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1356	* @retval None
ganlikun	0:13413ea9a877	1357	*/
ganlikun	0:13413ea9a877	1358	static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1359	{
ganlikun	0:13413ea9a877	1360	I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	1361
ganlikun	0:13413ea9a877	1362	HAL_I2S_RxHalfCpltCallback(hi2s);
ganlikun	0:13413ea9a877	1363	}
ganlikun	0:13413ea9a877	1364
ganlikun	0:13413ea9a877	1365	/**
ganlikun	0:13413ea9a877	1366	* @brief DMA I2S communication error callback
ganlikun	0:13413ea9a877	1367	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1368	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1369	* @retval None
ganlikun	0:13413ea9a877	1370	*/
ganlikun	0:13413ea9a877	1371	static void I2S_DMAError(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1372	{
ganlikun	0:13413ea9a877	1373	I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	1374
ganlikun	0:13413ea9a877	1375	/* Disable Rx and Tx DMA Request */
ganlikun	0:13413ea9a877	1376	CLEAR_BIT(hi2s->Instance->CR2,(SPI_CR2_RXDMAEN \| SPI_CR2_TXDMAEN));
ganlikun	0:13413ea9a877	1377	hi2s->TxXferCount = 0U;
ganlikun	0:13413ea9a877	1378	hi2s->RxXferCount = 0U;
ganlikun	0:13413ea9a877	1379
ganlikun	0:13413ea9a877	1380	hi2s->State= HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1381
ganlikun	0:13413ea9a877	1382	SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_DMA);
ganlikun	0:13413ea9a877	1383	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	1384	}
ganlikun	0:13413ea9a877	1385
ganlikun	0:13413ea9a877	1386	/**
ganlikun	0:13413ea9a877	1387	* @brief Transmit an amount of data in non-blocking mode with Interrupt
ganlikun	0:13413ea9a877	1388	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1389	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1390	* @retval HAL status
ganlikun	0:13413ea9a877	1391	*/
ganlikun	0:13413ea9a877	1392	static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1393	{
ganlikun	0:13413ea9a877	1394	/* Transmit data */
ganlikun	0:13413ea9a877	1395	hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
ganlikun	0:13413ea9a877	1396	hi2s->TxXferCount--;
ganlikun	0:13413ea9a877	1397
ganlikun	0:13413ea9a877	1398	if(hi2s->TxXferCount == 0U)
ganlikun	0:13413ea9a877	1399	{
ganlikun	0:13413ea9a877	1400	/* Disable TXE and ERR interrupt */
ganlikun	0:13413ea9a877	1401	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE \| I2S_IT_ERR));
ganlikun	0:13413ea9a877	1402
ganlikun	0:13413ea9a877	1403	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1404	HAL_I2S_TxCpltCallback(hi2s);
ganlikun	0:13413ea9a877	1405	}
ganlikun	0:13413ea9a877	1406	}
ganlikun	0:13413ea9a877	1407
ganlikun	0:13413ea9a877	1408	/**
ganlikun	0:13413ea9a877	1409	* @brief Receive an amount of data in non-blocking mode with Interrupt
ganlikun	0:13413ea9a877	1410	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1411	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1412	* @retval HAL status
ganlikun	0:13413ea9a877	1413	*/
ganlikun	0:13413ea9a877	1414	static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1415	{
ganlikun	0:13413ea9a877	1416	/* Receive data */
ganlikun	0:13413ea9a877	1417	(*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
ganlikun	0:13413ea9a877	1418	hi2s->RxXferCount--;
ganlikun	0:13413ea9a877	1419
ganlikun	0:13413ea9a877	1420	if(hi2s->RxXferCount == 0U)
ganlikun	0:13413ea9a877	1421	{
ganlikun	0:13413ea9a877	1422	/* Disable RXNE and ERR interrupt */
ganlikun	0:13413ea9a877	1423	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE \| I2S_IT_ERR));
ganlikun	0:13413ea9a877	1424
ganlikun	0:13413ea9a877	1425	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1426	HAL_I2S_RxCpltCallback(hi2s);
ganlikun	0:13413ea9a877	1427	}
ganlikun	0:13413ea9a877	1428	}
ganlikun	0:13413ea9a877	1429
ganlikun	0:13413ea9a877	1430	/**
ganlikun	0:13413ea9a877	1431	* @brief This function handles I2S interrupt request.
ganlikun	0:13413ea9a877	1432	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1433	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1434	* @retval None
ganlikun	0:13413ea9a877	1435	*/
ganlikun	0:13413ea9a877	1436	static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
ganlikun	0:13413ea9a877	1437	{
ganlikun	0:13413ea9a877	1438	__IO uint32_t i2ssr = hi2s->Instance->SR;
ganlikun	0:13413ea9a877	1439
ganlikun	0:13413ea9a877	1440	if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
ganlikun	0:13413ea9a877	1441	{
ganlikun	0:13413ea9a877	1442	/* I2S in mode Receiver ------------------------------------------------*/
ganlikun	0:13413ea9a877	1443	if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
ganlikun	0:13413ea9a877	1444	{
ganlikun	0:13413ea9a877	1445	I2S_Receive_IT(hi2s);
ganlikun	0:13413ea9a877	1446	}
ganlikun	0:13413ea9a877	1447
ganlikun	0:13413ea9a877	1448	/* I2S Overrun error interrupt occured -------------------------------------*/
ganlikun	0:13413ea9a877	1449	if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
ganlikun	0:13413ea9a877	1450	{
ganlikun	0:13413ea9a877	1451	/* Disable RXNE and ERR interrupt */
ganlikun	0:13413ea9a877	1452	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE \| I2S_IT_ERR));
ganlikun	0:13413ea9a877	1453
ganlikun	0:13413ea9a877	1454	/* Clear Overrun flag */
ganlikun	0:13413ea9a877	1455	__HAL_I2S_CLEAR_OVRFLAG(hi2s);
ganlikun	0:13413ea9a877	1456
ganlikun	0:13413ea9a877	1457	/* Set the I2S State ready */
ganlikun	0:13413ea9a877	1458	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1459
ganlikun	0:13413ea9a877	1460
ganlikun	0:13413ea9a877	1461	/* Set the error code and execute error callback*/
ganlikun	0:13413ea9a877	1462	SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_OVR);
ganlikun	0:13413ea9a877	1463	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	1464	}
ganlikun	0:13413ea9a877	1465	}
ganlikun	0:13413ea9a877	1466
ganlikun	0:13413ea9a877	1467	if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
ganlikun	0:13413ea9a877	1468	{
ganlikun	0:13413ea9a877	1469	/* I2S in mode Transmitter -----------------------------------------------*/
ganlikun	0:13413ea9a877	1470	if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
ganlikun	0:13413ea9a877	1471	{
ganlikun	0:13413ea9a877	1472	I2S_Transmit_IT(hi2s);
ganlikun	0:13413ea9a877	1473	}
ganlikun	0:13413ea9a877	1474
ganlikun	0:13413ea9a877	1475	/* I2S Underrun error interrupt occurred --------------------------------*/
ganlikun	0:13413ea9a877	1476	if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
ganlikun	0:13413ea9a877	1477	{
ganlikun	0:13413ea9a877	1478	/* Disable TXE and ERR interrupt */
ganlikun	0:13413ea9a877	1479	__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE \| I2S_IT_ERR));
ganlikun	0:13413ea9a877	1480
ganlikun	0:13413ea9a877	1481	/* Clear Underrun flag */
ganlikun	0:13413ea9a877	1482	__HAL_I2S_CLEAR_UDRFLAG(hi2s);
ganlikun	0:13413ea9a877	1483
ganlikun	0:13413ea9a877	1484	/* Set the I2S State ready */
ganlikun	0:13413ea9a877	1485	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1486
ganlikun	0:13413ea9a877	1487	/* Set the error code and execute error callback*/
ganlikun	0:13413ea9a877	1488	SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
ganlikun	0:13413ea9a877	1489	HAL_I2S_ErrorCallback(hi2s);
ganlikun	0:13413ea9a877	1490	}
ganlikun	0:13413ea9a877	1491	}
ganlikun	0:13413ea9a877	1492	}
ganlikun	0:13413ea9a877	1493
ganlikun	0:13413ea9a877	1494	/**
ganlikun	0:13413ea9a877	1495	* @brief This function handles I2S Communication Timeout.
ganlikun	0:13413ea9a877	1496	* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1497	* the configuration information for I2S module
ganlikun	0:13413ea9a877	1498	* @param Flag: Flag checked
ganlikun	0:13413ea9a877	1499	* @param State: Value of the flag expected
ganlikun	0:13413ea9a877	1500	* @param Timeout: Duration of the timeout
ganlikun	0:13413ea9a877	1501	* @retval HAL status
ganlikun	0:13413ea9a877	1502	*/
ganlikun	0:13413ea9a877	1503	static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State,
ganlikun	0:13413ea9a877	1504	uint32_t Timeout)
ganlikun	0:13413ea9a877	1505	{
ganlikun	0:13413ea9a877	1506	uint32_t tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1507
ganlikun	0:13413ea9a877	1508	/* Wait until flag is set to status*/
ganlikun	0:13413ea9a877	1509	while(((__HAL_I2S_GET_FLAG(hi2s, Flag)) ? SET : RESET) != State)
ganlikun	0:13413ea9a877	1510	{
ganlikun	0:13413ea9a877	1511	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	1512	{
ganlikun	0:13413ea9a877	1513	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
ganlikun	0:13413ea9a877	1514	{
ganlikun	0:13413ea9a877	1515	/* Set the I2S State ready */
ganlikun	0:13413ea9a877	1516	hi2s->State = HAL_I2S_STATE_READY;
ganlikun	0:13413ea9a877	1517
ganlikun	0:13413ea9a877	1518	/* Process Unlocked */
ganlikun	0:13413ea9a877	1519	__HAL_UNLOCK(hi2s);
ganlikun	0:13413ea9a877	1520
ganlikun	0:13413ea9a877	1521	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1522	}
ganlikun	0:13413ea9a877	1523	}
ganlikun	0:13413ea9a877	1524	}
ganlikun	0:13413ea9a877	1525	return HAL_OK;
ganlikun	0:13413ea9a877	1526	}
ganlikun	0:13413ea9a877	1527
ganlikun	0:13413ea9a877	1528	/**
ganlikun	0:13413ea9a877	1529	* @}
ganlikun	0:13413ea9a877	1530	*/
ganlikun	0:13413ea9a877	1531
ganlikun	0:13413ea9a877	1532	/**
ganlikun	0:13413ea9a877	1533	* @}
ganlikun	0:13413ea9a877	1534	*/
ganlikun	0:13413ea9a877	1535
ganlikun	0:13413ea9a877	1536	#endif /* HAL_I2S_MODULE_ENABLED */
ganlikun	0:13413ea9a877	1537	/**
ganlikun	0:13413ea9a877	1538	* @}
ganlikun	0:13413ea9a877	1539	*/
ganlikun	0:13413ea9a877	1540
ganlikun	0:13413ea9a877	1541	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	1542

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Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	1

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.c@0:13413ea9a877, 2022-06-12 (annotated)

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