001

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

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ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_flash_ex.h
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief Header file of FLASH HAL Extension module.
ganlikun 0:13413ea9a877 8 ******************************************************************************
ganlikun 0:13413ea9a877 9 * @attention
ganlikun 0:13413ea9a877 10 *
ganlikun 0:13413ea9a877 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 12 *
ganlikun 0:13413ea9a877 13 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 14 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 15 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 16 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 18 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 19 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 21 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 22 * without specific prior written permission.
ganlikun 0:13413ea9a877 23 *
ganlikun 0:13413ea9a877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 34 *
ganlikun 0:13413ea9a877 35 ******************************************************************************
ganlikun 0:13413ea9a877 36 */
ganlikun 0:13413ea9a877 37
ganlikun 0:13413ea9a877 38 /* Define to prevent recursive inclusion -------------------------------------*/
ganlikun 0:13413ea9a877 39 #ifndef __STM32F4xx_HAL_FLASH_EX_H
ganlikun 0:13413ea9a877 40 #define __STM32F4xx_HAL_FLASH_EX_H
ganlikun 0:13413ea9a877 41
ganlikun 0:13413ea9a877 42 #ifdef __cplusplus
ganlikun 0:13413ea9a877 43 extern "C" {
ganlikun 0:13413ea9a877 44 #endif
ganlikun 0:13413ea9a877 45
ganlikun 0:13413ea9a877 46 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 47 #include "stm32f4xx_hal_def.h"
ganlikun 0:13413ea9a877 48
ganlikun 0:13413ea9a877 49 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 50 * @{
ganlikun 0:13413ea9a877 51 */
ganlikun 0:13413ea9a877 52
ganlikun 0:13413ea9a877 53 /** @addtogroup FLASHEx
ganlikun 0:13413ea9a877 54 * @{
ganlikun 0:13413ea9a877 55 */
ganlikun 0:13413ea9a877 56
ganlikun 0:13413ea9a877 57 /* Exported types ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 58 /** @defgroup FLASHEx_Exported_Types FLASH Exported Types
ganlikun 0:13413ea9a877 59 * @{
ganlikun 0:13413ea9a877 60 */
ganlikun 0:13413ea9a877 61
ganlikun 0:13413ea9a877 62 /**
ganlikun 0:13413ea9a877 63 * @brief FLASH Erase structure definition
ganlikun 0:13413ea9a877 64 */
ganlikun 0:13413ea9a877 65 typedef struct
ganlikun 0:13413ea9a877 66 {
ganlikun 0:13413ea9a877 67 uint32_t TypeErase; /*!< Mass erase or sector Erase.
ganlikun 0:13413ea9a877 68 This parameter can be a value of @ref FLASHEx_Type_Erase */
ganlikun 0:13413ea9a877 69
ganlikun 0:13413ea9a877 70 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
ganlikun 0:13413ea9a877 71 This parameter must be a value of @ref FLASHEx_Banks */
ganlikun 0:13413ea9a877 72
ganlikun 0:13413ea9a877 73 uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
ganlikun 0:13413ea9a877 74 This parameter must be a value of @ref FLASHEx_Sectors */
ganlikun 0:13413ea9a877 75
ganlikun 0:13413ea9a877 76 uint32_t NbSectors; /*!< Number of sectors to be erased.
ganlikun 0:13413ea9a877 77 This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
ganlikun 0:13413ea9a877 78
ganlikun 0:13413ea9a877 79 uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
ganlikun 0:13413ea9a877 80 This parameter must be a value of @ref FLASHEx_Voltage_Range */
ganlikun 0:13413ea9a877 81
ganlikun 0:13413ea9a877 82 } FLASH_EraseInitTypeDef;
ganlikun 0:13413ea9a877 83
ganlikun 0:13413ea9a877 84 /**
ganlikun 0:13413ea9a877 85 * @brief FLASH Option Bytes Program structure definition
ganlikun 0:13413ea9a877 86 */
ganlikun 0:13413ea9a877 87 typedef struct
ganlikun 0:13413ea9a877 88 {
ganlikun 0:13413ea9a877 89 uint32_t OptionType; /*!< Option byte to be configured.
ganlikun 0:13413ea9a877 90 This parameter can be a value of @ref FLASHEx_Option_Type */
ganlikun 0:13413ea9a877 91
ganlikun 0:13413ea9a877 92 uint32_t WRPState; /*!< Write protection activation or deactivation.
ganlikun 0:13413ea9a877 93 This parameter can be a value of @ref FLASHEx_WRP_State */
ganlikun 0:13413ea9a877 94
ganlikun 0:13413ea9a877 95 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
ganlikun 0:13413ea9a877 96 The value of this parameter depend on device used within the same series */
ganlikun 0:13413ea9a877 97
ganlikun 0:13413ea9a877 98 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
ganlikun 0:13413ea9a877 99 This parameter must be a value of @ref FLASHEx_Banks */
ganlikun 0:13413ea9a877 100
ganlikun 0:13413ea9a877 101 uint32_t RDPLevel; /*!< Set the read protection level.
ganlikun 0:13413ea9a877 102 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
ganlikun 0:13413ea9a877 103
ganlikun 0:13413ea9a877 104 uint32_t BORLevel; /*!< Set the BOR Level.
ganlikun 0:13413ea9a877 105 This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
ganlikun 0:13413ea9a877 106
ganlikun 0:13413ea9a877 107 uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */
ganlikun 0:13413ea9a877 108
ganlikun 0:13413ea9a877 109 } FLASH_OBProgramInitTypeDef;
ganlikun 0:13413ea9a877 110
ganlikun 0:13413ea9a877 111 /**
ganlikun 0:13413ea9a877 112 * @brief FLASH Advanced Option Bytes Program structure definition
ganlikun 0:13413ea9a877 113 */
ganlikun 0:13413ea9a877 114 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 115 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 116 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
ganlikun 0:13413ea9a877 117 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
ganlikun 0:13413ea9a877 118 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 119 typedef struct
ganlikun 0:13413ea9a877 120 {
ganlikun 0:13413ea9a877 121 uint32_t OptionType; /*!< Option byte to be configured for extension.
ganlikun 0:13413ea9a877 122 This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
ganlikun 0:13413ea9a877 123
ganlikun 0:13413ea9a877 124 uint32_t PCROPState; /*!< PCROP activation or deactivation.
ganlikun 0:13413ea9a877 125 This parameter can be a value of @ref FLASHEx_PCROP_State */
ganlikun 0:13413ea9a877 126
ganlikun 0:13413ea9a877 127 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 128 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 129 uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
ganlikun 0:13413ea9a877 130 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
ganlikun 0:13413ea9a877 131 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx ||\
ganlikun 0:13413ea9a877 132 STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 133
ganlikun 0:13413ea9a877 134 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 135 uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
ganlikun 0:13413ea9a877 136 This parameter must be a value of @ref FLASHEx_Banks */
ganlikun 0:13413ea9a877 137
ganlikun 0:13413ea9a877 138 uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
ganlikun 0:13413ea9a877 139 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
ganlikun 0:13413ea9a877 140
ganlikun 0:13413ea9a877 141 uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
ganlikun 0:13413ea9a877 142 This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
ganlikun 0:13413ea9a877 143
ganlikun 0:13413ea9a877 144 uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
ganlikun 0:13413ea9a877 145 This parameter can be a value of @ref FLASHEx_Dual_Boot */
ganlikun 0:13413ea9a877 146
ganlikun 0:13413ea9a877 147 #endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 148 }FLASH_AdvOBProgramInitTypeDef;
ganlikun 0:13413ea9a877 149 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx ||
ganlikun 0:13413ea9a877 150 STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 151 /**
ganlikun 0:13413ea9a877 152 * @}
ganlikun 0:13413ea9a877 153 */
ganlikun 0:13413ea9a877 154
ganlikun 0:13413ea9a877 155 /* Exported constants --------------------------------------------------------*/
ganlikun 0:13413ea9a877 156
ganlikun 0:13413ea9a877 157 /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
ganlikun 0:13413ea9a877 158 * @{
ganlikun 0:13413ea9a877 159 */
ganlikun 0:13413ea9a877 160
ganlikun 0:13413ea9a877 161 /** @defgroup FLASHEx_Type_Erase FLASH Type Erase
ganlikun 0:13413ea9a877 162 * @{
ganlikun 0:13413ea9a877 163 */
ganlikun 0:13413ea9a877 164 #define FLASH_TYPEERASE_SECTORS 0x00000000U /*!< Sectors erase only */
ganlikun 0:13413ea9a877 165 #define FLASH_TYPEERASE_MASSERASE 0x00000001U /*!< Flash Mass erase activation */
ganlikun 0:13413ea9a877 166 /**
ganlikun 0:13413ea9a877 167 * @}
ganlikun 0:13413ea9a877 168 */
ganlikun 0:13413ea9a877 169
ganlikun 0:13413ea9a877 170 /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
ganlikun 0:13413ea9a877 171 * @{
ganlikun 0:13413ea9a877 172 */
ganlikun 0:13413ea9a877 173 #define FLASH_VOLTAGE_RANGE_1 0x00000000U /*!< Device operating range: 1.8V to 2.1V */
ganlikun 0:13413ea9a877 174 #define FLASH_VOLTAGE_RANGE_2 0x00000001U /*!< Device operating range: 2.1V to 2.7V */
ganlikun 0:13413ea9a877 175 #define FLASH_VOLTAGE_RANGE_3 0x00000002U /*!< Device operating range: 2.7V to 3.6V */
ganlikun 0:13413ea9a877 176 #define FLASH_VOLTAGE_RANGE_4 0x00000003U /*!< Device operating range: 2.7V to 3.6V + External Vpp */
ganlikun 0:13413ea9a877 177 /**
ganlikun 0:13413ea9a877 178 * @}
ganlikun 0:13413ea9a877 179 */
ganlikun 0:13413ea9a877 180
ganlikun 0:13413ea9a877 181 /** @defgroup FLASHEx_WRP_State FLASH WRP State
ganlikun 0:13413ea9a877 182 * @{
ganlikun 0:13413ea9a877 183 */
ganlikun 0:13413ea9a877 184 #define OB_WRPSTATE_DISABLE 0x00000000U /*!< Disable the write protection of the desired bank 1 sectors */
ganlikun 0:13413ea9a877 185 #define OB_WRPSTATE_ENABLE 0x00000001U /*!< Enable the write protection of the desired bank 1 sectors */
ganlikun 0:13413ea9a877 186 /**
ganlikun 0:13413ea9a877 187 * @}
ganlikun 0:13413ea9a877 188 */
ganlikun 0:13413ea9a877 189
ganlikun 0:13413ea9a877 190 /** @defgroup FLASHEx_Option_Type FLASH Option Type
ganlikun 0:13413ea9a877 191 * @{
ganlikun 0:13413ea9a877 192 */
ganlikun 0:13413ea9a877 193 #define OPTIONBYTE_WRP 0x00000001U /*!< WRP option byte configuration */
ganlikun 0:13413ea9a877 194 #define OPTIONBYTE_RDP 0x00000002U /*!< RDP option byte configuration */
ganlikun 0:13413ea9a877 195 #define OPTIONBYTE_USER 0x00000004U /*!< USER option byte configuration */
ganlikun 0:13413ea9a877 196 #define OPTIONBYTE_BOR 0x00000008U /*!< BOR option byte configuration */
ganlikun 0:13413ea9a877 197 /**
ganlikun 0:13413ea9a877 198 * @}
ganlikun 0:13413ea9a877 199 */
ganlikun 0:13413ea9a877 200
ganlikun 0:13413ea9a877 201 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
ganlikun 0:13413ea9a877 202 * @{
ganlikun 0:13413ea9a877 203 */
ganlikun 0:13413ea9a877 204 #define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
ganlikun 0:13413ea9a877 205 #define OB_RDP_LEVEL_1 ((uint8_t)0x55)
ganlikun 0:13413ea9a877 206 #define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
ganlikun 0:13413ea9a877 207 it s no more possible to go back to level 1 or 0 */
ganlikun 0:13413ea9a877 208 /**
ganlikun 0:13413ea9a877 209 * @}
ganlikun 0:13413ea9a877 210 */
ganlikun 0:13413ea9a877 211
ganlikun 0:13413ea9a877 212 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
ganlikun 0:13413ea9a877 213 * @{
ganlikun 0:13413ea9a877 214 */
ganlikun 0:13413ea9a877 215 #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */
ganlikun 0:13413ea9a877 216 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
ganlikun 0:13413ea9a877 217 /**
ganlikun 0:13413ea9a877 218 * @}
ganlikun 0:13413ea9a877 219 */
ganlikun 0:13413ea9a877 220
ganlikun 0:13413ea9a877 221 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
ganlikun 0:13413ea9a877 222 * @{
ganlikun 0:13413ea9a877 223 */
ganlikun 0:13413ea9a877 224 #define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
ganlikun 0:13413ea9a877 225 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
ganlikun 0:13413ea9a877 226 /**
ganlikun 0:13413ea9a877 227 * @}
ganlikun 0:13413ea9a877 228 */
ganlikun 0:13413ea9a877 229
ganlikun 0:13413ea9a877 230
ganlikun 0:13413ea9a877 231 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
ganlikun 0:13413ea9a877 232 * @{
ganlikun 0:13413ea9a877 233 */
ganlikun 0:13413ea9a877 234 #define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
ganlikun 0:13413ea9a877 235 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
ganlikun 0:13413ea9a877 236 /**
ganlikun 0:13413ea9a877 237 * @}
ganlikun 0:13413ea9a877 238 */
ganlikun 0:13413ea9a877 239
ganlikun 0:13413ea9a877 240 /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
ganlikun 0:13413ea9a877 241 * @{
ganlikun 0:13413ea9a877 242 */
ganlikun 0:13413ea9a877 243 #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
ganlikun 0:13413ea9a877 244 #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
ganlikun 0:13413ea9a877 245 #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
ganlikun 0:13413ea9a877 246 #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
ganlikun 0:13413ea9a877 247 /**
ganlikun 0:13413ea9a877 248 * @}
ganlikun 0:13413ea9a877 249 */
ganlikun 0:13413ea9a877 250
ganlikun 0:13413ea9a877 251 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 252 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 253 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
ganlikun 0:13413ea9a877 254 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
ganlikun 0:13413ea9a877 255 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 256 /** @defgroup FLASHEx_PCROP_State FLASH PCROP State
ganlikun 0:13413ea9a877 257 * @{
ganlikun 0:13413ea9a877 258 */
ganlikun 0:13413ea9a877 259 #define OB_PCROP_STATE_DISABLE 0x00000000U /*!< Disable PCROP */
ganlikun 0:13413ea9a877 260 #define OB_PCROP_STATE_ENABLE 0x00000001U /*!< Enable PCROP */
ganlikun 0:13413ea9a877 261 /**
ganlikun 0:13413ea9a877 262 * @}
ganlikun 0:13413ea9a877 263 */
ganlikun 0:13413ea9a877 264 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
ganlikun 0:13413ea9a877 265 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
ganlikun 0:13413ea9a877 266 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 267
ganlikun 0:13413ea9a877 268 /** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
ganlikun 0:13413ea9a877 269 * @{
ganlikun 0:13413ea9a877 270 */
ganlikun 0:13413ea9a877 271 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 272 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 273 #define OPTIONBYTE_PCROP 0x00000001U /*!< PCROP option byte configuration */
ganlikun 0:13413ea9a877 274 #define OPTIONBYTE_BOOTCONFIG 0x00000002U /*!< BOOTConfig option byte configuration */
ganlikun 0:13413ea9a877 275 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 276
ganlikun 0:13413ea9a877 277 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 278 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 279 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
ganlikun 0:13413ea9a877 280 defined(STM32F423xx)
ganlikun 0:13413ea9a877 281 #define OPTIONBYTE_PCROP 0x00000001U /*!<PCROP option byte configuration */
ganlikun 0:13413ea9a877 282 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
ganlikun 0:13413ea9a877 283 STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 284 /**
ganlikun 0:13413ea9a877 285 * @}
ganlikun 0:13413ea9a877 286 */
ganlikun 0:13413ea9a877 287
ganlikun 0:13413ea9a877 288 /** @defgroup FLASH_Latency FLASH Latency
ganlikun 0:13413ea9a877 289 * @{
ganlikun 0:13413ea9a877 290 */
ganlikun 0:13413ea9a877 291 /*------------------------- STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479xx ----------------------*/
ganlikun 0:13413ea9a877 292 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 293 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 294 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
ganlikun 0:13413ea9a877 295 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
ganlikun 0:13413ea9a877 296 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
ganlikun 0:13413ea9a877 297 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
ganlikun 0:13413ea9a877 298 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
ganlikun 0:13413ea9a877 299 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
ganlikun 0:13413ea9a877 300 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
ganlikun 0:13413ea9a877 301 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
ganlikun 0:13413ea9a877 302 #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */
ganlikun 0:13413ea9a877 303 #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */
ganlikun 0:13413ea9a877 304 #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */
ganlikun 0:13413ea9a877 305 #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */
ganlikun 0:13413ea9a877 306 #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */
ganlikun 0:13413ea9a877 307 #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */
ganlikun 0:13413ea9a877 308 #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */
ganlikun 0:13413ea9a877 309 #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */
ganlikun 0:13413ea9a877 310 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 311 /*--------------------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 312
ganlikun 0:13413ea9a877 313 /*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx/STM32F423xx -----------------------*/
ganlikun 0:13413ea9a877 314 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
ganlikun 0:13413ea9a877 315 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 316 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
ganlikun 0:13413ea9a877 317 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 318
ganlikun 0:13413ea9a877 319 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
ganlikun 0:13413ea9a877 320 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
ganlikun 0:13413ea9a877 321 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
ganlikun 0:13413ea9a877 322 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
ganlikun 0:13413ea9a877 323 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
ganlikun 0:13413ea9a877 324 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
ganlikun 0:13413ea9a877 325 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
ganlikun 0:13413ea9a877 326 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
ganlikun 0:13413ea9a877 327 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
ganlikun 0:13413ea9a877 328 STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 329 /*--------------------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 330
ganlikun 0:13413ea9a877 331 /**
ganlikun 0:13413ea9a877 332 * @}
ganlikun 0:13413ea9a877 333 */
ganlikun 0:13413ea9a877 334
ganlikun 0:13413ea9a877 335
ganlikun 0:13413ea9a877 336 /** @defgroup FLASHEx_Banks FLASH Banks
ganlikun 0:13413ea9a877 337 * @{
ganlikun 0:13413ea9a877 338 */
ganlikun 0:13413ea9a877 339 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 340 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 341 #define FLASH_BANK_1 1U /*!< Bank 1 */
ganlikun 0:13413ea9a877 342 #define FLASH_BANK_2 2U /*!< Bank 2 */
ganlikun 0:13413ea9a877 343 #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */
ganlikun 0:13413ea9a877 344 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 345
ganlikun 0:13413ea9a877 346 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
ganlikun 0:13413ea9a877 347 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 348 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 349 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
ganlikun 0:13413ea9a877 350 defined(STM32F423xx)
ganlikun 0:13413ea9a877 351 #define FLASH_BANK_1 1U /*!< Bank 1 */
ganlikun 0:13413ea9a877 352 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
ganlikun 0:13413ea9a877 353 STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 354 /**
ganlikun 0:13413ea9a877 355 * @}
ganlikun 0:13413ea9a877 356 */
ganlikun 0:13413ea9a877 357
ganlikun 0:13413ea9a877 358 /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
ganlikun 0:13413ea9a877 359 * @{
ganlikun 0:13413ea9a877 360 */
ganlikun 0:13413ea9a877 361 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 362 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 363 #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */
ganlikun 0:13413ea9a877 364 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 365
ganlikun 0:13413ea9a877 366 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
ganlikun 0:13413ea9a877 367 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 368 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 369 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
ganlikun 0:13413ea9a877 370 defined(STM32F423xx)
ganlikun 0:13413ea9a877 371 #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */
ganlikun 0:13413ea9a877 372 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
ganlikun 0:13413ea9a877 373 STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 374 /**
ganlikun 0:13413ea9a877 375 * @}
ganlikun 0:13413ea9a877 376 */
ganlikun 0:13413ea9a877 377
ganlikun 0:13413ea9a877 378 /** @defgroup FLASHEx_Sectors FLASH Sectors
ganlikun 0:13413ea9a877 379 * @{
ganlikun 0:13413ea9a877 380 */
ganlikun 0:13413ea9a877 381 /*-------------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx ------------------------------------*/
ganlikun 0:13413ea9a877 382 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 383 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 384 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
ganlikun 0:13413ea9a877 385 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
ganlikun 0:13413ea9a877 386 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
ganlikun 0:13413ea9a877 387 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
ganlikun 0:13413ea9a877 388 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
ganlikun 0:13413ea9a877 389 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
ganlikun 0:13413ea9a877 390 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
ganlikun 0:13413ea9a877 391 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
ganlikun 0:13413ea9a877 392 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */
ganlikun 0:13413ea9a877 393 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */
ganlikun 0:13413ea9a877 394 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */
ganlikun 0:13413ea9a877 395 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */
ganlikun 0:13413ea9a877 396 #define FLASH_SECTOR_12 12U /*!< Sector Number 12 */
ganlikun 0:13413ea9a877 397 #define FLASH_SECTOR_13 13U /*!< Sector Number 13 */
ganlikun 0:13413ea9a877 398 #define FLASH_SECTOR_14 14U /*!< Sector Number 14 */
ganlikun 0:13413ea9a877 399 #define FLASH_SECTOR_15 15U /*!< Sector Number 15 */
ganlikun 0:13413ea9a877 400 #define FLASH_SECTOR_16 16U /*!< Sector Number 16 */
ganlikun 0:13413ea9a877 401 #define FLASH_SECTOR_17 17U /*!< Sector Number 17 */
ganlikun 0:13413ea9a877 402 #define FLASH_SECTOR_18 18U /*!< Sector Number 18 */
ganlikun 0:13413ea9a877 403 #define FLASH_SECTOR_19 19U /*!< Sector Number 19 */
ganlikun 0:13413ea9a877 404 #define FLASH_SECTOR_20 20U /*!< Sector Number 20 */
ganlikun 0:13413ea9a877 405 #define FLASH_SECTOR_21 21U /*!< Sector Number 21 */
ganlikun 0:13413ea9a877 406 #define FLASH_SECTOR_22 22U /*!< Sector Number 22 */
ganlikun 0:13413ea9a877 407 #define FLASH_SECTOR_23 23U /*!< Sector Number 23 */
ganlikun 0:13413ea9a877 408 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 409 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 410
ganlikun 0:13413ea9a877 411 /*-------------------------------------- STM32F413xx/STM32F423xx --------------------------------------*/
ganlikun 0:13413ea9a877 412 #if defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 413 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
ganlikun 0:13413ea9a877 414 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
ganlikun 0:13413ea9a877 415 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
ganlikun 0:13413ea9a877 416 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
ganlikun 0:13413ea9a877 417 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
ganlikun 0:13413ea9a877 418 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
ganlikun 0:13413ea9a877 419 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
ganlikun 0:13413ea9a877 420 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
ganlikun 0:13413ea9a877 421 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */
ganlikun 0:13413ea9a877 422 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */
ganlikun 0:13413ea9a877 423 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */
ganlikun 0:13413ea9a877 424 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */
ganlikun 0:13413ea9a877 425 #define FLASH_SECTOR_12 12U /*!< Sector Number 12 */
ganlikun 0:13413ea9a877 426 #define FLASH_SECTOR_13 13U /*!< Sector Number 13 */
ganlikun 0:13413ea9a877 427 #define FLASH_SECTOR_14 14U /*!< Sector Number 14 */
ganlikun 0:13413ea9a877 428 #define FLASH_SECTOR_15 15U /*!< Sector Number 15 */
ganlikun 0:13413ea9a877 429 #endif /* STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 430 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 431
ganlikun 0:13413ea9a877 432 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
ganlikun 0:13413ea9a877 433 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 434 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
ganlikun 0:13413ea9a877 435 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
ganlikun 0:13413ea9a877 436 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
ganlikun 0:13413ea9a877 437 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
ganlikun 0:13413ea9a877 438 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
ganlikun 0:13413ea9a877 439 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
ganlikun 0:13413ea9a877 440 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
ganlikun 0:13413ea9a877 441 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
ganlikun 0:13413ea9a877 442 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
ganlikun 0:13413ea9a877 443 #define FLASH_SECTOR_8 8U /*!< Sector Number 8 */
ganlikun 0:13413ea9a877 444 #define FLASH_SECTOR_9 9U /*!< Sector Number 9 */
ganlikun 0:13413ea9a877 445 #define FLASH_SECTOR_10 10U /*!< Sector Number 10 */
ganlikun 0:13413ea9a877 446 #define FLASH_SECTOR_11 11U /*!< Sector Number 11 */
ganlikun 0:13413ea9a877 447 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
ganlikun 0:13413ea9a877 448 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 449
ganlikun 0:13413ea9a877 450 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
ganlikun 0:13413ea9a877 451 #if defined(STM32F401xC)
ganlikun 0:13413ea9a877 452 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
ganlikun 0:13413ea9a877 453 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
ganlikun 0:13413ea9a877 454 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
ganlikun 0:13413ea9a877 455 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
ganlikun 0:13413ea9a877 456 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
ganlikun 0:13413ea9a877 457 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
ganlikun 0:13413ea9a877 458 #endif /* STM32F401xC */
ganlikun 0:13413ea9a877 459 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 460
ganlikun 0:13413ea9a877 461 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
ganlikun 0:13413ea9a877 462 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 463 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
ganlikun 0:13413ea9a877 464 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
ganlikun 0:13413ea9a877 465 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
ganlikun 0:13413ea9a877 466 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
ganlikun 0:13413ea9a877 467 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
ganlikun 0:13413ea9a877 468 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 469 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 470
ganlikun 0:13413ea9a877 471 /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
ganlikun 0:13413ea9a877 472 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
ganlikun 0:13413ea9a877 473 #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */
ganlikun 0:13413ea9a877 474 #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */
ganlikun 0:13413ea9a877 475 #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */
ganlikun 0:13413ea9a877 476 #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */
ganlikun 0:13413ea9a877 477 #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */
ganlikun 0:13413ea9a877 478 #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */
ganlikun 0:13413ea9a877 479 #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */
ganlikun 0:13413ea9a877 480 #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */
ganlikun 0:13413ea9a877 481 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
ganlikun 0:13413ea9a877 482 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 483
ganlikun 0:13413ea9a877 484 /**
ganlikun 0:13413ea9a877 485 * @}
ganlikun 0:13413ea9a877 486 */
ganlikun 0:13413ea9a877 487
ganlikun 0:13413ea9a877 488 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
ganlikun 0:13413ea9a877 489 * @{
ganlikun 0:13413ea9a877 490 */
ganlikun 0:13413ea9a877 491 /*--------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx -------------------------*/
ganlikun 0:13413ea9a877 492 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 493 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 494 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
ganlikun 0:13413ea9a877 495 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
ganlikun 0:13413ea9a877 496 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
ganlikun 0:13413ea9a877 497 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
ganlikun 0:13413ea9a877 498 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
ganlikun 0:13413ea9a877 499 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
ganlikun 0:13413ea9a877 500 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
ganlikun 0:13413ea9a877 501 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
ganlikun 0:13413ea9a877 502 #define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */
ganlikun 0:13413ea9a877 503 #define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */
ganlikun 0:13413ea9a877 504 #define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */
ganlikun 0:13413ea9a877 505 #define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */
ganlikun 0:13413ea9a877 506 #define OB_WRP_SECTOR_12 0x00000001U << 12U /*!< Write protection of Sector12 */
ganlikun 0:13413ea9a877 507 #define OB_WRP_SECTOR_13 0x00000002U << 12U /*!< Write protection of Sector13 */
ganlikun 0:13413ea9a877 508 #define OB_WRP_SECTOR_14 0x00000004U << 12U /*!< Write protection of Sector14 */
ganlikun 0:13413ea9a877 509 #define OB_WRP_SECTOR_15 0x00000008U << 12U /*!< Write protection of Sector15 */
ganlikun 0:13413ea9a877 510 #define OB_WRP_SECTOR_16 0x00000010U << 12U /*!< Write protection of Sector16 */
ganlikun 0:13413ea9a877 511 #define OB_WRP_SECTOR_17 0x00000020U << 12U /*!< Write protection of Sector17 */
ganlikun 0:13413ea9a877 512 #define OB_WRP_SECTOR_18 0x00000040U << 12U /*!< Write protection of Sector18 */
ganlikun 0:13413ea9a877 513 #define OB_WRP_SECTOR_19 0x00000080U << 12U /*!< Write protection of Sector19 */
ganlikun 0:13413ea9a877 514 #define OB_WRP_SECTOR_20 0x00000100U << 12U /*!< Write protection of Sector20 */
ganlikun 0:13413ea9a877 515 #define OB_WRP_SECTOR_21 0x00000200U << 12U /*!< Write protection of Sector21 */
ganlikun 0:13413ea9a877 516 #define OB_WRP_SECTOR_22 0x00000400U << 12U /*!< Write protection of Sector22 */
ganlikun 0:13413ea9a877 517 #define OB_WRP_SECTOR_23 0x00000800U << 12U /*!< Write protection of Sector23 */
ganlikun 0:13413ea9a877 518 #define OB_WRP_SECTOR_All 0x00000FFFU << 12U /*!< Write protection of all Sectors */
ganlikun 0:13413ea9a877 519 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 520 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 521
ganlikun 0:13413ea9a877 522 /*--------------------------------------- STM32F413xx/STM32F423xx -------------------------------------*/
ganlikun 0:13413ea9a877 523 #if defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 524 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
ganlikun 0:13413ea9a877 525 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
ganlikun 0:13413ea9a877 526 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
ganlikun 0:13413ea9a877 527 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
ganlikun 0:13413ea9a877 528 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
ganlikun 0:13413ea9a877 529 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
ganlikun 0:13413ea9a877 530 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
ganlikun 0:13413ea9a877 531 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
ganlikun 0:13413ea9a877 532 #define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */
ganlikun 0:13413ea9a877 533 #define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */
ganlikun 0:13413ea9a877 534 #define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */
ganlikun 0:13413ea9a877 535 #define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */
ganlikun 0:13413ea9a877 536 #define OB_WRP_SECTOR_12 0x00001000U /*!< Write protection of Sector12 */
ganlikun 0:13413ea9a877 537 #define OB_WRP_SECTOR_13 0x00002000U /*!< Write protection of Sector13 */
ganlikun 0:13413ea9a877 538 #define OB_WRP_SECTOR_14 0x00004000U /*!< Write protection of Sector14 */
ganlikun 0:13413ea9a877 539 #define OB_WRP_SECTOR_15 0x00004000U /*!< Write protection of Sector15 */
ganlikun 0:13413ea9a877 540 #define OB_WRP_SECTOR_All 0x00007FFFU /*!< Write protection of all Sectors */
ganlikun 0:13413ea9a877 541 #endif /* STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 542 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 543
ganlikun 0:13413ea9a877 544 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
ganlikun 0:13413ea9a877 545 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 546 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
ganlikun 0:13413ea9a877 547 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
ganlikun 0:13413ea9a877 548 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
ganlikun 0:13413ea9a877 549 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
ganlikun 0:13413ea9a877 550 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
ganlikun 0:13413ea9a877 551 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
ganlikun 0:13413ea9a877 552 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
ganlikun 0:13413ea9a877 553 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
ganlikun 0:13413ea9a877 554 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
ganlikun 0:13413ea9a877 555 #define OB_WRP_SECTOR_8 0x00000100U /*!< Write protection of Sector8 */
ganlikun 0:13413ea9a877 556 #define OB_WRP_SECTOR_9 0x00000200U /*!< Write protection of Sector9 */
ganlikun 0:13413ea9a877 557 #define OB_WRP_SECTOR_10 0x00000400U /*!< Write protection of Sector10 */
ganlikun 0:13413ea9a877 558 #define OB_WRP_SECTOR_11 0x00000800U /*!< Write protection of Sector11 */
ganlikun 0:13413ea9a877 559 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
ganlikun 0:13413ea9a877 560 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
ganlikun 0:13413ea9a877 561 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 562
ganlikun 0:13413ea9a877 563 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
ganlikun 0:13413ea9a877 564 #if defined(STM32F401xC)
ganlikun 0:13413ea9a877 565 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
ganlikun 0:13413ea9a877 566 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
ganlikun 0:13413ea9a877 567 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
ganlikun 0:13413ea9a877 568 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
ganlikun 0:13413ea9a877 569 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
ganlikun 0:13413ea9a877 570 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
ganlikun 0:13413ea9a877 571 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
ganlikun 0:13413ea9a877 572 #endif /* STM32F401xC */
ganlikun 0:13413ea9a877 573 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 574
ganlikun 0:13413ea9a877 575 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
ganlikun 0:13413ea9a877 576 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 577 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
ganlikun 0:13413ea9a877 578 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
ganlikun 0:13413ea9a877 579 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
ganlikun 0:13413ea9a877 580 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
ganlikun 0:13413ea9a877 581 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
ganlikun 0:13413ea9a877 582 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
ganlikun 0:13413ea9a877 583 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 584 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 585
ganlikun 0:13413ea9a877 586 /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/
ganlikun 0:13413ea9a877 587 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
ganlikun 0:13413ea9a877 588 #define OB_WRP_SECTOR_0 0x00000001U /*!< Write protection of Sector0 */
ganlikun 0:13413ea9a877 589 #define OB_WRP_SECTOR_1 0x00000002U /*!< Write protection of Sector1 */
ganlikun 0:13413ea9a877 590 #define OB_WRP_SECTOR_2 0x00000004U /*!< Write protection of Sector2 */
ganlikun 0:13413ea9a877 591 #define OB_WRP_SECTOR_3 0x00000008U /*!< Write protection of Sector3 */
ganlikun 0:13413ea9a877 592 #define OB_WRP_SECTOR_4 0x00000010U /*!< Write protection of Sector4 */
ganlikun 0:13413ea9a877 593 #define OB_WRP_SECTOR_5 0x00000020U /*!< Write protection of Sector5 */
ganlikun 0:13413ea9a877 594 #define OB_WRP_SECTOR_6 0x00000040U /*!< Write protection of Sector6 */
ganlikun 0:13413ea9a877 595 #define OB_WRP_SECTOR_7 0x00000080U /*!< Write protection of Sector7 */
ganlikun 0:13413ea9a877 596 #define OB_WRP_SECTOR_All 0x00000FFFU /*!< Write protection of all Sectors */
ganlikun 0:13413ea9a877 597 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
ganlikun 0:13413ea9a877 598 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 599 /**
ganlikun 0:13413ea9a877 600 * @}
ganlikun 0:13413ea9a877 601 */
ganlikun 0:13413ea9a877 602
ganlikun 0:13413ea9a877 603 /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
ganlikun 0:13413ea9a877 604 * @{
ganlikun 0:13413ea9a877 605 */
ganlikun 0:13413ea9a877 606 /*-------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ---------------------------*/
ganlikun 0:13413ea9a877 607 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 608 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 609 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
ganlikun 0:13413ea9a877 610 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
ganlikun 0:13413ea9a877 611 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
ganlikun 0:13413ea9a877 612 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
ganlikun 0:13413ea9a877 613 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
ganlikun 0:13413ea9a877 614 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
ganlikun 0:13413ea9a877 615 #define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */
ganlikun 0:13413ea9a877 616 #define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */
ganlikun 0:13413ea9a877 617 #define OB_PCROP_SECTOR_8 0x00000100U /*!< PC Read/Write protection of Sector8 */
ganlikun 0:13413ea9a877 618 #define OB_PCROP_SECTOR_9 0x00000200U /*!< PC Read/Write protection of Sector9 */
ganlikun 0:13413ea9a877 619 #define OB_PCROP_SECTOR_10 0x00000400U /*!< PC Read/Write protection of Sector10 */
ganlikun 0:13413ea9a877 620 #define OB_PCROP_SECTOR_11 0x00000800U /*!< PC Read/Write protection of Sector11 */
ganlikun 0:13413ea9a877 621 #define OB_PCROP_SECTOR_12 0x00000001U /*!< PC Read/Write protection of Sector12 */
ganlikun 0:13413ea9a877 622 #define OB_PCROP_SECTOR_13 0x00000002U /*!< PC Read/Write protection of Sector13 */
ganlikun 0:13413ea9a877 623 #define OB_PCROP_SECTOR_14 0x00000004U /*!< PC Read/Write protection of Sector14 */
ganlikun 0:13413ea9a877 624 #define OB_PCROP_SECTOR_15 0x00000008U /*!< PC Read/Write protection of Sector15 */
ganlikun 0:13413ea9a877 625 #define OB_PCROP_SECTOR_16 0x00000010U /*!< PC Read/Write protection of Sector16 */
ganlikun 0:13413ea9a877 626 #define OB_PCROP_SECTOR_17 0x00000020U /*!< PC Read/Write protection of Sector17 */
ganlikun 0:13413ea9a877 627 #define OB_PCROP_SECTOR_18 0x00000040U /*!< PC Read/Write protection of Sector18 */
ganlikun 0:13413ea9a877 628 #define OB_PCROP_SECTOR_19 0x00000080U /*!< PC Read/Write protection of Sector19 */
ganlikun 0:13413ea9a877 629 #define OB_PCROP_SECTOR_20 0x00000100U /*!< PC Read/Write protection of Sector20 */
ganlikun 0:13413ea9a877 630 #define OB_PCROP_SECTOR_21 0x00000200U /*!< PC Read/Write protection of Sector21 */
ganlikun 0:13413ea9a877 631 #define OB_PCROP_SECTOR_22 0x00000400U /*!< PC Read/Write protection of Sector22 */
ganlikun 0:13413ea9a877 632 #define OB_PCROP_SECTOR_23 0x00000800U /*!< PC Read/Write protection of Sector23 */
ganlikun 0:13413ea9a877 633 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
ganlikun 0:13413ea9a877 634 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 635 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 636
ganlikun 0:13413ea9a877 637 /*------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------*/
ganlikun 0:13413ea9a877 638 #if defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 639 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
ganlikun 0:13413ea9a877 640 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
ganlikun 0:13413ea9a877 641 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
ganlikun 0:13413ea9a877 642 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
ganlikun 0:13413ea9a877 643 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
ganlikun 0:13413ea9a877 644 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
ganlikun 0:13413ea9a877 645 #define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */
ganlikun 0:13413ea9a877 646 #define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */
ganlikun 0:13413ea9a877 647 #define OB_PCROP_SECTOR_8 0x00000100U /*!< PC Read/Write protection of Sector8 */
ganlikun 0:13413ea9a877 648 #define OB_PCROP_SECTOR_9 0x00000200U /*!< PC Read/Write protection of Sector9 */
ganlikun 0:13413ea9a877 649 #define OB_PCROP_SECTOR_10 0x00000400U /*!< PC Read/Write protection of Sector10 */
ganlikun 0:13413ea9a877 650 #define OB_PCROP_SECTOR_11 0x00000800U /*!< PC Read/Write protection of Sector11 */
ganlikun 0:13413ea9a877 651 #define OB_PCROP_SECTOR_12 0x00001000U /*!< PC Read/Write protection of Sector12 */
ganlikun 0:13413ea9a877 652 #define OB_PCROP_SECTOR_13 0x00002000U /*!< PC Read/Write protection of Sector13 */
ganlikun 0:13413ea9a877 653 #define OB_PCROP_SECTOR_14 0x00004000U /*!< PC Read/Write protection of Sector14 */
ganlikun 0:13413ea9a877 654 #define OB_PCROP_SECTOR_15 0x00004000U /*!< PC Read/Write protection of Sector15 */
ganlikun 0:13413ea9a877 655 #define OB_PCROP_SECTOR_All 0x00007FFFU /*!< PC Read/Write protection of all Sectors */
ganlikun 0:13413ea9a877 656 #endif /* STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 657 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 658
ganlikun 0:13413ea9a877 659 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
ganlikun 0:13413ea9a877 660 #if defined(STM32F401xC)
ganlikun 0:13413ea9a877 661 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
ganlikun 0:13413ea9a877 662 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
ganlikun 0:13413ea9a877 663 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
ganlikun 0:13413ea9a877 664 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
ganlikun 0:13413ea9a877 665 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
ganlikun 0:13413ea9a877 666 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
ganlikun 0:13413ea9a877 667 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
ganlikun 0:13413ea9a877 668 #endif /* STM32F401xC */
ganlikun 0:13413ea9a877 669 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 670
ganlikun 0:13413ea9a877 671 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
ganlikun 0:13413ea9a877 672 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 673 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
ganlikun 0:13413ea9a877 674 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
ganlikun 0:13413ea9a877 675 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
ganlikun 0:13413ea9a877 676 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
ganlikun 0:13413ea9a877 677 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
ganlikun 0:13413ea9a877 678 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
ganlikun 0:13413ea9a877 679 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 680 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 681
ganlikun 0:13413ea9a877 682 /*-------------- STM32F401xE/STM32F411xE/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx/STM32F446xx --*/
ganlikun 0:13413ea9a877 683 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 684 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
ganlikun 0:13413ea9a877 685 #define OB_PCROP_SECTOR_0 0x00000001U /*!< PC Read/Write protection of Sector0 */
ganlikun 0:13413ea9a877 686 #define OB_PCROP_SECTOR_1 0x00000002U /*!< PC Read/Write protection of Sector1 */
ganlikun 0:13413ea9a877 687 #define OB_PCROP_SECTOR_2 0x00000004U /*!< PC Read/Write protection of Sector2 */
ganlikun 0:13413ea9a877 688 #define OB_PCROP_SECTOR_3 0x00000008U /*!< PC Read/Write protection of Sector3 */
ganlikun 0:13413ea9a877 689 #define OB_PCROP_SECTOR_4 0x00000010U /*!< PC Read/Write protection of Sector4 */
ganlikun 0:13413ea9a877 690 #define OB_PCROP_SECTOR_5 0x00000020U /*!< PC Read/Write protection of Sector5 */
ganlikun 0:13413ea9a877 691 #define OB_PCROP_SECTOR_6 0x00000040U /*!< PC Read/Write protection of Sector6 */
ganlikun 0:13413ea9a877 692 #define OB_PCROP_SECTOR_7 0x00000080U /*!< PC Read/Write protection of Sector7 */
ganlikun 0:13413ea9a877 693 #define OB_PCROP_SECTOR_All 0x00000FFFU /*!< PC Read/Write protection of all Sectors */
ganlikun 0:13413ea9a877 694 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
ganlikun 0:13413ea9a877 695 /*-----------------------------------------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 696
ganlikun 0:13413ea9a877 697 /**
ganlikun 0:13413ea9a877 698 * @}
ganlikun 0:13413ea9a877 699 */
ganlikun 0:13413ea9a877 700
ganlikun 0:13413ea9a877 701 /** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
ganlikun 0:13413ea9a877 702 * @{
ganlikun 0:13413ea9a877 703 */
ganlikun 0:13413ea9a877 704 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 705 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 706 #define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
ganlikun 0:13413ea9a877 707 #define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
ganlikun 0:13413ea9a877 708 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 709 /**
ganlikun 0:13413ea9a877 710 * @}
ganlikun 0:13413ea9a877 711 */
ganlikun 0:13413ea9a877 712
ganlikun 0:13413ea9a877 713 /** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
ganlikun 0:13413ea9a877 714 * @{
ganlikun 0:13413ea9a877 715 */
ganlikun 0:13413ea9a877 716 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 717 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 718 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
ganlikun 0:13413ea9a877 719 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
ganlikun 0:13413ea9a877 720 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 721 #define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
ganlikun 0:13413ea9a877 722 #define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
ganlikun 0:13413ea9a877 723 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
ganlikun 0:13413ea9a877 724 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
ganlikun 0:13413ea9a877 725 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 726 /**
ganlikun 0:13413ea9a877 727 * @}
ganlikun 0:13413ea9a877 728 */
ganlikun 0:13413ea9a877 729
ganlikun 0:13413ea9a877 730 /**
ganlikun 0:13413ea9a877 731 * @}
ganlikun 0:13413ea9a877 732 */
ganlikun 0:13413ea9a877 733
ganlikun 0:13413ea9a877 734 /* Exported macro ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 735
ganlikun 0:13413ea9a877 736 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 737 /** @addtogroup FLASHEx_Exported_Functions
ganlikun 0:13413ea9a877 738 * @{
ganlikun 0:13413ea9a877 739 */
ganlikun 0:13413ea9a877 740
ganlikun 0:13413ea9a877 741 /** @addtogroup FLASHEx_Exported_Functions_Group1
ganlikun 0:13413ea9a877 742 * @{
ganlikun 0:13413ea9a877 743 */
ganlikun 0:13413ea9a877 744 /* Extension Program operation functions *************************************/
ganlikun 0:13413ea9a877 745 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError);
ganlikun 0:13413ea9a877 746 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
ganlikun 0:13413ea9a877 747 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
ganlikun 0:13413ea9a877 748 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
ganlikun 0:13413ea9a877 749
ganlikun 0:13413ea9a877 750 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 751 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 752 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
ganlikun 0:13413ea9a877 753 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
ganlikun 0:13413ea9a877 754 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 755 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
ganlikun 0:13413ea9a877 756 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
ganlikun 0:13413ea9a877 757 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
ganlikun 0:13413ea9a877 758 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
ganlikun 0:13413ea9a877 759 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
ganlikun 0:13413ea9a877 760 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
ganlikun 0:13413ea9a877 761 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 762
ganlikun 0:13413ea9a877 763 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 764 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 765 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
ganlikun 0:13413ea9a877 766 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 767 /**
ganlikun 0:13413ea9a877 768 * @}
ganlikun 0:13413ea9a877 769 */
ganlikun 0:13413ea9a877 770
ganlikun 0:13413ea9a877 771 /**
ganlikun 0:13413ea9a877 772 * @}
ganlikun 0:13413ea9a877 773 */
ganlikun 0:13413ea9a877 774 /* Private types -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 775 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 776 /* Private constants ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 777 /** @defgroup FLASHEx_Private_Constants FLASH Private Constants
ganlikun 0:13413ea9a877 778 * @{
ganlikun 0:13413ea9a877 779 */
ganlikun 0:13413ea9a877 780 /*--------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx---------------------*/
ganlikun 0:13413ea9a877 781 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 782 #define FLASH_SECTOR_TOTAL 24U
ganlikun 0:13413ea9a877 783 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 784
ganlikun 0:13413ea9a877 785 /*-------------------------------------- STM32F413xx/STM32F423xx ---------------------------------------*/
ganlikun 0:13413ea9a877 786 #if defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 787 #define FLASH_SECTOR_TOTAL 16U
ganlikun 0:13413ea9a877 788 #endif /* STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 789
ganlikun 0:13413ea9a877 790 /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/
ganlikun 0:13413ea9a877 791 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 792 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
ganlikun 0:13413ea9a877 793 #define FLASH_SECTOR_TOTAL 12U
ganlikun 0:13413ea9a877 794 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
ganlikun 0:13413ea9a877 795
ganlikun 0:13413ea9a877 796 /*--------------------------------------------- STM32F401xC -------------------------------------------*/
ganlikun 0:13413ea9a877 797 #if defined(STM32F401xC)
ganlikun 0:13413ea9a877 798 #define FLASH_SECTOR_TOTAL 6U
ganlikun 0:13413ea9a877 799 #endif /* STM32F401xC */
ganlikun 0:13413ea9a877 800
ganlikun 0:13413ea9a877 801 /*--------------------------------------------- STM32F410xx -------------------------------------------*/
ganlikun 0:13413ea9a877 802 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 803 #define FLASH_SECTOR_TOTAL 5U
ganlikun 0:13413ea9a877 804 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 805
ganlikun 0:13413ea9a877 806 /*--------------------------------- STM32F401xE/STM32F411xE/STM32F412xG/STM32F446xx -------------------*/
ganlikun 0:13413ea9a877 807 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
ganlikun 0:13413ea9a877 808 #define FLASH_SECTOR_TOTAL 8U
ganlikun 0:13413ea9a877 809 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
ganlikun 0:13413ea9a877 810
ganlikun 0:13413ea9a877 811 /**
ganlikun 0:13413ea9a877 812 * @brief OPTCR1 register byte 2 (Bits[23:16]) base address
ganlikun 0:13413ea9a877 813 */
ganlikun 0:13413ea9a877 814 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 815 #define OPTCR1_BYTE2_ADDRESS 0x40023C1AU
ganlikun 0:13413ea9a877 816 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 817
ganlikun 0:13413ea9a877 818 /**
ganlikun 0:13413ea9a877 819 * @}
ganlikun 0:13413ea9a877 820 */
ganlikun 0:13413ea9a877 821
ganlikun 0:13413ea9a877 822 /* Private macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 823 /** @defgroup FLASHEx_Private_Macros FLASH Private Macros
ganlikun 0:13413ea9a877 824 * @{
ganlikun 0:13413ea9a877 825 */
ganlikun 0:13413ea9a877 826
ganlikun 0:13413ea9a877 827 /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
ganlikun 0:13413ea9a877 828 * @{
ganlikun 0:13413ea9a877 829 */
ganlikun 0:13413ea9a877 830
ganlikun 0:13413ea9a877 831 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
ganlikun 0:13413ea9a877 832 ((VALUE) == FLASH_TYPEERASE_MASSERASE))
ganlikun 0:13413ea9a877 833
ganlikun 0:13413ea9a877 834 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \
ganlikun 0:13413ea9a877 835 ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \
ganlikun 0:13413ea9a877 836 ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \
ganlikun 0:13413ea9a877 837 ((RANGE) == FLASH_VOLTAGE_RANGE_4))
ganlikun 0:13413ea9a877 838
ganlikun 0:13413ea9a877 839 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \
ganlikun 0:13413ea9a877 840 ((VALUE) == OB_WRPSTATE_ENABLE))
ganlikun 0:13413ea9a877 841
ganlikun 0:13413ea9a877 842 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
ganlikun 0:13413ea9a877 843
ganlikun 0:13413ea9a877 844 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
ganlikun 0:13413ea9a877 845 ((LEVEL) == OB_RDP_LEVEL_1) ||\
ganlikun 0:13413ea9a877 846 ((LEVEL) == OB_RDP_LEVEL_2))
ganlikun 0:13413ea9a877 847
ganlikun 0:13413ea9a877 848 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
ganlikun 0:13413ea9a877 849
ganlikun 0:13413ea9a877 850 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
ganlikun 0:13413ea9a877 851
ganlikun 0:13413ea9a877 852 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
ganlikun 0:13413ea9a877 853
ganlikun 0:13413ea9a877 854 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
ganlikun 0:13413ea9a877 855 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
ganlikun 0:13413ea9a877 856
ganlikun 0:13413ea9a877 857 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 858 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 859 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
ganlikun 0:13413ea9a877 860 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
ganlikun 0:13413ea9a877 861 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 862 #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \
ganlikun 0:13413ea9a877 863 ((VALUE) == OB_PCROP_STATE_ENABLE))
ganlikun 0:13413ea9a877 864 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
ganlikun 0:13413ea9a877 865 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
ganlikun 0:13413ea9a877 866 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 867
ganlikun 0:13413ea9a877 868 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 869 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 870 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \
ganlikun 0:13413ea9a877 871 ((VALUE) == OPTIONBYTE_BOOTCONFIG))
ganlikun 0:13413ea9a877 872 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 873
ganlikun 0:13413ea9a877 874 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 875 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 876 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
ganlikun 0:13413ea9a877 877 defined(STM32F423xx)
ganlikun 0:13413ea9a877 878 #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP))
ganlikun 0:13413ea9a877 879 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx ||\
ganlikun 0:13413ea9a877 880 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 881
ganlikun 0:13413ea9a877 882 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 883 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 884 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
ganlikun 0:13413ea9a877 885 ((LATENCY) == FLASH_LATENCY_1) || \
ganlikun 0:13413ea9a877 886 ((LATENCY) == FLASH_LATENCY_2) || \
ganlikun 0:13413ea9a877 887 ((LATENCY) == FLASH_LATENCY_3) || \
ganlikun 0:13413ea9a877 888 ((LATENCY) == FLASH_LATENCY_4) || \
ganlikun 0:13413ea9a877 889 ((LATENCY) == FLASH_LATENCY_5) || \
ganlikun 0:13413ea9a877 890 ((LATENCY) == FLASH_LATENCY_6) || \
ganlikun 0:13413ea9a877 891 ((LATENCY) == FLASH_LATENCY_7) || \
ganlikun 0:13413ea9a877 892 ((LATENCY) == FLASH_LATENCY_8) || \
ganlikun 0:13413ea9a877 893 ((LATENCY) == FLASH_LATENCY_9) || \
ganlikun 0:13413ea9a877 894 ((LATENCY) == FLASH_LATENCY_10) || \
ganlikun 0:13413ea9a877 895 ((LATENCY) == FLASH_LATENCY_11) || \
ganlikun 0:13413ea9a877 896 ((LATENCY) == FLASH_LATENCY_12) || \
ganlikun 0:13413ea9a877 897 ((LATENCY) == FLASH_LATENCY_13) || \
ganlikun 0:13413ea9a877 898 ((LATENCY) == FLASH_LATENCY_14) || \
ganlikun 0:13413ea9a877 899 ((LATENCY) == FLASH_LATENCY_15))
ganlikun 0:13413ea9a877 900 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 901
ganlikun 0:13413ea9a877 902 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
ganlikun 0:13413ea9a877 903 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 904 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
ganlikun 0:13413ea9a877 905 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 906 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
ganlikun 0:13413ea9a877 907 ((LATENCY) == FLASH_LATENCY_1) || \
ganlikun 0:13413ea9a877 908 ((LATENCY) == FLASH_LATENCY_2) || \
ganlikun 0:13413ea9a877 909 ((LATENCY) == FLASH_LATENCY_3) || \
ganlikun 0:13413ea9a877 910 ((LATENCY) == FLASH_LATENCY_4) || \
ganlikun 0:13413ea9a877 911 ((LATENCY) == FLASH_LATENCY_5) || \
ganlikun 0:13413ea9a877 912 ((LATENCY) == FLASH_LATENCY_6) || \
ganlikun 0:13413ea9a877 913 ((LATENCY) == FLASH_LATENCY_7))
ganlikun 0:13413ea9a877 914 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
ganlikun 0:13413ea9a877 915 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 916
ganlikun 0:13413ea9a877 917 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 918 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \
ganlikun 0:13413ea9a877 919 ((BANK) == FLASH_BANK_2) || \
ganlikun 0:13413ea9a877 920 ((BANK) == FLASH_BANK_BOTH))
ganlikun 0:13413ea9a877 921 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 922
ganlikun 0:13413ea9a877 923 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
ganlikun 0:13413ea9a877 924 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 925 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 926 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
ganlikun 0:13413ea9a877 927 defined(STM32F423xx)
ganlikun 0:13413ea9a877 928 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
ganlikun 0:13413ea9a877 929 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx ||\
ganlikun 0:13413ea9a877 930 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 931
ganlikun 0:13413ea9a877 932 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 933 #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
ganlikun 0:13413ea9a877 934 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
ganlikun 0:13413ea9a877 935 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
ganlikun 0:13413ea9a877 936 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
ganlikun 0:13413ea9a877 937 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
ganlikun 0:13413ea9a877 938 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\
ganlikun 0:13413ea9a877 939 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\
ganlikun 0:13413ea9a877 940 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\
ganlikun 0:13413ea9a877 941 ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\
ganlikun 0:13413ea9a877 942 ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\
ganlikun 0:13413ea9a877 943 ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\
ganlikun 0:13413ea9a877 944 ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23))
ganlikun 0:13413ea9a877 945 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 946
ganlikun 0:13413ea9a877 947 #if defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 948 #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
ganlikun 0:13413ea9a877 949 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
ganlikun 0:13413ea9a877 950 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
ganlikun 0:13413ea9a877 951 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
ganlikun 0:13413ea9a877 952 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
ganlikun 0:13413ea9a877 953 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\
ganlikun 0:13413ea9a877 954 ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\
ganlikun 0:13413ea9a877 955 ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15))
ganlikun 0:13413ea9a877 956 #endif /* STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 957
ganlikun 0:13413ea9a877 958 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
ganlikun 0:13413ea9a877 959 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
ganlikun 0:13413ea9a877 960 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
ganlikun 0:13413ea9a877 961 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
ganlikun 0:13413ea9a877 962 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
ganlikun 0:13413ea9a877 963 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
ganlikun 0:13413ea9a877 964 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
ganlikun 0:13413ea9a877 965 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11))
ganlikun 0:13413ea9a877 966 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
ganlikun 0:13413ea9a877 967
ganlikun 0:13413ea9a877 968 #if defined(STM32F401xC)
ganlikun 0:13413ea9a877 969 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
ganlikun 0:13413ea9a877 970 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
ganlikun 0:13413ea9a877 971 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5))
ganlikun 0:13413ea9a877 972 #endif /* STM32F401xC */
ganlikun 0:13413ea9a877 973
ganlikun 0:13413ea9a877 974 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 975 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
ganlikun 0:13413ea9a877 976 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
ganlikun 0:13413ea9a877 977 ((SECTOR) == FLASH_SECTOR_4))
ganlikun 0:13413ea9a877 978 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 979
ganlikun 0:13413ea9a877 980 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
ganlikun 0:13413ea9a877 981 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
ganlikun 0:13413ea9a877 982 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
ganlikun 0:13413ea9a877 983 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
ganlikun 0:13413ea9a877 984 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7))
ganlikun 0:13413ea9a877 985 #endif /* STM32F401xE || STM32F411xE || STM32F446xx */
ganlikun 0:13413ea9a877 986
ganlikun 0:13413ea9a877 987 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) || \
ganlikun 0:13413ea9a877 988 (((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) <= FLASH_OTP_END)))
ganlikun 0:13413ea9a877 989
ganlikun 0:13413ea9a877 990 #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
ganlikun 0:13413ea9a877 991
ganlikun 0:13413ea9a877 992 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 993 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFF000000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 994 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 995
ganlikun 0:13413ea9a877 996 #if defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 997 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 998 #endif /* STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 999
ganlikun 0:13413ea9a877 1000 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
ganlikun 0:13413ea9a877 1001 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1002 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
ganlikun 0:13413ea9a877 1003
ganlikun 0:13413ea9a877 1004 #if defined(STM32F401xC)
ganlikun 0:13413ea9a877 1005 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1006 #endif /* STM32F401xC */
ganlikun 0:13413ea9a877 1007
ganlikun 0:13413ea9a877 1008 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 1009 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1010 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 1011
ganlikun 0:13413ea9a877 1012 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
ganlikun 0:13413ea9a877 1013 defined(STM32F412Rx) || defined(STM32F412Cx)
ganlikun 0:13413ea9a877 1014 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1015 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
ganlikun 0:13413ea9a877 1016
ganlikun 0:13413ea9a877 1017 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 1018 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1019 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 1020
ganlikun 0:13413ea9a877 1021 #if defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 1022 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFF8000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1023 #endif /* STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 1024
ganlikun 0:13413ea9a877 1025 #if defined(STM32F401xC)
ganlikun 0:13413ea9a877 1026 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1027 #endif /* STM32F401xC */
ganlikun 0:13413ea9a877 1028
ganlikun 0:13413ea9a877 1029 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
ganlikun 0:13413ea9a877 1030 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1031 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
ganlikun 0:13413ea9a877 1032
ganlikun 0:13413ea9a877 1033 #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
ganlikun 0:13413ea9a877 1034 defined(STM32F412Rx) || defined(STM32F412Cx)
ganlikun 0:13413ea9a877 1035 #define IS_OB_PCROP(SECTOR)((((SECTOR) & 0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
ganlikun 0:13413ea9a877 1036 #endif /* STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
ganlikun 0:13413ea9a877 1037
ganlikun 0:13413ea9a877 1038 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 1039 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 1040 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE))
ganlikun 0:13413ea9a877 1041 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 1042
ganlikun 0:13413ea9a877 1043 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 1044 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
ganlikun 0:13413ea9a877 1045 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
ganlikun 0:13413ea9a877 1046 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
ganlikun 0:13413ea9a877 1047 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 1048 #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED))
ganlikun 0:13413ea9a877 1049 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE ||\
ganlikun 0:13413ea9a877 1050 STM32F410xx || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
ganlikun 0:13413ea9a877 1051 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 1052 /**
ganlikun 0:13413ea9a877 1053 * @}
ganlikun 0:13413ea9a877 1054 */
ganlikun 0:13413ea9a877 1055
ganlikun 0:13413ea9a877 1056 /**
ganlikun 0:13413ea9a877 1057 * @}
ganlikun 0:13413ea9a877 1058 */
ganlikun 0:13413ea9a877 1059
ganlikun 0:13413ea9a877 1060 /* Private functions ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 1061 /** @defgroup FLASHEx_Private_Functions FLASH Private Functions
ganlikun 0:13413ea9a877 1062 * @{
ganlikun 0:13413ea9a877 1063 */
ganlikun 0:13413ea9a877 1064 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
ganlikun 0:13413ea9a877 1065 void FLASH_FlushCaches(void);
ganlikun 0:13413ea9a877 1066 /**
ganlikun 0:13413ea9a877 1067 * @}
ganlikun 0:13413ea9a877 1068 */
ganlikun 0:13413ea9a877 1069
ganlikun 0:13413ea9a877 1070 /**
ganlikun 0:13413ea9a877 1071 * @}
ganlikun 0:13413ea9a877 1072 */
ganlikun 0:13413ea9a877 1073
ganlikun 0:13413ea9a877 1074 /**
ganlikun 0:13413ea9a877 1075 * @}
ganlikun 0:13413ea9a877 1076 */
ganlikun 0:13413ea9a877 1077
ganlikun 0:13413ea9a877 1078 #ifdef __cplusplus
ganlikun 0:13413ea9a877 1079 }
ganlikun 0:13413ea9a877 1080 #endif
ganlikun 0:13413ea9a877 1081
ganlikun 0:13413ea9a877 1082 #endif /* __STM32F4xx_HAL_FLASH_EX_H */
ganlikun 0:13413ea9a877 1083
ganlikun 0:13413ea9a877 1084 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 1085