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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

Who changed what in which revision?

User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_hal_dsi.c
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief DSI HAL module driver.
ganlikun	0:13413ea9a877	8	* This file provides firmware functions to manage the following
ganlikun	0:13413ea9a877	9	* functionalities of the DSI peripheral:
ganlikun	0:13413ea9a877	10	* + Initialization and de-initialization functions
ganlikun	0:13413ea9a877	11	* + IO operation functions
ganlikun	0:13413ea9a877	12	* + Peripheral Control functions
ganlikun	0:13413ea9a877	13	* + Peripheral State and Errors functions
ganlikun	0:13413ea9a877	14	******************************************************************************
ganlikun	0:13413ea9a877	15	* @attention
ganlikun	0:13413ea9a877	16	*
ganlikun	0:13413ea9a877	17	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	18	*
ganlikun	0:13413ea9a877	19	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	20	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	21	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	22	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	23	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	24	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	25	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	26	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	27	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	28	* without specific prior written permission.
ganlikun	0:13413ea9a877	29	*
ganlikun	0:13413ea9a877	30	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	31	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	32	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	33	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	34	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	35	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	36	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	37	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	38	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	39	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	40	*
ganlikun	0:13413ea9a877	41	******************************************************************************
ganlikun	0:13413ea9a877	42	*/
ganlikun	0:13413ea9a877	43
ganlikun	0:13413ea9a877	44	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	45	#include "stm32f4xx_hal.h"
ganlikun	0:13413ea9a877	46
ganlikun	0:13413ea9a877	47	/** @addtogroup STM32F4xx_HAL_Driver
ganlikun	0:13413ea9a877	48	* @{
ganlikun	0:13413ea9a877	49	*/
ganlikun	0:13413ea9a877	50	/** @addtogroup DSI
ganlikun	0:13413ea9a877	51	* @{
ganlikun	0:13413ea9a877	52	*/
ganlikun	0:13413ea9a877	53
ganlikun	0:13413ea9a877	54	#ifdef HAL_DSI_MODULE_ENABLED
ganlikun	0:13413ea9a877	55
ganlikun	0:13413ea9a877	56	#if defined(STM32F469xx) \|\| defined(STM32F479xx)
ganlikun	0:13413ea9a877	57
ganlikun	0:13413ea9a877	58	/* Private types -------------------------------------------------------------*/
ganlikun	0:13413ea9a877	59	/* Private defines -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	60	/** @addtogroup DSI_Private_Constants
ganlikun	0:13413ea9a877	61	* @{
ganlikun	0:13413ea9a877	62	*/
ganlikun	0:13413ea9a877	63	#define DSI_TIMEOUT_VALUE ((uint32_t)1000U) /* 1s */
ganlikun	0:13413ea9a877	64
ganlikun	0:13413ea9a877	65	#define DSI_ERROR_ACK_MASK (DSI_ISR0_AE0 \| DSI_ISR0_AE1 \| DSI_ISR0_AE2 \| DSI_ISR0_AE3 \| \
ganlikun	0:13413ea9a877	66	DSI_ISR0_AE4 \| DSI_ISR0_AE5 \| DSI_ISR0_AE6 \| DSI_ISR0_AE7 \| \
ganlikun	0:13413ea9a877	67	DSI_ISR0_AE8 \| DSI_ISR0_AE9 \| DSI_ISR0_AE10 \| DSI_ISR0_AE11 \| \
ganlikun	0:13413ea9a877	68	DSI_ISR0_AE12 \| DSI_ISR0_AE13 \| DSI_ISR0_AE14 \| DSI_ISR0_AE15)
ganlikun	0:13413ea9a877	69	#define DSI_ERROR_PHY_MASK (DSI_ISR0_PE0 \| DSI_ISR0_PE1 \| DSI_ISR0_PE2 \| DSI_ISR0_PE3 \| DSI_ISR0_PE4)
ganlikun	0:13413ea9a877	70	#define DSI_ERROR_TX_MASK DSI_ISR1_TOHSTX
ganlikun	0:13413ea9a877	71	#define DSI_ERROR_RX_MASK DSI_ISR1_TOLPRX
ganlikun	0:13413ea9a877	72	#define DSI_ERROR_ECC_MASK (DSI_ISR1_ECCSE \| DSI_ISR1_ECCME)
ganlikun	0:13413ea9a877	73	#define DSI_ERROR_CRC_MASK DSI_ISR1_CRCE
ganlikun	0:13413ea9a877	74	#define DSI_ERROR_PSE_MASK DSI_ISR1_PSE
ganlikun	0:13413ea9a877	75	#define DSI_ERROR_EOT_MASK DSI_ISR1_EOTPE
ganlikun	0:13413ea9a877	76	#define DSI_ERROR_OVF_MASK DSI_ISR1_LPWRE
ganlikun	0:13413ea9a877	77	#define DSI_ERROR_GEN_MASK (DSI_ISR1_GCWRE \| DSI_ISR1_GPWRE \| DSI_ISR1_GPTXE \| DSI_ISR1_GPRDE \| DSI_ISR1_GPRXE)
ganlikun	0:13413ea9a877	78	/**
ganlikun	0:13413ea9a877	79	* @}
ganlikun	0:13413ea9a877	80	*/
ganlikun	0:13413ea9a877	81
ganlikun	0:13413ea9a877	82	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	83	/* Private constants ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	84	/* Private macros ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	85	/* Private function prototypes -----------------------------------------------*/
ganlikun	0:13413ea9a877	86	static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx, uint32_t ChannelID, uint32_t DataType, uint32_t Data0, uint32_t Data1);
ganlikun	0:13413ea9a877	87
ganlikun	0:13413ea9a877	88	/* Private functions ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	89	/**
ganlikun	0:13413ea9a877	90	* @brief Generic DSI packet header configuration
ganlikun	0:13413ea9a877	91	* @param DSIx: Pointer to DSI register base
ganlikun	0:13413ea9a877	92	* @param ChannelID: Virtual channel ID of the header packet
ganlikun	0:13413ea9a877	93	* @param DataType: Packet data type of the header packet
ganlikun	0:13413ea9a877	94	* This parameter can be any value of :
ganlikun	0:13413ea9a877	95	* @ref DSI_SHORT_WRITE_PKT_Data_Type
ganlikun	0:13413ea9a877	96	* or @ref DSI_LONG_WRITE_PKT_Data_Type
ganlikun	0:13413ea9a877	97	* or @ref DSI_SHORT_READ_PKT_Data_Type
ganlikun	0:13413ea9a877	98	* or DSI_MAX_RETURN_PKT_SIZE
ganlikun	0:13413ea9a877	99	* @param Data0: Word count LSB
ganlikun	0:13413ea9a877	100	* @param Data1: Word count MSB
ganlikun	0:13413ea9a877	101	* @retval None
ganlikun	0:13413ea9a877	102	*/
ganlikun	0:13413ea9a877	103	static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx,
ganlikun	0:13413ea9a877	104	uint32_t ChannelID,
ganlikun	0:13413ea9a877	105	uint32_t DataType,
ganlikun	0:13413ea9a877	106	uint32_t Data0,
ganlikun	0:13413ea9a877	107	uint32_t Data1)
ganlikun	0:13413ea9a877	108	{
ganlikun	0:13413ea9a877	109	/* Update the DSI packet header with new information */
ganlikun	0:13413ea9a877	110	DSIx->GHCR = (DataType \| (ChannelID<<6U) \| (Data0<<8U) \| (Data1<<16U));
ganlikun	0:13413ea9a877	111	}
ganlikun	0:13413ea9a877	112
ganlikun	0:13413ea9a877	113	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	114	/** @addtogroup DSI_Exported_Functions
ganlikun	0:13413ea9a877	115	* @{
ganlikun	0:13413ea9a877	116	*/
ganlikun	0:13413ea9a877	117
ganlikun	0:13413ea9a877	118	/** @defgroup DSI_Group1 Initialization and Configuration functions
ganlikun	0:13413ea9a877	119	* @brief Initialization and Configuration functions
ganlikun	0:13413ea9a877	120	*
ganlikun	0:13413ea9a877	121	@verbatim
ganlikun	0:13413ea9a877	122	===============================================================================
ganlikun	0:13413ea9a877	123	##### Initialization and Configuration functions #####
ganlikun	0:13413ea9a877	124	===============================================================================
ganlikun	0:13413ea9a877	125	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	126	(+) Initialize and configure the DSI
ganlikun	0:13413ea9a877	127	(+) De-initialize the DSI
ganlikun	0:13413ea9a877	128
ganlikun	0:13413ea9a877	129	@endverbatim
ganlikun	0:13413ea9a877	130	* @{
ganlikun	0:13413ea9a877	131	*/
ganlikun	0:13413ea9a877	132
ganlikun	0:13413ea9a877	133	/**
ganlikun	0:13413ea9a877	134	* @brief Initializes the DSI according to the specified
ganlikun	0:13413ea9a877	135	* parameters in the DSI_InitTypeDef and create the associated handle.
ganlikun	0:13413ea9a877	136	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	137	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	138	* @param PLLInit: pointer to a DSI_PLLInitTypeDef structure that contains
ganlikun	0:13413ea9a877	139	* the PLL Clock structure definition for the DSI.
ganlikun	0:13413ea9a877	140	* @retval HAL status
ganlikun	0:13413ea9a877	141	*/
ganlikun	0:13413ea9a877	142	HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef hdsi, DSI_PLLInitTypeDef PLLInit)
ganlikun	0:13413ea9a877	143	{
ganlikun	0:13413ea9a877	144	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	145	uint32_t unitIntervalx4 = 0U;
ganlikun	0:13413ea9a877	146	uint32_t tempIDF = 0U;
ganlikun	0:13413ea9a877	147
ganlikun	0:13413ea9a877	148	/* Check the DSI handle allocation */
ganlikun	0:13413ea9a877	149	if(hdsi == NULL)
ganlikun	0:13413ea9a877	150	{
ganlikun	0:13413ea9a877	151	return HAL_ERROR;
ganlikun	0:13413ea9a877	152	}
ganlikun	0:13413ea9a877	153
ganlikun	0:13413ea9a877	154	/* Check function parameters */
ganlikun	0:13413ea9a877	155	assert_param(IS_DSI_PLL_NDIV(PLLInit->PLLNDIV));
ganlikun	0:13413ea9a877	156	assert_param(IS_DSI_PLL_IDF(PLLInit->PLLIDF));
ganlikun	0:13413ea9a877	157	assert_param(IS_DSI_PLL_ODF(PLLInit->PLLODF));
ganlikun	0:13413ea9a877	158	assert_param(IS_DSI_AUTO_CLKLANE_CONTROL(hdsi->Init.AutomaticClockLaneControl));
ganlikun	0:13413ea9a877	159	assert_param(IS_DSI_NUMBER_OF_LANES(hdsi->Init.NumberOfLanes));
ganlikun	0:13413ea9a877	160
ganlikun	0:13413ea9a877	161	if(hdsi->State == HAL_DSI_STATE_RESET)
ganlikun	0:13413ea9a877	162	{
ganlikun	0:13413ea9a877	163	/* Initialize the low level hardware */
ganlikun	0:13413ea9a877	164	HAL_DSI_MspInit(hdsi);
ganlikun	0:13413ea9a877	165	}
ganlikun	0:13413ea9a877	166
ganlikun	0:13413ea9a877	167	/* Change DSI peripheral state */
ganlikun	0:13413ea9a877	168	hdsi->State = HAL_DSI_STATE_BUSY;
ganlikun	0:13413ea9a877	169
ganlikun	0:13413ea9a877	170	/************** Turn on the regulator and enable the DSI PLL **************/
ganlikun	0:13413ea9a877	171
ganlikun	0:13413ea9a877	172	/* Enable the regulator */
ganlikun	0:13413ea9a877	173	__HAL_DSI_REG_ENABLE(hdsi);
ganlikun	0:13413ea9a877	174
ganlikun	0:13413ea9a877	175	/* Get tick */
ganlikun	0:13413ea9a877	176	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	177
ganlikun	0:13413ea9a877	178	/* Wait until the regulator is ready */
ganlikun	0:13413ea9a877	179	while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_RRS) == RESET)
ganlikun	0:13413ea9a877	180	{
ganlikun	0:13413ea9a877	181	/* Check for the Timeout */
ganlikun	0:13413ea9a877	182	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	183	{
ganlikun	0:13413ea9a877	184	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	185	}
ganlikun	0:13413ea9a877	186	}
ganlikun	0:13413ea9a877	187
ganlikun	0:13413ea9a877	188	/* Set the PLL division factors */
ganlikun	0:13413ea9a877	189	hdsi->Instance->WRPCR &= ~(DSI_WRPCR_PLL_NDIV \| DSI_WRPCR_PLL_IDF \| DSI_WRPCR_PLL_ODF);
ganlikun	0:13413ea9a877	190	hdsi->Instance->WRPCR \|= (((PLLInit->PLLNDIV)<<2U) \| ((PLLInit->PLLIDF)<<11U) \| ((PLLInit->PLLODF)<<16U));
ganlikun	0:13413ea9a877	191
ganlikun	0:13413ea9a877	192	/* Enable the DSI PLL */
ganlikun	0:13413ea9a877	193	__HAL_DSI_PLL_ENABLE(hdsi);
ganlikun	0:13413ea9a877	194
ganlikun	0:13413ea9a877	195	/* Get tick */
ganlikun	0:13413ea9a877	196	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	197
ganlikun	0:13413ea9a877	198	/* Wait for the lock of the PLL */
ganlikun	0:13413ea9a877	199	while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == RESET)
ganlikun	0:13413ea9a877	200	{
ganlikun	0:13413ea9a877	201	/* Check for the Timeout */
ganlikun	0:13413ea9a877	202	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	203	{
ganlikun	0:13413ea9a877	204	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	205	}
ganlikun	0:13413ea9a877	206	}
ganlikun	0:13413ea9a877	207
ganlikun	0:13413ea9a877	208	/************************* Set the PHY parameters *************************/
ganlikun	0:13413ea9a877	209
ganlikun	0:13413ea9a877	210	/* D-PHY clock and digital enable*/
ganlikun	0:13413ea9a877	211	hdsi->Instance->PCTLR \|= (DSI_PCTLR_CKE \| DSI_PCTLR_DEN);
ganlikun	0:13413ea9a877	212
ganlikun	0:13413ea9a877	213	/* Clock lane configuration */
ganlikun	0:13413ea9a877	214	hdsi->Instance->CLCR &= ~(DSI_CLCR_DPCC \| DSI_CLCR_ACR);
ganlikun	0:13413ea9a877	215	hdsi->Instance->CLCR \|= (DSI_CLCR_DPCC \| hdsi->Init.AutomaticClockLaneControl);
ganlikun	0:13413ea9a877	216
ganlikun	0:13413ea9a877	217	/* Configure the number of active data lanes */
ganlikun	0:13413ea9a877	218	hdsi->Instance->PCONFR &= ~DSI_PCONFR_NL;
ganlikun	0:13413ea9a877	219	hdsi->Instance->PCONFR \|= hdsi->Init.NumberOfLanes;
ganlikun	0:13413ea9a877	220
ganlikun	0:13413ea9a877	221	/********************** Set the DSI clock parameters **********************/
ganlikun	0:13413ea9a877	222
ganlikun	0:13413ea9a877	223	/* Set the TX escape clock division factor */
ganlikun	0:13413ea9a877	224	hdsi->Instance->CCR &= ~DSI_CCR_TXECKDIV;
ganlikun	0:13413ea9a877	225	hdsi->Instance->CCR \|= hdsi->Init.TXEscapeCkdiv;
ganlikun	0:13413ea9a877	226
ganlikun	0:13413ea9a877	227	/* Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) */
ganlikun	0:13413ea9a877	228	/* The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 ) */
ganlikun	0:13413ea9a877	229	/* Where : F_PHY_Mhz = (NDIV * HSE_Mhz) / (IDF * ODF) */
ganlikun	0:13413ea9a877	230	tempIDF = (PLLInit->PLLIDF > 0U) ? PLLInit->PLLIDF : 1U;
ganlikun	0:13413ea9a877	231	unitIntervalx4 = (4000000U * tempIDF * (1U << PLLInit->PLLODF)) / ((HSE_VALUE/1000U) * PLLInit->PLLNDIV);
ganlikun	0:13413ea9a877	232
ganlikun	0:13413ea9a877	233	/* Set the bit period in high-speed mode */
ganlikun	0:13413ea9a877	234	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_UIX4;
ganlikun	0:13413ea9a877	235	hdsi->Instance->WPCR[0U] \|= unitIntervalx4;
ganlikun	0:13413ea9a877	236
ganlikun	0:13413ea9a877	237	/**************************** Error management ***************************/
ganlikun	0:13413ea9a877	238
ganlikun	0:13413ea9a877	239	/* Disable all error interrupts and reset the Error Mask */
ganlikun	0:13413ea9a877	240	hdsi->Instance->IER[0U] = 0U;
ganlikun	0:13413ea9a877	241	hdsi->Instance->IER[1U] = 0U;
ganlikun	0:13413ea9a877	242	hdsi->ErrorMsk = 0U;
ganlikun	0:13413ea9a877	243
ganlikun	0:13413ea9a877	244	/* Initialise the error code */
ganlikun	0:13413ea9a877	245	hdsi->ErrorCode = HAL_DSI_ERROR_NONE;
ganlikun	0:13413ea9a877	246
ganlikun	0:13413ea9a877	247	/* Initialize the DSI state*/
ganlikun	0:13413ea9a877	248	hdsi->State = HAL_DSI_STATE_READY;
ganlikun	0:13413ea9a877	249
ganlikun	0:13413ea9a877	250	return HAL_OK;
ganlikun	0:13413ea9a877	251	}
ganlikun	0:13413ea9a877	252
ganlikun	0:13413ea9a877	253	/**
ganlikun	0:13413ea9a877	254	* @brief De-initializes the DSI peripheral registers to their default reset
ganlikun	0:13413ea9a877	255	* values.
ganlikun	0:13413ea9a877	256	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	257	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	258	* @retval HAL status
ganlikun	0:13413ea9a877	259	*/
ganlikun	0:13413ea9a877	260	HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	261	{
ganlikun	0:13413ea9a877	262	/* Check the DSI handle allocation */
ganlikun	0:13413ea9a877	263	if(hdsi == NULL)
ganlikun	0:13413ea9a877	264	{
ganlikun	0:13413ea9a877	265	return HAL_ERROR;
ganlikun	0:13413ea9a877	266	}
ganlikun	0:13413ea9a877	267
ganlikun	0:13413ea9a877	268	/* Change DSI peripheral state */
ganlikun	0:13413ea9a877	269	hdsi->State = HAL_DSI_STATE_BUSY;
ganlikun	0:13413ea9a877	270
ganlikun	0:13413ea9a877	271	/* Disable the DSI wrapper */
ganlikun	0:13413ea9a877	272	__HAL_DSI_WRAPPER_DISABLE(hdsi);
ganlikun	0:13413ea9a877	273
ganlikun	0:13413ea9a877	274	/* Disable the DSI host */
ganlikun	0:13413ea9a877	275	__HAL_DSI_DISABLE(hdsi);
ganlikun	0:13413ea9a877	276
ganlikun	0:13413ea9a877	277	/* D-PHY clock and digital disable */
ganlikun	0:13413ea9a877	278	hdsi->Instance->PCTLR &= ~(DSI_PCTLR_CKE \| DSI_PCTLR_DEN);
ganlikun	0:13413ea9a877	279
ganlikun	0:13413ea9a877	280	/* Turn off the DSI PLL */
ganlikun	0:13413ea9a877	281	__HAL_DSI_PLL_DISABLE(hdsi);
ganlikun	0:13413ea9a877	282
ganlikun	0:13413ea9a877	283	/* Disable the regulator */
ganlikun	0:13413ea9a877	284	__HAL_DSI_REG_DISABLE(hdsi);
ganlikun	0:13413ea9a877	285
ganlikun	0:13413ea9a877	286	/* DeInit the low level hardware */
ganlikun	0:13413ea9a877	287	HAL_DSI_MspDeInit(hdsi);
ganlikun	0:13413ea9a877	288
ganlikun	0:13413ea9a877	289	/* Initialise the error code */
ganlikun	0:13413ea9a877	290	hdsi->ErrorCode = HAL_DSI_ERROR_NONE;
ganlikun	0:13413ea9a877	291
ganlikun	0:13413ea9a877	292	/* Initialize the DSI state*/
ganlikun	0:13413ea9a877	293	hdsi->State = HAL_DSI_STATE_RESET;
ganlikun	0:13413ea9a877	294
ganlikun	0:13413ea9a877	295	/* Release Lock */
ganlikun	0:13413ea9a877	296	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	297
ganlikun	0:13413ea9a877	298	return HAL_OK;
ganlikun	0:13413ea9a877	299	}
ganlikun	0:13413ea9a877	300
ganlikun	0:13413ea9a877	301	/**
ganlikun	0:13413ea9a877	302	* @brief Return the DSI error code
ganlikun	0:13413ea9a877	303	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	304	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	305	* @retval DSI Error Code
ganlikun	0:13413ea9a877	306	*/
ganlikun	0:13413ea9a877	307	uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	308	{
ganlikun	0:13413ea9a877	309	/* Get the error code */
ganlikun	0:13413ea9a877	310	return hdsi->ErrorCode;
ganlikun	0:13413ea9a877	311	}
ganlikun	0:13413ea9a877	312
ganlikun	0:13413ea9a877	313	/**
ganlikun	0:13413ea9a877	314	* @brief Enable the error monitor flags
ganlikun	0:13413ea9a877	315	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	316	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	317	* @param ActiveErrors: indicates which error interrupts will be enabled.
ganlikun	0:13413ea9a877	318	* This parameter can be any combination of @ref DSI_Error_Data_Type.
ganlikun	0:13413ea9a877	319	* @retval HAL status
ganlikun	0:13413ea9a877	320	*/
ganlikun	0:13413ea9a877	321	HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors)
ganlikun	0:13413ea9a877	322	{
ganlikun	0:13413ea9a877	323	/* Process locked */
ganlikun	0:13413ea9a877	324	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	325
ganlikun	0:13413ea9a877	326	hdsi->Instance->IER[0U] = 0U;
ganlikun	0:13413ea9a877	327	hdsi->Instance->IER[1U] = 0U;
ganlikun	0:13413ea9a877	328
ganlikun	0:13413ea9a877	329	/* Store active errors to the handle */
ganlikun	0:13413ea9a877	330	hdsi->ErrorMsk = ActiveErrors;
ganlikun	0:13413ea9a877	331
ganlikun	0:13413ea9a877	332	if((ActiveErrors & HAL_DSI_ERROR_ACK) != RESET)
ganlikun	0:13413ea9a877	333	{
ganlikun	0:13413ea9a877	334	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	335	hdsi->Instance->IER[0U] \|= DSI_ERROR_ACK_MASK;
ganlikun	0:13413ea9a877	336	}
ganlikun	0:13413ea9a877	337
ganlikun	0:13413ea9a877	338	if((ActiveErrors & HAL_DSI_ERROR_PHY) != RESET)
ganlikun	0:13413ea9a877	339	{
ganlikun	0:13413ea9a877	340	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	341	hdsi->Instance->IER[0U] \|= DSI_ERROR_PHY_MASK;
ganlikun	0:13413ea9a877	342	}
ganlikun	0:13413ea9a877	343
ganlikun	0:13413ea9a877	344	if((ActiveErrors & HAL_DSI_ERROR_TX) != RESET)
ganlikun	0:13413ea9a877	345	{
ganlikun	0:13413ea9a877	346	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	347	hdsi->Instance->IER[1U] \|= DSI_ERROR_TX_MASK;
ganlikun	0:13413ea9a877	348	}
ganlikun	0:13413ea9a877	349
ganlikun	0:13413ea9a877	350	if((ActiveErrors & HAL_DSI_ERROR_RX) != RESET)
ganlikun	0:13413ea9a877	351	{
ganlikun	0:13413ea9a877	352	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	353	hdsi->Instance->IER[1U] \|= DSI_ERROR_RX_MASK;
ganlikun	0:13413ea9a877	354	}
ganlikun	0:13413ea9a877	355
ganlikun	0:13413ea9a877	356	if((ActiveErrors & HAL_DSI_ERROR_ECC) != RESET)
ganlikun	0:13413ea9a877	357	{
ganlikun	0:13413ea9a877	358	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	359	hdsi->Instance->IER[1U] \|= DSI_ERROR_ECC_MASK;
ganlikun	0:13413ea9a877	360	}
ganlikun	0:13413ea9a877	361
ganlikun	0:13413ea9a877	362	if((ActiveErrors & HAL_DSI_ERROR_CRC) != RESET)
ganlikun	0:13413ea9a877	363	{
ganlikun	0:13413ea9a877	364	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	365	hdsi->Instance->IER[1U] \|= DSI_ERROR_CRC_MASK;
ganlikun	0:13413ea9a877	366	}
ganlikun	0:13413ea9a877	367
ganlikun	0:13413ea9a877	368	if((ActiveErrors & HAL_DSI_ERROR_PSE) != RESET)
ganlikun	0:13413ea9a877	369	{
ganlikun	0:13413ea9a877	370	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	371	hdsi->Instance->IER[1U] \|= DSI_ERROR_PSE_MASK;
ganlikun	0:13413ea9a877	372	}
ganlikun	0:13413ea9a877	373
ganlikun	0:13413ea9a877	374	if((ActiveErrors & HAL_DSI_ERROR_EOT) != RESET)
ganlikun	0:13413ea9a877	375	{
ganlikun	0:13413ea9a877	376	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	377	hdsi->Instance->IER[1U] \|= DSI_ERROR_EOT_MASK;
ganlikun	0:13413ea9a877	378	}
ganlikun	0:13413ea9a877	379
ganlikun	0:13413ea9a877	380	if((ActiveErrors & HAL_DSI_ERROR_OVF) != RESET)
ganlikun	0:13413ea9a877	381	{
ganlikun	0:13413ea9a877	382	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	383	hdsi->Instance->IER[1U] \|= DSI_ERROR_OVF_MASK;
ganlikun	0:13413ea9a877	384	}
ganlikun	0:13413ea9a877	385
ganlikun	0:13413ea9a877	386	if((ActiveErrors & HAL_DSI_ERROR_GEN) != RESET)
ganlikun	0:13413ea9a877	387	{
ganlikun	0:13413ea9a877	388	/* Enable the interrupt generation on selected errors */
ganlikun	0:13413ea9a877	389	hdsi->Instance->IER[1U] \|= DSI_ERROR_GEN_MASK;
ganlikun	0:13413ea9a877	390	}
ganlikun	0:13413ea9a877	391
ganlikun	0:13413ea9a877	392	/* Process Unlocked */
ganlikun	0:13413ea9a877	393	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	394
ganlikun	0:13413ea9a877	395	return HAL_OK;
ganlikun	0:13413ea9a877	396	}
ganlikun	0:13413ea9a877	397
ganlikun	0:13413ea9a877	398	/**
ganlikun	0:13413ea9a877	399	* @brief Initializes the DSI MSP.
ganlikun	0:13413ea9a877	400	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	401	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	402	* @retval None
ganlikun	0:13413ea9a877	403	*/
ganlikun	0:13413ea9a877	404	__weak void HAL_DSI_MspInit(DSI_HandleTypeDef* hdsi)
ganlikun	0:13413ea9a877	405	{
ganlikun	0:13413ea9a877	406	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	407	UNUSED(hdsi);
ganlikun	0:13413ea9a877	408	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	409	the HAL_DSI_MspInit could be implemented in the user file
ganlikun	0:13413ea9a877	410	*/
ganlikun	0:13413ea9a877	411	}
ganlikun	0:13413ea9a877	412
ganlikun	0:13413ea9a877	413	/**
ganlikun	0:13413ea9a877	414	* @brief De-initializes the DSI MSP.
ganlikun	0:13413ea9a877	415	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	416	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	417	* @retval None
ganlikun	0:13413ea9a877	418	*/
ganlikun	0:13413ea9a877	419	__weak void HAL_DSI_MspDeInit(DSI_HandleTypeDef* hdsi)
ganlikun	0:13413ea9a877	420	{
ganlikun	0:13413ea9a877	421	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	422	UNUSED(hdsi);
ganlikun	0:13413ea9a877	423	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	424	the HAL_DSI_MspDeInit could be implemented in the user file
ganlikun	0:13413ea9a877	425	*/
ganlikun	0:13413ea9a877	426	}
ganlikun	0:13413ea9a877	427
ganlikun	0:13413ea9a877	428	/**
ganlikun	0:13413ea9a877	429	* @}
ganlikun	0:13413ea9a877	430	*/
ganlikun	0:13413ea9a877	431
ganlikun	0:13413ea9a877	432	/** @defgroup DSI_Group2 IO operation functions
ganlikun	0:13413ea9a877	433	* @brief IO operation functions
ganlikun	0:13413ea9a877	434	*
ganlikun	0:13413ea9a877	435	@verbatim
ganlikun	0:13413ea9a877	436	===============================================================================
ganlikun	0:13413ea9a877	437	##### IO operation functions #####
ganlikun	0:13413ea9a877	438	===============================================================================
ganlikun	0:13413ea9a877	439	[..] This section provides function allowing to:
ganlikun	0:13413ea9a877	440	(+) Handle DSI interrupt request
ganlikun	0:13413ea9a877	441
ganlikun	0:13413ea9a877	442	@endverbatim
ganlikun	0:13413ea9a877	443	* @{
ganlikun	0:13413ea9a877	444	*/
ganlikun	0:13413ea9a877	445	/**
ganlikun	0:13413ea9a877	446	* @brief Handles DSI interrupt request.
ganlikun	0:13413ea9a877	447	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	448	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	449	* @retval HAL status
ganlikun	0:13413ea9a877	450	*/
ganlikun	0:13413ea9a877	451	void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	452	{
ganlikun	0:13413ea9a877	453	uint32_t ErrorStatus0, ErrorStatus1;
ganlikun	0:13413ea9a877	454
ganlikun	0:13413ea9a877	455	/* Tearing Effect Interrupt management ***************************************/
ganlikun	0:13413ea9a877	456	if(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_TE) != RESET)
ganlikun	0:13413ea9a877	457	{
ganlikun	0:13413ea9a877	458	if(__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_TE) != RESET)
ganlikun	0:13413ea9a877	459	{
ganlikun	0:13413ea9a877	460	/* Clear the Tearing Effect Interrupt Flag */
ganlikun	0:13413ea9a877	461	__HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_TE);
ganlikun	0:13413ea9a877	462
ganlikun	0:13413ea9a877	463	/* Tearing Effect Callback */
ganlikun	0:13413ea9a877	464	HAL_DSI_TearingEffectCallback(hdsi);
ganlikun	0:13413ea9a877	465	}
ganlikun	0:13413ea9a877	466	}
ganlikun	0:13413ea9a877	467
ganlikun	0:13413ea9a877	468	/* End of Refresh Interrupt management ***************************************/
ganlikun	0:13413ea9a877	469	if(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_ER) != RESET)
ganlikun	0:13413ea9a877	470	{
ganlikun	0:13413ea9a877	471	if(__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_ER) != RESET)
ganlikun	0:13413ea9a877	472	{
ganlikun	0:13413ea9a877	473	/* Clear the End of Refresh Interrupt Flag */
ganlikun	0:13413ea9a877	474	__HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_ER);
ganlikun	0:13413ea9a877	475
ganlikun	0:13413ea9a877	476	/* End of Refresh Callback */
ganlikun	0:13413ea9a877	477	HAL_DSI_EndOfRefreshCallback(hdsi);
ganlikun	0:13413ea9a877	478	}
ganlikun	0:13413ea9a877	479	}
ganlikun	0:13413ea9a877	480
ganlikun	0:13413ea9a877	481	/* Error Interrupts management ***********************************************/
ganlikun	0:13413ea9a877	482	if(hdsi->ErrorMsk != 0U)
ganlikun	0:13413ea9a877	483	{
ganlikun	0:13413ea9a877	484	ErrorStatus0 = hdsi->Instance->ISR[0U];
ganlikun	0:13413ea9a877	485	ErrorStatus0 &= hdsi->Instance->IER[0U];
ganlikun	0:13413ea9a877	486	ErrorStatus1 = hdsi->Instance->ISR[1U];
ganlikun	0:13413ea9a877	487	ErrorStatus1 &= hdsi->Instance->IER[1U];
ganlikun	0:13413ea9a877	488
ganlikun	0:13413ea9a877	489	if((ErrorStatus0 & DSI_ERROR_ACK_MASK) != RESET)
ganlikun	0:13413ea9a877	490	{
ganlikun	0:13413ea9a877	491	hdsi->ErrorCode \|= HAL_DSI_ERROR_ACK;
ganlikun	0:13413ea9a877	492	}
ganlikun	0:13413ea9a877	493
ganlikun	0:13413ea9a877	494	if((ErrorStatus0 & DSI_ERROR_PHY_MASK) != RESET)
ganlikun	0:13413ea9a877	495	{
ganlikun	0:13413ea9a877	496	hdsi->ErrorCode \|= HAL_DSI_ERROR_PHY;
ganlikun	0:13413ea9a877	497	}
ganlikun	0:13413ea9a877	498
ganlikun	0:13413ea9a877	499	if((ErrorStatus1 & DSI_ERROR_TX_MASK) != RESET)
ganlikun	0:13413ea9a877	500	{
ganlikun	0:13413ea9a877	501	hdsi->ErrorCode \|= HAL_DSI_ERROR_TX;
ganlikun	0:13413ea9a877	502	}
ganlikun	0:13413ea9a877	503
ganlikun	0:13413ea9a877	504	if((ErrorStatus1 & DSI_ERROR_RX_MASK) != RESET)
ganlikun	0:13413ea9a877	505	{
ganlikun	0:13413ea9a877	506	hdsi->ErrorCode \|= HAL_DSI_ERROR_RX;
ganlikun	0:13413ea9a877	507	}
ganlikun	0:13413ea9a877	508
ganlikun	0:13413ea9a877	509	if((ErrorStatus1 & DSI_ERROR_ECC_MASK) != RESET)
ganlikun	0:13413ea9a877	510	{
ganlikun	0:13413ea9a877	511	hdsi->ErrorCode \|= HAL_DSI_ERROR_ECC;
ganlikun	0:13413ea9a877	512	}
ganlikun	0:13413ea9a877	513
ganlikun	0:13413ea9a877	514	if((ErrorStatus1 & DSI_ERROR_CRC_MASK) != RESET)
ganlikun	0:13413ea9a877	515	{
ganlikun	0:13413ea9a877	516	hdsi->ErrorCode \|= HAL_DSI_ERROR_CRC;
ganlikun	0:13413ea9a877	517	}
ganlikun	0:13413ea9a877	518
ganlikun	0:13413ea9a877	519	if((ErrorStatus1 & DSI_ERROR_PSE_MASK) != RESET)
ganlikun	0:13413ea9a877	520	{
ganlikun	0:13413ea9a877	521	hdsi->ErrorCode \|= HAL_DSI_ERROR_PSE;
ganlikun	0:13413ea9a877	522	}
ganlikun	0:13413ea9a877	523
ganlikun	0:13413ea9a877	524	if((ErrorStatus1 & DSI_ERROR_EOT_MASK) != RESET)
ganlikun	0:13413ea9a877	525	{
ganlikun	0:13413ea9a877	526	hdsi->ErrorCode \|= HAL_DSI_ERROR_EOT;
ganlikun	0:13413ea9a877	527	}
ganlikun	0:13413ea9a877	528
ganlikun	0:13413ea9a877	529	if((ErrorStatus1 & DSI_ERROR_OVF_MASK) != RESET)
ganlikun	0:13413ea9a877	530	{
ganlikun	0:13413ea9a877	531	hdsi->ErrorCode \|= HAL_DSI_ERROR_OVF;
ganlikun	0:13413ea9a877	532	}
ganlikun	0:13413ea9a877	533
ganlikun	0:13413ea9a877	534	if((ErrorStatus1 & DSI_ERROR_GEN_MASK) != RESET)
ganlikun	0:13413ea9a877	535	{
ganlikun	0:13413ea9a877	536	hdsi->ErrorCode \|= HAL_DSI_ERROR_GEN;
ganlikun	0:13413ea9a877	537	}
ganlikun	0:13413ea9a877	538
ganlikun	0:13413ea9a877	539	/* Check only selected errors */
ganlikun	0:13413ea9a877	540	if(hdsi->ErrorCode != HAL_DSI_ERROR_NONE)
ganlikun	0:13413ea9a877	541	{
ganlikun	0:13413ea9a877	542	/* DSI error interrupt user callback */
ganlikun	0:13413ea9a877	543	HAL_DSI_ErrorCallback(hdsi);
ganlikun	0:13413ea9a877	544	}
ganlikun	0:13413ea9a877	545	}
ganlikun	0:13413ea9a877	546	}
ganlikun	0:13413ea9a877	547
ganlikun	0:13413ea9a877	548	/**
ganlikun	0:13413ea9a877	549	* @brief Tearing Effect DSI callback.
ganlikun	0:13413ea9a877	550	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	551	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	552	* @retval None
ganlikun	0:13413ea9a877	553	*/
ganlikun	0:13413ea9a877	554	__weak void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	555	{
ganlikun	0:13413ea9a877	556	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	557	UNUSED(hdsi);
ganlikun	0:13413ea9a877	558	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	559	the HAL_DSI_TearingEffectCallback could be implemented in the user file
ganlikun	0:13413ea9a877	560	*/
ganlikun	0:13413ea9a877	561	}
ganlikun	0:13413ea9a877	562
ganlikun	0:13413ea9a877	563	/**
ganlikun	0:13413ea9a877	564	* @brief End of Refresh DSI callback.
ganlikun	0:13413ea9a877	565	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	566	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	567	* @retval None
ganlikun	0:13413ea9a877	568	*/
ganlikun	0:13413ea9a877	569	__weak void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	570	{
ganlikun	0:13413ea9a877	571	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	572	UNUSED(hdsi);
ganlikun	0:13413ea9a877	573	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	574	the HAL_DSI_EndOfRefreshCallback could be implemented in the user file
ganlikun	0:13413ea9a877	575	*/
ganlikun	0:13413ea9a877	576	}
ganlikun	0:13413ea9a877	577
ganlikun	0:13413ea9a877	578	/**
ganlikun	0:13413ea9a877	579	* @brief Operation Error DSI callback.
ganlikun	0:13413ea9a877	580	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	581	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	582	* @retval None
ganlikun	0:13413ea9a877	583	*/
ganlikun	0:13413ea9a877	584	__weak void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	585	{
ganlikun	0:13413ea9a877	586	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	587	UNUSED(hdsi);
ganlikun	0:13413ea9a877	588	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	589	the HAL_DSI_ErrorCallback could be implemented in the user file
ganlikun	0:13413ea9a877	590	*/
ganlikun	0:13413ea9a877	591	}
ganlikun	0:13413ea9a877	592
ganlikun	0:13413ea9a877	593	/**
ganlikun	0:13413ea9a877	594	* @}
ganlikun	0:13413ea9a877	595	*/
ganlikun	0:13413ea9a877	596
ganlikun	0:13413ea9a877	597	/** @defgroup DSI_Group3 Peripheral Control functions
ganlikun	0:13413ea9a877	598	* @brief Peripheral Control functions
ganlikun	0:13413ea9a877	599	*
ganlikun	0:13413ea9a877	600	@verbatim
ganlikun	0:13413ea9a877	601	===============================================================================
ganlikun	0:13413ea9a877	602	##### Peripheral Control functions #####
ganlikun	0:13413ea9a877	603	===============================================================================
ganlikun	0:13413ea9a877	604
ganlikun	0:13413ea9a877	605	@endverbatim
ganlikun	0:13413ea9a877	606	* @{
ganlikun	0:13413ea9a877	607	*/
ganlikun	0:13413ea9a877	608
ganlikun	0:13413ea9a877	609	/**
ganlikun	0:13413ea9a877	610	* @brief Configure the Generic interface read-back Virtual Channel ID.
ganlikun	0:13413ea9a877	611	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	612	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	613	* @param VirtualChannelID: Virtual channel ID
ganlikun	0:13413ea9a877	614	* @retval HAL status
ganlikun	0:13413ea9a877	615	*/
ganlikun	0:13413ea9a877	616	HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID)
ganlikun	0:13413ea9a877	617	{
ganlikun	0:13413ea9a877	618	/* Process locked */
ganlikun	0:13413ea9a877	619	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	620
ganlikun	0:13413ea9a877	621	/* Update the GVCID register */
ganlikun	0:13413ea9a877	622	hdsi->Instance->GVCIDR &= ~DSI_GVCIDR_VCID;
ganlikun	0:13413ea9a877	623	hdsi->Instance->GVCIDR \|= VirtualChannelID;
ganlikun	0:13413ea9a877	624
ganlikun	0:13413ea9a877	625	/* Process unlocked */
ganlikun	0:13413ea9a877	626	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	627
ganlikun	0:13413ea9a877	628	return HAL_OK;
ganlikun	0:13413ea9a877	629	}
ganlikun	0:13413ea9a877	630
ganlikun	0:13413ea9a877	631	/**
ganlikun	0:13413ea9a877	632	* @brief Select video mode and configure the corresponding parameters
ganlikun	0:13413ea9a877	633	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	634	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	635	* @param VidCfg: pointer to a DSI_VidCfgTypeDef structure that contains
ganlikun	0:13413ea9a877	636	* the DSI video mode configuration parameters
ganlikun	0:13413ea9a877	637	* @retval HAL status
ganlikun	0:13413ea9a877	638	*/
ganlikun	0:13413ea9a877	639	HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef hdsi, DSI_VidCfgTypeDef VidCfg)
ganlikun	0:13413ea9a877	640	{
ganlikun	0:13413ea9a877	641	/* Process locked */
ganlikun	0:13413ea9a877	642	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	643
ganlikun	0:13413ea9a877	644	/* Check the parameters */
ganlikun	0:13413ea9a877	645	assert_param(IS_DSI_COLOR_CODING(VidCfg->ColorCoding));
ganlikun	0:13413ea9a877	646	assert_param(IS_DSI_VIDEO_MODE_TYPE(VidCfg->Mode));
ganlikun	0:13413ea9a877	647	assert_param(IS_DSI_LP_COMMAND(VidCfg->LPCommandEnable));
ganlikun	0:13413ea9a877	648	assert_param(IS_DSI_LP_HFP(VidCfg->LPHorizontalFrontPorchEnable));
ganlikun	0:13413ea9a877	649	assert_param(IS_DSI_LP_HBP(VidCfg->LPHorizontalBackPorchEnable));
ganlikun	0:13413ea9a877	650	assert_param(IS_DSI_LP_VACTIVE(VidCfg->LPVerticalActiveEnable));
ganlikun	0:13413ea9a877	651	assert_param(IS_DSI_LP_VFP(VidCfg->LPVerticalFrontPorchEnable));
ganlikun	0:13413ea9a877	652	assert_param(IS_DSI_LP_VBP(VidCfg->LPVerticalBackPorchEnable));
ganlikun	0:13413ea9a877	653	assert_param(IS_DSI_LP_VSYNC(VidCfg->LPVerticalSyncActiveEnable));
ganlikun	0:13413ea9a877	654	assert_param(IS_DSI_FBTAA(VidCfg->FrameBTAAcknowledgeEnable));
ganlikun	0:13413ea9a877	655	assert_param(IS_DSI_DE_POLARITY(VidCfg->DEPolarity));
ganlikun	0:13413ea9a877	656	assert_param(IS_DSI_VSYNC_POLARITY(VidCfg->VSPolarity));
ganlikun	0:13413ea9a877	657	assert_param(IS_DSI_HSYNC_POLARITY(VidCfg->HSPolarity));
ganlikun	0:13413ea9a877	658	/* Check the LooselyPacked variant only in 18-bit mode */
ganlikun	0:13413ea9a877	659	if(VidCfg->ColorCoding == DSI_RGB666)
ganlikun	0:13413ea9a877	660	{
ganlikun	0:13413ea9a877	661	assert_param(IS_DSI_LOOSELY_PACKED(VidCfg->LooselyPacked));
ganlikun	0:13413ea9a877	662	}
ganlikun	0:13413ea9a877	663
ganlikun	0:13413ea9a877	664	/* Select video mode by resetting CMDM and DSIM bits */
ganlikun	0:13413ea9a877	665	hdsi->Instance->MCR &= ~DSI_MCR_CMDM;
ganlikun	0:13413ea9a877	666	hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
ganlikun	0:13413ea9a877	667
ganlikun	0:13413ea9a877	668	/* Configure the video mode transmission type */
ganlikun	0:13413ea9a877	669	hdsi->Instance->VMCR &= ~DSI_VMCR_VMT;
ganlikun	0:13413ea9a877	670	hdsi->Instance->VMCR \|= VidCfg->Mode;
ganlikun	0:13413ea9a877	671
ganlikun	0:13413ea9a877	672	/* Configure the video packet size */
ganlikun	0:13413ea9a877	673	hdsi->Instance->VPCR &= ~DSI_VPCR_VPSIZE;
ganlikun	0:13413ea9a877	674	hdsi->Instance->VPCR \|= VidCfg->PacketSize;
ganlikun	0:13413ea9a877	675
ganlikun	0:13413ea9a877	676	/* Set the chunks number to be transmitted through the DSI link */
ganlikun	0:13413ea9a877	677	hdsi->Instance->VCCR &= ~DSI_VCCR_NUMC;
ganlikun	0:13413ea9a877	678	hdsi->Instance->VCCR \|= VidCfg->NumberOfChunks;
ganlikun	0:13413ea9a877	679
ganlikun	0:13413ea9a877	680	/* Set the size of the null packet */
ganlikun	0:13413ea9a877	681	hdsi->Instance->VNPCR &= ~DSI_VNPCR_NPSIZE;
ganlikun	0:13413ea9a877	682	hdsi->Instance->VNPCR \|= VidCfg->NullPacketSize;
ganlikun	0:13413ea9a877	683
ganlikun	0:13413ea9a877	684	/* Select the virtual channel for the LTDC interface traffic */
ganlikun	0:13413ea9a877	685	hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
ganlikun	0:13413ea9a877	686	hdsi->Instance->LVCIDR \|= VidCfg->VirtualChannelID;
ganlikun	0:13413ea9a877	687
ganlikun	0:13413ea9a877	688	/* Configure the polarity of control signals */
ganlikun	0:13413ea9a877	689	hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP \| DSI_LPCR_VSP \| DSI_LPCR_HSP);
ganlikun	0:13413ea9a877	690	hdsi->Instance->LPCR \|= (VidCfg->DEPolarity \| VidCfg->VSPolarity \| VidCfg->HSPolarity);
ganlikun	0:13413ea9a877	691
ganlikun	0:13413ea9a877	692	/* Select the color coding for the host */
ganlikun	0:13413ea9a877	693	hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
ganlikun	0:13413ea9a877	694	hdsi->Instance->LCOLCR \|= VidCfg->ColorCoding;
ganlikun	0:13413ea9a877	695
ganlikun	0:13413ea9a877	696	/* Select the color coding for the wrapper */
ganlikun	0:13413ea9a877	697	hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
ganlikun	0:13413ea9a877	698	hdsi->Instance->WCFGR \|= ((VidCfg->ColorCoding)<<1U);
ganlikun	0:13413ea9a877	699
ganlikun	0:13413ea9a877	700	/* Enable/disable the loosely packed variant to 18-bit configuration */
ganlikun	0:13413ea9a877	701	if(VidCfg->ColorCoding == DSI_RGB666)
ganlikun	0:13413ea9a877	702	{
ganlikun	0:13413ea9a877	703	hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_LPE;
ganlikun	0:13413ea9a877	704	hdsi->Instance->LCOLCR \|= VidCfg->LooselyPacked;
ganlikun	0:13413ea9a877	705	}
ganlikun	0:13413ea9a877	706
ganlikun	0:13413ea9a877	707	/* Set the Horizontal Synchronization Active (HSA) in lane byte clock cycles */
ganlikun	0:13413ea9a877	708	hdsi->Instance->VHSACR &= ~DSI_VHSACR_HSA;
ganlikun	0:13413ea9a877	709	hdsi->Instance->VHSACR \|= VidCfg->HorizontalSyncActive;
ganlikun	0:13413ea9a877	710
ganlikun	0:13413ea9a877	711	/* Set the Horizontal Back Porch (HBP) in lane byte clock cycles */
ganlikun	0:13413ea9a877	712	hdsi->Instance->VHBPCR &= ~DSI_VHBPCR_HBP;
ganlikun	0:13413ea9a877	713	hdsi->Instance->VHBPCR \|= VidCfg->HorizontalBackPorch;
ganlikun	0:13413ea9a877	714
ganlikun	0:13413ea9a877	715	/* Set the total line time (HLINE=HSA+HBP+HACT+HFP) in lane byte clock cycles */
ganlikun	0:13413ea9a877	716	hdsi->Instance->VLCR &= ~DSI_VLCR_HLINE;
ganlikun	0:13413ea9a877	717	hdsi->Instance->VLCR \|= VidCfg->HorizontalLine;
ganlikun	0:13413ea9a877	718
ganlikun	0:13413ea9a877	719	/* Set the Vertical Synchronization Active (VSA) */
ganlikun	0:13413ea9a877	720	hdsi->Instance->VVSACR &= ~DSI_VVSACR_VSA;
ganlikun	0:13413ea9a877	721	hdsi->Instance->VVSACR \|= VidCfg->VerticalSyncActive;
ganlikun	0:13413ea9a877	722
ganlikun	0:13413ea9a877	723	/* Set the Vertical Back Porch (VBP)*/
ganlikun	0:13413ea9a877	724	hdsi->Instance->VVBPCR &= ~DSI_VVBPCR_VBP;
ganlikun	0:13413ea9a877	725	hdsi->Instance->VVBPCR \|= VidCfg->VerticalBackPorch;
ganlikun	0:13413ea9a877	726
ganlikun	0:13413ea9a877	727	/* Set the Vertical Front Porch (VFP)*/
ganlikun	0:13413ea9a877	728	hdsi->Instance->VVFPCR &= ~DSI_VVFPCR_VFP;
ganlikun	0:13413ea9a877	729	hdsi->Instance->VVFPCR \|= VidCfg->VerticalFrontPorch;
ganlikun	0:13413ea9a877	730
ganlikun	0:13413ea9a877	731	/* Set the Vertical Active period*/
ganlikun	0:13413ea9a877	732	hdsi->Instance->VVACR &= ~DSI_VVACR_VA;
ganlikun	0:13413ea9a877	733	hdsi->Instance->VVACR \|= VidCfg->VerticalActive;
ganlikun	0:13413ea9a877	734
ganlikun	0:13413ea9a877	735	/* Configure the command transmission mode */
ganlikun	0:13413ea9a877	736	hdsi->Instance->VMCR &= ~DSI_VMCR_LPCE;
ganlikun	0:13413ea9a877	737	hdsi->Instance->VMCR \|= VidCfg->LPCommandEnable;
ganlikun	0:13413ea9a877	738
ganlikun	0:13413ea9a877	739	/* Low power largest packet size */
ganlikun	0:13413ea9a877	740	hdsi->Instance->LPMCR &= ~DSI_LPMCR_LPSIZE;
ganlikun	0:13413ea9a877	741	hdsi->Instance->LPMCR \|= ((VidCfg->LPLargestPacketSize)<<16U);
ganlikun	0:13413ea9a877	742
ganlikun	0:13413ea9a877	743	/* Low power VACT largest packet size */
ganlikun	0:13413ea9a877	744	hdsi->Instance->LPMCR &= ~DSI_LPMCR_VLPSIZE;
ganlikun	0:13413ea9a877	745	hdsi->Instance->LPMCR \|= VidCfg->LPVACTLargestPacketSize;
ganlikun	0:13413ea9a877	746
ganlikun	0:13413ea9a877	747	/* Enable LP transition in HFP period */
ganlikun	0:13413ea9a877	748	hdsi->Instance->VMCR &= ~DSI_VMCR_LPHFPE;
ganlikun	0:13413ea9a877	749	hdsi->Instance->VMCR \|= VidCfg->LPHorizontalFrontPorchEnable;
ganlikun	0:13413ea9a877	750
ganlikun	0:13413ea9a877	751	/* Enable LP transition in HBP period */
ganlikun	0:13413ea9a877	752	hdsi->Instance->VMCR &= ~DSI_VMCR_LPHBPE;
ganlikun	0:13413ea9a877	753	hdsi->Instance->VMCR \|= VidCfg->LPHorizontalBackPorchEnable;
ganlikun	0:13413ea9a877	754
ganlikun	0:13413ea9a877	755	/* Enable LP transition in VACT period */
ganlikun	0:13413ea9a877	756	hdsi->Instance->VMCR &= ~DSI_VMCR_LPVAE;
ganlikun	0:13413ea9a877	757	hdsi->Instance->VMCR \|= VidCfg->LPVerticalActiveEnable;
ganlikun	0:13413ea9a877	758
ganlikun	0:13413ea9a877	759	/* Enable LP transition in VFP period */
ganlikun	0:13413ea9a877	760	hdsi->Instance->VMCR &= ~DSI_VMCR_LPVFPE;
ganlikun	0:13413ea9a877	761	hdsi->Instance->VMCR \|= VidCfg->LPVerticalFrontPorchEnable;
ganlikun	0:13413ea9a877	762
ganlikun	0:13413ea9a877	763	/* Enable LP transition in VBP period */
ganlikun	0:13413ea9a877	764	hdsi->Instance->VMCR &= ~DSI_VMCR_LPVBPE;
ganlikun	0:13413ea9a877	765	hdsi->Instance->VMCR \|= VidCfg->LPVerticalBackPorchEnable;
ganlikun	0:13413ea9a877	766
ganlikun	0:13413ea9a877	767	/* Enable LP transition in vertical sync period */
ganlikun	0:13413ea9a877	768	hdsi->Instance->VMCR &= ~DSI_VMCR_LPVSAE;
ganlikun	0:13413ea9a877	769	hdsi->Instance->VMCR \|= VidCfg->LPVerticalSyncActiveEnable;
ganlikun	0:13413ea9a877	770
ganlikun	0:13413ea9a877	771	/* Enable the request for an acknowledge response at the end of a frame */
ganlikun	0:13413ea9a877	772	hdsi->Instance->VMCR &= ~DSI_VMCR_FBTAAE;
ganlikun	0:13413ea9a877	773	hdsi->Instance->VMCR \|= VidCfg->FrameBTAAcknowledgeEnable;
ganlikun	0:13413ea9a877	774
ganlikun	0:13413ea9a877	775	/* Process unlocked */
ganlikun	0:13413ea9a877	776	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	777
ganlikun	0:13413ea9a877	778	return HAL_OK;
ganlikun	0:13413ea9a877	779	}
ganlikun	0:13413ea9a877	780
ganlikun	0:13413ea9a877	781	/**
ganlikun	0:13413ea9a877	782	* @brief Select adapted command mode and configure the corresponding parameters
ganlikun	0:13413ea9a877	783	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	784	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	785	* @param CmdCfg: pointer to a DSI_CmdCfgTypeDef structure that contains
ganlikun	0:13413ea9a877	786	* the DSI command mode configuration parameters
ganlikun	0:13413ea9a877	787	* @retval HAL status
ganlikun	0:13413ea9a877	788	*/
ganlikun	0:13413ea9a877	789	HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef hdsi, DSI_CmdCfgTypeDef CmdCfg)
ganlikun	0:13413ea9a877	790	{
ganlikun	0:13413ea9a877	791	/* Process locked */
ganlikun	0:13413ea9a877	792	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	793
ganlikun	0:13413ea9a877	794	/* Check the parameters */
ganlikun	0:13413ea9a877	795	assert_param(IS_DSI_COLOR_CODING(CmdCfg->ColorCoding));
ganlikun	0:13413ea9a877	796	assert_param(IS_DSI_TE_SOURCE(CmdCfg->TearingEffectSource));
ganlikun	0:13413ea9a877	797	assert_param(IS_DSI_TE_POLARITY(CmdCfg->TearingEffectPolarity));
ganlikun	0:13413ea9a877	798	assert_param(IS_DSI_AUTOMATIC_REFRESH(CmdCfg->AutomaticRefresh));
ganlikun	0:13413ea9a877	799	assert_param(IS_DSI_VS_POLARITY(CmdCfg->VSyncPol));
ganlikun	0:13413ea9a877	800	assert_param(IS_DSI_TE_ACK_REQUEST(CmdCfg->TEAcknowledgeRequest));
ganlikun	0:13413ea9a877	801	assert_param(IS_DSI_DE_POLARITY(CmdCfg->DEPolarity));
ganlikun	0:13413ea9a877	802	assert_param(IS_DSI_VSYNC_POLARITY(CmdCfg->VSPolarity));
ganlikun	0:13413ea9a877	803	assert_param(IS_DSI_HSYNC_POLARITY(CmdCfg->HSPolarity));
ganlikun	0:13413ea9a877	804
ganlikun	0:13413ea9a877	805	/* Select command mode by setting CMDM and DSIM bits */
ganlikun	0:13413ea9a877	806	hdsi->Instance->MCR \|= DSI_MCR_CMDM;
ganlikun	0:13413ea9a877	807	hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
ganlikun	0:13413ea9a877	808	hdsi->Instance->WCFGR \|= DSI_WCFGR_DSIM;
ganlikun	0:13413ea9a877	809
ganlikun	0:13413ea9a877	810	/* Select the virtual channel for the LTDC interface traffic */
ganlikun	0:13413ea9a877	811	hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
ganlikun	0:13413ea9a877	812	hdsi->Instance->LVCIDR \|= CmdCfg->VirtualChannelID;
ganlikun	0:13413ea9a877	813
ganlikun	0:13413ea9a877	814	/* Configure the polarity of control signals */
ganlikun	0:13413ea9a877	815	hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP \| DSI_LPCR_VSP \| DSI_LPCR_HSP);
ganlikun	0:13413ea9a877	816	hdsi->Instance->LPCR \|= (CmdCfg->DEPolarity \| CmdCfg->VSPolarity \| CmdCfg->HSPolarity);
ganlikun	0:13413ea9a877	817
ganlikun	0:13413ea9a877	818	/* Select the color coding for the host */
ganlikun	0:13413ea9a877	819	hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
ganlikun	0:13413ea9a877	820	hdsi->Instance->LCOLCR \|= CmdCfg->ColorCoding;
ganlikun	0:13413ea9a877	821
ganlikun	0:13413ea9a877	822	/* Select the color coding for the wrapper */
ganlikun	0:13413ea9a877	823	hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
ganlikun	0:13413ea9a877	824	hdsi->Instance->WCFGR \|= ((CmdCfg->ColorCoding)<<1U);
ganlikun	0:13413ea9a877	825
ganlikun	0:13413ea9a877	826	/* Configure the maximum allowed size for write memory command */
ganlikun	0:13413ea9a877	827	hdsi->Instance->LCCR &= ~DSI_LCCR_CMDSIZE;
ganlikun	0:13413ea9a877	828	hdsi->Instance->LCCR \|= CmdCfg->CommandSize;
ganlikun	0:13413ea9a877	829
ganlikun	0:13413ea9a877	830	/* Configure the tearing effect source and polarity and select the refresh mode */
ganlikun	0:13413ea9a877	831	hdsi->Instance->WCFGR &= ~(DSI_WCFGR_TESRC \| DSI_WCFGR_TEPOL \| DSI_WCFGR_AR \| DSI_WCFGR_VSPOL);
ganlikun	0:13413ea9a877	832	hdsi->Instance->WCFGR \|= (CmdCfg->TearingEffectSource \| CmdCfg->TearingEffectPolarity \| CmdCfg->AutomaticRefresh \| CmdCfg->VSyncPol);
ganlikun	0:13413ea9a877	833
ganlikun	0:13413ea9a877	834	/* Configure the tearing effect acknowledge request */
ganlikun	0:13413ea9a877	835	hdsi->Instance->CMCR &= ~DSI_CMCR_TEARE;
ganlikun	0:13413ea9a877	836	hdsi->Instance->CMCR \|= CmdCfg->TEAcknowledgeRequest;
ganlikun	0:13413ea9a877	837
ganlikun	0:13413ea9a877	838	/* Enable the Tearing Effect interrupt */
ganlikun	0:13413ea9a877	839	__HAL_DSI_ENABLE_IT(hdsi, DSI_IT_TE);
ganlikun	0:13413ea9a877	840
ganlikun	0:13413ea9a877	841	/* Enable the End of Refresh interrupt */
ganlikun	0:13413ea9a877	842	__HAL_DSI_ENABLE_IT(hdsi, DSI_IT_ER);
ganlikun	0:13413ea9a877	843
ganlikun	0:13413ea9a877	844	/* Process unlocked */
ganlikun	0:13413ea9a877	845	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	846
ganlikun	0:13413ea9a877	847	return HAL_OK;
ganlikun	0:13413ea9a877	848	}
ganlikun	0:13413ea9a877	849
ganlikun	0:13413ea9a877	850	/**
ganlikun	0:13413ea9a877	851	* @brief Configure command transmission mode: High-speed or Low-power
ganlikun	0:13413ea9a877	852	* and enable/disable acknowledge request after packet transmission
ganlikun	0:13413ea9a877	853	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	854	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	855	* @param LPCmd: pointer to a DSI_LPCmdTypeDef structure that contains
ganlikun	0:13413ea9a877	856	* the DSI command transmission mode configuration parameters
ganlikun	0:13413ea9a877	857	* @retval HAL status
ganlikun	0:13413ea9a877	858	*/
ganlikun	0:13413ea9a877	859	HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef hdsi, DSI_LPCmdTypeDef LPCmd)
ganlikun	0:13413ea9a877	860	{
ganlikun	0:13413ea9a877	861	/* Process locked */
ganlikun	0:13413ea9a877	862	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	863
ganlikun	0:13413ea9a877	864	assert_param(IS_DSI_LP_GSW0P(LPCmd->LPGenShortWriteNoP));
ganlikun	0:13413ea9a877	865	assert_param(IS_DSI_LP_GSW1P(LPCmd->LPGenShortWriteOneP));
ganlikun	0:13413ea9a877	866	assert_param(IS_DSI_LP_GSW2P(LPCmd->LPGenShortWriteTwoP));
ganlikun	0:13413ea9a877	867	assert_param(IS_DSI_LP_GSR0P(LPCmd->LPGenShortReadNoP));
ganlikun	0:13413ea9a877	868	assert_param(IS_DSI_LP_GSR1P(LPCmd->LPGenShortReadOneP));
ganlikun	0:13413ea9a877	869	assert_param(IS_DSI_LP_GSR2P(LPCmd->LPGenShortReadTwoP));
ganlikun	0:13413ea9a877	870	assert_param(IS_DSI_LP_GLW(LPCmd->LPGenLongWrite));
ganlikun	0:13413ea9a877	871	assert_param(IS_DSI_LP_DSW0P(LPCmd->LPDcsShortWriteNoP));
ganlikun	0:13413ea9a877	872	assert_param(IS_DSI_LP_DSW1P(LPCmd->LPDcsShortWriteOneP));
ganlikun	0:13413ea9a877	873	assert_param(IS_DSI_LP_DSR0P(LPCmd->LPDcsShortReadNoP));
ganlikun	0:13413ea9a877	874	assert_param(IS_DSI_LP_DLW(LPCmd->LPDcsLongWrite));
ganlikun	0:13413ea9a877	875	assert_param(IS_DSI_LP_MRDP(LPCmd->LPMaxReadPacket));
ganlikun	0:13413ea9a877	876	assert_param(IS_DSI_ACK_REQUEST(LPCmd->AcknowledgeRequest));
ganlikun	0:13413ea9a877	877
ganlikun	0:13413ea9a877	878	/* Select High-speed or Low-power for command transmission */
ganlikun	0:13413ea9a877	879	hdsi->Instance->CMCR &= ~(DSI_CMCR_GSW0TX \|\
ganlikun	0:13413ea9a877	880	DSI_CMCR_GSW1TX \|\
ganlikun	0:13413ea9a877	881	DSI_CMCR_GSW2TX \|\
ganlikun	0:13413ea9a877	882	DSI_CMCR_GSR0TX \|\
ganlikun	0:13413ea9a877	883	DSI_CMCR_GSR1TX \|\
ganlikun	0:13413ea9a877	884	DSI_CMCR_GSR2TX \|\
ganlikun	0:13413ea9a877	885	DSI_CMCR_GLWTX \|\
ganlikun	0:13413ea9a877	886	DSI_CMCR_DSW0TX \|\
ganlikun	0:13413ea9a877	887	DSI_CMCR_DSW1TX \|\
ganlikun	0:13413ea9a877	888	DSI_CMCR_DSR0TX \|\
ganlikun	0:13413ea9a877	889	DSI_CMCR_DLWTX \|\
ganlikun	0:13413ea9a877	890	DSI_CMCR_MRDPS);
ganlikun	0:13413ea9a877	891	hdsi->Instance->CMCR \|= (LPCmd->LPGenShortWriteNoP \|\
ganlikun	0:13413ea9a877	892	LPCmd->LPGenShortWriteOneP \|\
ganlikun	0:13413ea9a877	893	LPCmd->LPGenShortWriteTwoP \|\
ganlikun	0:13413ea9a877	894	LPCmd->LPGenShortReadNoP \|\
ganlikun	0:13413ea9a877	895	LPCmd->LPGenShortReadOneP \|\
ganlikun	0:13413ea9a877	896	LPCmd->LPGenShortReadTwoP \|\
ganlikun	0:13413ea9a877	897	LPCmd->LPGenLongWrite \|\
ganlikun	0:13413ea9a877	898	LPCmd->LPDcsShortWriteNoP \|\
ganlikun	0:13413ea9a877	899	LPCmd->LPDcsShortWriteOneP \|\
ganlikun	0:13413ea9a877	900	LPCmd->LPDcsShortReadNoP \|\
ganlikun	0:13413ea9a877	901	LPCmd->LPDcsLongWrite \|\
ganlikun	0:13413ea9a877	902	LPCmd->LPMaxReadPacket);
ganlikun	0:13413ea9a877	903
ganlikun	0:13413ea9a877	904	/* Configure the acknowledge request after each packet transmission */
ganlikun	0:13413ea9a877	905	hdsi->Instance->CMCR &= ~DSI_CMCR_ARE;
ganlikun	0:13413ea9a877	906	hdsi->Instance->CMCR \|= LPCmd->AcknowledgeRequest;
ganlikun	0:13413ea9a877	907
ganlikun	0:13413ea9a877	908	/* Process unlocked */
ganlikun	0:13413ea9a877	909	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	910
ganlikun	0:13413ea9a877	911	return HAL_OK;
ganlikun	0:13413ea9a877	912	}
ganlikun	0:13413ea9a877	913
ganlikun	0:13413ea9a877	914	/**
ganlikun	0:13413ea9a877	915	* @brief Configure the flow control parameters
ganlikun	0:13413ea9a877	916	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	917	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	918	* @param FlowControl: flow control feature(s) to be enabled.
ganlikun	0:13413ea9a877	919	* This parameter can be any combination of @ref DSI_FlowControl.
ganlikun	0:13413ea9a877	920	* @retval HAL status
ganlikun	0:13413ea9a877	921	*/
ganlikun	0:13413ea9a877	922	HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl)
ganlikun	0:13413ea9a877	923	{
ganlikun	0:13413ea9a877	924	/* Process locked */
ganlikun	0:13413ea9a877	925	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	926
ganlikun	0:13413ea9a877	927	/* Check the parameters */
ganlikun	0:13413ea9a877	928	assert_param(IS_DSI_FLOW_CONTROL(FlowControl));
ganlikun	0:13413ea9a877	929
ganlikun	0:13413ea9a877	930	/* Set the DSI Host Protocol Configuration Register */
ganlikun	0:13413ea9a877	931	hdsi->Instance->PCR &= ~DSI_FLOW_CONTROL_ALL;
ganlikun	0:13413ea9a877	932	hdsi->Instance->PCR \|= FlowControl;
ganlikun	0:13413ea9a877	933
ganlikun	0:13413ea9a877	934	/* Process unlocked */
ganlikun	0:13413ea9a877	935	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	936
ganlikun	0:13413ea9a877	937	return HAL_OK;
ganlikun	0:13413ea9a877	938	}
ganlikun	0:13413ea9a877	939
ganlikun	0:13413ea9a877	940	/**
ganlikun	0:13413ea9a877	941	* @brief Configure the DSI PHY timer parameters
ganlikun	0:13413ea9a877	942	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	943	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	944	* @param PhyTimers: DSI_PHY_TimerTypeDef structure that contains
ganlikun	0:13413ea9a877	945	* the DSI PHY timing parameters
ganlikun	0:13413ea9a877	946	* @retval HAL status
ganlikun	0:13413ea9a877	947	*/
ganlikun	0:13413ea9a877	948	HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef hdsi, DSI_PHY_TimerTypeDef PhyTimers)
ganlikun	0:13413ea9a877	949	{
ganlikun	0:13413ea9a877	950	uint32_t maxTime;
ganlikun	0:13413ea9a877	951	/* Process locked */
ganlikun	0:13413ea9a877	952	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	953
ganlikun	0:13413ea9a877	954	maxTime = (PhyTimers->ClockLaneLP2HSTime > PhyTimers->ClockLaneHS2LPTime)? PhyTimers->ClockLaneLP2HSTime: PhyTimers->ClockLaneHS2LPTime;
ganlikun	0:13413ea9a877	955
ganlikun	0:13413ea9a877	956	/* Clock lane timer configuration */
ganlikun	0:13413ea9a877	957
ganlikun	0:13413ea9a877	958	/* In Automatic Clock Lane control mode, the DSI Host can turn off the clock lane between two
ganlikun	0:13413ea9a877	959	High-Speed transmission.
ganlikun	0:13413ea9a877	960	To do so, the DSI Host calculates the time required for the clock lane to change from HighSpeed
ganlikun	0:13413ea9a877	961	to Low-Power and from Low-Power to High-Speed.
ganlikun	0:13413ea9a877	962	This timings are configured by the HS2LP_TIME and LP2HS_TIME in the DSI Host Clock Lane Timer Configuration Register (DSI_CLTCR).
ganlikun	0:13413ea9a877	963	But the DSI Host is not calculating LP2HS_TIME + HS2LP_TIME but 2 x HS2LP_TIME.
ganlikun	0:13413ea9a877	964
ganlikun	0:13413ea9a877	965	Workaround : Configure HS2LP_TIME and LP2HS_TIME with the same value being the max of HS2LP_TIME or LP2HS_TIME.
ganlikun	0:13413ea9a877	966	*/
ganlikun	0:13413ea9a877	967	hdsi->Instance->CLTCR &= ~(DSI_CLTCR_LP2HS_TIME \| DSI_CLTCR_HS2LP_TIME);
ganlikun	0:13413ea9a877	968	hdsi->Instance->CLTCR \|= (maxTime \| ((maxTime)<<16U));
ganlikun	0:13413ea9a877	969
ganlikun	0:13413ea9a877	970	/* Data lane timer configuration */
ganlikun	0:13413ea9a877	971	hdsi->Instance->DLTCR &= ~(DSI_DLTCR_MRD_TIME \| DSI_DLTCR_LP2HS_TIME \| DSI_DLTCR_HS2LP_TIME);
ganlikun	0:13413ea9a877	972	hdsi->Instance->DLTCR \|= (PhyTimers->DataLaneMaxReadTime \| ((PhyTimers->DataLaneLP2HSTime)<<16U) \| ((PhyTimers->DataLaneHS2LPTime)<<24U));
ganlikun	0:13413ea9a877	973
ganlikun	0:13413ea9a877	974	/* Configure the wait period to request HS transmission after a stop state */
ganlikun	0:13413ea9a877	975	hdsi->Instance->PCONFR &= ~DSI_PCONFR_SW_TIME;
ganlikun	0:13413ea9a877	976	hdsi->Instance->PCONFR \|= ((PhyTimers->StopWaitTime)<<8U);
ganlikun	0:13413ea9a877	977
ganlikun	0:13413ea9a877	978	/* Process unlocked */
ganlikun	0:13413ea9a877	979	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	980
ganlikun	0:13413ea9a877	981	return HAL_OK;
ganlikun	0:13413ea9a877	982	}
ganlikun	0:13413ea9a877	983
ganlikun	0:13413ea9a877	984	/**
ganlikun	0:13413ea9a877	985	* @brief Configure the DSI HOST timeout parameters
ganlikun	0:13413ea9a877	986	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	987	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	988	* @param HostTimeouts: DSI_HOST_TimeoutTypeDef structure that contains
ganlikun	0:13413ea9a877	989	* the DSI host timeout parameters
ganlikun	0:13413ea9a877	990	* @retval HAL status
ganlikun	0:13413ea9a877	991	*/
ganlikun	0:13413ea9a877	992	HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef hdsi, DSI_HOST_TimeoutTypeDef HostTimeouts)
ganlikun	0:13413ea9a877	993	{
ganlikun	0:13413ea9a877	994	/* Process locked */
ganlikun	0:13413ea9a877	995	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	996
ganlikun	0:13413ea9a877	997	/* Set the timeout clock division factor */
ganlikun	0:13413ea9a877	998	hdsi->Instance->CCR &= ~DSI_CCR_TOCKDIV;
ganlikun	0:13413ea9a877	999	hdsi->Instance->CCR \|= ((HostTimeouts->TimeoutCkdiv)<<8U);
ganlikun	0:13413ea9a877	1000
ganlikun	0:13413ea9a877	1001	/* High-speed transmission timeout */
ganlikun	0:13413ea9a877	1002	hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_HSTX_TOCNT;
ganlikun	0:13413ea9a877	1003	hdsi->Instance->TCCR[0U] \|= ((HostTimeouts->HighSpeedTransmissionTimeout)<<16U);
ganlikun	0:13413ea9a877	1004
ganlikun	0:13413ea9a877	1005	/* Low-power reception timeout */
ganlikun	0:13413ea9a877	1006	hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_LPRX_TOCNT;
ganlikun	0:13413ea9a877	1007	hdsi->Instance->TCCR[0U] \|= HostTimeouts->LowPowerReceptionTimeout;
ganlikun	0:13413ea9a877	1008
ganlikun	0:13413ea9a877	1009	/* High-speed read timeout */
ganlikun	0:13413ea9a877	1010	hdsi->Instance->TCCR[1U] &= ~DSI_TCCR1_HSRD_TOCNT;
ganlikun	0:13413ea9a877	1011	hdsi->Instance->TCCR[1U] \|= HostTimeouts->HighSpeedReadTimeout;
ganlikun	0:13413ea9a877	1012
ganlikun	0:13413ea9a877	1013	/* Low-power read timeout */
ganlikun	0:13413ea9a877	1014	hdsi->Instance->TCCR[2U] &= ~DSI_TCCR2_LPRD_TOCNT;
ganlikun	0:13413ea9a877	1015	hdsi->Instance->TCCR[2U] \|= HostTimeouts->LowPowerReadTimeout;
ganlikun	0:13413ea9a877	1016
ganlikun	0:13413ea9a877	1017	/* High-speed write timeout */
ganlikun	0:13413ea9a877	1018	hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_HSWR_TOCNT;
ganlikun	0:13413ea9a877	1019	hdsi->Instance->TCCR[3U] \|= HostTimeouts->HighSpeedWriteTimeout;
ganlikun	0:13413ea9a877	1020
ganlikun	0:13413ea9a877	1021	/* High-speed write presp mode */
ganlikun	0:13413ea9a877	1022	hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_PM;
ganlikun	0:13413ea9a877	1023	hdsi->Instance->TCCR[3U] \|= HostTimeouts->HighSpeedWritePrespMode;
ganlikun	0:13413ea9a877	1024
ganlikun	0:13413ea9a877	1025	/* Low-speed write timeout */
ganlikun	0:13413ea9a877	1026	hdsi->Instance->TCCR[4U] &= ~DSI_TCCR4_LPWR_TOCNT;
ganlikun	0:13413ea9a877	1027	hdsi->Instance->TCCR[4U] \|= HostTimeouts->LowPowerWriteTimeout;
ganlikun	0:13413ea9a877	1028
ganlikun	0:13413ea9a877	1029	/* BTA timeout */
ganlikun	0:13413ea9a877	1030	hdsi->Instance->TCCR[5U] &= ~DSI_TCCR5_BTA_TOCNT;
ganlikun	0:13413ea9a877	1031	hdsi->Instance->TCCR[5U] \|= HostTimeouts->BTATimeout;
ganlikun	0:13413ea9a877	1032
ganlikun	0:13413ea9a877	1033	/* Process unlocked */
ganlikun	0:13413ea9a877	1034	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1035
ganlikun	0:13413ea9a877	1036	return HAL_OK;
ganlikun	0:13413ea9a877	1037	}
ganlikun	0:13413ea9a877	1038
ganlikun	0:13413ea9a877	1039	/**
ganlikun	0:13413ea9a877	1040	* @brief Start the DSI module
ganlikun	0:13413ea9a877	1041	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1042	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1043	* @retval HAL status
ganlikun	0:13413ea9a877	1044	*/
ganlikun	0:13413ea9a877	1045	HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1046	{
ganlikun	0:13413ea9a877	1047	/* Process locked */
ganlikun	0:13413ea9a877	1048	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1049
ganlikun	0:13413ea9a877	1050	/* Enable the DSI host */
ganlikun	0:13413ea9a877	1051	__HAL_DSI_ENABLE(hdsi);
ganlikun	0:13413ea9a877	1052
ganlikun	0:13413ea9a877	1053	/* Enable the DSI wrapper */
ganlikun	0:13413ea9a877	1054	__HAL_DSI_WRAPPER_ENABLE(hdsi);
ganlikun	0:13413ea9a877	1055
ganlikun	0:13413ea9a877	1056	/* Process unlocked */
ganlikun	0:13413ea9a877	1057	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1058
ganlikun	0:13413ea9a877	1059	return HAL_OK;
ganlikun	0:13413ea9a877	1060	}
ganlikun	0:13413ea9a877	1061
ganlikun	0:13413ea9a877	1062	/**
ganlikun	0:13413ea9a877	1063	* @brief Stop the DSI module
ganlikun	0:13413ea9a877	1064	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1065	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1066	* @retval HAL status
ganlikun	0:13413ea9a877	1067	*/
ganlikun	0:13413ea9a877	1068	HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1069	{
ganlikun	0:13413ea9a877	1070	/* Process locked */
ganlikun	0:13413ea9a877	1071	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1072
ganlikun	0:13413ea9a877	1073	/* Disable the DSI host */
ganlikun	0:13413ea9a877	1074	__HAL_DSI_DISABLE(hdsi);
ganlikun	0:13413ea9a877	1075
ganlikun	0:13413ea9a877	1076	/* Disable the DSI wrapper */
ganlikun	0:13413ea9a877	1077	__HAL_DSI_WRAPPER_DISABLE(hdsi);
ganlikun	0:13413ea9a877	1078
ganlikun	0:13413ea9a877	1079	/* Process unlocked */
ganlikun	0:13413ea9a877	1080	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1081
ganlikun	0:13413ea9a877	1082	return HAL_OK;
ganlikun	0:13413ea9a877	1083	}
ganlikun	0:13413ea9a877	1084
ganlikun	0:13413ea9a877	1085	/**
ganlikun	0:13413ea9a877	1086	* @brief Refresh the display in command mode
ganlikun	0:13413ea9a877	1087	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1088	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1089	* @retval HAL status
ganlikun	0:13413ea9a877	1090	*/
ganlikun	0:13413ea9a877	1091	HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1092	{
ganlikun	0:13413ea9a877	1093	/* Process locked */
ganlikun	0:13413ea9a877	1094	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1095
ganlikun	0:13413ea9a877	1096	/* Update the display */
ganlikun	0:13413ea9a877	1097	hdsi->Instance->WCR \|= DSI_WCR_LTDCEN;
ganlikun	0:13413ea9a877	1098
ganlikun	0:13413ea9a877	1099	/* Process unlocked */
ganlikun	0:13413ea9a877	1100	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1101
ganlikun	0:13413ea9a877	1102	return HAL_OK;
ganlikun	0:13413ea9a877	1103	}
ganlikun	0:13413ea9a877	1104
ganlikun	0:13413ea9a877	1105	/**
ganlikun	0:13413ea9a877	1106	* @brief Controls the display color mode in Video mode
ganlikun	0:13413ea9a877	1107	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1108	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1109	* @param ColorMode: Color mode (full or 8-colors).
ganlikun	0:13413ea9a877	1110	* This parameter can be any value of @ref DSI_Color_Mode
ganlikun	0:13413ea9a877	1111	* @retval HAL status
ganlikun	0:13413ea9a877	1112	*/
ganlikun	0:13413ea9a877	1113	HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode)
ganlikun	0:13413ea9a877	1114	{
ganlikun	0:13413ea9a877	1115	/* Process locked */
ganlikun	0:13413ea9a877	1116	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1117
ganlikun	0:13413ea9a877	1118	/* Check the parameters */
ganlikun	0:13413ea9a877	1119	assert_param(IS_DSI_COLOR_MODE(ColorMode));
ganlikun	0:13413ea9a877	1120
ganlikun	0:13413ea9a877	1121	/* Update the display color mode */
ganlikun	0:13413ea9a877	1122	hdsi->Instance->WCR &= ~DSI_WCR_COLM;
ganlikun	0:13413ea9a877	1123	hdsi->Instance->WCR \|= ColorMode;
ganlikun	0:13413ea9a877	1124
ganlikun	0:13413ea9a877	1125	/* Process unlocked */
ganlikun	0:13413ea9a877	1126	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1127
ganlikun	0:13413ea9a877	1128	return HAL_OK;
ganlikun	0:13413ea9a877	1129	}
ganlikun	0:13413ea9a877	1130
ganlikun	0:13413ea9a877	1131	/**
ganlikun	0:13413ea9a877	1132	* @brief Control the display shutdown in Video mode
ganlikun	0:13413ea9a877	1133	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1134	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1135	* @param Shutdown: Shut-down (Display-ON or Display-OFF).
ganlikun	0:13413ea9a877	1136	* This parameter can be any value of @ref DSI_ShutDown
ganlikun	0:13413ea9a877	1137	* @retval HAL status
ganlikun	0:13413ea9a877	1138	*/
ganlikun	0:13413ea9a877	1139	HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown)
ganlikun	0:13413ea9a877	1140	{
ganlikun	0:13413ea9a877	1141	/* Process locked */
ganlikun	0:13413ea9a877	1142	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1143
ganlikun	0:13413ea9a877	1144	/* Check the parameters */
ganlikun	0:13413ea9a877	1145	assert_param(IS_DSI_SHUT_DOWN(Shutdown));
ganlikun	0:13413ea9a877	1146
ganlikun	0:13413ea9a877	1147	/* Update the display Shutdown */
ganlikun	0:13413ea9a877	1148	hdsi->Instance->WCR &= ~DSI_WCR_SHTDN;
ganlikun	0:13413ea9a877	1149	hdsi->Instance->WCR \|= Shutdown;
ganlikun	0:13413ea9a877	1150
ganlikun	0:13413ea9a877	1151	/* Process unlocked */
ganlikun	0:13413ea9a877	1152	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1153
ganlikun	0:13413ea9a877	1154	return HAL_OK;
ganlikun	0:13413ea9a877	1155	}
ganlikun	0:13413ea9a877	1156
ganlikun	0:13413ea9a877	1157	/**
ganlikun	0:13413ea9a877	1158	* @brief DCS or Generic short write command
ganlikun	0:13413ea9a877	1159	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1160	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1161	* @param ChannelID: Virtual channel ID.
ganlikun	0:13413ea9a877	1162	* @param Mode: DSI short packet data type.
ganlikun	0:13413ea9a877	1163	* This parameter can be any value of @ref DSI_SHORT_WRITE_PKT_Data_Type.
ganlikun	0:13413ea9a877	1164	* @param Param1: DSC command or first generic parameter.
ganlikun	0:13413ea9a877	1165	* This parameter can be any value of @ref DSI_DCS_Command or a
ganlikun	0:13413ea9a877	1166	* generic command code.
ganlikun	0:13413ea9a877	1167	* @param Param2: DSC parameter or second generic parameter.
ganlikun	0:13413ea9a877	1168	* @retval HAL status
ganlikun	0:13413ea9a877	1169	*/
ganlikun	0:13413ea9a877	1170	HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
ganlikun	0:13413ea9a877	1171	uint32_t ChannelID,
ganlikun	0:13413ea9a877	1172	uint32_t Mode,
ganlikun	0:13413ea9a877	1173	uint32_t Param1,
ganlikun	0:13413ea9a877	1174	uint32_t Param2)
ganlikun	0:13413ea9a877	1175	{
ganlikun	0:13413ea9a877	1176	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	1177
ganlikun	0:13413ea9a877	1178	/* Process locked */
ganlikun	0:13413ea9a877	1179	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1180
ganlikun	0:13413ea9a877	1181	/* Check the parameters */
ganlikun	0:13413ea9a877	1182	assert_param(IS_DSI_SHORT_WRITE_PACKET_TYPE(Mode));
ganlikun	0:13413ea9a877	1183
ganlikun	0:13413ea9a877	1184	/* Get tick */
ganlikun	0:13413ea9a877	1185	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1186
ganlikun	0:13413ea9a877	1187	/* Wait for Command FIFO Empty */
ganlikun	0:13413ea9a877	1188	while((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == 0U)
ganlikun	0:13413ea9a877	1189	{
ganlikun	0:13413ea9a877	1190	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1191	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1192	{
ganlikun	0:13413ea9a877	1193	/* Process Unlocked */
ganlikun	0:13413ea9a877	1194	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1195
ganlikun	0:13413ea9a877	1196	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1197	}
ganlikun	0:13413ea9a877	1198	}
ganlikun	0:13413ea9a877	1199
ganlikun	0:13413ea9a877	1200	/* Configure the packet to send a short DCS command with 0 or 1 parameter */
ganlikun	0:13413ea9a877	1201	DSI_ConfigPacketHeader(hdsi->Instance,
ganlikun	0:13413ea9a877	1202	ChannelID,
ganlikun	0:13413ea9a877	1203	Mode,
ganlikun	0:13413ea9a877	1204	Param1,
ganlikun	0:13413ea9a877	1205	Param2);
ganlikun	0:13413ea9a877	1206
ganlikun	0:13413ea9a877	1207	/* Process unlocked */
ganlikun	0:13413ea9a877	1208	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1209
ganlikun	0:13413ea9a877	1210	return HAL_OK;
ganlikun	0:13413ea9a877	1211	}
ganlikun	0:13413ea9a877	1212
ganlikun	0:13413ea9a877	1213	/**
ganlikun	0:13413ea9a877	1214	* @brief DCS or Generic long write command
ganlikun	0:13413ea9a877	1215	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1216	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1217	* @param ChannelID: Virtual channel ID.
ganlikun	0:13413ea9a877	1218	* @param Mode: DSI long packet data type.
ganlikun	0:13413ea9a877	1219	* This parameter can be any value of @ref DSI_LONG_WRITE_PKT_Data_Type.
ganlikun	0:13413ea9a877	1220	* @param NbParams: Number of parameters.
ganlikun	0:13413ea9a877	1221	* @param Param1: DSC command or first generic parameter.
ganlikun	0:13413ea9a877	1222	* This parameter can be any value of @ref DSI_DCS_Command or a
ganlikun	0:13413ea9a877	1223	* generic command code
ganlikun	0:13413ea9a877	1224	* @param ParametersTable: Pointer to parameter values table.
ganlikun	0:13413ea9a877	1225	* @retval HAL status
ganlikun	0:13413ea9a877	1226	*/
ganlikun	0:13413ea9a877	1227	HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
ganlikun	0:13413ea9a877	1228	uint32_t ChannelID,
ganlikun	0:13413ea9a877	1229	uint32_t Mode,
ganlikun	0:13413ea9a877	1230	uint32_t NbParams,
ganlikun	0:13413ea9a877	1231	uint32_t Param1,
ganlikun	0:13413ea9a877	1232	uint8_t* ParametersTable)
ganlikun	0:13413ea9a877	1233	{
ganlikun	0:13413ea9a877	1234	uint32_t uicounter = 0U, nbBytes = 0U, count = 0U;
ganlikun	0:13413ea9a877	1235	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	1236	uint32_t fifoword = 0U;
ganlikun	0:13413ea9a877	1237
ganlikun	0:13413ea9a877	1238	/* Process locked */
ganlikun	0:13413ea9a877	1239	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1240
ganlikun	0:13413ea9a877	1241	/* Check the parameters */
ganlikun	0:13413ea9a877	1242	assert_param(IS_DSI_LONG_WRITE_PACKET_TYPE(Mode));
ganlikun	0:13413ea9a877	1243
ganlikun	0:13413ea9a877	1244	/* Get tick */
ganlikun	0:13413ea9a877	1245	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1246
ganlikun	0:13413ea9a877	1247	/* Wait for Command FIFO Empty */
ganlikun	0:13413ea9a877	1248	while((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == RESET)
ganlikun	0:13413ea9a877	1249	{
ganlikun	0:13413ea9a877	1250	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1251	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1252	{
ganlikun	0:13413ea9a877	1253	/* Process Unlocked */
ganlikun	0:13413ea9a877	1254	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1255
ganlikun	0:13413ea9a877	1256	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1257	}
ganlikun	0:13413ea9a877	1258	}
ganlikun	0:13413ea9a877	1259
ganlikun	0:13413ea9a877	1260	/* Set the DCS code on payload byte 1, and the other parameters on the write FIFO command*/
ganlikun	0:13413ea9a877	1261	fifoword = Param1;
ganlikun	0:13413ea9a877	1262	nbBytes = (NbParams < 3U) ? NbParams : 3U;
ganlikun	0:13413ea9a877	1263
ganlikun	0:13413ea9a877	1264	for(count = 0U; count < nbBytes; count++)
ganlikun	0:13413ea9a877	1265	{
ganlikun	0:13413ea9a877	1266	fifoword \|= (((uint32_t)((ParametersTable + count))) << (8U + (8Ucount)));
ganlikun	0:13413ea9a877	1267	}
ganlikun	0:13413ea9a877	1268	hdsi->Instance->GPDR = fifoword;
ganlikun	0:13413ea9a877	1269
ganlikun	0:13413ea9a877	1270	uicounter = NbParams - nbBytes;
ganlikun	0:13413ea9a877	1271	ParametersTable += nbBytes;
ganlikun	0:13413ea9a877	1272	/* Set the Next parameters on the write FIFO command*/
ganlikun	0:13413ea9a877	1273	while(uicounter != 0U)
ganlikun	0:13413ea9a877	1274	{
ganlikun	0:13413ea9a877	1275	nbBytes = (uicounter < 4U) ? uicounter : 4U;
ganlikun	0:13413ea9a877	1276	fifoword = 0U;
ganlikun	0:13413ea9a877	1277	for(count = 0U; count < nbBytes; count++)
ganlikun	0:13413ea9a877	1278	{
ganlikun	0:13413ea9a877	1279	fifoword \|= (((uint32_t)((ParametersTable + count))) << (8Ucount));
ganlikun	0:13413ea9a877	1280	}
ganlikun	0:13413ea9a877	1281	hdsi->Instance->GPDR = fifoword;
ganlikun	0:13413ea9a877	1282
ganlikun	0:13413ea9a877	1283	uicounter -= nbBytes;
ganlikun	0:13413ea9a877	1284	ParametersTable += nbBytes;
ganlikun	0:13413ea9a877	1285	}
ganlikun	0:13413ea9a877	1286
ganlikun	0:13413ea9a877	1287	/* Configure the packet to send a long DCS command */
ganlikun	0:13413ea9a877	1288	DSI_ConfigPacketHeader(hdsi->Instance,
ganlikun	0:13413ea9a877	1289	ChannelID,
ganlikun	0:13413ea9a877	1290	Mode,
ganlikun	0:13413ea9a877	1291	((NbParams+1U)&0x00FFU),
ganlikun	0:13413ea9a877	1292	(((NbParams+1U)&0xFF00U)>>8U));
ganlikun	0:13413ea9a877	1293
ganlikun	0:13413ea9a877	1294	/* Process unlocked */
ganlikun	0:13413ea9a877	1295	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1296
ganlikun	0:13413ea9a877	1297	return HAL_OK;
ganlikun	0:13413ea9a877	1298	}
ganlikun	0:13413ea9a877	1299
ganlikun	0:13413ea9a877	1300	/**
ganlikun	0:13413ea9a877	1301	* @brief Read command (DCS or generic)
ganlikun	0:13413ea9a877	1302	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1303	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1304	* @param ChannelNbr: Virtual channel ID
ganlikun	0:13413ea9a877	1305	* @param Array: pointer to a buffer to store the payload of a read back operation.
ganlikun	0:13413ea9a877	1306	* @param Size: Data size to be read (in byte).
ganlikun	0:13413ea9a877	1307	* @param Mode: DSI read packet data type.
ganlikun	0:13413ea9a877	1308	* This parameter can be any value of @ref DSI_SHORT_READ_PKT_Data_Type.
ganlikun	0:13413ea9a877	1309	* @param DCSCmd: DCS get/read command.
ganlikun	0:13413ea9a877	1310	* @param ParametersTable: Pointer to parameter values table.
ganlikun	0:13413ea9a877	1311	* @retval HAL status
ganlikun	0:13413ea9a877	1312	*/
ganlikun	0:13413ea9a877	1313	HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
ganlikun	0:13413ea9a877	1314	uint32_t ChannelNbr,
ganlikun	0:13413ea9a877	1315	uint8_t* Array,
ganlikun	0:13413ea9a877	1316	uint32_t Size,
ganlikun	0:13413ea9a877	1317	uint32_t Mode,
ganlikun	0:13413ea9a877	1318	uint32_t DCSCmd,
ganlikun	0:13413ea9a877	1319	uint8_t* ParametersTable)
ganlikun	0:13413ea9a877	1320	{
ganlikun	0:13413ea9a877	1321	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	1322
ganlikun	0:13413ea9a877	1323	/* Process locked */
ganlikun	0:13413ea9a877	1324	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1325
ganlikun	0:13413ea9a877	1326	/* Check the parameters */
ganlikun	0:13413ea9a877	1327	assert_param(IS_DSI_READ_PACKET_TYPE(Mode));
ganlikun	0:13413ea9a877	1328
ganlikun	0:13413ea9a877	1329	if(Size > 2U)
ganlikun	0:13413ea9a877	1330	{
ganlikun	0:13413ea9a877	1331	/* set max return packet size */
ganlikun	0:13413ea9a877	1332	HAL_DSI_ShortWrite(hdsi, ChannelNbr, DSI_MAX_RETURN_PKT_SIZE, ((Size)&0xFFU), (((Size)>>8U)&0xFFU));
ganlikun	0:13413ea9a877	1333	}
ganlikun	0:13413ea9a877	1334
ganlikun	0:13413ea9a877	1335	/* Configure the packet to read command */
ganlikun	0:13413ea9a877	1336	if (Mode == DSI_DCS_SHORT_PKT_READ)
ganlikun	0:13413ea9a877	1337	{
ganlikun	0:13413ea9a877	1338	DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, DCSCmd, 0U);
ganlikun	0:13413ea9a877	1339	}
ganlikun	0:13413ea9a877	1340	else if (Mode == DSI_GEN_SHORT_PKT_READ_P0)
ganlikun	0:13413ea9a877	1341	{
ganlikun	0:13413ea9a877	1342	DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, 0U, 0U);
ganlikun	0:13413ea9a877	1343	}
ganlikun	0:13413ea9a877	1344	else if (Mode == DSI_GEN_SHORT_PKT_READ_P1)
ganlikun	0:13413ea9a877	1345	{
ganlikun	0:13413ea9a877	1346	DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], 0U);
ganlikun	0:13413ea9a877	1347	}
ganlikun	0:13413ea9a877	1348	else if (Mode == DSI_GEN_SHORT_PKT_READ_P2)
ganlikun	0:13413ea9a877	1349	{
ganlikun	0:13413ea9a877	1350	DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], ParametersTable[1U]);
ganlikun	0:13413ea9a877	1351	}
ganlikun	0:13413ea9a877	1352	else
ganlikun	0:13413ea9a877	1353	{
ganlikun	0:13413ea9a877	1354	/* Process Unlocked */
ganlikun	0:13413ea9a877	1355	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1356
ganlikun	0:13413ea9a877	1357	return HAL_ERROR;
ganlikun	0:13413ea9a877	1358	}
ganlikun	0:13413ea9a877	1359
ganlikun	0:13413ea9a877	1360	/* Get tick */
ganlikun	0:13413ea9a877	1361	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1362
ganlikun	0:13413ea9a877	1363	/* Check that the payload read FIFO is not empty */
ganlikun	0:13413ea9a877	1364	while((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == DSI_GPSR_PRDFE)
ganlikun	0:13413ea9a877	1365	{
ganlikun	0:13413ea9a877	1366	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1367	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1368	{
ganlikun	0:13413ea9a877	1369	/* Process Unlocked */
ganlikun	0:13413ea9a877	1370	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1371
ganlikun	0:13413ea9a877	1372	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1373	}
ganlikun	0:13413ea9a877	1374	}
ganlikun	0:13413ea9a877	1375
ganlikun	0:13413ea9a877	1376	/* Get the first byte */
ganlikun	0:13413ea9a877	1377	((uint32_t )Array) = (hdsi->Instance->GPDR);
ganlikun	0:13413ea9a877	1378	if (Size > 4U)
ganlikun	0:13413ea9a877	1379	{
ganlikun	0:13413ea9a877	1380	Size -= 4U;
ganlikun	0:13413ea9a877	1381	Array += 4U;
ganlikun	0:13413ea9a877	1382	}
ganlikun	0:13413ea9a877	1383	else
ganlikun	0:13413ea9a877	1384	{
ganlikun	0:13413ea9a877	1385	/* Process unlocked */
ganlikun	0:13413ea9a877	1386	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1387
ganlikun	0:13413ea9a877	1388	return HAL_OK;
ganlikun	0:13413ea9a877	1389	}
ganlikun	0:13413ea9a877	1390
ganlikun	0:13413ea9a877	1391	/* Get tick */
ganlikun	0:13413ea9a877	1392	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1393
ganlikun	0:13413ea9a877	1394	/* Get the remaining bytes if any */
ganlikun	0:13413ea9a877	1395	while(((int)(Size)) > 0U)
ganlikun	0:13413ea9a877	1396	{
ganlikun	0:13413ea9a877	1397	if((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == 0U)
ganlikun	0:13413ea9a877	1398	{
ganlikun	0:13413ea9a877	1399	((uint32_t )Array) = (hdsi->Instance->GPDR);
ganlikun	0:13413ea9a877	1400	Size -= 4U;
ganlikun	0:13413ea9a877	1401	Array += 4U;
ganlikun	0:13413ea9a877	1402	}
ganlikun	0:13413ea9a877	1403
ganlikun	0:13413ea9a877	1404	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1405	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1406	{
ganlikun	0:13413ea9a877	1407	/* Process Unlocked */
ganlikun	0:13413ea9a877	1408	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1409
ganlikun	0:13413ea9a877	1410	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1411	}
ganlikun	0:13413ea9a877	1412	}
ganlikun	0:13413ea9a877	1413
ganlikun	0:13413ea9a877	1414	/* Process unlocked */
ganlikun	0:13413ea9a877	1415	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1416
ganlikun	0:13413ea9a877	1417	return HAL_OK;
ganlikun	0:13413ea9a877	1418	}
ganlikun	0:13413ea9a877	1419
ganlikun	0:13413ea9a877	1420	/**
ganlikun	0:13413ea9a877	1421	* @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
ganlikun	0:13413ea9a877	1422	* (only data lanes are in ULPM)
ganlikun	0:13413ea9a877	1423	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1424	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1425	* @retval HAL status
ganlikun	0:13413ea9a877	1426	*/
ganlikun	0:13413ea9a877	1427	HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1428	{
ganlikun	0:13413ea9a877	1429	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	1430
ganlikun	0:13413ea9a877	1431	/* Process locked */
ganlikun	0:13413ea9a877	1432	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1433
ganlikun	0:13413ea9a877	1434	/* ULPS Request on Data Lanes */
ganlikun	0:13413ea9a877	1435	hdsi->Instance->PUCR \|= DSI_PUCR_URDL;
ganlikun	0:13413ea9a877	1436
ganlikun	0:13413ea9a877	1437	/* Get tick */
ganlikun	0:13413ea9a877	1438	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1439
ganlikun	0:13413ea9a877	1440	/* Wait until the D-PHY active lanes enter into ULPM */
ganlikun	0:13413ea9a877	1441	if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun	0:13413ea9a877	1442	{
ganlikun	0:13413ea9a877	1443	while((hdsi->Instance->PSR & DSI_PSR_UAN0) != RESET)
ganlikun	0:13413ea9a877	1444	{
ganlikun	0:13413ea9a877	1445	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1446	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1447	{
ganlikun	0:13413ea9a877	1448	/* Process Unlocked */
ganlikun	0:13413ea9a877	1449	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1450
ganlikun	0:13413ea9a877	1451	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1452	}
ganlikun	0:13413ea9a877	1453	}
ganlikun	0:13413ea9a877	1454	}
ganlikun	0:13413ea9a877	1455	else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun	0:13413ea9a877	1456	{
ganlikun	0:13413ea9a877	1457	while((hdsi->Instance->PSR & (DSI_PSR_UAN0 \| DSI_PSR_UAN1)) != RESET)
ganlikun	0:13413ea9a877	1458	{
ganlikun	0:13413ea9a877	1459	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1460	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1461	{
ganlikun	0:13413ea9a877	1462	/* Process Unlocked */
ganlikun	0:13413ea9a877	1463	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1464
ganlikun	0:13413ea9a877	1465	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1466	}
ganlikun	0:13413ea9a877	1467	}
ganlikun	0:13413ea9a877	1468	}
ganlikun	0:13413ea9a877	1469
ganlikun	0:13413ea9a877	1470	/* Process unlocked */
ganlikun	0:13413ea9a877	1471	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1472
ganlikun	0:13413ea9a877	1473	return HAL_OK;
ganlikun	0:13413ea9a877	1474	}
ganlikun	0:13413ea9a877	1475
ganlikun	0:13413ea9a877	1476	/**
ganlikun	0:13413ea9a877	1477	* @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
ganlikun	0:13413ea9a877	1478	* (only data lanes are in ULPM)
ganlikun	0:13413ea9a877	1479	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1480	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1481	* @retval HAL status
ganlikun	0:13413ea9a877	1482	*/
ganlikun	0:13413ea9a877	1483	HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1484	{
ganlikun	0:13413ea9a877	1485	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	1486
ganlikun	0:13413ea9a877	1487	/* Process locked */
ganlikun	0:13413ea9a877	1488	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1489
ganlikun	0:13413ea9a877	1490	/* Exit ULPS on Data Lanes */
ganlikun	0:13413ea9a877	1491	hdsi->Instance->PUCR \|= DSI_PUCR_UEDL;
ganlikun	0:13413ea9a877	1492
ganlikun	0:13413ea9a877	1493	/* Get tick */
ganlikun	0:13413ea9a877	1494	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1495
ganlikun	0:13413ea9a877	1496	/* Wait until all active lanes exit ULPM */
ganlikun	0:13413ea9a877	1497	if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun	0:13413ea9a877	1498	{
ganlikun	0:13413ea9a877	1499	while((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0)
ganlikun	0:13413ea9a877	1500	{
ganlikun	0:13413ea9a877	1501	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1502	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1503	{
ganlikun	0:13413ea9a877	1504	/* Process Unlocked */
ganlikun	0:13413ea9a877	1505	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1506
ganlikun	0:13413ea9a877	1507	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1508	}
ganlikun	0:13413ea9a877	1509	}
ganlikun	0:13413ea9a877	1510	}
ganlikun	0:13413ea9a877	1511	else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun	0:13413ea9a877	1512	{
ganlikun	0:13413ea9a877	1513	while((hdsi->Instance->PSR & (DSI_PSR_UAN0 \| DSI_PSR_UAN1)) != (DSI_PSR_UAN0 \| DSI_PSR_UAN1))
ganlikun	0:13413ea9a877	1514	{
ganlikun	0:13413ea9a877	1515	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1516	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1517	{
ganlikun	0:13413ea9a877	1518	/* Process Unlocked */
ganlikun	0:13413ea9a877	1519	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1520
ganlikun	0:13413ea9a877	1521	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1522	}
ganlikun	0:13413ea9a877	1523	}
ganlikun	0:13413ea9a877	1524	}
ganlikun	0:13413ea9a877	1525
ganlikun	0:13413ea9a877	1526	/* wait for 1 ms*/
ganlikun	0:13413ea9a877	1527	HAL_Delay(1U);
ganlikun	0:13413ea9a877	1528
ganlikun	0:13413ea9a877	1529	/* De-assert the ULPM requests and the ULPM exit bits */
ganlikun	0:13413ea9a877	1530	hdsi->Instance->PUCR = 0U;
ganlikun	0:13413ea9a877	1531
ganlikun	0:13413ea9a877	1532	/* Process unlocked */
ganlikun	0:13413ea9a877	1533	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1534
ganlikun	0:13413ea9a877	1535	return HAL_OK;
ganlikun	0:13413ea9a877	1536	}
ganlikun	0:13413ea9a877	1537
ganlikun	0:13413ea9a877	1538	/**
ganlikun	0:13413ea9a877	1539	* @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
ganlikun	0:13413ea9a877	1540	* (both data and clock lanes are in ULPM)
ganlikun	0:13413ea9a877	1541	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1542	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1543	* @retval HAL status
ganlikun	0:13413ea9a877	1544	*/
ganlikun	0:13413ea9a877	1545	HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1546	{
ganlikun	0:13413ea9a877	1547	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	1548
ganlikun	0:13413ea9a877	1549	/* Process locked */
ganlikun	0:13413ea9a877	1550	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1551
ganlikun	0:13413ea9a877	1552	/* Clock lane configuration: no more HS request */
ganlikun	0:13413ea9a877	1553	hdsi->Instance->CLCR &= ~DSI_CLCR_DPCC;
ganlikun	0:13413ea9a877	1554
ganlikun	0:13413ea9a877	1555	/* Use system PLL as byte lane clock source before stopping DSIPHY clock source */
ganlikun	0:13413ea9a877	1556	__HAL_RCC_DSI_CONFIG(RCC_DSICLKSOURCE_PLLR);
ganlikun	0:13413ea9a877	1557
ganlikun	0:13413ea9a877	1558	/* ULPS Request on Clock and Data Lanes */
ganlikun	0:13413ea9a877	1559	hdsi->Instance->PUCR \|= (DSI_PUCR_URCL \| DSI_PUCR_URDL);
ganlikun	0:13413ea9a877	1560
ganlikun	0:13413ea9a877	1561	/* Get tick */
ganlikun	0:13413ea9a877	1562	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1563
ganlikun	0:13413ea9a877	1564	/* Wait until all active lanes exit ULPM */
ganlikun	0:13413ea9a877	1565	if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun	0:13413ea9a877	1566	{
ganlikun	0:13413ea9a877	1567	while((hdsi->Instance->PSR & (DSI_PSR_UAN0 \| DSI_PSR_UANC)) != RESET)
ganlikun	0:13413ea9a877	1568	{
ganlikun	0:13413ea9a877	1569	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1570	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1571	{
ganlikun	0:13413ea9a877	1572	/* Process Unlocked */
ganlikun	0:13413ea9a877	1573	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1574
ganlikun	0:13413ea9a877	1575	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1576	}
ganlikun	0:13413ea9a877	1577	}
ganlikun	0:13413ea9a877	1578	}
ganlikun	0:13413ea9a877	1579	else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun	0:13413ea9a877	1580	{
ganlikun	0:13413ea9a877	1581	while((hdsi->Instance->PSR & (DSI_PSR_UAN0 \| DSI_PSR_UAN1 \| DSI_PSR_UANC)) != RESET)
ganlikun	0:13413ea9a877	1582	{
ganlikun	0:13413ea9a877	1583	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1584	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1585	{
ganlikun	0:13413ea9a877	1586	/* Process Unlocked */
ganlikun	0:13413ea9a877	1587	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1588
ganlikun	0:13413ea9a877	1589	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1590	}
ganlikun	0:13413ea9a877	1591	}
ganlikun	0:13413ea9a877	1592	}
ganlikun	0:13413ea9a877	1593
ganlikun	0:13413ea9a877	1594	/* Turn off the DSI PLL */
ganlikun	0:13413ea9a877	1595	__HAL_DSI_PLL_DISABLE(hdsi);
ganlikun	0:13413ea9a877	1596
ganlikun	0:13413ea9a877	1597	/* Process unlocked */
ganlikun	0:13413ea9a877	1598	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1599
ganlikun	0:13413ea9a877	1600	return HAL_OK;
ganlikun	0:13413ea9a877	1601	}
ganlikun	0:13413ea9a877	1602
ganlikun	0:13413ea9a877	1603	/**
ganlikun	0:13413ea9a877	1604	* @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
ganlikun	0:13413ea9a877	1605	* (both data and clock lanes are in ULPM)
ganlikun	0:13413ea9a877	1606	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1607	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1608	* @retval HAL status
ganlikun	0:13413ea9a877	1609	*/
ganlikun	0:13413ea9a877	1610	HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1611	{
ganlikun	0:13413ea9a877	1612	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	1613
ganlikun	0:13413ea9a877	1614	/* Process locked */
ganlikun	0:13413ea9a877	1615	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1616
ganlikun	0:13413ea9a877	1617	/* Turn on the DSI PLL */
ganlikun	0:13413ea9a877	1618	__HAL_DSI_PLL_ENABLE(hdsi);
ganlikun	0:13413ea9a877	1619
ganlikun	0:13413ea9a877	1620	/* Get tick */
ganlikun	0:13413ea9a877	1621	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1622
ganlikun	0:13413ea9a877	1623	/* Wait for the lock of the PLL */
ganlikun	0:13413ea9a877	1624	while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == RESET)
ganlikun	0:13413ea9a877	1625	{
ganlikun	0:13413ea9a877	1626	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1627	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1628	{
ganlikun	0:13413ea9a877	1629	/* Process Unlocked */
ganlikun	0:13413ea9a877	1630	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1631
ganlikun	0:13413ea9a877	1632	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1633	}
ganlikun	0:13413ea9a877	1634	}
ganlikun	0:13413ea9a877	1635
ganlikun	0:13413ea9a877	1636	/* Exit ULPS on Clock and Data Lanes */
ganlikun	0:13413ea9a877	1637	hdsi->Instance->PUCR \|= (DSI_PUCR_UECL \| DSI_PUCR_UEDL);
ganlikun	0:13413ea9a877	1638
ganlikun	0:13413ea9a877	1639	/* Get tick */
ganlikun	0:13413ea9a877	1640	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1641
ganlikun	0:13413ea9a877	1642	/* Wait until all active lanes exit ULPM */
ganlikun	0:13413ea9a877	1643	if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun	0:13413ea9a877	1644	{
ganlikun	0:13413ea9a877	1645	while((hdsi->Instance->PSR & (DSI_PSR_UAN0 \| DSI_PSR_UANC)) != (DSI_PSR_UAN0 \| DSI_PSR_UANC))
ganlikun	0:13413ea9a877	1646	{
ganlikun	0:13413ea9a877	1647	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1648	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1649	{
ganlikun	0:13413ea9a877	1650	/* Process Unlocked */
ganlikun	0:13413ea9a877	1651	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1652
ganlikun	0:13413ea9a877	1653	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1654	}
ganlikun	0:13413ea9a877	1655	}
ganlikun	0:13413ea9a877	1656	}
ganlikun	0:13413ea9a877	1657	else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun	0:13413ea9a877	1658	{
ganlikun	0:13413ea9a877	1659	while((hdsi->Instance->PSR & (DSI_PSR_UAN0 \| DSI_PSR_UAN1 \| DSI_PSR_UANC)) != (DSI_PSR_UAN0 \| DSI_PSR_UAN1 \| DSI_PSR_UANC))
ganlikun	0:13413ea9a877	1660	{
ganlikun	0:13413ea9a877	1661	/* Check for the Timeout */
ganlikun	0:13413ea9a877	1662	if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun	0:13413ea9a877	1663	{
ganlikun	0:13413ea9a877	1664	/* Process Unlocked */
ganlikun	0:13413ea9a877	1665	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1666
ganlikun	0:13413ea9a877	1667	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1668	}
ganlikun	0:13413ea9a877	1669	}
ganlikun	0:13413ea9a877	1670	}
ganlikun	0:13413ea9a877	1671
ganlikun	0:13413ea9a877	1672	/* wait for 1 ms*/
ganlikun	0:13413ea9a877	1673	HAL_Delay(1U);
ganlikun	0:13413ea9a877	1674
ganlikun	0:13413ea9a877	1675	/* De-assert the ULPM requests and the ULPM exit bits */
ganlikun	0:13413ea9a877	1676	hdsi->Instance->PUCR = 0U;
ganlikun	0:13413ea9a877	1677
ganlikun	0:13413ea9a877	1678	/* Switch the lanbyteclock source in the RCC from system PLL to D-PHY */
ganlikun	0:13413ea9a877	1679	__HAL_RCC_DSI_CONFIG(RCC_DSICLKSOURCE_DSIPHY);
ganlikun	0:13413ea9a877	1680
ganlikun	0:13413ea9a877	1681	/* Restore clock lane configuration to HS */
ganlikun	0:13413ea9a877	1682	hdsi->Instance->CLCR \|= DSI_CLCR_DPCC;
ganlikun	0:13413ea9a877	1683
ganlikun	0:13413ea9a877	1684	/* Process unlocked */
ganlikun	0:13413ea9a877	1685	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1686
ganlikun	0:13413ea9a877	1687	return HAL_OK;
ganlikun	0:13413ea9a877	1688	}
ganlikun	0:13413ea9a877	1689
ganlikun	0:13413ea9a877	1690	/**
ganlikun	0:13413ea9a877	1691	* @brief Start test pattern generation
ganlikun	0:13413ea9a877	1692	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1693	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1694	* @param Mode: Pattern generator mode
ganlikun	0:13413ea9a877	1695	* This parameter can be one of the following values:
ganlikun	0:13413ea9a877	1696	* 0 : Color bars (horizontal or vertical)
ganlikun	0:13413ea9a877	1697	* 1 : BER pattern (vertical only)
ganlikun	0:13413ea9a877	1698	* @param Orientation: Pattern generator orientation
ganlikun	0:13413ea9a877	1699	* This parameter can be one of the following values:
ganlikun	0:13413ea9a877	1700	* 0 : Vertical color bars
ganlikun	0:13413ea9a877	1701	* 1 : Horizontal color bars
ganlikun	0:13413ea9a877	1702	* @retval HAL status
ganlikun	0:13413ea9a877	1703	*/
ganlikun	0:13413ea9a877	1704	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation)
ganlikun	0:13413ea9a877	1705	{
ganlikun	0:13413ea9a877	1706	/* Process locked */
ganlikun	0:13413ea9a877	1707	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1708
ganlikun	0:13413ea9a877	1709	/* Configure pattern generator mode and orientation */
ganlikun	0:13413ea9a877	1710	hdsi->Instance->VMCR &= ~(DSI_VMCR_PGM \| DSI_VMCR_PGO);
ganlikun	0:13413ea9a877	1711	hdsi->Instance->VMCR \|= ((Mode<<20U) \| (Orientation<<24U));
ganlikun	0:13413ea9a877	1712
ganlikun	0:13413ea9a877	1713	/* Enable pattern generator by setting PGE bit */
ganlikun	0:13413ea9a877	1714	hdsi->Instance->VMCR \|= DSI_VMCR_PGE;
ganlikun	0:13413ea9a877	1715
ganlikun	0:13413ea9a877	1716	/* Process unlocked */
ganlikun	0:13413ea9a877	1717	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1718
ganlikun	0:13413ea9a877	1719	return HAL_OK;
ganlikun	0:13413ea9a877	1720	}
ganlikun	0:13413ea9a877	1721
ganlikun	0:13413ea9a877	1722	/**
ganlikun	0:13413ea9a877	1723	* @brief Stop test pattern generation
ganlikun	0:13413ea9a877	1724	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1725	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1726	* @retval HAL status
ganlikun	0:13413ea9a877	1727	*/
ganlikun	0:13413ea9a877	1728	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	1729	{
ganlikun	0:13413ea9a877	1730	/* Process locked */
ganlikun	0:13413ea9a877	1731	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1732
ganlikun	0:13413ea9a877	1733	/* Disable pattern generator by clearing PGE bit */
ganlikun	0:13413ea9a877	1734	hdsi->Instance->VMCR &= ~DSI_VMCR_PGE;
ganlikun	0:13413ea9a877	1735
ganlikun	0:13413ea9a877	1736	/* Process unlocked */
ganlikun	0:13413ea9a877	1737	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1738
ganlikun	0:13413ea9a877	1739	return HAL_OK;
ganlikun	0:13413ea9a877	1740	}
ganlikun	0:13413ea9a877	1741
ganlikun	0:13413ea9a877	1742	/**
ganlikun	0:13413ea9a877	1743	* @brief Set Slew-Rate And Delay Tuning
ganlikun	0:13413ea9a877	1744	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1745	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1746	* @param CommDelay: Communication delay to be adjusted.
ganlikun	0:13413ea9a877	1747	* This parameter can be any value of @ref DSI_Communication_Delay
ganlikun	0:13413ea9a877	1748	* @param Lane: select between clock or data lanes.
ganlikun	0:13413ea9a877	1749	* This parameter can be any value of @ref DSI_Lane_Group
ganlikun	0:13413ea9a877	1750	* @param Value: Custom value of the slew-rate or delay
ganlikun	0:13413ea9a877	1751	* @retval HAL status
ganlikun	0:13413ea9a877	1752	*/
ganlikun	0:13413ea9a877	1753	HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value)
ganlikun	0:13413ea9a877	1754	{
ganlikun	0:13413ea9a877	1755	/* Process locked */
ganlikun	0:13413ea9a877	1756	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1757
ganlikun	0:13413ea9a877	1758	/* Check function parameters */
ganlikun	0:13413ea9a877	1759	assert_param(IS_DSI_COMMUNICATION_DELAY(CommDelay));
ganlikun	0:13413ea9a877	1760	assert_param(IS_DSI_LANE_GROUP(Lane));
ganlikun	0:13413ea9a877	1761
ganlikun	0:13413ea9a877	1762	switch(CommDelay)
ganlikun	0:13413ea9a877	1763	{
ganlikun	0:13413ea9a877	1764	case DSI_SLEW_RATE_HSTX:
ganlikun	0:13413ea9a877	1765	if(Lane == DSI_CLOCK_LANE)
ganlikun	0:13413ea9a877	1766	{
ganlikun	0:13413ea9a877	1767	/* High-Speed Transmission Slew Rate Control on Clock Lane */
ganlikun	0:13413ea9a877	1768	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCCL;
ganlikun	0:13413ea9a877	1769	hdsi->Instance->WPCR[1U] \|= Value<<16U;
ganlikun	0:13413ea9a877	1770	}
ganlikun	0:13413ea9a877	1771	else if(Lane == DSI_DATA_LANES)
ganlikun	0:13413ea9a877	1772	{
ganlikun	0:13413ea9a877	1773	/* High-Speed Transmission Slew Rate Control on Data Lanes */
ganlikun	0:13413ea9a877	1774	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCDL;
ganlikun	0:13413ea9a877	1775	hdsi->Instance->WPCR[1U] \|= Value<<18U;
ganlikun	0:13413ea9a877	1776	}
ganlikun	0:13413ea9a877	1777	break;
ganlikun	0:13413ea9a877	1778	case DSI_SLEW_RATE_LPTX:
ganlikun	0:13413ea9a877	1779	if(Lane == DSI_CLOCK_LANE)
ganlikun	0:13413ea9a877	1780	{
ganlikun	0:13413ea9a877	1781	/* Low-Power transmission Slew Rate Compensation on Clock Lane */
ganlikun	0:13413ea9a877	1782	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCCL;
ganlikun	0:13413ea9a877	1783	hdsi->Instance->WPCR[1U] \|= Value<<6U;
ganlikun	0:13413ea9a877	1784	}
ganlikun	0:13413ea9a877	1785	else if(Lane == DSI_DATA_LANES)
ganlikun	0:13413ea9a877	1786	{
ganlikun	0:13413ea9a877	1787	/* Low-Power transmission Slew Rate Compensation on Data Lanes */
ganlikun	0:13413ea9a877	1788	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCDL;
ganlikun	0:13413ea9a877	1789	hdsi->Instance->WPCR[1U] \|= Value<<8U;
ganlikun	0:13413ea9a877	1790	}
ganlikun	0:13413ea9a877	1791	break;
ganlikun	0:13413ea9a877	1792	case DSI_HS_DELAY:
ganlikun	0:13413ea9a877	1793	if(Lane == DSI_CLOCK_LANE)
ganlikun	0:13413ea9a877	1794	{
ganlikun	0:13413ea9a877	1795	/* High-Speed Transmission Delay on Clock Lane */
ganlikun	0:13413ea9a877	1796	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDCL;
ganlikun	0:13413ea9a877	1797	hdsi->Instance->WPCR[1U] \|= Value;
ganlikun	0:13413ea9a877	1798	}
ganlikun	0:13413ea9a877	1799	else if(Lane == DSI_DATA_LANES)
ganlikun	0:13413ea9a877	1800	{
ganlikun	0:13413ea9a877	1801	/* High-Speed Transmission Delay on Data Lanes */
ganlikun	0:13413ea9a877	1802	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDDL;
ganlikun	0:13413ea9a877	1803	hdsi->Instance->WPCR[1U] \|= Value<<2U;
ganlikun	0:13413ea9a877	1804	}
ganlikun	0:13413ea9a877	1805	break;
ganlikun	0:13413ea9a877	1806	default:
ganlikun	0:13413ea9a877	1807	break;
ganlikun	0:13413ea9a877	1808	}
ganlikun	0:13413ea9a877	1809
ganlikun	0:13413ea9a877	1810	/* Process unlocked */
ganlikun	0:13413ea9a877	1811	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1812
ganlikun	0:13413ea9a877	1813	return HAL_OK;
ganlikun	0:13413ea9a877	1814	}
ganlikun	0:13413ea9a877	1815
ganlikun	0:13413ea9a877	1816	/**
ganlikun	0:13413ea9a877	1817	* @brief Low-Power Reception Filter Tuning
ganlikun	0:13413ea9a877	1818	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1819	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1820	* @param Frequency: cutoff frequency of low-pass filter at the input of LPRX
ganlikun	0:13413ea9a877	1821	* @retval HAL status
ganlikun	0:13413ea9a877	1822	*/
ganlikun	0:13413ea9a877	1823	HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency)
ganlikun	0:13413ea9a877	1824	{
ganlikun	0:13413ea9a877	1825	/* Process locked */
ganlikun	0:13413ea9a877	1826	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1827
ganlikun	0:13413ea9a877	1828	/* Low-Power RX low-pass Filtering Tuning */
ganlikun	0:13413ea9a877	1829	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPRXFT;
ganlikun	0:13413ea9a877	1830	hdsi->Instance->WPCR[1U] \|= Frequency<<25U;
ganlikun	0:13413ea9a877	1831
ganlikun	0:13413ea9a877	1832	/* Process unlocked */
ganlikun	0:13413ea9a877	1833	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1834
ganlikun	0:13413ea9a877	1835	return HAL_OK;
ganlikun	0:13413ea9a877	1836	}
ganlikun	0:13413ea9a877	1837
ganlikun	0:13413ea9a877	1838	/**
ganlikun	0:13413ea9a877	1839	* @brief Activate an additional current path on all lanes to meet the SDDTx parameter
ganlikun	0:13413ea9a877	1840	* defined in the MIPI D-PHY specification
ganlikun	0:13413ea9a877	1841	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1842	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1843	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	1844	* @retval HAL status
ganlikun	0:13413ea9a877	1845	*/
ganlikun	0:13413ea9a877	1846	HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun	0:13413ea9a877	1847	{
ganlikun	0:13413ea9a877	1848	/* Process locked */
ganlikun	0:13413ea9a877	1849	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1850
ganlikun	0:13413ea9a877	1851	/* Check function parameters */
ganlikun	0:13413ea9a877	1852	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	1853
ganlikun	0:13413ea9a877	1854	/* Activate/Disactivate additional current path on all lanes */
ganlikun	0:13413ea9a877	1855	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_SDDC;
ganlikun	0:13413ea9a877	1856	hdsi->Instance->WPCR[1U] \|= ((uint32_t)State << 12U);
ganlikun	0:13413ea9a877	1857
ganlikun	0:13413ea9a877	1858	/* Process unlocked */
ganlikun	0:13413ea9a877	1859	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1860
ganlikun	0:13413ea9a877	1861	return HAL_OK;
ganlikun	0:13413ea9a877	1862	}
ganlikun	0:13413ea9a877	1863
ganlikun	0:13413ea9a877	1864	/**
ganlikun	0:13413ea9a877	1865	* @brief Custom lane pins configuration
ganlikun	0:13413ea9a877	1866	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1867	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1868	* @param CustomLane: Function to be applyed on selected lane.
ganlikun	0:13413ea9a877	1869	* This parameter can be any value of @ref DSI_CustomLane
ganlikun	0:13413ea9a877	1870	* @param Lane: select between clock or data lane 0 or data lane 1.
ganlikun	0:13413ea9a877	1871	* This parameter can be any value of @ref DSI_Lane_Select
ganlikun	0:13413ea9a877	1872	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	1873	* @retval HAL status
ganlikun	0:13413ea9a877	1874	*/
ganlikun	0:13413ea9a877	1875	HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State)
ganlikun	0:13413ea9a877	1876	{
ganlikun	0:13413ea9a877	1877	/* Process locked */
ganlikun	0:13413ea9a877	1878	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1879
ganlikun	0:13413ea9a877	1880	/* Check function parameters */
ganlikun	0:13413ea9a877	1881	assert_param(IS_DSI_CUSTOM_LANE(CustomLane));
ganlikun	0:13413ea9a877	1882	assert_param(IS_DSI_LANE(Lane));
ganlikun	0:13413ea9a877	1883	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	1884
ganlikun	0:13413ea9a877	1885	switch(CustomLane)
ganlikun	0:13413ea9a877	1886	{
ganlikun	0:13413ea9a877	1887	case DSI_SWAP_LANE_PINS:
ganlikun	0:13413ea9a877	1888	if(Lane == DSI_CLOCK_LANE)
ganlikun	0:13413ea9a877	1889	{
ganlikun	0:13413ea9a877	1890	/* Swap pins on clock lane */
ganlikun	0:13413ea9a877	1891	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWCL;
ganlikun	0:13413ea9a877	1892	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 6U);
ganlikun	0:13413ea9a877	1893	}
ganlikun	0:13413ea9a877	1894	else if(Lane == DSI_DATA_LANE0)
ganlikun	0:13413ea9a877	1895	{
ganlikun	0:13413ea9a877	1896	/* Swap pins on data lane 0 */
ganlikun	0:13413ea9a877	1897	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL0;
ganlikun	0:13413ea9a877	1898	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 7U);
ganlikun	0:13413ea9a877	1899	}
ganlikun	0:13413ea9a877	1900	else if(Lane == DSI_DATA_LANE1)
ganlikun	0:13413ea9a877	1901	{
ganlikun	0:13413ea9a877	1902	/* Swap pins on data lane 1 */
ganlikun	0:13413ea9a877	1903	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL1;
ganlikun	0:13413ea9a877	1904	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 8U);
ganlikun	0:13413ea9a877	1905	}
ganlikun	0:13413ea9a877	1906	break;
ganlikun	0:13413ea9a877	1907	case DSI_INVERT_HS_SIGNAL:
ganlikun	0:13413ea9a877	1908	if(Lane == DSI_CLOCK_LANE)
ganlikun	0:13413ea9a877	1909	{
ganlikun	0:13413ea9a877	1910	/* Invert HS signal on clock lane */
ganlikun	0:13413ea9a877	1911	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSICL;
ganlikun	0:13413ea9a877	1912	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 9U);
ganlikun	0:13413ea9a877	1913	}
ganlikun	0:13413ea9a877	1914	else if(Lane == DSI_DATA_LANE0)
ganlikun	0:13413ea9a877	1915	{
ganlikun	0:13413ea9a877	1916	/* Invert HS signal on data lane 0 */
ganlikun	0:13413ea9a877	1917	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL0;
ganlikun	0:13413ea9a877	1918	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 10U);
ganlikun	0:13413ea9a877	1919	}
ganlikun	0:13413ea9a877	1920	else if(Lane == DSI_DATA_LANE1)
ganlikun	0:13413ea9a877	1921	{
ganlikun	0:13413ea9a877	1922	/* Invert HS signal on data lane 1 */
ganlikun	0:13413ea9a877	1923	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL1;
ganlikun	0:13413ea9a877	1924	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 11U);
ganlikun	0:13413ea9a877	1925	}
ganlikun	0:13413ea9a877	1926	break;
ganlikun	0:13413ea9a877	1927	default:
ganlikun	0:13413ea9a877	1928	break;
ganlikun	0:13413ea9a877	1929	}
ganlikun	0:13413ea9a877	1930
ganlikun	0:13413ea9a877	1931	/* Process unlocked */
ganlikun	0:13413ea9a877	1932	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	1933
ganlikun	0:13413ea9a877	1934	return HAL_OK;
ganlikun	0:13413ea9a877	1935	}
ganlikun	0:13413ea9a877	1936
ganlikun	0:13413ea9a877	1937	/**
ganlikun	0:13413ea9a877	1938	* @brief Set custom timing for the PHY
ganlikun	0:13413ea9a877	1939	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1940	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	1941	* @param Timing: PHY timing to be adjusted.
ganlikun	0:13413ea9a877	1942	* This parameter can be any value of @ref DSI_PHY_Timing
ganlikun	0:13413ea9a877	1943	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	1944	* @param Value: Custom value of the timing
ganlikun	0:13413ea9a877	1945	* @retval HAL status
ganlikun	0:13413ea9a877	1946	*/
ganlikun	0:13413ea9a877	1947	HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value)
ganlikun	0:13413ea9a877	1948	{
ganlikun	0:13413ea9a877	1949	/* Process locked */
ganlikun	0:13413ea9a877	1950	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	1951
ganlikun	0:13413ea9a877	1952	/* Check function parameters */
ganlikun	0:13413ea9a877	1953	assert_param(IS_DSI_PHY_TIMING(Timing));
ganlikun	0:13413ea9a877	1954	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	1955
ganlikun	0:13413ea9a877	1956	switch(Timing)
ganlikun	0:13413ea9a877	1957	{
ganlikun	0:13413ea9a877	1958	case DSI_TCLK_POST:
ganlikun	0:13413ea9a877	1959	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	1960	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPOSTEN;
ganlikun	0:13413ea9a877	1961	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 27U);
ganlikun	0:13413ea9a877	1962
ganlikun	0:13413ea9a877	1963	if(State)
ganlikun	0:13413ea9a877	1964	{
ganlikun	0:13413ea9a877	1965	/* Set custom value */
ganlikun	0:13413ea9a877	1966	hdsi->Instance->WPCR[4U] &= ~DSI_WPCR4_TCLKPOST;
ganlikun	0:13413ea9a877	1967	hdsi->Instance->WPCR[4U] \|= Value & DSI_WPCR4_TCLKPOST;
ganlikun	0:13413ea9a877	1968	}
ganlikun	0:13413ea9a877	1969
ganlikun	0:13413ea9a877	1970	break;
ganlikun	0:13413ea9a877	1971	case DSI_TLPX_CLK:
ganlikun	0:13413ea9a877	1972	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	1973	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXCEN;
ganlikun	0:13413ea9a877	1974	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 26U);
ganlikun	0:13413ea9a877	1975
ganlikun	0:13413ea9a877	1976	if(State)
ganlikun	0:13413ea9a877	1977	{
ganlikun	0:13413ea9a877	1978	/* Set custom value */
ganlikun	0:13413ea9a877	1979	hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXC;
ganlikun	0:13413ea9a877	1980	hdsi->Instance->WPCR[3U] \|= (Value << 24U) & DSI_WPCR3_TLPXC;
ganlikun	0:13413ea9a877	1981	}
ganlikun	0:13413ea9a877	1982
ganlikun	0:13413ea9a877	1983	break;
ganlikun	0:13413ea9a877	1984	case DSI_THS_EXIT:
ganlikun	0:13413ea9a877	1985	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	1986	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSEXITEN;
ganlikun	0:13413ea9a877	1987	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 25U);
ganlikun	0:13413ea9a877	1988
ganlikun	0:13413ea9a877	1989	if(State)
ganlikun	0:13413ea9a877	1990	{
ganlikun	0:13413ea9a877	1991	/* Set custom value */
ganlikun	0:13413ea9a877	1992	hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSEXIT;
ganlikun	0:13413ea9a877	1993	hdsi->Instance->WPCR[3U] \|= (Value << 16U) & DSI_WPCR3_THSEXIT;
ganlikun	0:13413ea9a877	1994	}
ganlikun	0:13413ea9a877	1995
ganlikun	0:13413ea9a877	1996	break;
ganlikun	0:13413ea9a877	1997	case DSI_TLPX_DATA:
ganlikun	0:13413ea9a877	1998	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	1999	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXDEN;
ganlikun	0:13413ea9a877	2000	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 24U);
ganlikun	0:13413ea9a877	2001
ganlikun	0:13413ea9a877	2002	if(State)
ganlikun	0:13413ea9a877	2003	{
ganlikun	0:13413ea9a877	2004	/* Set custom value */
ganlikun	0:13413ea9a877	2005	hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXD;
ganlikun	0:13413ea9a877	2006	hdsi->Instance->WPCR[3U] \|= (Value << 8U) & DSI_WPCR3_TLPXD;
ganlikun	0:13413ea9a877	2007	}
ganlikun	0:13413ea9a877	2008
ganlikun	0:13413ea9a877	2009	break;
ganlikun	0:13413ea9a877	2010	case DSI_THS_ZERO:
ganlikun	0:13413ea9a877	2011	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	2012	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSZEROEN;
ganlikun	0:13413ea9a877	2013	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 23U);
ganlikun	0:13413ea9a877	2014
ganlikun	0:13413ea9a877	2015	if(State)
ganlikun	0:13413ea9a877	2016	{
ganlikun	0:13413ea9a877	2017	/* Set custom value */
ganlikun	0:13413ea9a877	2018	hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSZERO;
ganlikun	0:13413ea9a877	2019	hdsi->Instance->WPCR[3U] \|= Value & DSI_WPCR3_THSZERO;
ganlikun	0:13413ea9a877	2020	}
ganlikun	0:13413ea9a877	2021
ganlikun	0:13413ea9a877	2022	break;
ganlikun	0:13413ea9a877	2023	case DSI_THS_TRAIL:
ganlikun	0:13413ea9a877	2024	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	2025	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSTRAILEN;
ganlikun	0:13413ea9a877	2026	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 22U);
ganlikun	0:13413ea9a877	2027
ganlikun	0:13413ea9a877	2028	if(State)
ganlikun	0:13413ea9a877	2029	{
ganlikun	0:13413ea9a877	2030	/* Set custom value */
ganlikun	0:13413ea9a877	2031	hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSTRAIL;
ganlikun	0:13413ea9a877	2032	hdsi->Instance->WPCR[2U] \|= (Value << 24U) & DSI_WPCR2_THSTRAIL;
ganlikun	0:13413ea9a877	2033	}
ganlikun	0:13413ea9a877	2034
ganlikun	0:13413ea9a877	2035	break;
ganlikun	0:13413ea9a877	2036	case DSI_THS_PREPARE:
ganlikun	0:13413ea9a877	2037	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	2038	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSPREPEN;
ganlikun	0:13413ea9a877	2039	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 21U);
ganlikun	0:13413ea9a877	2040
ganlikun	0:13413ea9a877	2041	if(State)
ganlikun	0:13413ea9a877	2042	{
ganlikun	0:13413ea9a877	2043	/* Set custom value */
ganlikun	0:13413ea9a877	2044	hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSPREP;
ganlikun	0:13413ea9a877	2045	hdsi->Instance->WPCR[2U] \|= (Value << 16U) & DSI_WPCR2_THSPREP;
ganlikun	0:13413ea9a877	2046	}
ganlikun	0:13413ea9a877	2047
ganlikun	0:13413ea9a877	2048	break;
ganlikun	0:13413ea9a877	2049	case DSI_TCLK_ZERO:
ganlikun	0:13413ea9a877	2050	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	2051	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKZEROEN;
ganlikun	0:13413ea9a877	2052	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 20U);
ganlikun	0:13413ea9a877	2053
ganlikun	0:13413ea9a877	2054	if(State)
ganlikun	0:13413ea9a877	2055	{
ganlikun	0:13413ea9a877	2056	/* Set custom value */
ganlikun	0:13413ea9a877	2057	hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKZERO;
ganlikun	0:13413ea9a877	2058	hdsi->Instance->WPCR[2U] \|= (Value << 8U) & DSI_WPCR2_TCLKZERO;
ganlikun	0:13413ea9a877	2059	}
ganlikun	0:13413ea9a877	2060
ganlikun	0:13413ea9a877	2061	break;
ganlikun	0:13413ea9a877	2062	case DSI_TCLK_PREPARE:
ganlikun	0:13413ea9a877	2063	/* Enable/Disable custom timing setting */
ganlikun	0:13413ea9a877	2064	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPREPEN;
ganlikun	0:13413ea9a877	2065	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 19U);
ganlikun	0:13413ea9a877	2066
ganlikun	0:13413ea9a877	2067	if(State)
ganlikun	0:13413ea9a877	2068	{
ganlikun	0:13413ea9a877	2069	/* Set custom value */
ganlikun	0:13413ea9a877	2070	hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKPREP;
ganlikun	0:13413ea9a877	2071	hdsi->Instance->WPCR[2U] \|= Value & DSI_WPCR2_TCLKPREP;
ganlikun	0:13413ea9a877	2072	}
ganlikun	0:13413ea9a877	2073
ganlikun	0:13413ea9a877	2074	break;
ganlikun	0:13413ea9a877	2075	default:
ganlikun	0:13413ea9a877	2076	break;
ganlikun	0:13413ea9a877	2077	}
ganlikun	0:13413ea9a877	2078
ganlikun	0:13413ea9a877	2079	/* Process unlocked */
ganlikun	0:13413ea9a877	2080	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	2081
ganlikun	0:13413ea9a877	2082	return HAL_OK;
ganlikun	0:13413ea9a877	2083	}
ganlikun	0:13413ea9a877	2084
ganlikun	0:13413ea9a877	2085	/**
ganlikun	0:13413ea9a877	2086	* @brief Force the Clock/Data Lane in TX Stop Mode
ganlikun	0:13413ea9a877	2087	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2088	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	2089	* @param Lane: select between clock or data lanes.
ganlikun	0:13413ea9a877	2090	* This parameter can be any value of @ref DSI_Lane_Group
ganlikun	0:13413ea9a877	2091	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	2092	* @retval HAL status
ganlikun	0:13413ea9a877	2093	*/
ganlikun	0:13413ea9a877	2094	HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State)
ganlikun	0:13413ea9a877	2095	{
ganlikun	0:13413ea9a877	2096	/* Process locked */
ganlikun	0:13413ea9a877	2097	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	2098
ganlikun	0:13413ea9a877	2099	/* Check function parameters */
ganlikun	0:13413ea9a877	2100	assert_param(IS_DSI_LANE_GROUP(Lane));
ganlikun	0:13413ea9a877	2101	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	2102
ganlikun	0:13413ea9a877	2103	if(Lane == DSI_CLOCK_LANE)
ganlikun	0:13413ea9a877	2104	{
ganlikun	0:13413ea9a877	2105	/* Force/Unforce the Clock Lane in TX Stop Mode */
ganlikun	0:13413ea9a877	2106	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMCL;
ganlikun	0:13413ea9a877	2107	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 12U);
ganlikun	0:13413ea9a877	2108	}
ganlikun	0:13413ea9a877	2109	else if(Lane == DSI_DATA_LANES)
ganlikun	0:13413ea9a877	2110	{
ganlikun	0:13413ea9a877	2111	/* Force/Unforce the Data Lanes in TX Stop Mode */
ganlikun	0:13413ea9a877	2112	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMDL;
ganlikun	0:13413ea9a877	2113	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 13U);
ganlikun	0:13413ea9a877	2114	}
ganlikun	0:13413ea9a877	2115
ganlikun	0:13413ea9a877	2116	/* Process unlocked */
ganlikun	0:13413ea9a877	2117	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	2118
ganlikun	0:13413ea9a877	2119	return HAL_OK;
ganlikun	0:13413ea9a877	2120	}
ganlikun	0:13413ea9a877	2121
ganlikun	0:13413ea9a877	2122	/**
ganlikun	0:13413ea9a877	2123	* @brief Forces LP Receiver in Low-Power Mode
ganlikun	0:13413ea9a877	2124	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2125	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	2126	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	2127	* @retval HAL status
ganlikun	0:13413ea9a877	2128	*/
ganlikun	0:13413ea9a877	2129	HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun	0:13413ea9a877	2130	{
ganlikun	0:13413ea9a877	2131	/* Process locked */
ganlikun	0:13413ea9a877	2132	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	2133
ganlikun	0:13413ea9a877	2134	/* Check function parameters */
ganlikun	0:13413ea9a877	2135	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	2136
ganlikun	0:13413ea9a877	2137	/* Force/Unforce LP Receiver in Low-Power Mode */
ganlikun	0:13413ea9a877	2138	hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_FLPRXLPM;
ganlikun	0:13413ea9a877	2139	hdsi->Instance->WPCR[1U] \|= ((uint32_t)State << 22U);
ganlikun	0:13413ea9a877	2140
ganlikun	0:13413ea9a877	2141	/* Process unlocked */
ganlikun	0:13413ea9a877	2142	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	2143
ganlikun	0:13413ea9a877	2144	return HAL_OK;
ganlikun	0:13413ea9a877	2145	}
ganlikun	0:13413ea9a877	2146
ganlikun	0:13413ea9a877	2147	/**
ganlikun	0:13413ea9a877	2148	* @brief Force Data Lanes in RX Mode after a BTA
ganlikun	0:13413ea9a877	2149	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2150	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	2151	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	2152	* @retval HAL status
ganlikun	0:13413ea9a877	2153	*/
ganlikun	0:13413ea9a877	2154	HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun	0:13413ea9a877	2155	{
ganlikun	0:13413ea9a877	2156	/* Process locked */
ganlikun	0:13413ea9a877	2157	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	2158
ganlikun	0:13413ea9a877	2159	/* Check function parameters */
ganlikun	0:13413ea9a877	2160	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	2161
ganlikun	0:13413ea9a877	2162	/* Force Data Lanes in RX Mode */
ganlikun	0:13413ea9a877	2163	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TDDL;
ganlikun	0:13413ea9a877	2164	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 16U);
ganlikun	0:13413ea9a877	2165
ganlikun	0:13413ea9a877	2166	/* Process unlocked */
ganlikun	0:13413ea9a877	2167	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	2168
ganlikun	0:13413ea9a877	2169	return HAL_OK;
ganlikun	0:13413ea9a877	2170	}
ganlikun	0:13413ea9a877	2171
ganlikun	0:13413ea9a877	2172	/**
ganlikun	0:13413ea9a877	2173	* @brief Enable a pull-down on the lanes to prevent from floating states when unused
ganlikun	0:13413ea9a877	2174	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2175	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	2176	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	2177	* @retval HAL status
ganlikun	0:13413ea9a877	2178	*/
ganlikun	0:13413ea9a877	2179	HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun	0:13413ea9a877	2180	{
ganlikun	0:13413ea9a877	2181	/* Process locked */
ganlikun	0:13413ea9a877	2182	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	2183
ganlikun	0:13413ea9a877	2184	/* Check function parameters */
ganlikun	0:13413ea9a877	2185	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	2186
ganlikun	0:13413ea9a877	2187	/* Enable/Disable pull-down on lanes */
ganlikun	0:13413ea9a877	2188	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_PDEN;
ganlikun	0:13413ea9a877	2189	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 18U);
ganlikun	0:13413ea9a877	2190
ganlikun	0:13413ea9a877	2191	/* Process unlocked */
ganlikun	0:13413ea9a877	2192	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	2193
ganlikun	0:13413ea9a877	2194	return HAL_OK;
ganlikun	0:13413ea9a877	2195	}
ganlikun	0:13413ea9a877	2196
ganlikun	0:13413ea9a877	2197	/**
ganlikun	0:13413ea9a877	2198	* @brief Switch off the contention detection on data lanes
ganlikun	0:13413ea9a877	2199	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2200	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	2201	* @param State: ENABLE or DISABLE
ganlikun	0:13413ea9a877	2202	* @retval HAL status
ganlikun	0:13413ea9a877	2203	*/
ganlikun	0:13413ea9a877	2204	HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun	0:13413ea9a877	2205	{
ganlikun	0:13413ea9a877	2206	/* Process locked */
ganlikun	0:13413ea9a877	2207	__HAL_LOCK(hdsi);
ganlikun	0:13413ea9a877	2208
ganlikun	0:13413ea9a877	2209	/* Check function parameters */
ganlikun	0:13413ea9a877	2210	assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun	0:13413ea9a877	2211
ganlikun	0:13413ea9a877	2212	/* Contention Detection on Data Lanes OFF */
ganlikun	0:13413ea9a877	2213	hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_CDOFFDL;
ganlikun	0:13413ea9a877	2214	hdsi->Instance->WPCR[0U] \|= ((uint32_t)State << 14U);
ganlikun	0:13413ea9a877	2215
ganlikun	0:13413ea9a877	2216	/* Process unlocked */
ganlikun	0:13413ea9a877	2217	__HAL_UNLOCK(hdsi);
ganlikun	0:13413ea9a877	2218
ganlikun	0:13413ea9a877	2219	return HAL_OK;
ganlikun	0:13413ea9a877	2220	}
ganlikun	0:13413ea9a877	2221
ganlikun	0:13413ea9a877	2222	/**
ganlikun	0:13413ea9a877	2223	* @}
ganlikun	0:13413ea9a877	2224	*/
ganlikun	0:13413ea9a877	2225
ganlikun	0:13413ea9a877	2226	/** @defgroup DSI_Group4 Peripheral State and Errors functions
ganlikun	0:13413ea9a877	2227	* @brief Peripheral State and Errors functions
ganlikun	0:13413ea9a877	2228	*
ganlikun	0:13413ea9a877	2229	@verbatim
ganlikun	0:13413ea9a877	2230	===============================================================================
ganlikun	0:13413ea9a877	2231	##### Peripheral State and Errors functions #####
ganlikun	0:13413ea9a877	2232	===============================================================================
ganlikun	0:13413ea9a877	2233	[..]
ganlikun	0:13413ea9a877	2234	This subsection provides functions allowing to
ganlikun	0:13413ea9a877	2235	(+) Check the DSI state.
ganlikun	0:13413ea9a877	2236	(+) Get error code.
ganlikun	0:13413ea9a877	2237
ganlikun	0:13413ea9a877	2238	@endverbatim
ganlikun	0:13413ea9a877	2239	* @{
ganlikun	0:13413ea9a877	2240	*/
ganlikun	0:13413ea9a877	2241
ganlikun	0:13413ea9a877	2242	/**
ganlikun	0:13413ea9a877	2243	* @brief Return the DSI state
ganlikun	0:13413ea9a877	2244	* @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	2245	* the configuration information for the DSI.
ganlikun	0:13413ea9a877	2246	* @retval HAL state
ganlikun	0:13413ea9a877	2247	*/
ganlikun	0:13413ea9a877	2248	HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi)
ganlikun	0:13413ea9a877	2249	{
ganlikun	0:13413ea9a877	2250	return hdsi->State;
ganlikun	0:13413ea9a877	2251	}
ganlikun	0:13413ea9a877	2252
ganlikun	0:13413ea9a877	2253	/**
ganlikun	0:13413ea9a877	2254	* @}
ganlikun	0:13413ea9a877	2255	*/
ganlikun	0:13413ea9a877	2256
ganlikun	0:13413ea9a877	2257	/**
ganlikun	0:13413ea9a877	2258	* @}
ganlikun	0:13413ea9a877	2259	*/
ganlikun	0:13413ea9a877	2260	#endif /* STM32F469xx \|\| STM32F479xx */
ganlikun	0:13413ea9a877	2261	#endif /* HAL_DSI_MODULE_ENABLED */
ganlikun	0:13413ea9a877	2262	/**
ganlikun	0:13413ea9a877	2263	* @}
ganlikun	0:13413ea9a877	2264	*/
ganlikun	0:13413ea9a877	2265
ganlikun	0:13413ea9a877	2266	/**
ganlikun	0:13413ea9a877	2267	* @}
ganlikun	0:13413ea9a877	2268	*/
ganlikun	0:13413ea9a877	2269
ganlikun	0:13413ea9a877	2270	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	2271

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Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.c@0:13413ea9a877, 2022-06-12 (annotated)

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