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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

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User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_hal_dfsdm.c
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief This file provides firmware functions to manage the following
ganlikun	0:13413ea9a877	8	* functionalities of the Digital Filter for Sigma-Delta Modulators
ganlikun	0:13413ea9a877	9	* (DFSDM) peripherals:
ganlikun	0:13413ea9a877	10	* + Initialization and configuration of channels and filters
ganlikun	0:13413ea9a877	11	* + Regular channels configuration
ganlikun	0:13413ea9a877	12	* + Injected channels configuration
ganlikun	0:13413ea9a877	13	* + Regular/Injected Channels DMA Configuration
ganlikun	0:13413ea9a877	14	* + Interrupts and flags management
ganlikun	0:13413ea9a877	15	* + Analog watchdog feature
ganlikun	0:13413ea9a877	16	* + Short-circuit detector feature
ganlikun	0:13413ea9a877	17	* + Extremes detector feature
ganlikun	0:13413ea9a877	18	* + Clock absence detector feature
ganlikun	0:13413ea9a877	19	* + Break generation on analog watchdog or short-circuit event
ganlikun	0:13413ea9a877	20	*
ganlikun	0:13413ea9a877	21	@verbatim
ganlikun	0:13413ea9a877	22	==============================================================================
ganlikun	0:13413ea9a877	23	##### How to use this driver #####
ganlikun	0:13413ea9a877	24	==============================================================================
ganlikun	0:13413ea9a877	25	[..]
ganlikun	0:13413ea9a877	26	* Channel initialization *
ganlikun	0:13413ea9a877	27	==============================
ganlikun	0:13413ea9a877	28	[..]
ganlikun	0:13413ea9a877	29	(#) User has first to initialize channels (before filters initialization).
ganlikun	0:13413ea9a877	30	(#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
ganlikun	0:13413ea9a877	31	(++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
ganlikun	0:13413ea9a877	32	(++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
ganlikun	0:13413ea9a877	33	(++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
ganlikun	0:13413ea9a877	34	(++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
ganlikun	0:13413ea9a877	35	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
ganlikun	0:13413ea9a877	36	(#) Configure the output clock, input, serial interface, analog watchdog,
ganlikun	0:13413ea9a877	37	offset and data right bit shift parameters for this channel using the
ganlikun	0:13413ea9a877	38	HAL_DFSDM_ChannelInit() function.
ganlikun	0:13413ea9a877	39
ganlikun	0:13413ea9a877	40	* Channel clock absence detector *
ganlikun	0:13413ea9a877	41	======================================
ganlikun	0:13413ea9a877	42	[..]
ganlikun	0:13413ea9a877	43	(#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
ganlikun	0:13413ea9a877	44	HAL_DFSDM_ChannelCkabStart_IT().
ganlikun	0:13413ea9a877	45	(#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
ganlikun	0:13413ea9a877	46	absence.
ganlikun	0:13413ea9a877	47	(#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
ganlikun	0:13413ea9a877	48	clock absence is detected.
ganlikun	0:13413ea9a877	49	(#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
ganlikun	0:13413ea9a877	50	HAL_DFSDM_ChannelCkabStop_IT().
ganlikun	0:13413ea9a877	51	(#) Please note that the same mode (polling or interrupt) has to be used
ganlikun	0:13413ea9a877	52	for all channels because the channels are sharing the same interrupt.
ganlikun	0:13413ea9a877	53	(#) Please note also that in interrupt mode, if clock absence detector is
ganlikun	0:13413ea9a877	54	stopped for one channel, interrupt will be disabled for all channels.
ganlikun	0:13413ea9a877	55
ganlikun	0:13413ea9a877	56	* Channel short circuit detector *
ganlikun	0:13413ea9a877	57	======================================
ganlikun	0:13413ea9a877	58	[..]
ganlikun	0:13413ea9a877	59	(#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
ganlikun	0:13413ea9a877	60	or HAL_DFSDM_ChannelScdStart_IT().
ganlikun	0:13413ea9a877	61	(#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
ganlikun	0:13413ea9a877	62	circuit.
ganlikun	0:13413ea9a877	63	(#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
ganlikun	0:13413ea9a877	64	short circuit is detected.
ganlikun	0:13413ea9a877	65	(#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
ganlikun	0:13413ea9a877	66	or HAL_DFSDM_ChannelScdStop_IT().
ganlikun	0:13413ea9a877	67	(#) Please note that the same mode (polling or interrupt) has to be used
ganlikun	0:13413ea9a877	68	for all channels because the channels are sharing the same interrupt.
ganlikun	0:13413ea9a877	69	(#) Please note also that in interrupt mode, if short circuit detector is
ganlikun	0:13413ea9a877	70	stopped for one channel, interrupt will be disabled for all channels.
ganlikun	0:13413ea9a877	71
ganlikun	0:13413ea9a877	72	* Channel analog watchdog value *
ganlikun	0:13413ea9a877	73	=====================================
ganlikun	0:13413ea9a877	74	[..]
ganlikun	0:13413ea9a877	75	(#) Get analog watchdog filter value of a channel using
ganlikun	0:13413ea9a877	76	HAL_DFSDM_ChannelGetAwdValue().
ganlikun	0:13413ea9a877	77
ganlikun	0:13413ea9a877	78	* Channel offset value *
ganlikun	0:13413ea9a877	79	=====================================
ganlikun	0:13413ea9a877	80	[..]
ganlikun	0:13413ea9a877	81	(#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
ganlikun	0:13413ea9a877	82
ganlikun	0:13413ea9a877	83	* Filter initialization *
ganlikun	0:13413ea9a877	84	=============================
ganlikun	0:13413ea9a877	85	[..]
ganlikun	0:13413ea9a877	86	(#) After channel initialization, user has to init filters.
ganlikun	0:13413ea9a877	87	(#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
ganlikun	0:13413ea9a877	88	(++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
ganlikun	0:13413ea9a877	89	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
ganlikun	0:13413ea9a877	90	Please note that DFSDMz_FLT0 global interrupt could be already
ganlikun	0:13413ea9a877	91	enabled if interrupt is used for channel.
ganlikun	0:13413ea9a877	92	(++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
ganlikun	0:13413ea9a877	93	with DFSDMz filter handle using __HAL_LINKDMA().
ganlikun	0:13413ea9a877	94	(#) Configure the regular conversion, injected conversion and filter
ganlikun	0:13413ea9a877	95	parameters for this filter using the HAL_DFSDM_FilterInit() function.
ganlikun	0:13413ea9a877	96
ganlikun	0:13413ea9a877	97	* Filter regular channel conversion *
ganlikun	0:13413ea9a877	98	=========================================
ganlikun	0:13413ea9a877	99	[..]
ganlikun	0:13413ea9a877	100	(#) Select regular channel and enable/disable continuous mode using
ganlikun	0:13413ea9a877	101	HAL_DFSDM_FilterConfigRegChannel().
ganlikun	0:13413ea9a877	102	(#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
ganlikun	0:13413ea9a877	103	HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
ganlikun	0:13413ea9a877	104	HAL_DFSDM_FilterRegularMsbStart_DMA().
ganlikun	0:13413ea9a877	105	(#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
ganlikun	0:13413ea9a877	106	the end of regular conversion.
ganlikun	0:13413ea9a877	107	(#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
ganlikun	0:13413ea9a877	108	at the end of regular conversion.
ganlikun	0:13413ea9a877	109	(#) Get value of regular conversion and corresponding channel using
ganlikun	0:13413ea9a877	110	HAL_DFSDM_FilterGetRegularValue().
ganlikun	0:13413ea9a877	111	(#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
ganlikun	0:13413ea9a877	112	HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
ganlikun	0:13413ea9a877	113	half transfer and at the transfer complete. Please note that
ganlikun	0:13413ea9a877	114	HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
ganlikun	0:13413ea9a877	115	circular mode.
ganlikun	0:13413ea9a877	116	(#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
ganlikun	0:13413ea9a877	117	HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
ganlikun	0:13413ea9a877	118
ganlikun	0:13413ea9a877	119	* Filter injected channels conversion *
ganlikun	0:13413ea9a877	120	===========================================
ganlikun	0:13413ea9a877	121	[..]
ganlikun	0:13413ea9a877	122	(#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
ganlikun	0:13413ea9a877	123	(#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
ganlikun	0:13413ea9a877	124	HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
ganlikun	0:13413ea9a877	125	HAL_DFSDM_FilterInjectedMsbStart_DMA().
ganlikun	0:13413ea9a877	126	(#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
ganlikun	0:13413ea9a877	127	the end of injected conversion.
ganlikun	0:13413ea9a877	128	(#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
ganlikun	0:13413ea9a877	129	at the end of injected conversion.
ganlikun	0:13413ea9a877	130	(#) Get value of injected conversion and corresponding channel using
ganlikun	0:13413ea9a877	131	HAL_DFSDM_FilterGetInjectedValue().
ganlikun	0:13413ea9a877	132	(#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
ganlikun	0:13413ea9a877	133	HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
ganlikun	0:13413ea9a877	134	half transfer and at the transfer complete. Please note that
ganlikun	0:13413ea9a877	135	HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
ganlikun	0:13413ea9a877	136	circular mode.
ganlikun	0:13413ea9a877	137	(#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
ganlikun	0:13413ea9a877	138	HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
ganlikun	0:13413ea9a877	139
ganlikun	0:13413ea9a877	140	* Filter analog watchdog *
ganlikun	0:13413ea9a877	141	==============================
ganlikun	0:13413ea9a877	142	[..]
ganlikun	0:13413ea9a877	143	(#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
ganlikun	0:13413ea9a877	144	(#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
ganlikun	0:13413ea9a877	145	(#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
ganlikun	0:13413ea9a877	146
ganlikun	0:13413ea9a877	147	* Filter extreme detector *
ganlikun	0:13413ea9a877	148	===============================
ganlikun	0:13413ea9a877	149	[..]
ganlikun	0:13413ea9a877	150	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
ganlikun	0:13413ea9a877	151	(#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
ganlikun	0:13413ea9a877	152	(#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
ganlikun	0:13413ea9a877	153	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
ganlikun	0:13413ea9a877	154
ganlikun	0:13413ea9a877	155	* Filter conversion time *
ganlikun	0:13413ea9a877	156	==============================
ganlikun	0:13413ea9a877	157	[..]
ganlikun	0:13413ea9a877	158	(#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
ganlikun	0:13413ea9a877	159
ganlikun	0:13413ea9a877	160	@endverbatim
ganlikun	0:13413ea9a877	161	******************************************************************************
ganlikun	0:13413ea9a877	162	* @attention
ganlikun	0:13413ea9a877	163	*
ganlikun	0:13413ea9a877	164	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	165	*
ganlikun	0:13413ea9a877	166	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	167	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	168	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	169	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	170	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	171	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	172	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	173	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	174	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	175	* without specific prior written permission.
ganlikun	0:13413ea9a877	176	*
ganlikun	0:13413ea9a877	177	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	178	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	179	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	180	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	181	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	182	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	183	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	184	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	185	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	186	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	187	*
ganlikun	0:13413ea9a877	188	******************************************************************************
ganlikun	0:13413ea9a877	189	*/
ganlikun	0:13413ea9a877	190
ganlikun	0:13413ea9a877	191	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	192	#include "stm32f4xx_hal.h"
ganlikun	0:13413ea9a877	193
ganlikun	0:13413ea9a877	194	/** @addtogroup STM32F4xx_HAL_Driver
ganlikun	0:13413ea9a877	195	* @{
ganlikun	0:13413ea9a877	196	*/
ganlikun	0:13413ea9a877	197	#ifdef HAL_DFSDM_MODULE_ENABLED
ganlikun	0:13413ea9a877	198	#if defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
ganlikun	0:13413ea9a877	199	/** @defgroup DFSDM DFSDM
ganlikun	0:13413ea9a877	200	* @brief DFSDM HAL driver module
ganlikun	0:13413ea9a877	201	* @{
ganlikun	0:13413ea9a877	202	*/
ganlikun	0:13413ea9a877	203
ganlikun	0:13413ea9a877	204	/* Private typedef -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	205	/* Private define ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	206	/** @defgroup DFSDM_Private_Define DFSDM Private Define
ganlikun	0:13413ea9a877	207	* @{
ganlikun	0:13413ea9a877	208	*/
ganlikun	0:13413ea9a877	209	#define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
ganlikun	0:13413ea9a877	210	#define DFSDM_CHAWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
ganlikun	0:13413ea9a877	211	#define DFSDM_CHAWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
ganlikun	0:13413ea9a877	212	#define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
ganlikun	0:13413ea9a877	213	#define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
ganlikun	0:13413ea9a877	214	#define DFSDM_FLTFCR_FOSR_OFFSET POSITION_VAL(DFSDM_FLTFCR_FOSR)
ganlikun	0:13413ea9a877	215	#define DFSDM_FLTCR1_MSB_RCH_OFFSET 8U
ganlikun	0:13413ea9a877	216	#define DFSDM_FLTCR2_EXCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_EXCH)
ganlikun	0:13413ea9a877	217	#define DFSDM_FLTCR2_AWDCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_AWDCH)
ganlikun	0:13413ea9a877	218	#define DFSDM_FLTISR_CKABF_OFFSET POSITION_VAL(DFSDM_FLTISR_CKABF)
ganlikun	0:13413ea9a877	219	#define DFSDM_FLTISR_SCDF_OFFSET POSITION_VAL(DFSDM_FLTISR_SCDF)
ganlikun	0:13413ea9a877	220	#define DFSDM_FLTICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
ganlikun	0:13413ea9a877	221	#define DFSDM_FLTICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
ganlikun	0:13413ea9a877	222	#define DFSDM_FLTRDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
ganlikun	0:13413ea9a877	223	#define DFSDM_FLTJDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
ganlikun	0:13413ea9a877	224	#define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
ganlikun	0:13413ea9a877	225	#define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
ganlikun	0:13413ea9a877	226	#define DFSDM_FLTEXMAX_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
ganlikun	0:13413ea9a877	227	#define DFSDM_FLTEXMIN_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
ganlikun	0:13413ea9a877	228	#define DFSDM_FLTCNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
ganlikun	0:13413ea9a877	229	#define DFSDM_FLTAWSR_HIGH_OFFSET POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
ganlikun	0:13413ea9a877	230	#define DFSDM_MSB_MASK 0xFFFF0000U
ganlikun	0:13413ea9a877	231	#define DFSDM_LSB_MASK 0x0000FFFFU
ganlikun	0:13413ea9a877	232	#define DFSDM_CKAB_TIMEOUT 5000U
ganlikun	0:13413ea9a877	233	#define DFSDM1_CHANNEL_NUMBER 4U
ganlikun	0:13413ea9a877	234	#if defined (DFSDM2_Channel0)
ganlikun	0:13413ea9a877	235	#define DFSDM2_CHANNEL_NUMBER 8U
ganlikun	0:13413ea9a877	236	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	237
ganlikun	0:13413ea9a877	238	/**
ganlikun	0:13413ea9a877	239	* @}
ganlikun	0:13413ea9a877	240	*/
ganlikun	0:13413ea9a877	241	/** @addtogroup DFSDM_Private_Macros
ganlikun	0:13413ea9a877	242	* @{
ganlikun	0:13413ea9a877	243	*/
ganlikun	0:13413ea9a877	244
ganlikun	0:13413ea9a877	245	/**
ganlikun	0:13413ea9a877	246	* @}
ganlikun	0:13413ea9a877	247	*/
ganlikun	0:13413ea9a877	248	/* Private macro -------------------------------------------------------------*/
ganlikun	0:13413ea9a877	249	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	250	/** @defgroup DFSDM_Private_Variables DFSDM Private Variables
ganlikun	0:13413ea9a877	251	* @{
ganlikun	0:13413ea9a877	252	*/
ganlikun	0:13413ea9a877	253	__IO uint32_t v_dfsdm1ChannelCounter = 0U;
ganlikun	0:13413ea9a877	254	DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
ganlikun	0:13413ea9a877	255
ganlikun	0:13413ea9a877	256	#if defined (DFSDM2_Channel0)
ganlikun	0:13413ea9a877	257	__IO uint32_t v_dfsdm2ChannelCounter = 0U;
ganlikun	0:13413ea9a877	258	DFSDM_Channel_HandleTypeDef* a_dfsdm2ChannelHandle[DFSDM2_CHANNEL_NUMBER] = {NULL};
ganlikun	0:13413ea9a877	259	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	260	/**
ganlikun	0:13413ea9a877	261	* @}
ganlikun	0:13413ea9a877	262	*/
ganlikun	0:13413ea9a877	263
ganlikun	0:13413ea9a877	264	/* Private function prototypes -----------------------------------------------*/
ganlikun	0:13413ea9a877	265	/** @defgroup DFSDM_Private_Functions DFSDM Private Functions
ganlikun	0:13413ea9a877	266	* @{
ganlikun	0:13413ea9a877	267	*/
ganlikun	0:13413ea9a877	268	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
ganlikun	0:13413ea9a877	269	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
ganlikun	0:13413ea9a877	270	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
ganlikun	0:13413ea9a877	271	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
ganlikun	0:13413ea9a877	272	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
ganlikun	0:13413ea9a877	273	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
ganlikun	0:13413ea9a877	274	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	275	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	276	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	277	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	278	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	279
ganlikun	0:13413ea9a877	280	/**
ganlikun	0:13413ea9a877	281	* @}
ganlikun	0:13413ea9a877	282	*/
ganlikun	0:13413ea9a877	283
ganlikun	0:13413ea9a877	284	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	285	/** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
ganlikun	0:13413ea9a877	286	* @{
ganlikun	0:13413ea9a877	287	*/
ganlikun	0:13413ea9a877	288
ganlikun	0:13413ea9a877	289	/** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
ganlikun	0:13413ea9a877	290	* @brief Channel initialization and de-initialization functions
ganlikun	0:13413ea9a877	291	*
ganlikun	0:13413ea9a877	292	@verbatim
ganlikun	0:13413ea9a877	293	==============================================================================
ganlikun	0:13413ea9a877	294	##### Channel initialization and de-initialization functions #####
ganlikun	0:13413ea9a877	295	==============================================================================
ganlikun	0:13413ea9a877	296	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	297	(+) Initialize the DFSDM channel.
ganlikun	0:13413ea9a877	298	(+) De-initialize the DFSDM channel.
ganlikun	0:13413ea9a877	299	@endverbatim
ganlikun	0:13413ea9a877	300	* @{
ganlikun	0:13413ea9a877	301	*/
ganlikun	0:13413ea9a877	302
ganlikun	0:13413ea9a877	303	/**
ganlikun	0:13413ea9a877	304	* @brief Initialize the DFSDM channel according to the specified parameters
ganlikun	0:13413ea9a877	305	* in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
ganlikun	0:13413ea9a877	306	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	307	* @retval HAL status.
ganlikun	0:13413ea9a877	308	*/
ganlikun	0:13413ea9a877	309	HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	310	{
ganlikun	0:13413ea9a877	311	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	312	__IO uint32_t* channelCounterPtr;
ganlikun	0:13413ea9a877	313	DFSDM_Channel_HandleTypeDef **channelHandleTable;
ganlikun	0:13413ea9a877	314	DFSDM_Channel_TypeDef* channel0Instance;
ganlikun	0:13413ea9a877	315	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	316
ganlikun	0:13413ea9a877	317	/* Check DFSDM Channel handle */
ganlikun	0:13413ea9a877	318	if(hdfsdm_channel == NULL)
ganlikun	0:13413ea9a877	319	{
ganlikun	0:13413ea9a877	320	return HAL_ERROR;
ganlikun	0:13413ea9a877	321	}
ganlikun	0:13413ea9a877	322
ganlikun	0:13413ea9a877	323	/* Check parameters */
ganlikun	0:13413ea9a877	324	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	325	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
ganlikun	0:13413ea9a877	326	assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
ganlikun	0:13413ea9a877	327	assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
ganlikun	0:13413ea9a877	328	assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
ganlikun	0:13413ea9a877	329	assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
ganlikun	0:13413ea9a877	330	assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
ganlikun	0:13413ea9a877	331	assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
ganlikun	0:13413ea9a877	332	assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
ganlikun	0:13413ea9a877	333	assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
ganlikun	0:13413ea9a877	334	assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
ganlikun	0:13413ea9a877	335
ganlikun	0:13413ea9a877	336	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	337	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	338	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	339	{
ganlikun	0:13413ea9a877	340	channelCounterPtr = &v_dfsdm1ChannelCounter;
ganlikun	0:13413ea9a877	341	channelHandleTable = a_dfsdm1ChannelHandle;
ganlikun	0:13413ea9a877	342	channel0Instance = DFSDM1_Channel0;
ganlikun	0:13413ea9a877	343	}
ganlikun	0:13413ea9a877	344	else
ganlikun	0:13413ea9a877	345	{
ganlikun	0:13413ea9a877	346	channelCounterPtr = &v_dfsdm2ChannelCounter;
ganlikun	0:13413ea9a877	347	channelHandleTable = a_dfsdm2ChannelHandle;
ganlikun	0:13413ea9a877	348	channel0Instance = DFSDM2_Channel0;
ganlikun	0:13413ea9a877	349	}
ganlikun	0:13413ea9a877	350
ganlikun	0:13413ea9a877	351	/* Check that channel has not been already initialized */
ganlikun	0:13413ea9a877	352	if(channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
ganlikun	0:13413ea9a877	353	{
ganlikun	0:13413ea9a877	354	return HAL_ERROR;
ganlikun	0:13413ea9a877	355	}
ganlikun	0:13413ea9a877	356
ganlikun	0:13413ea9a877	357	/* Call MSP init function */
ganlikun	0:13413ea9a877	358	HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
ganlikun	0:13413ea9a877	359
ganlikun	0:13413ea9a877	360	/* Update the channel counter */
ganlikun	0:13413ea9a877	361	(*channelCounterPtr)++;
ganlikun	0:13413ea9a877	362
ganlikun	0:13413ea9a877	363	/* Configure output serial clock and enable global DFSDM interface only for first channel */
ganlikun	0:13413ea9a877	364	if(*channelCounterPtr == 1U)
ganlikun	0:13413ea9a877	365	{
ganlikun	0:13413ea9a877	366	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
ganlikun	0:13413ea9a877	367	/* Set the output serial clock source */
ganlikun	0:13413ea9a877	368	channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
ganlikun	0:13413ea9a877	369	channel0Instance->CHCFGR1 \|= hdfsdm_channel->Init.OutputClock.Selection;
ganlikun	0:13413ea9a877	370
ganlikun	0:13413ea9a877	371	/* Reset clock divider */
ganlikun	0:13413ea9a877	372	channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
ganlikun	0:13413ea9a877	373	if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
ganlikun	0:13413ea9a877	374	{
ganlikun	0:13413ea9a877	375	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
ganlikun	0:13413ea9a877	376	/* Set the output clock divider */
ganlikun	0:13413ea9a877	377	channel0Instance->CHCFGR1 \|= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
ganlikun	0:13413ea9a877	378	DFSDM_CHCFGR1_CLK_DIV_OFFSET);
ganlikun	0:13413ea9a877	379	}
ganlikun	0:13413ea9a877	380
ganlikun	0:13413ea9a877	381	/* enable the DFSDM global interface */
ganlikun	0:13413ea9a877	382	channel0Instance->CHCFGR1 \|= DFSDM_CHCFGR1_DFSDMEN;
ganlikun	0:13413ea9a877	383	}
ganlikun	0:13413ea9a877	384
ganlikun	0:13413ea9a877	385	/* Set channel input parameters */
ganlikun	0:13413ea9a877	386	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK \| DFSDM_CHCFGR1_DATMPX \|
ganlikun	0:13413ea9a877	387	DFSDM_CHCFGR1_CHINSEL);
ganlikun	0:13413ea9a877	388	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.Input.Multiplexer \|
ganlikun	0:13413ea9a877	389	hdfsdm_channel->Init.Input.DataPacking \|
ganlikun	0:13413ea9a877	390	hdfsdm_channel->Init.Input.Pins);
ganlikun	0:13413ea9a877	391
ganlikun	0:13413ea9a877	392	/* Set serial interface parameters */
ganlikun	0:13413ea9a877	393	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP \| DFSDM_CHCFGR1_SPICKSEL);
ganlikun	0:13413ea9a877	394	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.SerialInterface.Type \|
ganlikun	0:13413ea9a877	395	hdfsdm_channel->Init.SerialInterface.SpiClock);
ganlikun	0:13413ea9a877	396
ganlikun	0:13413ea9a877	397	/* Set analog watchdog parameters */
ganlikun	0:13413ea9a877	398	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD \| DFSDM_CHAWSCDR_AWFOSR);
ganlikun	0:13413ea9a877	399	hdfsdm_channel->Instance->CHAWSCDR \|= (hdfsdm_channel->Init.Awd.FilterOrder \|
ganlikun	0:13413ea9a877	400	((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_FOSR_OFFSET));
ganlikun	0:13413ea9a877	401
ganlikun	0:13413ea9a877	402	/* Set channel offset and right bit shift */
ganlikun	0:13413ea9a877	403	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET \| DFSDM_CHCFGR2_DTRBS);
ganlikun	0:13413ea9a877	404	hdfsdm_channel->Instance->CHCFGR2 \|= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) \|
ganlikun	0:13413ea9a877	405	(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
ganlikun	0:13413ea9a877	406
ganlikun	0:13413ea9a877	407	/* Enable DFSDM channel */
ganlikun	0:13413ea9a877	408	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CHEN;
ganlikun	0:13413ea9a877	409
ganlikun	0:13413ea9a877	410	/* Set DFSDM Channel to ready state */
ganlikun	0:13413ea9a877	411	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
ganlikun	0:13413ea9a877	412
ganlikun	0:13413ea9a877	413	/* Store channel handle in DFSDM channel handle table */
ganlikun	0:13413ea9a877	414	channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
ganlikun	0:13413ea9a877	415
ganlikun	0:13413ea9a877	416	#else
ganlikun	0:13413ea9a877	417	/* Check that channel has not been already initialized */
ganlikun	0:13413ea9a877	418	if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
ganlikun	0:13413ea9a877	419	{
ganlikun	0:13413ea9a877	420	return HAL_ERROR;
ganlikun	0:13413ea9a877	421	}
ganlikun	0:13413ea9a877	422
ganlikun	0:13413ea9a877	423	/* Call MSP init function */
ganlikun	0:13413ea9a877	424	HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
ganlikun	0:13413ea9a877	425
ganlikun	0:13413ea9a877	426	/* Update the channel counter */
ganlikun	0:13413ea9a877	427	v_dfsdm1ChannelCounter++;
ganlikun	0:13413ea9a877	428
ganlikun	0:13413ea9a877	429	/* Configure output serial clock and enable global DFSDM interface only for first channel */
ganlikun	0:13413ea9a877	430	if(v_dfsdm1ChannelCounter == 1U)
ganlikun	0:13413ea9a877	431	{
ganlikun	0:13413ea9a877	432	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
ganlikun	0:13413ea9a877	433	/* Set the output serial clock source */
ganlikun	0:13413ea9a877	434	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
ganlikun	0:13413ea9a877	435	DFSDM1_Channel0->CHCFGR1 \|= hdfsdm_channel->Init.OutputClock.Selection;
ganlikun	0:13413ea9a877	436
ganlikun	0:13413ea9a877	437	/* Reset clock divider */
ganlikun	0:13413ea9a877	438	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
ganlikun	0:13413ea9a877	439	if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
ganlikun	0:13413ea9a877	440	{
ganlikun	0:13413ea9a877	441	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
ganlikun	0:13413ea9a877	442	/* Set the output clock divider */
ganlikun	0:13413ea9a877	443	DFSDM1_Channel0->CHCFGR1 \|= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
ganlikun	0:13413ea9a877	444	DFSDM_CHCFGR1_CLK_DIV_OFFSET);
ganlikun	0:13413ea9a877	445	}
ganlikun	0:13413ea9a877	446
ganlikun	0:13413ea9a877	447	/* enable the DFSDM global interface */
ganlikun	0:13413ea9a877	448	DFSDM1_Channel0->CHCFGR1 \|= DFSDM_CHCFGR1_DFSDMEN;
ganlikun	0:13413ea9a877	449	}
ganlikun	0:13413ea9a877	450
ganlikun	0:13413ea9a877	451	/* Set channel input parameters */
ganlikun	0:13413ea9a877	452	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK \| DFSDM_CHCFGR1_DATMPX \|
ganlikun	0:13413ea9a877	453	DFSDM_CHCFGR1_CHINSEL);
ganlikun	0:13413ea9a877	454	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.Input.Multiplexer \|
ganlikun	0:13413ea9a877	455	hdfsdm_channel->Init.Input.DataPacking \|
ganlikun	0:13413ea9a877	456	hdfsdm_channel->Init.Input.Pins);
ganlikun	0:13413ea9a877	457
ganlikun	0:13413ea9a877	458	/* Set serial interface parameters */
ganlikun	0:13413ea9a877	459	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP \| DFSDM_CHCFGR1_SPICKSEL);
ganlikun	0:13413ea9a877	460	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.SerialInterface.Type \|
ganlikun	0:13413ea9a877	461	hdfsdm_channel->Init.SerialInterface.SpiClock);
ganlikun	0:13413ea9a877	462
ganlikun	0:13413ea9a877	463	/* Set analog watchdog parameters */
ganlikun	0:13413ea9a877	464	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD \| DFSDM_CHAWSCDR_AWFOSR);
ganlikun	0:13413ea9a877	465	hdfsdm_channel->Instance->CHAWSCDR \|= (hdfsdm_channel->Init.Awd.FilterOrder \|
ganlikun	0:13413ea9a877	466	((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_FOSR_OFFSET));
ganlikun	0:13413ea9a877	467
ganlikun	0:13413ea9a877	468	/* Set channel offset and right bit shift */
ganlikun	0:13413ea9a877	469	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET \| DFSDM_CHCFGR2_DTRBS);
ganlikun	0:13413ea9a877	470	hdfsdm_channel->Instance->CHCFGR2 \|= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) \|
ganlikun	0:13413ea9a877	471	(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
ganlikun	0:13413ea9a877	472
ganlikun	0:13413ea9a877	473	/* Enable DFSDM channel */
ganlikun	0:13413ea9a877	474	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CHEN;
ganlikun	0:13413ea9a877	475
ganlikun	0:13413ea9a877	476	/* Set DFSDM Channel to ready state */
ganlikun	0:13413ea9a877	477	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
ganlikun	0:13413ea9a877	478
ganlikun	0:13413ea9a877	479	/* Store channel handle in DFSDM channel handle table */
ganlikun	0:13413ea9a877	480	a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
ganlikun	0:13413ea9a877	481	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	482
ganlikun	0:13413ea9a877	483	return HAL_OK;
ganlikun	0:13413ea9a877	484	}
ganlikun	0:13413ea9a877	485
ganlikun	0:13413ea9a877	486	/**
ganlikun	0:13413ea9a877	487	* @brief De-initialize the DFSDM channel.
ganlikun	0:13413ea9a877	488	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	489	* @retval HAL status.
ganlikun	0:13413ea9a877	490	*/
ganlikun	0:13413ea9a877	491	HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	492	{
ganlikun	0:13413ea9a877	493	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	494	__IO uint32_t* channelCounterPtr;
ganlikun	0:13413ea9a877	495	DFSDM_Channel_HandleTypeDef **channelHandleTable;
ganlikun	0:13413ea9a877	496	DFSDM_Channel_TypeDef* channel0Instance;
ganlikun	0:13413ea9a877	497	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	498
ganlikun	0:13413ea9a877	499	/* Check DFSDM Channel handle */
ganlikun	0:13413ea9a877	500	if(hdfsdm_channel == NULL)
ganlikun	0:13413ea9a877	501	{
ganlikun	0:13413ea9a877	502	return HAL_ERROR;
ganlikun	0:13413ea9a877	503	}
ganlikun	0:13413ea9a877	504
ganlikun	0:13413ea9a877	505	/* Check parameters */
ganlikun	0:13413ea9a877	506	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	507
ganlikun	0:13413ea9a877	508	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	509	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	510	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	511	{
ganlikun	0:13413ea9a877	512	channelCounterPtr = &v_dfsdm1ChannelCounter;
ganlikun	0:13413ea9a877	513	channelHandleTable = a_dfsdm1ChannelHandle;
ganlikun	0:13413ea9a877	514	channel0Instance = DFSDM1_Channel0;
ganlikun	0:13413ea9a877	515	}
ganlikun	0:13413ea9a877	516	else
ganlikun	0:13413ea9a877	517	{
ganlikun	0:13413ea9a877	518	channelCounterPtr = &v_dfsdm2ChannelCounter;
ganlikun	0:13413ea9a877	519	channelHandleTable = a_dfsdm2ChannelHandle;
ganlikun	0:13413ea9a877	520	channel0Instance = DFSDM2_Channel0;
ganlikun	0:13413ea9a877	521	}
ganlikun	0:13413ea9a877	522
ganlikun	0:13413ea9a877	523	/* Check that channel has not been already deinitialized */
ganlikun	0:13413ea9a877	524	if(channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
ganlikun	0:13413ea9a877	525	{
ganlikun	0:13413ea9a877	526	return HAL_ERROR;
ganlikun	0:13413ea9a877	527	}
ganlikun	0:13413ea9a877	528
ganlikun	0:13413ea9a877	529	/* Disable the DFSDM channel */
ganlikun	0:13413ea9a877	530	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
ganlikun	0:13413ea9a877	531
ganlikun	0:13413ea9a877	532	/* Update the channel counter */
ganlikun	0:13413ea9a877	533	(*channelCounterPtr)--;
ganlikun	0:13413ea9a877	534
ganlikun	0:13413ea9a877	535	/* Disable global DFSDM at deinit of last channel */
ganlikun	0:13413ea9a877	536	if(*channelCounterPtr == 0U)
ganlikun	0:13413ea9a877	537	{
ganlikun	0:13413ea9a877	538	channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
ganlikun	0:13413ea9a877	539	}
ganlikun	0:13413ea9a877	540
ganlikun	0:13413ea9a877	541	/* Call MSP deinit function */
ganlikun	0:13413ea9a877	542	HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
ganlikun	0:13413ea9a877	543
ganlikun	0:13413ea9a877	544	/* Set DFSDM Channel in reset state */
ganlikun	0:13413ea9a877	545	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
ganlikun	0:13413ea9a877	546
ganlikun	0:13413ea9a877	547	/* Reset channel handle in DFSDM channel handle table */
ganlikun	0:13413ea9a877	548	channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = NULL;
ganlikun	0:13413ea9a877	549	#else
ganlikun	0:13413ea9a877	550	/* Check that channel has not been already deinitialized */
ganlikun	0:13413ea9a877	551	if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
ganlikun	0:13413ea9a877	552	{
ganlikun	0:13413ea9a877	553	return HAL_ERROR;
ganlikun	0:13413ea9a877	554	}
ganlikun	0:13413ea9a877	555
ganlikun	0:13413ea9a877	556	/* Disable the DFSDM channel */
ganlikun	0:13413ea9a877	557	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
ganlikun	0:13413ea9a877	558
ganlikun	0:13413ea9a877	559	/* Update the channel counter */
ganlikun	0:13413ea9a877	560	v_dfsdm1ChannelCounter--;
ganlikun	0:13413ea9a877	561
ganlikun	0:13413ea9a877	562	/* Disable global DFSDM at deinit of last channel */
ganlikun	0:13413ea9a877	563	if(v_dfsdm1ChannelCounter == 0U)
ganlikun	0:13413ea9a877	564	{
ganlikun	0:13413ea9a877	565	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
ganlikun	0:13413ea9a877	566	}
ganlikun	0:13413ea9a877	567
ganlikun	0:13413ea9a877	568	/* Call MSP deinit function */
ganlikun	0:13413ea9a877	569	HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
ganlikun	0:13413ea9a877	570
ganlikun	0:13413ea9a877	571	/* Set DFSDM Channel in reset state */
ganlikun	0:13413ea9a877	572	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
ganlikun	0:13413ea9a877	573
ganlikun	0:13413ea9a877	574	/* Reset channel handle in DFSDM channel handle table */
ganlikun	0:13413ea9a877	575	a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
ganlikun	0:13413ea9a877	576	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	577
ganlikun	0:13413ea9a877	578	return HAL_OK;
ganlikun	0:13413ea9a877	579	}
ganlikun	0:13413ea9a877	580
ganlikun	0:13413ea9a877	581	/**
ganlikun	0:13413ea9a877	582	* @brief Initialize the DFSDM channel MSP.
ganlikun	0:13413ea9a877	583	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	584	* @retval None
ganlikun	0:13413ea9a877	585	*/
ganlikun	0:13413ea9a877	586	__weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	587	{
ganlikun	0:13413ea9a877	588	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	589	UNUSED(hdfsdm_channel);
ganlikun	0:13413ea9a877	590	/* NOTE : This function should not be modified, when the function is needed,
ganlikun	0:13413ea9a877	591	the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
ganlikun	0:13413ea9a877	592	*/
ganlikun	0:13413ea9a877	593	}
ganlikun	0:13413ea9a877	594
ganlikun	0:13413ea9a877	595	/**
ganlikun	0:13413ea9a877	596	* @brief De-initialize the DFSDM channel MSP.
ganlikun	0:13413ea9a877	597	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	598	* @retval None
ganlikun	0:13413ea9a877	599	*/
ganlikun	0:13413ea9a877	600	__weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	601	{
ganlikun	0:13413ea9a877	602	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	603	UNUSED(hdfsdm_channel);
ganlikun	0:13413ea9a877	604	/* NOTE : This function should not be modified, when the function is needed,
ganlikun	0:13413ea9a877	605	the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
ganlikun	0:13413ea9a877	606	*/
ganlikun	0:13413ea9a877	607	}
ganlikun	0:13413ea9a877	608
ganlikun	0:13413ea9a877	609	/**
ganlikun	0:13413ea9a877	610	* @}
ganlikun	0:13413ea9a877	611	*/
ganlikun	0:13413ea9a877	612
ganlikun	0:13413ea9a877	613	/** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
ganlikun	0:13413ea9a877	614	* @brief Channel operation functions
ganlikun	0:13413ea9a877	615	*
ganlikun	0:13413ea9a877	616	@verbatim
ganlikun	0:13413ea9a877	617	==============================================================================
ganlikun	0:13413ea9a877	618	##### Channel operation functions #####
ganlikun	0:13413ea9a877	619	==============================================================================
ganlikun	0:13413ea9a877	620	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	621	(+) Manage clock absence detector feature.
ganlikun	0:13413ea9a877	622	(+) Manage short circuit detector feature.
ganlikun	0:13413ea9a877	623	(+) Get analog watchdog value.
ganlikun	0:13413ea9a877	624	(+) Modify offset value.
ganlikun	0:13413ea9a877	625	@endverbatim
ganlikun	0:13413ea9a877	626	* @{
ganlikun	0:13413ea9a877	627	*/
ganlikun	0:13413ea9a877	628
ganlikun	0:13413ea9a877	629	/**
ganlikun	0:13413ea9a877	630	* @brief This function allows to start clock absence detection in polling mode.
ganlikun	0:13413ea9a877	631	* @note Same mode has to be used for all channels.
ganlikun	0:13413ea9a877	632	* @note If clock is not available on this channel during 5 seconds,
ganlikun	0:13413ea9a877	633	* clock absence detection will not be activated and function
ganlikun	0:13413ea9a877	634	* will return HAL_TIMEOUT error.
ganlikun	0:13413ea9a877	635	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	636	* @retval HAL status
ganlikun	0:13413ea9a877	637	*/
ganlikun	0:13413ea9a877	638	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	639	{
ganlikun	0:13413ea9a877	640	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	641	uint32_t tickstart;
ganlikun	0:13413ea9a877	642	uint32_t channel;
ganlikun	0:13413ea9a877	643
ganlikun	0:13413ea9a877	644	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	645	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	646	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	647
ganlikun	0:13413ea9a877	648	/* Check parameters */
ganlikun	0:13413ea9a877	649	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	650
ganlikun	0:13413ea9a877	651	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	652	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	653	{
ganlikun	0:13413ea9a877	654	/* Return error status */
ganlikun	0:13413ea9a877	655	status = HAL_ERROR;
ganlikun	0:13413ea9a877	656	}
ganlikun	0:13413ea9a877	657	else
ganlikun	0:13413ea9a877	658	{
ganlikun	0:13413ea9a877	659	#if defined (DFSDM2_Channel0)
ganlikun	0:13413ea9a877	660	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	661	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	662	{
ganlikun	0:13413ea9a877	663	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	664	}
ganlikun	0:13413ea9a877	665	else
ganlikun	0:13413ea9a877	666	{
ganlikun	0:13413ea9a877	667	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	668	}
ganlikun	0:13413ea9a877	669	/* Get channel number from channel instance */
ganlikun	0:13413ea9a877	670	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	671
ganlikun	0:13413ea9a877	672	/* Get timeout */
ganlikun	0:13413ea9a877	673	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	674
ganlikun	0:13413ea9a877	675	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	676	while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
ganlikun	0:13413ea9a877	677	{
ganlikun	0:13413ea9a877	678	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	679
ganlikun	0:13413ea9a877	680	/* Check the Timeout */
ganlikun	0:13413ea9a877	681	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
ganlikun	0:13413ea9a877	682	{
ganlikun	0:13413ea9a877	683	/* Set timeout status */
ganlikun	0:13413ea9a877	684	status = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	685	break;
ganlikun	0:13413ea9a877	686	}
ganlikun	0:13413ea9a877	687	}
ganlikun	0:13413ea9a877	688	#else
ganlikun	0:13413ea9a877	689	/* Get channel number from channel instance */
ganlikun	0:13413ea9a877	690	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	691
ganlikun	0:13413ea9a877	692	/* Get timeout */
ganlikun	0:13413ea9a877	693	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	694
ganlikun	0:13413ea9a877	695	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	696	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
ganlikun	0:13413ea9a877	697	{
ganlikun	0:13413ea9a877	698	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	699
ganlikun	0:13413ea9a877	700	/* Check the Timeout */
ganlikun	0:13413ea9a877	701	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
ganlikun	0:13413ea9a877	702	{
ganlikun	0:13413ea9a877	703	/* Set timeout status */
ganlikun	0:13413ea9a877	704	status = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	705	break;
ganlikun	0:13413ea9a877	706	}
ganlikun	0:13413ea9a877	707	}
ganlikun	0:13413ea9a877	708	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	709
ganlikun	0:13413ea9a877	710	if(status == HAL_OK)
ganlikun	0:13413ea9a877	711	{
ganlikun	0:13413ea9a877	712	/* Start clock absence detection */
ganlikun	0:13413ea9a877	713	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
ganlikun	0:13413ea9a877	714	}
ganlikun	0:13413ea9a877	715	}
ganlikun	0:13413ea9a877	716	/* Return function status */
ganlikun	0:13413ea9a877	717	return status;
ganlikun	0:13413ea9a877	718	}
ganlikun	0:13413ea9a877	719
ganlikun	0:13413ea9a877	720	/**
ganlikun	0:13413ea9a877	721	* @brief This function allows to poll for the clock absence detection.
ganlikun	0:13413ea9a877	722	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	723	* @param Timeout : Timeout value in milliseconds.
ganlikun	0:13413ea9a877	724	* @retval HAL status
ganlikun	0:13413ea9a877	725	*/
ganlikun	0:13413ea9a877	726	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
ganlikun	0:13413ea9a877	727	uint32_t Timeout)
ganlikun	0:13413ea9a877	728	{
ganlikun	0:13413ea9a877	729	uint32_t tickstart;
ganlikun	0:13413ea9a877	730	uint32_t channel;
ganlikun	0:13413ea9a877	731	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	732	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	733	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	734
ganlikun	0:13413ea9a877	735	/* Check parameters */
ganlikun	0:13413ea9a877	736	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	737
ganlikun	0:13413ea9a877	738	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	739	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	740	{
ganlikun	0:13413ea9a877	741	/* Return error status */
ganlikun	0:13413ea9a877	742	return HAL_ERROR;
ganlikun	0:13413ea9a877	743	}
ganlikun	0:13413ea9a877	744	else
ganlikun	0:13413ea9a877	745	{
ganlikun	0:13413ea9a877	746	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	747
ganlikun	0:13413ea9a877	748	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	749	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	750	{
ganlikun	0:13413ea9a877	751	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	752	}
ganlikun	0:13413ea9a877	753	else
ganlikun	0:13413ea9a877	754	{
ganlikun	0:13413ea9a877	755	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	756	}
ganlikun	0:13413ea9a877	757
ganlikun	0:13413ea9a877	758	/* Get channel number from channel instance */
ganlikun	0:13413ea9a877	759	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	760
ganlikun	0:13413ea9a877	761	/* Get timeout */
ganlikun	0:13413ea9a877	762	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	763
ganlikun	0:13413ea9a877	764	/* Wait clock absence detection */
ganlikun	0:13413ea9a877	765	while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) == 0U)
ganlikun	0:13413ea9a877	766	{
ganlikun	0:13413ea9a877	767	/* Check the Timeout */
ganlikun	0:13413ea9a877	768	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	769	{
ganlikun	0:13413ea9a877	770	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
ganlikun	0:13413ea9a877	771	{
ganlikun	0:13413ea9a877	772	/* Return timeout status */
ganlikun	0:13413ea9a877	773	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	774	}
ganlikun	0:13413ea9a877	775	}
ganlikun	0:13413ea9a877	776	}
ganlikun	0:13413ea9a877	777
ganlikun	0:13413ea9a877	778	/* Clear clock absence detection flag */
ganlikun	0:13413ea9a877	779	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	780	#else
ganlikun	0:13413ea9a877	781	/* Get channel number from channel instance */
ganlikun	0:13413ea9a877	782	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	783
ganlikun	0:13413ea9a877	784	/* Get timeout */
ganlikun	0:13413ea9a877	785	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	786
ganlikun	0:13413ea9a877	787	/* Wait clock absence detection */
ganlikun	0:13413ea9a877	788	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) == 0U)
ganlikun	0:13413ea9a877	789	{
ganlikun	0:13413ea9a877	790	/* Check the Timeout */
ganlikun	0:13413ea9a877	791	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	792	{
ganlikun	0:13413ea9a877	793	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
ganlikun	0:13413ea9a877	794	{
ganlikun	0:13413ea9a877	795	/* Return timeout status */
ganlikun	0:13413ea9a877	796	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	797	}
ganlikun	0:13413ea9a877	798	}
ganlikun	0:13413ea9a877	799	}
ganlikun	0:13413ea9a877	800
ganlikun	0:13413ea9a877	801	/* Clear clock absence detection flag */
ganlikun	0:13413ea9a877	802	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	803	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	804	/* Return function status */
ganlikun	0:13413ea9a877	805	return HAL_OK;
ganlikun	0:13413ea9a877	806	}
ganlikun	0:13413ea9a877	807	}
ganlikun	0:13413ea9a877	808
ganlikun	0:13413ea9a877	809	/**
ganlikun	0:13413ea9a877	810	* @brief This function allows to stop clock absence detection in polling mode.
ganlikun	0:13413ea9a877	811	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	812	* @retval HAL status
ganlikun	0:13413ea9a877	813	*/
ganlikun	0:13413ea9a877	814	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	815	{
ganlikun	0:13413ea9a877	816	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	817	uint32_t channel;
ganlikun	0:13413ea9a877	818	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	819	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	820	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	821
ganlikun	0:13413ea9a877	822	/* Check parameters */
ganlikun	0:13413ea9a877	823	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	824
ganlikun	0:13413ea9a877	825	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	826	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	827	{
ganlikun	0:13413ea9a877	828	/* Return error status */
ganlikun	0:13413ea9a877	829	status = HAL_ERROR;
ganlikun	0:13413ea9a877	830	}
ganlikun	0:13413ea9a877	831	else
ganlikun	0:13413ea9a877	832	{
ganlikun	0:13413ea9a877	833	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	834
ganlikun	0:13413ea9a877	835	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	836	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	837	{
ganlikun	0:13413ea9a877	838	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	839	}
ganlikun	0:13413ea9a877	840	else
ganlikun	0:13413ea9a877	841	{
ganlikun	0:13413ea9a877	842	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	843	}
ganlikun	0:13413ea9a877	844
ganlikun	0:13413ea9a877	845	/* Stop clock absence detection */
ganlikun	0:13413ea9a877	846	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
ganlikun	0:13413ea9a877	847
ganlikun	0:13413ea9a877	848	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	849	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	850	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	851
ganlikun	0:13413ea9a877	852	#else
ganlikun	0:13413ea9a877	853	/* Stop clock absence detection */
ganlikun	0:13413ea9a877	854	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
ganlikun	0:13413ea9a877	855
ganlikun	0:13413ea9a877	856	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	857	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	858	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	859	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	860	}
ganlikun	0:13413ea9a877	861	/* Return function status */
ganlikun	0:13413ea9a877	862	return status;
ganlikun	0:13413ea9a877	863	}
ganlikun	0:13413ea9a877	864
ganlikun	0:13413ea9a877	865	/**
ganlikun	0:13413ea9a877	866	* @brief This function allows to start clock absence detection in interrupt mode.
ganlikun	0:13413ea9a877	867	* @note Same mode has to be used for all channels.
ganlikun	0:13413ea9a877	868	* @note If clock is not available on this channel during 5 seconds,
ganlikun	0:13413ea9a877	869	* clock absence detection will not be activated and function
ganlikun	0:13413ea9a877	870	* will return HAL_TIMEOUT error.
ganlikun	0:13413ea9a877	871	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	872	* @retval HAL status
ganlikun	0:13413ea9a877	873	*/
ganlikun	0:13413ea9a877	874	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	875	{
ganlikun	0:13413ea9a877	876	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	877	uint32_t channel;
ganlikun	0:13413ea9a877	878	uint32_t tickstart;
ganlikun	0:13413ea9a877	879	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	880	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	881	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	882
ganlikun	0:13413ea9a877	883	/* Check parameters */
ganlikun	0:13413ea9a877	884	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	885
ganlikun	0:13413ea9a877	886	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	887	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	888	{
ganlikun	0:13413ea9a877	889	/* Return error status */
ganlikun	0:13413ea9a877	890	status = HAL_ERROR;
ganlikun	0:13413ea9a877	891	}
ganlikun	0:13413ea9a877	892	else
ganlikun	0:13413ea9a877	893	{
ganlikun	0:13413ea9a877	894	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	895
ganlikun	0:13413ea9a877	896	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	897	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	898	{
ganlikun	0:13413ea9a877	899	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	900	}
ganlikun	0:13413ea9a877	901	else
ganlikun	0:13413ea9a877	902	{
ganlikun	0:13413ea9a877	903	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	904	}
ganlikun	0:13413ea9a877	905
ganlikun	0:13413ea9a877	906	/* Get channel number from channel instance */
ganlikun	0:13413ea9a877	907	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	908
ganlikun	0:13413ea9a877	909	/* Get timeout */
ganlikun	0:13413ea9a877	910	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	911
ganlikun	0:13413ea9a877	912	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	913	while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
ganlikun	0:13413ea9a877	914	{
ganlikun	0:13413ea9a877	915	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	916
ganlikun	0:13413ea9a877	917	/* Check the Timeout */
ganlikun	0:13413ea9a877	918	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
ganlikun	0:13413ea9a877	919	{
ganlikun	0:13413ea9a877	920	/* Set timeout status */
ganlikun	0:13413ea9a877	921	status = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	922	break;
ganlikun	0:13413ea9a877	923	}
ganlikun	0:13413ea9a877	924	}
ganlikun	0:13413ea9a877	925
ganlikun	0:13413ea9a877	926	if(status == HAL_OK)
ganlikun	0:13413ea9a877	927	{
ganlikun	0:13413ea9a877	928	/* Activate clock absence detection interrupt */
ganlikun	0:13413ea9a877	929	filter0Instance->FLTCR2 \|= DFSDM_FLTCR2_CKABIE;
ganlikun	0:13413ea9a877	930
ganlikun	0:13413ea9a877	931	/* Start clock absence detection */
ganlikun	0:13413ea9a877	932	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
ganlikun	0:13413ea9a877	933	}
ganlikun	0:13413ea9a877	934	#else
ganlikun	0:13413ea9a877	935	/* Get channel number from channel instance */
ganlikun	0:13413ea9a877	936	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	937
ganlikun	0:13413ea9a877	938	/* Get timeout */
ganlikun	0:13413ea9a877	939	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	940
ganlikun	0:13413ea9a877	941	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	942	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
ganlikun	0:13413ea9a877	943	{
ganlikun	0:13413ea9a877	944	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	945
ganlikun	0:13413ea9a877	946	/* Check the Timeout */
ganlikun	0:13413ea9a877	947	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
ganlikun	0:13413ea9a877	948	{
ganlikun	0:13413ea9a877	949	/* Set timeout status */
ganlikun	0:13413ea9a877	950	status = HAL_TIMEOUT;
ganlikun	0:13413ea9a877	951	break;
ganlikun	0:13413ea9a877	952	}
ganlikun	0:13413ea9a877	953	}
ganlikun	0:13413ea9a877	954
ganlikun	0:13413ea9a877	955	if(status == HAL_OK)
ganlikun	0:13413ea9a877	956	{
ganlikun	0:13413ea9a877	957	/* Activate clock absence detection interrupt */
ganlikun	0:13413ea9a877	958	DFSDM1_Filter0->FLTCR2 \|= DFSDM_FLTCR2_CKABIE;
ganlikun	0:13413ea9a877	959
ganlikun	0:13413ea9a877	960	/* Start clock absence detection */
ganlikun	0:13413ea9a877	961	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
ganlikun	0:13413ea9a877	962	}
ganlikun	0:13413ea9a877	963
ganlikun	0:13413ea9a877	964	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	965	}
ganlikun	0:13413ea9a877	966	/* Return function status */
ganlikun	0:13413ea9a877	967	return status;
ganlikun	0:13413ea9a877	968	}
ganlikun	0:13413ea9a877	969
ganlikun	0:13413ea9a877	970	/**
ganlikun	0:13413ea9a877	971	* @brief Clock absence detection callback.
ganlikun	0:13413ea9a877	972	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	973	* @retval None
ganlikun	0:13413ea9a877	974	*/
ganlikun	0:13413ea9a877	975	__weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	976	{
ganlikun	0:13413ea9a877	977	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	978	UNUSED(hdfsdm_channel);
ganlikun	0:13413ea9a877	979	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	980	the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
ganlikun	0:13413ea9a877	981	*/
ganlikun	0:13413ea9a877	982	}
ganlikun	0:13413ea9a877	983
ganlikun	0:13413ea9a877	984	/**
ganlikun	0:13413ea9a877	985	* @brief This function allows to stop clock absence detection in interrupt mode.
ganlikun	0:13413ea9a877	986	* @note Interrupt will be disabled for all channels
ganlikun	0:13413ea9a877	987	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	988	* @retval HAL status
ganlikun	0:13413ea9a877	989	*/
ganlikun	0:13413ea9a877	990	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	991	{
ganlikun	0:13413ea9a877	992	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	993	uint32_t channel;
ganlikun	0:13413ea9a877	994	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	995	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	996	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	997
ganlikun	0:13413ea9a877	998	/* Check parameters */
ganlikun	0:13413ea9a877	999	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	1000
ganlikun	0:13413ea9a877	1001	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	1002	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	1003	{
ganlikun	0:13413ea9a877	1004	/* Return error status */
ganlikun	0:13413ea9a877	1005	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1006	}
ganlikun	0:13413ea9a877	1007	else
ganlikun	0:13413ea9a877	1008	{
ganlikun	0:13413ea9a877	1009	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1010
ganlikun	0:13413ea9a877	1011	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	1012	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	1013	{
ganlikun	0:13413ea9a877	1014	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	1015	}
ganlikun	0:13413ea9a877	1016	else
ganlikun	0:13413ea9a877	1017	{
ganlikun	0:13413ea9a877	1018	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	1019	}
ganlikun	0:13413ea9a877	1020
ganlikun	0:13413ea9a877	1021	/* Stop clock absence detection */
ganlikun	0:13413ea9a877	1022	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
ganlikun	0:13413ea9a877	1023
ganlikun	0:13413ea9a877	1024	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	1025	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	1026	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	1027
ganlikun	0:13413ea9a877	1028	/* Disable clock absence detection interrupt */
ganlikun	0:13413ea9a877	1029	filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
ganlikun	0:13413ea9a877	1030	#else
ganlikun	0:13413ea9a877	1031
ganlikun	0:13413ea9a877	1032	/* Stop clock absence detection */
ganlikun	0:13413ea9a877	1033	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
ganlikun	0:13413ea9a877	1034
ganlikun	0:13413ea9a877	1035	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	1036	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	1037	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	1038
ganlikun	0:13413ea9a877	1039	/* Disable clock absence detection interrupt */
ganlikun	0:13413ea9a877	1040	DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
ganlikun	0:13413ea9a877	1041	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	1042	}
ganlikun	0:13413ea9a877	1043
ganlikun	0:13413ea9a877	1044	/* Return function status */
ganlikun	0:13413ea9a877	1045	return status;
ganlikun	0:13413ea9a877	1046	}
ganlikun	0:13413ea9a877	1047
ganlikun	0:13413ea9a877	1048	/**
ganlikun	0:13413ea9a877	1049	* @brief This function allows to start short circuit detection in polling mode.
ganlikun	0:13413ea9a877	1050	* @note Same mode has to be used for all channels
ganlikun	0:13413ea9a877	1051	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1052	* @param Threshold : Short circuit detector threshold.
ganlikun	0:13413ea9a877	1053	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
ganlikun	0:13413ea9a877	1054	* @param BreakSignal : Break signals assigned to short circuit event.
ganlikun	0:13413ea9a877	1055	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
ganlikun	0:13413ea9a877	1056	* @retval HAL status
ganlikun	0:13413ea9a877	1057	*/
ganlikun	0:13413ea9a877	1058	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
ganlikun	0:13413ea9a877	1059	uint32_t Threshold,
ganlikun	0:13413ea9a877	1060	uint32_t BreakSignal)
ganlikun	0:13413ea9a877	1061	{
ganlikun	0:13413ea9a877	1062	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1063
ganlikun	0:13413ea9a877	1064	/* Check parameters */
ganlikun	0:13413ea9a877	1065	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	1066	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
ganlikun	0:13413ea9a877	1067	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
ganlikun	0:13413ea9a877	1068
ganlikun	0:13413ea9a877	1069	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	1070	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	1071	{
ganlikun	0:13413ea9a877	1072	/* Return error status */
ganlikun	0:13413ea9a877	1073	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1074	}
ganlikun	0:13413ea9a877	1075	else
ganlikun	0:13413ea9a877	1076	{
ganlikun	0:13413ea9a877	1077	/* Configure threshold and break signals */
ganlikun	0:13413ea9a877	1078	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD \| DFSDM_CHAWSCDR_SCDT);
ganlikun	0:13413ea9a877	1079	hdfsdm_channel->Instance->CHAWSCDR \|= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) \| \
ganlikun	0:13413ea9a877	1080	Threshold);
ganlikun	0:13413ea9a877	1081
ganlikun	0:13413ea9a877	1082	/* Start short circuit detection */
ganlikun	0:13413ea9a877	1083	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
ganlikun	0:13413ea9a877	1084	}
ganlikun	0:13413ea9a877	1085	/* Return function status */
ganlikun	0:13413ea9a877	1086	return status;
ganlikun	0:13413ea9a877	1087	}
ganlikun	0:13413ea9a877	1088
ganlikun	0:13413ea9a877	1089	/**
ganlikun	0:13413ea9a877	1090	* @brief This function allows to poll for the short circuit detection.
ganlikun	0:13413ea9a877	1091	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1092	* @param Timeout : Timeout value in milliseconds.
ganlikun	0:13413ea9a877	1093	* @retval HAL status
ganlikun	0:13413ea9a877	1094	*/
ganlikun	0:13413ea9a877	1095	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
ganlikun	0:13413ea9a877	1096	uint32_t Timeout)
ganlikun	0:13413ea9a877	1097	{
ganlikun	0:13413ea9a877	1098	uint32_t tickstart;
ganlikun	0:13413ea9a877	1099	uint32_t channel;
ganlikun	0:13413ea9a877	1100	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1101	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	1102	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	1103
ganlikun	0:13413ea9a877	1104	/* Check parameters */
ganlikun	0:13413ea9a877	1105	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	1106
ganlikun	0:13413ea9a877	1107	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	1108	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	1109	{
ganlikun	0:13413ea9a877	1110	/* Return error status */
ganlikun	0:13413ea9a877	1111	return HAL_ERROR;
ganlikun	0:13413ea9a877	1112	}
ganlikun	0:13413ea9a877	1113	else
ganlikun	0:13413ea9a877	1114	{
ganlikun	0:13413ea9a877	1115	/* Get channel number from channel instance */
ganlikun	0:13413ea9a877	1116	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	1117
ganlikun	0:13413ea9a877	1118	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1119	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	1120	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	1121	{
ganlikun	0:13413ea9a877	1122	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	1123	}
ganlikun	0:13413ea9a877	1124	else
ganlikun	0:13413ea9a877	1125	{
ganlikun	0:13413ea9a877	1126	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	1127	}
ganlikun	0:13413ea9a877	1128
ganlikun	0:13413ea9a877	1129	/* Get timeout */
ganlikun	0:13413ea9a877	1130	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1131
ganlikun	0:13413ea9a877	1132	/* Wait short circuit detection */
ganlikun	0:13413ea9a877	1133	while(((filter0Instance->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0U)
ganlikun	0:13413ea9a877	1134	{
ganlikun	0:13413ea9a877	1135	/* Check the Timeout */
ganlikun	0:13413ea9a877	1136	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	1137	{
ganlikun	0:13413ea9a877	1138	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
ganlikun	0:13413ea9a877	1139	{
ganlikun	0:13413ea9a877	1140	/* Return timeout status */
ganlikun	0:13413ea9a877	1141	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1142	}
ganlikun	0:13413ea9a877	1143	}
ganlikun	0:13413ea9a877	1144	}
ganlikun	0:13413ea9a877	1145
ganlikun	0:13413ea9a877	1146	/* Clear short circuit detection flag */
ganlikun	0:13413ea9a877	1147	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	1148
ganlikun	0:13413ea9a877	1149	#else
ganlikun	0:13413ea9a877	1150	/* Get timeout */
ganlikun	0:13413ea9a877	1151	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1152
ganlikun	0:13413ea9a877	1153	/* Wait short circuit detection */
ganlikun	0:13413ea9a877	1154	while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0U)
ganlikun	0:13413ea9a877	1155	{
ganlikun	0:13413ea9a877	1156	/* Check the Timeout */
ganlikun	0:13413ea9a877	1157	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	1158	{
ganlikun	0:13413ea9a877	1159	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
ganlikun	0:13413ea9a877	1160	{
ganlikun	0:13413ea9a877	1161	/* Return timeout status */
ganlikun	0:13413ea9a877	1162	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1163	}
ganlikun	0:13413ea9a877	1164	}
ganlikun	0:13413ea9a877	1165	}
ganlikun	0:13413ea9a877	1166
ganlikun	0:13413ea9a877	1167	/* Clear short circuit detection flag */
ganlikun	0:13413ea9a877	1168	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	1169	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	1170
ganlikun	0:13413ea9a877	1171	/* Return function status */
ganlikun	0:13413ea9a877	1172	return HAL_OK;
ganlikun	0:13413ea9a877	1173	}
ganlikun	0:13413ea9a877	1174	}
ganlikun	0:13413ea9a877	1175
ganlikun	0:13413ea9a877	1176	/**
ganlikun	0:13413ea9a877	1177	* @brief This function allows to stop short circuit detection in polling mode.
ganlikun	0:13413ea9a877	1178	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1179	* @retval HAL status
ganlikun	0:13413ea9a877	1180	*/
ganlikun	0:13413ea9a877	1181	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	1182	{
ganlikun	0:13413ea9a877	1183	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1184	uint32_t channel;
ganlikun	0:13413ea9a877	1185	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1186	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	1187	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	1188
ganlikun	0:13413ea9a877	1189	/* Check parameters */
ganlikun	0:13413ea9a877	1190	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	1191
ganlikun	0:13413ea9a877	1192	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	1193	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	1194	{
ganlikun	0:13413ea9a877	1195	/* Return error status */
ganlikun	0:13413ea9a877	1196	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1197	}
ganlikun	0:13413ea9a877	1198	else
ganlikun	0:13413ea9a877	1199	{
ganlikun	0:13413ea9a877	1200	/* Stop short circuit detection */
ganlikun	0:13413ea9a877	1201	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
ganlikun	0:13413ea9a877	1202
ganlikun	0:13413ea9a877	1203	/* Clear short circuit detection flag */
ganlikun	0:13413ea9a877	1204	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	1205
ganlikun	0:13413ea9a877	1206	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1207	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	1208	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	1209	{
ganlikun	0:13413ea9a877	1210	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	1211	}
ganlikun	0:13413ea9a877	1212	else
ganlikun	0:13413ea9a877	1213	{
ganlikun	0:13413ea9a877	1214	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	1215	}
ganlikun	0:13413ea9a877	1216
ganlikun	0:13413ea9a877	1217	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	1218	#else
ganlikun	0:13413ea9a877	1219	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	1220	#endif /* DFSDM2_Channel0*/
ganlikun	0:13413ea9a877	1221	}
ganlikun	0:13413ea9a877	1222	/* Return function status */
ganlikun	0:13413ea9a877	1223	return status;
ganlikun	0:13413ea9a877	1224	}
ganlikun	0:13413ea9a877	1225
ganlikun	0:13413ea9a877	1226	/**
ganlikun	0:13413ea9a877	1227	* @brief This function allows to start short circuit detection in interrupt mode.
ganlikun	0:13413ea9a877	1228	* @note Same mode has to be used for all channels
ganlikun	0:13413ea9a877	1229	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1230	* @param Threshold : Short circuit detector threshold.
ganlikun	0:13413ea9a877	1231	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
ganlikun	0:13413ea9a877	1232	* @param BreakSignal : Break signals assigned to short circuit event.
ganlikun	0:13413ea9a877	1233	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
ganlikun	0:13413ea9a877	1234	* @retval HAL status
ganlikun	0:13413ea9a877	1235	*/
ganlikun	0:13413ea9a877	1236	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
ganlikun	0:13413ea9a877	1237	uint32_t Threshold,
ganlikun	0:13413ea9a877	1238	uint32_t BreakSignal)
ganlikun	0:13413ea9a877	1239	{
ganlikun	0:13413ea9a877	1240	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1241	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1242	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	1243	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	1244
ganlikun	0:13413ea9a877	1245	/* Check parameters */
ganlikun	0:13413ea9a877	1246	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	1247	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
ganlikun	0:13413ea9a877	1248	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
ganlikun	0:13413ea9a877	1249
ganlikun	0:13413ea9a877	1250	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	1251	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	1252	{
ganlikun	0:13413ea9a877	1253	/* Return error status */
ganlikun	0:13413ea9a877	1254	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1255	}
ganlikun	0:13413ea9a877	1256	else
ganlikun	0:13413ea9a877	1257	{
ganlikun	0:13413ea9a877	1258	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1259	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	1260	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	1261	{
ganlikun	0:13413ea9a877	1262	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	1263	}
ganlikun	0:13413ea9a877	1264	else
ganlikun	0:13413ea9a877	1265	{
ganlikun	0:13413ea9a877	1266	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	1267	}
ganlikun	0:13413ea9a877	1268	/* Activate short circuit detection interrupt */
ganlikun	0:13413ea9a877	1269	filter0Instance->FLTCR2 \|= DFSDM_FLTCR2_SCDIE;
ganlikun	0:13413ea9a877	1270	#else
ganlikun	0:13413ea9a877	1271	/* Activate short circuit detection interrupt */
ganlikun	0:13413ea9a877	1272	DFSDM1_Filter0->FLTCR2 \|= DFSDM_FLTCR2_SCDIE;
ganlikun	0:13413ea9a877	1273	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	1274
ganlikun	0:13413ea9a877	1275	/* Configure threshold and break signals */
ganlikun	0:13413ea9a877	1276	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD \| DFSDM_CHAWSCDR_SCDT);
ganlikun	0:13413ea9a877	1277	hdfsdm_channel->Instance->CHAWSCDR \|= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) \| \
ganlikun	0:13413ea9a877	1278	Threshold);
ganlikun	0:13413ea9a877	1279
ganlikun	0:13413ea9a877	1280	/* Start short circuit detection */
ganlikun	0:13413ea9a877	1281	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
ganlikun	0:13413ea9a877	1282	}
ganlikun	0:13413ea9a877	1283	/* Return function status */
ganlikun	0:13413ea9a877	1284	return status;
ganlikun	0:13413ea9a877	1285	}
ganlikun	0:13413ea9a877	1286
ganlikun	0:13413ea9a877	1287	/**
ganlikun	0:13413ea9a877	1288	* @brief Short circuit detection callback.
ganlikun	0:13413ea9a877	1289	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1290	* @retval None
ganlikun	0:13413ea9a877	1291	*/
ganlikun	0:13413ea9a877	1292	__weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	1293	{
ganlikun	0:13413ea9a877	1294	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1295	UNUSED(hdfsdm_channel);
ganlikun	0:13413ea9a877	1296	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1297	the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1298	*/
ganlikun	0:13413ea9a877	1299	}
ganlikun	0:13413ea9a877	1300
ganlikun	0:13413ea9a877	1301	/**
ganlikun	0:13413ea9a877	1302	* @brief This function allows to stop short circuit detection in interrupt mode.
ganlikun	0:13413ea9a877	1303	* @note Interrupt will be disabled for all channels
ganlikun	0:13413ea9a877	1304	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1305	* @retval HAL status
ganlikun	0:13413ea9a877	1306	*/
ganlikun	0:13413ea9a877	1307	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	1308	{
ganlikun	0:13413ea9a877	1309	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1310	uint32_t channel;
ganlikun	0:13413ea9a877	1311	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1312	DFSDM_Filter_TypeDef* filter0Instance;
ganlikun	0:13413ea9a877	1313	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	1314
ganlikun	0:13413ea9a877	1315	/* Check parameters */
ganlikun	0:13413ea9a877	1316	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	1317
ganlikun	0:13413ea9a877	1318	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	1319	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	1320	{
ganlikun	0:13413ea9a877	1321	/* Return error status */
ganlikun	0:13413ea9a877	1322	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1323	}
ganlikun	0:13413ea9a877	1324	else
ganlikun	0:13413ea9a877	1325	{
ganlikun	0:13413ea9a877	1326	/* Stop short circuit detection */
ganlikun	0:13413ea9a877	1327	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
ganlikun	0:13413ea9a877	1328
ganlikun	0:13413ea9a877	1329	/* Clear short circuit detection flag */
ganlikun	0:13413ea9a877	1330	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
ganlikun	0:13413ea9a877	1331	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1332	/* Get channel counter, channel handle table and channel 0 instance */
ganlikun	0:13413ea9a877	1333	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
ganlikun	0:13413ea9a877	1334	{
ganlikun	0:13413ea9a877	1335	filter0Instance = DFSDM1_Filter0;
ganlikun	0:13413ea9a877	1336	}
ganlikun	0:13413ea9a877	1337	else
ganlikun	0:13413ea9a877	1338	{
ganlikun	0:13413ea9a877	1339	filter0Instance = DFSDM2_Filter0;
ganlikun	0:13413ea9a877	1340	}
ganlikun	0:13413ea9a877	1341
ganlikun	0:13413ea9a877	1342	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	1343
ganlikun	0:13413ea9a877	1344	/* Disable short circuit detection interrupt */
ganlikun	0:13413ea9a877	1345	filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
ganlikun	0:13413ea9a877	1346	#else
ganlikun	0:13413ea9a877	1347	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	1348
ganlikun	0:13413ea9a877	1349	/* Disable short circuit detection interrupt */
ganlikun	0:13413ea9a877	1350	DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
ganlikun	0:13413ea9a877	1351	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	1352	}
ganlikun	0:13413ea9a877	1353	/* Return function status */
ganlikun	0:13413ea9a877	1354	return status;
ganlikun	0:13413ea9a877	1355	}
ganlikun	0:13413ea9a877	1356
ganlikun	0:13413ea9a877	1357	/**
ganlikun	0:13413ea9a877	1358	* @brief This function allows to get channel analog watchdog value.
ganlikun	0:13413ea9a877	1359	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1360	* @retval Channel analog watchdog value.
ganlikun	0:13413ea9a877	1361	*/
ganlikun	0:13413ea9a877	1362	int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	1363	{
ganlikun	0:13413ea9a877	1364	return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
ganlikun	0:13413ea9a877	1365	}
ganlikun	0:13413ea9a877	1366
ganlikun	0:13413ea9a877	1367	/**
ganlikun	0:13413ea9a877	1368	* @brief This function allows to modify channel offset value.
ganlikun	0:13413ea9a877	1369	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1370	* @param Offset : DFSDM channel offset.
ganlikun	0:13413ea9a877	1371	* This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
ganlikun	0:13413ea9a877	1372	* @retval HAL status.
ganlikun	0:13413ea9a877	1373	*/
ganlikun	0:13413ea9a877	1374	HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
ganlikun	0:13413ea9a877	1375	int32_t Offset)
ganlikun	0:13413ea9a877	1376	{
ganlikun	0:13413ea9a877	1377	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1378
ganlikun	0:13413ea9a877	1379	/* Check parameters */
ganlikun	0:13413ea9a877	1380	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
ganlikun	0:13413ea9a877	1381	assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
ganlikun	0:13413ea9a877	1382
ganlikun	0:13413ea9a877	1383	/* Check DFSDM channel state */
ganlikun	0:13413ea9a877	1384	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
ganlikun	0:13413ea9a877	1385	{
ganlikun	0:13413ea9a877	1386	/* Return error status */
ganlikun	0:13413ea9a877	1387	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1388	}
ganlikun	0:13413ea9a877	1389	else
ganlikun	0:13413ea9a877	1390	{
ganlikun	0:13413ea9a877	1391	/* Modify channel offset */
ganlikun	0:13413ea9a877	1392	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
ganlikun	0:13413ea9a877	1393	hdfsdm_channel->Instance->CHCFGR2 \|= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
ganlikun	0:13413ea9a877	1394	}
ganlikun	0:13413ea9a877	1395	/* Return function status */
ganlikun	0:13413ea9a877	1396	return status;
ganlikun	0:13413ea9a877	1397	}
ganlikun	0:13413ea9a877	1398
ganlikun	0:13413ea9a877	1399	/**
ganlikun	0:13413ea9a877	1400	* @}
ganlikun	0:13413ea9a877	1401	*/
ganlikun	0:13413ea9a877	1402
ganlikun	0:13413ea9a877	1403	/** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
ganlikun	0:13413ea9a877	1404	* @brief Channel state function
ganlikun	0:13413ea9a877	1405	*
ganlikun	0:13413ea9a877	1406	@verbatim
ganlikun	0:13413ea9a877	1407	==============================================================================
ganlikun	0:13413ea9a877	1408	##### Channel state function #####
ganlikun	0:13413ea9a877	1409	==============================================================================
ganlikun	0:13413ea9a877	1410	[..] This section provides function allowing to:
ganlikun	0:13413ea9a877	1411	(+) Get channel handle state.
ganlikun	0:13413ea9a877	1412	@endverbatim
ganlikun	0:13413ea9a877	1413	* @{
ganlikun	0:13413ea9a877	1414	*/
ganlikun	0:13413ea9a877	1415
ganlikun	0:13413ea9a877	1416	/**
ganlikun	0:13413ea9a877	1417	* @brief This function allows to get the current DFSDM channel handle state.
ganlikun	0:13413ea9a877	1418	* @param hdfsdm_channel : DFSDM channel handle.
ganlikun	0:13413ea9a877	1419	* @retval DFSDM channel state.
ganlikun	0:13413ea9a877	1420	*/
ganlikun	0:13413ea9a877	1421	HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
ganlikun	0:13413ea9a877	1422	{
ganlikun	0:13413ea9a877	1423	/* Return DFSDM channel handle state */
ganlikun	0:13413ea9a877	1424	return hdfsdm_channel->State;
ganlikun	0:13413ea9a877	1425	}
ganlikun	0:13413ea9a877	1426
ganlikun	0:13413ea9a877	1427	/**
ganlikun	0:13413ea9a877	1428	* @}
ganlikun	0:13413ea9a877	1429	*/
ganlikun	0:13413ea9a877	1430
ganlikun	0:13413ea9a877	1431	/** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
ganlikun	0:13413ea9a877	1432	* @brief Filter initialization and de-initialization functions
ganlikun	0:13413ea9a877	1433	*
ganlikun	0:13413ea9a877	1434	@verbatim
ganlikun	0:13413ea9a877	1435	==============================================================================
ganlikun	0:13413ea9a877	1436	##### Filter initialization and de-initialization functions #####
ganlikun	0:13413ea9a877	1437	==============================================================================
ganlikun	0:13413ea9a877	1438	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	1439	(+) Initialize the DFSDM filter.
ganlikun	0:13413ea9a877	1440	(+) De-initialize the DFSDM filter.
ganlikun	0:13413ea9a877	1441	@endverbatim
ganlikun	0:13413ea9a877	1442	* @{
ganlikun	0:13413ea9a877	1443	*/
ganlikun	0:13413ea9a877	1444
ganlikun	0:13413ea9a877	1445	/**
ganlikun	0:13413ea9a877	1446	* @brief Initialize the DFSDM filter according to the specified parameters
ganlikun	0:13413ea9a877	1447	* in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
ganlikun	0:13413ea9a877	1448	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1449	* @retval HAL status.
ganlikun	0:13413ea9a877	1450	*/
ganlikun	0:13413ea9a877	1451	HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1452	{
ganlikun	0:13413ea9a877	1453	/* Check DFSDM Channel handle */
ganlikun	0:13413ea9a877	1454	if(hdfsdm_filter == NULL)
ganlikun	0:13413ea9a877	1455	{
ganlikun	0:13413ea9a877	1456	return HAL_ERROR;
ganlikun	0:13413ea9a877	1457	}
ganlikun	0:13413ea9a877	1458
ganlikun	0:13413ea9a877	1459	/* Check parameters */
ganlikun	0:13413ea9a877	1460	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1461	assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
ganlikun	0:13413ea9a877	1462	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
ganlikun	0:13413ea9a877	1463	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
ganlikun	0:13413ea9a877	1464	assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
ganlikun	0:13413ea9a877	1465	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
ganlikun	0:13413ea9a877	1466	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
ganlikun	0:13413ea9a877	1467	assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
ganlikun	0:13413ea9a877	1468	assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
ganlikun	0:13413ea9a877	1469	assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
ganlikun	0:13413ea9a877	1470
ganlikun	0:13413ea9a877	1471	/* Check parameters compatibility */
ganlikun	0:13413ea9a877	1472	if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
ganlikun	0:13413ea9a877	1473	((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) \|\|
ganlikun	0:13413ea9a877	1474	(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
ganlikun	0:13413ea9a877	1475	{
ganlikun	0:13413ea9a877	1476	return HAL_ERROR;
ganlikun	0:13413ea9a877	1477	}
ganlikun	0:13413ea9a877	1478	#if defined (DFSDM2_Channel0)
ganlikun	0:13413ea9a877	1479	if((hdfsdm_filter->Instance == DFSDM2_Filter0) &&
ganlikun	0:13413ea9a877	1480	((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) \|\|
ganlikun	0:13413ea9a877	1481	(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
ganlikun	0:13413ea9a877	1482	{
ganlikun	0:13413ea9a877	1483	return HAL_ERROR;
ganlikun	0:13413ea9a877	1484	}
ganlikun	0:13413ea9a877	1485	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	1486
ganlikun	0:13413ea9a877	1487	/* Initialize DFSDM filter variables with default values */
ganlikun	0:13413ea9a877	1488	hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
ganlikun	0:13413ea9a877	1489	hdfsdm_filter->InjectedChannelsNbr = 1U;
ganlikun	0:13413ea9a877	1490	hdfsdm_filter->InjConvRemaining = 1U;
ganlikun	0:13413ea9a877	1491	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
ganlikun	0:13413ea9a877	1492
ganlikun	0:13413ea9a877	1493	/* Call MSP init function */
ganlikun	0:13413ea9a877	1494	HAL_DFSDM_FilterMspInit(hdfsdm_filter);
ganlikun	0:13413ea9a877	1495
ganlikun	0:13413ea9a877	1496	/* Set regular parameters */
ganlikun	0:13413ea9a877	1497	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
ganlikun	0:13413ea9a877	1498	if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
ganlikun	0:13413ea9a877	1499	{
ganlikun	0:13413ea9a877	1500	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_FAST;
ganlikun	0:13413ea9a877	1501	}
ganlikun	0:13413ea9a877	1502	else
ganlikun	0:13413ea9a877	1503	{
ganlikun	0:13413ea9a877	1504	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
ganlikun	0:13413ea9a877	1505	}
ganlikun	0:13413ea9a877	1506
ganlikun	0:13413ea9a877	1507	if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
ganlikun	0:13413ea9a877	1508	{
ganlikun	0:13413ea9a877	1509	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RDMAEN;
ganlikun	0:13413ea9a877	1510	}
ganlikun	0:13413ea9a877	1511	else
ganlikun	0:13413ea9a877	1512	{
ganlikun	0:13413ea9a877	1513	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
ganlikun	0:13413ea9a877	1514	}
ganlikun	0:13413ea9a877	1515
ganlikun	0:13413ea9a877	1516	/* Set injected parameters */
ganlikun	0:13413ea9a877	1517	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC \| DFSDM_FLTCR1_JEXTEN \| DFSDM_FLTCR1_JEXTSEL);
ganlikun	0:13413ea9a877	1518	if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
ganlikun	0:13413ea9a877	1519	{
ganlikun	0:13413ea9a877	1520	assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
ganlikun	0:13413ea9a877	1521	assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
ganlikun	0:13413ea9a877	1522	hdfsdm_filter->Instance->FLTCR1 \|= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
ganlikun	0:13413ea9a877	1523	}
ganlikun	0:13413ea9a877	1524
ganlikun	0:13413ea9a877	1525	if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
ganlikun	0:13413ea9a877	1526	{
ganlikun	0:13413ea9a877	1527	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSCAN;
ganlikun	0:13413ea9a877	1528	}
ganlikun	0:13413ea9a877	1529	else
ganlikun	0:13413ea9a877	1530	{
ganlikun	0:13413ea9a877	1531	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
ganlikun	0:13413ea9a877	1532	}
ganlikun	0:13413ea9a877	1533
ganlikun	0:13413ea9a877	1534	if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
ganlikun	0:13413ea9a877	1535	{
ganlikun	0:13413ea9a877	1536	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JDMAEN;
ganlikun	0:13413ea9a877	1537	}
ganlikun	0:13413ea9a877	1538	else
ganlikun	0:13413ea9a877	1539	{
ganlikun	0:13413ea9a877	1540	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
ganlikun	0:13413ea9a877	1541	}
ganlikun	0:13413ea9a877	1542
ganlikun	0:13413ea9a877	1543	/* Set filter parameters */
ganlikun	0:13413ea9a877	1544	hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD \| DFSDM_FLTFCR_FOSR \| DFSDM_FLTFCR_IOSR);
ganlikun	0:13413ea9a877	1545	hdfsdm_filter->Instance->FLTFCR \|= (hdfsdm_filter->Init.FilterParam.SincOrder \|
ganlikun	0:13413ea9a877	1546	((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_OFFSET) \|
ganlikun	0:13413ea9a877	1547	(hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
ganlikun	0:13413ea9a877	1548
ganlikun	0:13413ea9a877	1549	/* Store regular and injected triggers and injected scan mode*/
ganlikun	0:13413ea9a877	1550	hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
ganlikun	0:13413ea9a877	1551	hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
ganlikun	0:13413ea9a877	1552	hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
ganlikun	0:13413ea9a877	1553	hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
ganlikun	0:13413ea9a877	1554
ganlikun	0:13413ea9a877	1555	/* Enable DFSDM filter */
ganlikun	0:13413ea9a877	1556	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
ganlikun	0:13413ea9a877	1557
ganlikun	0:13413ea9a877	1558	/* Set DFSDM filter to ready state */
ganlikun	0:13413ea9a877	1559	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
ganlikun	0:13413ea9a877	1560
ganlikun	0:13413ea9a877	1561	return HAL_OK;
ganlikun	0:13413ea9a877	1562	}
ganlikun	0:13413ea9a877	1563
ganlikun	0:13413ea9a877	1564	/**
ganlikun	0:13413ea9a877	1565	* @brief De-initializes the DFSDM filter.
ganlikun	0:13413ea9a877	1566	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1567	* @retval HAL status.
ganlikun	0:13413ea9a877	1568	*/
ganlikun	0:13413ea9a877	1569	HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1570	{
ganlikun	0:13413ea9a877	1571	/* Check DFSDM filter handle */
ganlikun	0:13413ea9a877	1572	if(hdfsdm_filter == NULL)
ganlikun	0:13413ea9a877	1573	{
ganlikun	0:13413ea9a877	1574	return HAL_ERROR;
ganlikun	0:13413ea9a877	1575	}
ganlikun	0:13413ea9a877	1576
ganlikun	0:13413ea9a877	1577	/* Check parameters */
ganlikun	0:13413ea9a877	1578	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1579
ganlikun	0:13413ea9a877	1580	/* Disable the DFSDM filter */
ganlikun	0:13413ea9a877	1581	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
ganlikun	0:13413ea9a877	1582
ganlikun	0:13413ea9a877	1583	/* Call MSP deinit function */
ganlikun	0:13413ea9a877	1584	HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
ganlikun	0:13413ea9a877	1585
ganlikun	0:13413ea9a877	1586	/* Set DFSDM filter in reset state */
ganlikun	0:13413ea9a877	1587	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
ganlikun	0:13413ea9a877	1588
ganlikun	0:13413ea9a877	1589	return HAL_OK;
ganlikun	0:13413ea9a877	1590	}
ganlikun	0:13413ea9a877	1591
ganlikun	0:13413ea9a877	1592	/**
ganlikun	0:13413ea9a877	1593	* @brief Initializes the DFSDM filter MSP.
ganlikun	0:13413ea9a877	1594	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1595	* @retval None
ganlikun	0:13413ea9a877	1596	*/
ganlikun	0:13413ea9a877	1597	__weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1598	{
ganlikun	0:13413ea9a877	1599	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1600	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	1601	/* NOTE : This function should not be modified, when the function is needed,
ganlikun	0:13413ea9a877	1602	the HAL_DFSDM_FilterMspInit could be implemented in the user file.
ganlikun	0:13413ea9a877	1603	*/
ganlikun	0:13413ea9a877	1604	}
ganlikun	0:13413ea9a877	1605
ganlikun	0:13413ea9a877	1606	/**
ganlikun	0:13413ea9a877	1607	* @brief De-initializes the DFSDM filter MSP.
ganlikun	0:13413ea9a877	1608	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1609	* @retval None
ganlikun	0:13413ea9a877	1610	*/
ganlikun	0:13413ea9a877	1611	__weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1612	{
ganlikun	0:13413ea9a877	1613	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1614	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	1615	/* NOTE : This function should not be modified, when the function is needed,
ganlikun	0:13413ea9a877	1616	the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
ganlikun	0:13413ea9a877	1617	*/
ganlikun	0:13413ea9a877	1618	}
ganlikun	0:13413ea9a877	1619
ganlikun	0:13413ea9a877	1620	/**
ganlikun	0:13413ea9a877	1621	* @}
ganlikun	0:13413ea9a877	1622	*/
ganlikun	0:13413ea9a877	1623
ganlikun	0:13413ea9a877	1624	/** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
ganlikun	0:13413ea9a877	1625	* @brief Filter control functions
ganlikun	0:13413ea9a877	1626	*
ganlikun	0:13413ea9a877	1627	@verbatim
ganlikun	0:13413ea9a877	1628	==============================================================================
ganlikun	0:13413ea9a877	1629	##### Filter control functions #####
ganlikun	0:13413ea9a877	1630	==============================================================================
ganlikun	0:13413ea9a877	1631	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	1632	(+) Select channel and enable/disable continuous mode for regular conversion.
ganlikun	0:13413ea9a877	1633	(+) Select channels for injected conversion.
ganlikun	0:13413ea9a877	1634	@endverbatim
ganlikun	0:13413ea9a877	1635	* @{
ganlikun	0:13413ea9a877	1636	*/
ganlikun	0:13413ea9a877	1637
ganlikun	0:13413ea9a877	1638	/**
ganlikun	0:13413ea9a877	1639	* @brief This function allows to select channel and to enable/disable
ganlikun	0:13413ea9a877	1640	* continuous mode for regular conversion.
ganlikun	0:13413ea9a877	1641	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1642	* @param Channel : Channel for regular conversion.
ganlikun	0:13413ea9a877	1643	* This parameter can be a value of @ref DFSDM_Channel_Selection.
ganlikun	0:13413ea9a877	1644	* @param ContinuousMode : Enable/disable continuous mode for regular conversion.
ganlikun	0:13413ea9a877	1645	* This parameter can be a value of @ref DFSDM_ContinuousMode.
ganlikun	0:13413ea9a877	1646	* @retval HAL status
ganlikun	0:13413ea9a877	1647	*/
ganlikun	0:13413ea9a877	1648	HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	1649	uint32_t Channel,
ganlikun	0:13413ea9a877	1650	uint32_t ContinuousMode)
ganlikun	0:13413ea9a877	1651	{
ganlikun	0:13413ea9a877	1652	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1653
ganlikun	0:13413ea9a877	1654	/* Check parameters */
ganlikun	0:13413ea9a877	1655	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1656	assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
ganlikun	0:13413ea9a877	1657	assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
ganlikun	0:13413ea9a877	1658
ganlikun	0:13413ea9a877	1659	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1660	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
ganlikun	0:13413ea9a877	1661	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
ganlikun	0:13413ea9a877	1662	{
ganlikun	0:13413ea9a877	1663	/* Configure channel and continuous mode for regular conversion */
ganlikun	0:13413ea9a877	1664	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH \| DFSDM_FLTCR1_RCONT);
ganlikun	0:13413ea9a877	1665	if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
ganlikun	0:13413ea9a877	1666	{
ganlikun	0:13413ea9a877	1667	hdfsdm_filter->Instance->FLTCR1 \|= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) \|
ganlikun	0:13413ea9a877	1668	DFSDM_FLTCR1_RCONT);
ganlikun	0:13413ea9a877	1669	}
ganlikun	0:13413ea9a877	1670	else
ganlikun	0:13413ea9a877	1671	{
ganlikun	0:13413ea9a877	1672	hdfsdm_filter->Instance->FLTCR1 \|= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
ganlikun	0:13413ea9a877	1673	}
ganlikun	0:13413ea9a877	1674	/* Store continuous mode information */
ganlikun	0:13413ea9a877	1675	hdfsdm_filter->RegularContMode = ContinuousMode;
ganlikun	0:13413ea9a877	1676	}
ganlikun	0:13413ea9a877	1677	else
ganlikun	0:13413ea9a877	1678	{
ganlikun	0:13413ea9a877	1679	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1680	}
ganlikun	0:13413ea9a877	1681
ganlikun	0:13413ea9a877	1682	/* Return function status */
ganlikun	0:13413ea9a877	1683	return status;
ganlikun	0:13413ea9a877	1684	}
ganlikun	0:13413ea9a877	1685
ganlikun	0:13413ea9a877	1686	/**
ganlikun	0:13413ea9a877	1687	* @brief This function allows to select channels for injected conversion.
ganlikun	0:13413ea9a877	1688	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1689	* @param Channel : Channels for injected conversion.
ganlikun	0:13413ea9a877	1690	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
ganlikun	0:13413ea9a877	1691	* @retval HAL status
ganlikun	0:13413ea9a877	1692	*/
ganlikun	0:13413ea9a877	1693	HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	1694	uint32_t Channel)
ganlikun	0:13413ea9a877	1695	{
ganlikun	0:13413ea9a877	1696	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1697
ganlikun	0:13413ea9a877	1698	/* Check parameters */
ganlikun	0:13413ea9a877	1699	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1700	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
ganlikun	0:13413ea9a877	1701
ganlikun	0:13413ea9a877	1702	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1703	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
ganlikun	0:13413ea9a877	1704	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
ganlikun	0:13413ea9a877	1705	{
ganlikun	0:13413ea9a877	1706	/* Configure channel for injected conversion */
ganlikun	0:13413ea9a877	1707	hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
ganlikun	0:13413ea9a877	1708	/* Store number of injected channels */
ganlikun	0:13413ea9a877	1709	hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
ganlikun	0:13413ea9a877	1710	/* Update number of injected channels remaining */
ganlikun	0:13413ea9a877	1711	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
ganlikun	0:13413ea9a877	1712	hdfsdm_filter->InjectedChannelsNbr : 1U;
ganlikun	0:13413ea9a877	1713	}
ganlikun	0:13413ea9a877	1714	else
ganlikun	0:13413ea9a877	1715	{
ganlikun	0:13413ea9a877	1716	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1717	}
ganlikun	0:13413ea9a877	1718	/* Return function status */
ganlikun	0:13413ea9a877	1719	return status;
ganlikun	0:13413ea9a877	1720	}
ganlikun	0:13413ea9a877	1721
ganlikun	0:13413ea9a877	1722	/**
ganlikun	0:13413ea9a877	1723	* @}
ganlikun	0:13413ea9a877	1724	*/
ganlikun	0:13413ea9a877	1725
ganlikun	0:13413ea9a877	1726	/** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
ganlikun	0:13413ea9a877	1727	* @brief Filter operation functions
ganlikun	0:13413ea9a877	1728	*
ganlikun	0:13413ea9a877	1729	@verbatim
ganlikun	0:13413ea9a877	1730	==============================================================================
ganlikun	0:13413ea9a877	1731	##### Filter operation functions #####
ganlikun	0:13413ea9a877	1732	==============================================================================
ganlikun	0:13413ea9a877	1733	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	1734	(+) Start conversion of regular/injected channel.
ganlikun	0:13413ea9a877	1735	(+) Poll for the end of regular/injected conversion.
ganlikun	0:13413ea9a877	1736	(+) Stop conversion of regular/injected channel.
ganlikun	0:13413ea9a877	1737	(+) Start conversion of regular/injected channel and enable interrupt.
ganlikun	0:13413ea9a877	1738	(+) Call the callback functions at the end of regular/injected conversions.
ganlikun	0:13413ea9a877	1739	(+) Stop conversion of regular/injected channel and disable interrupt.
ganlikun	0:13413ea9a877	1740	(+) Start conversion of regular/injected channel and enable DMA transfer.
ganlikun	0:13413ea9a877	1741	(+) Stop conversion of regular/injected channel and disable DMA transfer.
ganlikun	0:13413ea9a877	1742	(+) Start analog watchdog and enable interrupt.
ganlikun	0:13413ea9a877	1743	(+) Call the callback function when analog watchdog occurs.
ganlikun	0:13413ea9a877	1744	(+) Stop analog watchdog and disable interrupt.
ganlikun	0:13413ea9a877	1745	(+) Start extreme detector.
ganlikun	0:13413ea9a877	1746	(+) Stop extreme detector.
ganlikun	0:13413ea9a877	1747	(+) Get result of regular channel conversion.
ganlikun	0:13413ea9a877	1748	(+) Get result of injected channel conversion.
ganlikun	0:13413ea9a877	1749	(+) Get extreme detector maximum and minimum values.
ganlikun	0:13413ea9a877	1750	(+) Get conversion time.
ganlikun	0:13413ea9a877	1751	(+) Handle DFSDM interrupt request.
ganlikun	0:13413ea9a877	1752	@endverbatim
ganlikun	0:13413ea9a877	1753	* @{
ganlikun	0:13413ea9a877	1754	*/
ganlikun	0:13413ea9a877	1755
ganlikun	0:13413ea9a877	1756	/**
ganlikun	0:13413ea9a877	1757	* @brief This function allows to start regular conversion in polling mode.
ganlikun	0:13413ea9a877	1758	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	1759	* in idle state or if injected conversion is ongoing.
ganlikun	0:13413ea9a877	1760	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1761	* @retval HAL status
ganlikun	0:13413ea9a877	1762	*/
ganlikun	0:13413ea9a877	1763	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1764	{
ganlikun	0:13413ea9a877	1765	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1766
ganlikun	0:13413ea9a877	1767	/* Check parameters */
ganlikun	0:13413ea9a877	1768	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1769
ganlikun	0:13413ea9a877	1770	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1771	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	1772	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
ganlikun	0:13413ea9a877	1773	{
ganlikun	0:13413ea9a877	1774	/* Start regular conversion */
ganlikun	0:13413ea9a877	1775	DFSDM_RegConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	1776	}
ganlikun	0:13413ea9a877	1777	else
ganlikun	0:13413ea9a877	1778	{
ganlikun	0:13413ea9a877	1779	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1780	}
ganlikun	0:13413ea9a877	1781	/* Return function status */
ganlikun	0:13413ea9a877	1782	return status;
ganlikun	0:13413ea9a877	1783	}
ganlikun	0:13413ea9a877	1784
ganlikun	0:13413ea9a877	1785	/**
ganlikun	0:13413ea9a877	1786	* @brief This function allows to poll for the end of regular conversion.
ganlikun	0:13413ea9a877	1787	* @note This function should be called only if regular conversion is ongoing.
ganlikun	0:13413ea9a877	1788	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1789	* @param Timeout : Timeout value in milliseconds.
ganlikun	0:13413ea9a877	1790	* @retval HAL status
ganlikun	0:13413ea9a877	1791	*/
ganlikun	0:13413ea9a877	1792	HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	1793	uint32_t Timeout)
ganlikun	0:13413ea9a877	1794	{
ganlikun	0:13413ea9a877	1795	uint32_t tickstart;
ganlikun	0:13413ea9a877	1796
ganlikun	0:13413ea9a877	1797	/* Check parameters */
ganlikun	0:13413ea9a877	1798	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1799
ganlikun	0:13413ea9a877	1800	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1801	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
ganlikun	0:13413ea9a877	1802	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	1803	{
ganlikun	0:13413ea9a877	1804	/* Return error status */
ganlikun	0:13413ea9a877	1805	return HAL_ERROR;
ganlikun	0:13413ea9a877	1806	}
ganlikun	0:13413ea9a877	1807	else
ganlikun	0:13413ea9a877	1808	{
ganlikun	0:13413ea9a877	1809	/* Get timeout */
ganlikun	0:13413ea9a877	1810	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	1811
ganlikun	0:13413ea9a877	1812	/* Wait end of regular conversion */
ganlikun	0:13413ea9a877	1813	while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
ganlikun	0:13413ea9a877	1814	{
ganlikun	0:13413ea9a877	1815	/* Check the Timeout */
ganlikun	0:13413ea9a877	1816	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	1817	{
ganlikun	0:13413ea9a877	1818	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
ganlikun	0:13413ea9a877	1819	{
ganlikun	0:13413ea9a877	1820	/* Return timeout status */
ganlikun	0:13413ea9a877	1821	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	1822	}
ganlikun	0:13413ea9a877	1823	}
ganlikun	0:13413ea9a877	1824	}
ganlikun	0:13413ea9a877	1825	/* Check if overrun occurs */
ganlikun	0:13413ea9a877	1826	if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
ganlikun	0:13413ea9a877	1827	{
ganlikun	0:13413ea9a877	1828	/* Update error code and call error callback */
ganlikun	0:13413ea9a877	1829	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
ganlikun	0:13413ea9a877	1830	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	1831
ganlikun	0:13413ea9a877	1832	/* Clear regular overrun flag */
ganlikun	0:13413ea9a877	1833	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
ganlikun	0:13413ea9a877	1834	}
ganlikun	0:13413ea9a877	1835	/* Update DFSDM filter state only if not continuous conversion and SW trigger */
ganlikun	0:13413ea9a877	1836	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
ganlikun	0:13413ea9a877	1837	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
ganlikun	0:13413ea9a877	1838	{
ganlikun	0:13413ea9a877	1839	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
ganlikun	0:13413ea9a877	1840	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
ganlikun	0:13413ea9a877	1841	}
ganlikun	0:13413ea9a877	1842	/* Return function status */
ganlikun	0:13413ea9a877	1843	return HAL_OK;
ganlikun	0:13413ea9a877	1844	}
ganlikun	0:13413ea9a877	1845	}
ganlikun	0:13413ea9a877	1846
ganlikun	0:13413ea9a877	1847	/**
ganlikun	0:13413ea9a877	1848	* @brief This function allows to stop regular conversion in polling mode.
ganlikun	0:13413ea9a877	1849	* @note This function should be called only if regular conversion is ongoing.
ganlikun	0:13413ea9a877	1850	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1851	* @retval HAL status
ganlikun	0:13413ea9a877	1852	*/
ganlikun	0:13413ea9a877	1853	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1854	{
ganlikun	0:13413ea9a877	1855	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1856
ganlikun	0:13413ea9a877	1857	/* Check parameters */
ganlikun	0:13413ea9a877	1858	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1859
ganlikun	0:13413ea9a877	1860	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1861	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
ganlikun	0:13413ea9a877	1862	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	1863	{
ganlikun	0:13413ea9a877	1864	/* Return error status */
ganlikun	0:13413ea9a877	1865	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1866	}
ganlikun	0:13413ea9a877	1867	else
ganlikun	0:13413ea9a877	1868	{
ganlikun	0:13413ea9a877	1869	/* Stop regular conversion */
ganlikun	0:13413ea9a877	1870	DFSDM_RegConvStop(hdfsdm_filter);
ganlikun	0:13413ea9a877	1871	}
ganlikun	0:13413ea9a877	1872	/* Return function status */
ganlikun	0:13413ea9a877	1873	return status;
ganlikun	0:13413ea9a877	1874	}
ganlikun	0:13413ea9a877	1875
ganlikun	0:13413ea9a877	1876	/**
ganlikun	0:13413ea9a877	1877	* @brief This function allows to start regular conversion in interrupt mode.
ganlikun	0:13413ea9a877	1878	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	1879	* in idle state or if injected conversion is ongoing.
ganlikun	0:13413ea9a877	1880	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1881	* @retval HAL status
ganlikun	0:13413ea9a877	1882	*/
ganlikun	0:13413ea9a877	1883	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1884	{
ganlikun	0:13413ea9a877	1885	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1886
ganlikun	0:13413ea9a877	1887	/* Check parameters */
ganlikun	0:13413ea9a877	1888	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1889
ganlikun	0:13413ea9a877	1890	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1891	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	1892	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
ganlikun	0:13413ea9a877	1893	{
ganlikun	0:13413ea9a877	1894	/* Enable interrupts for regular conversions */
ganlikun	0:13413ea9a877	1895	hdfsdm_filter->Instance->FLTCR2 \|= (DFSDM_FLTCR2_REOCIE \| DFSDM_FLTCR2_ROVRIE);
ganlikun	0:13413ea9a877	1896
ganlikun	0:13413ea9a877	1897	/* Start regular conversion */
ganlikun	0:13413ea9a877	1898	DFSDM_RegConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	1899	}
ganlikun	0:13413ea9a877	1900	else
ganlikun	0:13413ea9a877	1901	{
ganlikun	0:13413ea9a877	1902	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1903	}
ganlikun	0:13413ea9a877	1904	/* Return function status */
ganlikun	0:13413ea9a877	1905	return status;
ganlikun	0:13413ea9a877	1906	}
ganlikun	0:13413ea9a877	1907
ganlikun	0:13413ea9a877	1908	/**
ganlikun	0:13413ea9a877	1909	* @brief This function allows to stop regular conversion in interrupt mode.
ganlikun	0:13413ea9a877	1910	* @note This function should be called only if regular conversion is ongoing.
ganlikun	0:13413ea9a877	1911	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1912	* @retval HAL status
ganlikun	0:13413ea9a877	1913	*/
ganlikun	0:13413ea9a877	1914	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	1915	{
ganlikun	0:13413ea9a877	1916	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1917
ganlikun	0:13413ea9a877	1918	/* Check parameters */
ganlikun	0:13413ea9a877	1919	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1920
ganlikun	0:13413ea9a877	1921	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1922	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
ganlikun	0:13413ea9a877	1923	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	1924	{
ganlikun	0:13413ea9a877	1925	/* Return error status */
ganlikun	0:13413ea9a877	1926	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1927	}
ganlikun	0:13413ea9a877	1928	else
ganlikun	0:13413ea9a877	1929	{
ganlikun	0:13413ea9a877	1930	/* Disable interrupts for regular conversions */
ganlikun	0:13413ea9a877	1931	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE \| DFSDM_FLTCR2_ROVRIE);
ganlikun	0:13413ea9a877	1932
ganlikun	0:13413ea9a877	1933	/* Stop regular conversion */
ganlikun	0:13413ea9a877	1934	DFSDM_RegConvStop(hdfsdm_filter);
ganlikun	0:13413ea9a877	1935	}
ganlikun	0:13413ea9a877	1936	/* Return function status */
ganlikun	0:13413ea9a877	1937	return status;
ganlikun	0:13413ea9a877	1938	}
ganlikun	0:13413ea9a877	1939
ganlikun	0:13413ea9a877	1940	/**
ganlikun	0:13413ea9a877	1941	* @brief This function allows to start regular conversion in DMA mode.
ganlikun	0:13413ea9a877	1942	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	1943	* in idle state or if injected conversion is ongoing.
ganlikun	0:13413ea9a877	1944	* Please note that data on buffer will contain signed regular conversion
ganlikun	0:13413ea9a877	1945	* value on 24 most significant bits and corresponding channel on 3 least
ganlikun	0:13413ea9a877	1946	* significant bits.
ganlikun	0:13413ea9a877	1947	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	1948	* @param pData : The destination buffer address.
ganlikun	0:13413ea9a877	1949	* @param Length : The length of data to be transferred from DFSDM filter to memory.
ganlikun	0:13413ea9a877	1950	* @retval HAL status
ganlikun	0:13413ea9a877	1951	*/
ganlikun	0:13413ea9a877	1952	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	1953	int32_t *pData,
ganlikun	0:13413ea9a877	1954	uint32_t Length)
ganlikun	0:13413ea9a877	1955	{
ganlikun	0:13413ea9a877	1956	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	1957
ganlikun	0:13413ea9a877	1958	/* Check parameters */
ganlikun	0:13413ea9a877	1959	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	1960
ganlikun	0:13413ea9a877	1961	/* Check destination address and length */
ganlikun	0:13413ea9a877	1962	if((pData == NULL) \|\| (Length == 0U))
ganlikun	0:13413ea9a877	1963	{
ganlikun	0:13413ea9a877	1964	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1965	}
ganlikun	0:13413ea9a877	1966	/* Check that DMA is enabled for regular conversion */
ganlikun	0:13413ea9a877	1967	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
ganlikun	0:13413ea9a877	1968	{
ganlikun	0:13413ea9a877	1969	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1970	}
ganlikun	0:13413ea9a877	1971	/* Check parameters compatibility */
ganlikun	0:13413ea9a877	1972	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	1973	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
ganlikun	0:13413ea9a877	1974	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
ganlikun	0:13413ea9a877	1975	(Length != 1U))
ganlikun	0:13413ea9a877	1976	{
ganlikun	0:13413ea9a877	1977	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1978	}
ganlikun	0:13413ea9a877	1979	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	1980	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
ganlikun	0:13413ea9a877	1981	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
ganlikun	0:13413ea9a877	1982	{
ganlikun	0:13413ea9a877	1983	status = HAL_ERROR;
ganlikun	0:13413ea9a877	1984	}
ganlikun	0:13413ea9a877	1985	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	1986	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	1987	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
ganlikun	0:13413ea9a877	1988	{
ganlikun	0:13413ea9a877	1989	/* Set callbacks on DMA handler */
ganlikun	0:13413ea9a877	1990	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
ganlikun	0:13413ea9a877	1991	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
ganlikun	0:13413ea9a877	1992	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
ganlikun	0:13413ea9a877	1993	DFSDM_DMARegularHalfConvCplt : NULL;
ganlikun	0:13413ea9a877	1994
ganlikun	0:13413ea9a877	1995	/* Start DMA in interrupt mode */
ganlikun	0:13413ea9a877	1996	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
ganlikun	0:13413ea9a877	1997	(uint32_t) pData, Length) != HAL_OK)
ganlikun	0:13413ea9a877	1998	{
ganlikun	0:13413ea9a877	1999	/* Set DFSDM filter in error state */
ganlikun	0:13413ea9a877	2000	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
ganlikun	0:13413ea9a877	2001	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2002	}
ganlikun	0:13413ea9a877	2003	else
ganlikun	0:13413ea9a877	2004	{
ganlikun	0:13413ea9a877	2005	/* Start regular conversion */
ganlikun	0:13413ea9a877	2006	DFSDM_RegConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	2007	}
ganlikun	0:13413ea9a877	2008	}
ganlikun	0:13413ea9a877	2009	else
ganlikun	0:13413ea9a877	2010	{
ganlikun	0:13413ea9a877	2011	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2012	}
ganlikun	0:13413ea9a877	2013	/* Return function status */
ganlikun	0:13413ea9a877	2014	return status;
ganlikun	0:13413ea9a877	2015	}
ganlikun	0:13413ea9a877	2016
ganlikun	0:13413ea9a877	2017	/**
ganlikun	0:13413ea9a877	2018	* @brief This function allows to start regular conversion in DMA mode and to get
ganlikun	0:13413ea9a877	2019	* only the 16 most significant bits of conversion.
ganlikun	0:13413ea9a877	2020	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	2021	* in idle state or if injected conversion is ongoing.
ganlikun	0:13413ea9a877	2022	* Please note that data on buffer will contain signed 16 most significant
ganlikun	0:13413ea9a877	2023	* bits of regular conversion.
ganlikun	0:13413ea9a877	2024	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2025	* @param pData : The destination buffer address.
ganlikun	0:13413ea9a877	2026	* @param Length : The length of data to be transferred from DFSDM filter to memory.
ganlikun	0:13413ea9a877	2027	* @retval HAL status
ganlikun	0:13413ea9a877	2028	*/
ganlikun	0:13413ea9a877	2029	HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2030	int16_t *pData,
ganlikun	0:13413ea9a877	2031	uint32_t Length)
ganlikun	0:13413ea9a877	2032	{
ganlikun	0:13413ea9a877	2033	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2034
ganlikun	0:13413ea9a877	2035	/* Check parameters */
ganlikun	0:13413ea9a877	2036	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2037
ganlikun	0:13413ea9a877	2038	/* Check destination address and length */
ganlikun	0:13413ea9a877	2039	if((pData == NULL) \|\| (Length == 0U))
ganlikun	0:13413ea9a877	2040	{
ganlikun	0:13413ea9a877	2041	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2042	}
ganlikun	0:13413ea9a877	2043	/* Check that DMA is enabled for regular conversion */
ganlikun	0:13413ea9a877	2044	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
ganlikun	0:13413ea9a877	2045	{
ganlikun	0:13413ea9a877	2046	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2047	}
ganlikun	0:13413ea9a877	2048	/* Check parameters compatibility */
ganlikun	0:13413ea9a877	2049	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	2050	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
ganlikun	0:13413ea9a877	2051	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
ganlikun	0:13413ea9a877	2052	(Length != 1U))
ganlikun	0:13413ea9a877	2053	{
ganlikun	0:13413ea9a877	2054	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2055	}
ganlikun	0:13413ea9a877	2056	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	2057	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
ganlikun	0:13413ea9a877	2058	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
ganlikun	0:13413ea9a877	2059	{
ganlikun	0:13413ea9a877	2060	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2061	}
ganlikun	0:13413ea9a877	2062	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2063	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	2064	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
ganlikun	0:13413ea9a877	2065	{
ganlikun	0:13413ea9a877	2066	/* Set callbacks on DMA handler */
ganlikun	0:13413ea9a877	2067	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
ganlikun	0:13413ea9a877	2068	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
ganlikun	0:13413ea9a877	2069	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
ganlikun	0:13413ea9a877	2070	DFSDM_DMARegularHalfConvCplt : NULL;
ganlikun	0:13413ea9a877	2071
ganlikun	0:13413ea9a877	2072	/* Start DMA in interrupt mode */
ganlikun	0:13413ea9a877	2073	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
ganlikun	0:13413ea9a877	2074	(uint32_t) pData, Length) != HAL_OK)
ganlikun	0:13413ea9a877	2075	{
ganlikun	0:13413ea9a877	2076	/* Set DFSDM filter in error state */
ganlikun	0:13413ea9a877	2077	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
ganlikun	0:13413ea9a877	2078	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2079	}
ganlikun	0:13413ea9a877	2080	else
ganlikun	0:13413ea9a877	2081	{
ganlikun	0:13413ea9a877	2082	/* Start regular conversion */
ganlikun	0:13413ea9a877	2083	DFSDM_RegConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	2084	}
ganlikun	0:13413ea9a877	2085	}
ganlikun	0:13413ea9a877	2086	else
ganlikun	0:13413ea9a877	2087	{
ganlikun	0:13413ea9a877	2088	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2089	}
ganlikun	0:13413ea9a877	2090	/* Return function status */
ganlikun	0:13413ea9a877	2091	return status;
ganlikun	0:13413ea9a877	2092	}
ganlikun	0:13413ea9a877	2093
ganlikun	0:13413ea9a877	2094	/**
ganlikun	0:13413ea9a877	2095	* @brief This function allows to stop regular conversion in DMA mode.
ganlikun	0:13413ea9a877	2096	* @note This function should be called only if regular conversion is ongoing.
ganlikun	0:13413ea9a877	2097	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2098	* @retval HAL status
ganlikun	0:13413ea9a877	2099	*/
ganlikun	0:13413ea9a877	2100	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2101	{
ganlikun	0:13413ea9a877	2102	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2103
ganlikun	0:13413ea9a877	2104	/* Check parameters */
ganlikun	0:13413ea9a877	2105	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2106
ganlikun	0:13413ea9a877	2107	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2108	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
ganlikun	0:13413ea9a877	2109	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	2110	{
ganlikun	0:13413ea9a877	2111	/* Return error status */
ganlikun	0:13413ea9a877	2112	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2113	}
ganlikun	0:13413ea9a877	2114	else
ganlikun	0:13413ea9a877	2115	{
ganlikun	0:13413ea9a877	2116	/* Stop current DMA transfer */
ganlikun	0:13413ea9a877	2117	if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
ganlikun	0:13413ea9a877	2118	{
ganlikun	0:13413ea9a877	2119	/* Set DFSDM filter in error state */
ganlikun	0:13413ea9a877	2120	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
ganlikun	0:13413ea9a877	2121	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2122	}
ganlikun	0:13413ea9a877	2123	else
ganlikun	0:13413ea9a877	2124	{
ganlikun	0:13413ea9a877	2125	/* Stop regular conversion */
ganlikun	0:13413ea9a877	2126	DFSDM_RegConvStop(hdfsdm_filter);
ganlikun	0:13413ea9a877	2127	}
ganlikun	0:13413ea9a877	2128	}
ganlikun	0:13413ea9a877	2129	/* Return function status */
ganlikun	0:13413ea9a877	2130	return status;
ganlikun	0:13413ea9a877	2131	}
ganlikun	0:13413ea9a877	2132
ganlikun	0:13413ea9a877	2133	/**
ganlikun	0:13413ea9a877	2134	* @brief This function allows to get regular conversion value.
ganlikun	0:13413ea9a877	2135	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2136	* @param Channel : Corresponding channel of regular conversion.
ganlikun	0:13413ea9a877	2137	* @retval Regular conversion value
ganlikun	0:13413ea9a877	2138	*/
ganlikun	0:13413ea9a877	2139	int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2140	uint32_t *Channel)
ganlikun	0:13413ea9a877	2141	{
ganlikun	0:13413ea9a877	2142	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2143	int32_t value = 0;
ganlikun	0:13413ea9a877	2144
ganlikun	0:13413ea9a877	2145	/* Check parameters */
ganlikun	0:13413ea9a877	2146	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2147	assert_param(Channel != NULL);
ganlikun	0:13413ea9a877	2148
ganlikun	0:13413ea9a877	2149	/* Get value of data register for regular channel */
ganlikun	0:13413ea9a877	2150	reg = hdfsdm_filter->Instance->FLTRDATAR;
ganlikun	0:13413ea9a877	2151
ganlikun	0:13413ea9a877	2152	/* Extract channel and regular conversion value */
ganlikun	0:13413ea9a877	2153	*Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
ganlikun	0:13413ea9a877	2154	value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
ganlikun	0:13413ea9a877	2155
ganlikun	0:13413ea9a877	2156	/* return regular conversion value */
ganlikun	0:13413ea9a877	2157	return value;
ganlikun	0:13413ea9a877	2158	}
ganlikun	0:13413ea9a877	2159
ganlikun	0:13413ea9a877	2160	/**
ganlikun	0:13413ea9a877	2161	* @brief This function allows to start injected conversion in polling mode.
ganlikun	0:13413ea9a877	2162	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	2163	* in idle state or if regular conversion is ongoing.
ganlikun	0:13413ea9a877	2164	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2165	* @retval HAL status
ganlikun	0:13413ea9a877	2166	*/
ganlikun	0:13413ea9a877	2167	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2168	{
ganlikun	0:13413ea9a877	2169	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2170
ganlikun	0:13413ea9a877	2171	/* Check parameters */
ganlikun	0:13413ea9a877	2172	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2173
ganlikun	0:13413ea9a877	2174	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2175	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	2176	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
ganlikun	0:13413ea9a877	2177	{
ganlikun	0:13413ea9a877	2178	/* Start injected conversion */
ganlikun	0:13413ea9a877	2179	DFSDM_InjConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	2180	}
ganlikun	0:13413ea9a877	2181	else
ganlikun	0:13413ea9a877	2182	{
ganlikun	0:13413ea9a877	2183	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2184	}
ganlikun	0:13413ea9a877	2185	/* Return function status */
ganlikun	0:13413ea9a877	2186	return status;
ganlikun	0:13413ea9a877	2187	}
ganlikun	0:13413ea9a877	2188
ganlikun	0:13413ea9a877	2189	/**
ganlikun	0:13413ea9a877	2190	* @brief This function allows to poll for the end of injected conversion.
ganlikun	0:13413ea9a877	2191	* @note This function should be called only if injected conversion is ongoing.
ganlikun	0:13413ea9a877	2192	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2193	* @param Timeout : Timeout value in milliseconds.
ganlikun	0:13413ea9a877	2194	* @retval HAL status
ganlikun	0:13413ea9a877	2195	*/
ganlikun	0:13413ea9a877	2196	HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2197	uint32_t Timeout)
ganlikun	0:13413ea9a877	2198	{
ganlikun	0:13413ea9a877	2199	uint32_t tickstart;
ganlikun	0:13413ea9a877	2200
ganlikun	0:13413ea9a877	2201	/* Check parameters */
ganlikun	0:13413ea9a877	2202	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2203
ganlikun	0:13413ea9a877	2204	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2205	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
ganlikun	0:13413ea9a877	2206	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	2207	{
ganlikun	0:13413ea9a877	2208	/* Return error status */
ganlikun	0:13413ea9a877	2209	return HAL_ERROR;
ganlikun	0:13413ea9a877	2210	}
ganlikun	0:13413ea9a877	2211	else
ganlikun	0:13413ea9a877	2212	{
ganlikun	0:13413ea9a877	2213	/* Get timeout */
ganlikun	0:13413ea9a877	2214	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	2215
ganlikun	0:13413ea9a877	2216	/* Wait end of injected conversions */
ganlikun	0:13413ea9a877	2217	while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
ganlikun	0:13413ea9a877	2218	{
ganlikun	0:13413ea9a877	2219	/* Check the Timeout */
ganlikun	0:13413ea9a877	2220	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	2221	{
ganlikun	0:13413ea9a877	2222	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
ganlikun	0:13413ea9a877	2223	{
ganlikun	0:13413ea9a877	2224	/* Return timeout status */
ganlikun	0:13413ea9a877	2225	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	2226	}
ganlikun	0:13413ea9a877	2227	}
ganlikun	0:13413ea9a877	2228	}
ganlikun	0:13413ea9a877	2229	/* Check if overrun occurs */
ganlikun	0:13413ea9a877	2230	if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
ganlikun	0:13413ea9a877	2231	{
ganlikun	0:13413ea9a877	2232	/* Update error code and call error callback */
ganlikun	0:13413ea9a877	2233	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
ganlikun	0:13413ea9a877	2234	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	2235
ganlikun	0:13413ea9a877	2236	/* Clear injected overrun flag */
ganlikun	0:13413ea9a877	2237	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
ganlikun	0:13413ea9a877	2238	}
ganlikun	0:13413ea9a877	2239
ganlikun	0:13413ea9a877	2240	/* Update remaining injected conversions */
ganlikun	0:13413ea9a877	2241	hdfsdm_filter->InjConvRemaining--;
ganlikun	0:13413ea9a877	2242	if(hdfsdm_filter->InjConvRemaining == 0U)
ganlikun	0:13413ea9a877	2243	{
ganlikun	0:13413ea9a877	2244	/* Update DFSDM filter state only if trigger is software */
ganlikun	0:13413ea9a877	2245	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
ganlikun	0:13413ea9a877	2246	{
ganlikun	0:13413ea9a877	2247	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
ganlikun	0:13413ea9a877	2248	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
ganlikun	0:13413ea9a877	2249	}
ganlikun	0:13413ea9a877	2250
ganlikun	0:13413ea9a877	2251	/* end of injected sequence, reset the value */
ganlikun	0:13413ea9a877	2252	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
ganlikun	0:13413ea9a877	2253	hdfsdm_filter->InjectedChannelsNbr : 1U;
ganlikun	0:13413ea9a877	2254	}
ganlikun	0:13413ea9a877	2255
ganlikun	0:13413ea9a877	2256	/* Return function status */
ganlikun	0:13413ea9a877	2257	return HAL_OK;
ganlikun	0:13413ea9a877	2258	}
ganlikun	0:13413ea9a877	2259	}
ganlikun	0:13413ea9a877	2260
ganlikun	0:13413ea9a877	2261	/**
ganlikun	0:13413ea9a877	2262	* @brief This function allows to stop injected conversion in polling mode.
ganlikun	0:13413ea9a877	2263	* @note This function should be called only if injected conversion is ongoing.
ganlikun	0:13413ea9a877	2264	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2265	* @retval HAL status
ganlikun	0:13413ea9a877	2266	*/
ganlikun	0:13413ea9a877	2267	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2268	{
ganlikun	0:13413ea9a877	2269	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2270
ganlikun	0:13413ea9a877	2271	/* Check parameters */
ganlikun	0:13413ea9a877	2272	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2273
ganlikun	0:13413ea9a877	2274	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2275	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
ganlikun	0:13413ea9a877	2276	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	2277	{
ganlikun	0:13413ea9a877	2278	/* Return error status */
ganlikun	0:13413ea9a877	2279	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2280	}
ganlikun	0:13413ea9a877	2281	else
ganlikun	0:13413ea9a877	2282	{
ganlikun	0:13413ea9a877	2283	/* Stop injected conversion */
ganlikun	0:13413ea9a877	2284	DFSDM_InjConvStop(hdfsdm_filter);
ganlikun	0:13413ea9a877	2285	}
ganlikun	0:13413ea9a877	2286	/* Return function status */
ganlikun	0:13413ea9a877	2287	return status;
ganlikun	0:13413ea9a877	2288	}
ganlikun	0:13413ea9a877	2289
ganlikun	0:13413ea9a877	2290	/**
ganlikun	0:13413ea9a877	2291	* @brief This function allows to start injected conversion in interrupt mode.
ganlikun	0:13413ea9a877	2292	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	2293	* in idle state or if regular conversion is ongoing.
ganlikun	0:13413ea9a877	2294	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2295	* @retval HAL status
ganlikun	0:13413ea9a877	2296	*/
ganlikun	0:13413ea9a877	2297	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2298	{
ganlikun	0:13413ea9a877	2299	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2300
ganlikun	0:13413ea9a877	2301	/* Check parameters */
ganlikun	0:13413ea9a877	2302	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2303
ganlikun	0:13413ea9a877	2304	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2305	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	2306	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
ganlikun	0:13413ea9a877	2307	{
ganlikun	0:13413ea9a877	2308	/* Enable interrupts for injected conversions */
ganlikun	0:13413ea9a877	2309	hdfsdm_filter->Instance->FLTCR2 \|= (DFSDM_FLTCR2_JEOCIE \| DFSDM_FLTCR2_JOVRIE);
ganlikun	0:13413ea9a877	2310
ganlikun	0:13413ea9a877	2311	/* Start injected conversion */
ganlikun	0:13413ea9a877	2312	DFSDM_InjConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	2313	}
ganlikun	0:13413ea9a877	2314	else
ganlikun	0:13413ea9a877	2315	{
ganlikun	0:13413ea9a877	2316	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2317	}
ganlikun	0:13413ea9a877	2318	/* Return function status */
ganlikun	0:13413ea9a877	2319	return status;
ganlikun	0:13413ea9a877	2320	}
ganlikun	0:13413ea9a877	2321
ganlikun	0:13413ea9a877	2322	/**
ganlikun	0:13413ea9a877	2323	* @brief This function allows to stop injected conversion in interrupt mode.
ganlikun	0:13413ea9a877	2324	* @note This function should be called only if injected conversion is ongoing.
ganlikun	0:13413ea9a877	2325	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2326	* @retval HAL status
ganlikun	0:13413ea9a877	2327	*/
ganlikun	0:13413ea9a877	2328	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2329	{
ganlikun	0:13413ea9a877	2330	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2331
ganlikun	0:13413ea9a877	2332	/* Check parameters */
ganlikun	0:13413ea9a877	2333	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2334
ganlikun	0:13413ea9a877	2335	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2336	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
ganlikun	0:13413ea9a877	2337	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	2338	{
ganlikun	0:13413ea9a877	2339	/* Return error status */
ganlikun	0:13413ea9a877	2340	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2341	}
ganlikun	0:13413ea9a877	2342	else
ganlikun	0:13413ea9a877	2343	{
ganlikun	0:13413ea9a877	2344	/* Disable interrupts for injected conversions */
ganlikun	0:13413ea9a877	2345	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE \| DFSDM_FLTCR2_JOVRIE);
ganlikun	0:13413ea9a877	2346
ganlikun	0:13413ea9a877	2347	/* Stop injected conversion */
ganlikun	0:13413ea9a877	2348	DFSDM_InjConvStop(hdfsdm_filter);
ganlikun	0:13413ea9a877	2349	}
ganlikun	0:13413ea9a877	2350	/* Return function status */
ganlikun	0:13413ea9a877	2351	return status;
ganlikun	0:13413ea9a877	2352	}
ganlikun	0:13413ea9a877	2353
ganlikun	0:13413ea9a877	2354	/**
ganlikun	0:13413ea9a877	2355	* @brief This function allows to start injected conversion in DMA mode.
ganlikun	0:13413ea9a877	2356	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	2357	* in idle state or if regular conversion is ongoing.
ganlikun	0:13413ea9a877	2358	* Please note that data on buffer will contain signed injected conversion
ganlikun	0:13413ea9a877	2359	* value on 24 most significant bits and corresponding channel on 3 least
ganlikun	0:13413ea9a877	2360	* significant bits.
ganlikun	0:13413ea9a877	2361	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2362	* @param pData : The destination buffer address.
ganlikun	0:13413ea9a877	2363	* @param Length : The length of data to be transferred from DFSDM filter to memory.
ganlikun	0:13413ea9a877	2364	* @retval HAL status
ganlikun	0:13413ea9a877	2365	*/
ganlikun	0:13413ea9a877	2366	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2367	int32_t *pData,
ganlikun	0:13413ea9a877	2368	uint32_t Length)
ganlikun	0:13413ea9a877	2369	{
ganlikun	0:13413ea9a877	2370	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2371
ganlikun	0:13413ea9a877	2372	/* Check parameters */
ganlikun	0:13413ea9a877	2373	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2374
ganlikun	0:13413ea9a877	2375	/* Check destination address and length */
ganlikun	0:13413ea9a877	2376	if((pData == NULL) \|\| (Length == 0U))
ganlikun	0:13413ea9a877	2377	{
ganlikun	0:13413ea9a877	2378	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2379	}
ganlikun	0:13413ea9a877	2380	/* Check that DMA is enabled for injected conversion */
ganlikun	0:13413ea9a877	2381	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
ganlikun	0:13413ea9a877	2382	{
ganlikun	0:13413ea9a877	2383	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2384	}
ganlikun	0:13413ea9a877	2385	/* Check parameters compatibility */
ganlikun	0:13413ea9a877	2386	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	2387	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
ganlikun	0:13413ea9a877	2388	(Length > hdfsdm_filter->InjConvRemaining))
ganlikun	0:13413ea9a877	2389	{
ganlikun	0:13413ea9a877	2390	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2391	}
ganlikun	0:13413ea9a877	2392	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	2393	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
ganlikun	0:13413ea9a877	2394	{
ganlikun	0:13413ea9a877	2395	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2396	}
ganlikun	0:13413ea9a877	2397	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2398	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	2399	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
ganlikun	0:13413ea9a877	2400	{
ganlikun	0:13413ea9a877	2401	/* Set callbacks on DMA handler */
ganlikun	0:13413ea9a877	2402	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
ganlikun	0:13413ea9a877	2403	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
ganlikun	0:13413ea9a877	2404	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
ganlikun	0:13413ea9a877	2405	DFSDM_DMAInjectedHalfConvCplt : NULL;
ganlikun	0:13413ea9a877	2406
ganlikun	0:13413ea9a877	2407	/* Start DMA in interrupt mode */
ganlikun	0:13413ea9a877	2408	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
ganlikun	0:13413ea9a877	2409	(uint32_t) pData, Length) != HAL_OK)
ganlikun	0:13413ea9a877	2410	{
ganlikun	0:13413ea9a877	2411	/* Set DFSDM filter in error state */
ganlikun	0:13413ea9a877	2412	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
ganlikun	0:13413ea9a877	2413	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2414	}
ganlikun	0:13413ea9a877	2415	else
ganlikun	0:13413ea9a877	2416	{
ganlikun	0:13413ea9a877	2417	/* Start injected conversion */
ganlikun	0:13413ea9a877	2418	DFSDM_InjConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	2419	}
ganlikun	0:13413ea9a877	2420	}
ganlikun	0:13413ea9a877	2421	else
ganlikun	0:13413ea9a877	2422	{
ganlikun	0:13413ea9a877	2423	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2424	}
ganlikun	0:13413ea9a877	2425	/* Return function status */
ganlikun	0:13413ea9a877	2426	return status;
ganlikun	0:13413ea9a877	2427	}
ganlikun	0:13413ea9a877	2428
ganlikun	0:13413ea9a877	2429	/**
ganlikun	0:13413ea9a877	2430	* @brief This function allows to start injected conversion in DMA mode and to get
ganlikun	0:13413ea9a877	2431	* only the 16 most significant bits of conversion.
ganlikun	0:13413ea9a877	2432	* @note This function should be called only when DFSDM filter instance is
ganlikun	0:13413ea9a877	2433	* in idle state or if regular conversion is ongoing.
ganlikun	0:13413ea9a877	2434	* Please note that data on buffer will contain signed 16 most significant
ganlikun	0:13413ea9a877	2435	* bits of injected conversion.
ganlikun	0:13413ea9a877	2436	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2437	* @param pData : The destination buffer address.
ganlikun	0:13413ea9a877	2438	* @param Length : The length of data to be transferred from DFSDM filter to memory.
ganlikun	0:13413ea9a877	2439	* @retval HAL status
ganlikun	0:13413ea9a877	2440	*/
ganlikun	0:13413ea9a877	2441	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2442	int16_t *pData,
ganlikun	0:13413ea9a877	2443	uint32_t Length)
ganlikun	0:13413ea9a877	2444	{
ganlikun	0:13413ea9a877	2445	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2446
ganlikun	0:13413ea9a877	2447	/* Check parameters */
ganlikun	0:13413ea9a877	2448	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2449
ganlikun	0:13413ea9a877	2450	/* Check destination address and length */
ganlikun	0:13413ea9a877	2451	if((pData == NULL) \|\| (Length == 0U))
ganlikun	0:13413ea9a877	2452	{
ganlikun	0:13413ea9a877	2453	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2454	}
ganlikun	0:13413ea9a877	2455	/* Check that DMA is enabled for injected conversion */
ganlikun	0:13413ea9a877	2456	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
ganlikun	0:13413ea9a877	2457	{
ganlikun	0:13413ea9a877	2458	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2459	}
ganlikun	0:13413ea9a877	2460	/* Check parameters compatibility */
ganlikun	0:13413ea9a877	2461	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	2462	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
ganlikun	0:13413ea9a877	2463	(Length > hdfsdm_filter->InjConvRemaining))
ganlikun	0:13413ea9a877	2464	{
ganlikun	0:13413ea9a877	2465	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2466	}
ganlikun	0:13413ea9a877	2467	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
ganlikun	0:13413ea9a877	2468	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
ganlikun	0:13413ea9a877	2469	{
ganlikun	0:13413ea9a877	2470	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2471	}
ganlikun	0:13413ea9a877	2472	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2473	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
ganlikun	0:13413ea9a877	2474	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
ganlikun	0:13413ea9a877	2475	{
ganlikun	0:13413ea9a877	2476	/* Set callbacks on DMA handler */
ganlikun	0:13413ea9a877	2477	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
ganlikun	0:13413ea9a877	2478	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
ganlikun	0:13413ea9a877	2479	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
ganlikun	0:13413ea9a877	2480	DFSDM_DMAInjectedHalfConvCplt : NULL;
ganlikun	0:13413ea9a877	2481
ganlikun	0:13413ea9a877	2482	/* Start DMA in interrupt mode */
ganlikun	0:13413ea9a877	2483	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
ganlikun	0:13413ea9a877	2484	(uint32_t) pData, Length) != HAL_OK)
ganlikun	0:13413ea9a877	2485	{
ganlikun	0:13413ea9a877	2486	/* Set DFSDM filter in error state */
ganlikun	0:13413ea9a877	2487	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
ganlikun	0:13413ea9a877	2488	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2489	}
ganlikun	0:13413ea9a877	2490	else
ganlikun	0:13413ea9a877	2491	{
ganlikun	0:13413ea9a877	2492	/* Start injected conversion */
ganlikun	0:13413ea9a877	2493	DFSDM_InjConvStart(hdfsdm_filter);
ganlikun	0:13413ea9a877	2494	}
ganlikun	0:13413ea9a877	2495	}
ganlikun	0:13413ea9a877	2496	else
ganlikun	0:13413ea9a877	2497	{
ganlikun	0:13413ea9a877	2498	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2499	}
ganlikun	0:13413ea9a877	2500	/* Return function status */
ganlikun	0:13413ea9a877	2501	return status;
ganlikun	0:13413ea9a877	2502	}
ganlikun	0:13413ea9a877	2503
ganlikun	0:13413ea9a877	2504	/**
ganlikun	0:13413ea9a877	2505	* @brief This function allows to stop injected conversion in DMA mode.
ganlikun	0:13413ea9a877	2506	* @note This function should be called only if injected conversion is ongoing.
ganlikun	0:13413ea9a877	2507	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2508	* @retval HAL status
ganlikun	0:13413ea9a877	2509	*/
ganlikun	0:13413ea9a877	2510	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2511	{
ganlikun	0:13413ea9a877	2512	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2513
ganlikun	0:13413ea9a877	2514	/* Check parameters */
ganlikun	0:13413ea9a877	2515	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2516
ganlikun	0:13413ea9a877	2517	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2518	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
ganlikun	0:13413ea9a877	2519	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
ganlikun	0:13413ea9a877	2520	{
ganlikun	0:13413ea9a877	2521	/* Return error status */
ganlikun	0:13413ea9a877	2522	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2523	}
ganlikun	0:13413ea9a877	2524	else
ganlikun	0:13413ea9a877	2525	{
ganlikun	0:13413ea9a877	2526	/* Stop current DMA transfer */
ganlikun	0:13413ea9a877	2527	if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
ganlikun	0:13413ea9a877	2528	{
ganlikun	0:13413ea9a877	2529	/* Set DFSDM filter in error state */
ganlikun	0:13413ea9a877	2530	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
ganlikun	0:13413ea9a877	2531	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2532	}
ganlikun	0:13413ea9a877	2533	else
ganlikun	0:13413ea9a877	2534	{
ganlikun	0:13413ea9a877	2535	/* Stop regular conversion */
ganlikun	0:13413ea9a877	2536	DFSDM_InjConvStop(hdfsdm_filter);
ganlikun	0:13413ea9a877	2537	}
ganlikun	0:13413ea9a877	2538	}
ganlikun	0:13413ea9a877	2539	/* Return function status */
ganlikun	0:13413ea9a877	2540	return status;
ganlikun	0:13413ea9a877	2541	}
ganlikun	0:13413ea9a877	2542
ganlikun	0:13413ea9a877	2543	/**
ganlikun	0:13413ea9a877	2544	* @brief This function allows to get injected conversion value.
ganlikun	0:13413ea9a877	2545	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2546	* @param Channel : Corresponding channel of injected conversion.
ganlikun	0:13413ea9a877	2547	* @retval Injected conversion value
ganlikun	0:13413ea9a877	2548	*/
ganlikun	0:13413ea9a877	2549	int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2550	uint32_t *Channel)
ganlikun	0:13413ea9a877	2551	{
ganlikun	0:13413ea9a877	2552	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2553	int32_t value = 0;
ganlikun	0:13413ea9a877	2554
ganlikun	0:13413ea9a877	2555	/* Check parameters */
ganlikun	0:13413ea9a877	2556	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2557	assert_param(Channel != NULL);
ganlikun	0:13413ea9a877	2558
ganlikun	0:13413ea9a877	2559	/* Get value of data register for injected channel */
ganlikun	0:13413ea9a877	2560	reg = hdfsdm_filter->Instance->FLTJDATAR;
ganlikun	0:13413ea9a877	2561
ganlikun	0:13413ea9a877	2562	/* Extract channel and injected conversion value */
ganlikun	0:13413ea9a877	2563	*Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
ganlikun	0:13413ea9a877	2564	value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
ganlikun	0:13413ea9a877	2565
ganlikun	0:13413ea9a877	2566	/* return regular conversion value */
ganlikun	0:13413ea9a877	2567	return value;
ganlikun	0:13413ea9a877	2568	}
ganlikun	0:13413ea9a877	2569
ganlikun	0:13413ea9a877	2570	/**
ganlikun	0:13413ea9a877	2571	* @brief This function allows to start filter analog watchdog in interrupt mode.
ganlikun	0:13413ea9a877	2572	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2573	* @param awdParam : DFSDM filter analog watchdog parameters.
ganlikun	0:13413ea9a877	2574	* @retval HAL status
ganlikun	0:13413ea9a877	2575	*/
ganlikun	0:13413ea9a877	2576	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2577	DFSDM_Filter_AwdParamTypeDef *awdParam)
ganlikun	0:13413ea9a877	2578	{
ganlikun	0:13413ea9a877	2579	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2580
ganlikun	0:13413ea9a877	2581	/* Check parameters */
ganlikun	0:13413ea9a877	2582	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2583	assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
ganlikun	0:13413ea9a877	2584	assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
ganlikun	0:13413ea9a877	2585	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
ganlikun	0:13413ea9a877	2586	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
ganlikun	0:13413ea9a877	2587	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
ganlikun	0:13413ea9a877	2588	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
ganlikun	0:13413ea9a877	2589
ganlikun	0:13413ea9a877	2590	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2591	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
ganlikun	0:13413ea9a877	2592	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
ganlikun	0:13413ea9a877	2593	{
ganlikun	0:13413ea9a877	2594	/* Return error status */
ganlikun	0:13413ea9a877	2595	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2596	}
ganlikun	0:13413ea9a877	2597	else
ganlikun	0:13413ea9a877	2598	{
ganlikun	0:13413ea9a877	2599	/* Set analog watchdog data source */
ganlikun	0:13413ea9a877	2600	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
ganlikun	0:13413ea9a877	2601	hdfsdm_filter->Instance->FLTCR1 \|= awdParam->DataSource;
ganlikun	0:13413ea9a877	2602
ganlikun	0:13413ea9a877	2603	/* Set thresholds and break signals */
ganlikun	0:13413ea9a877	2604	hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT \| DFSDM_FLTAWHTR_BKAWH);
ganlikun	0:13413ea9a877	2605	hdfsdm_filter->Instance->FLTAWHTR \|= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) \| \
ganlikun	0:13413ea9a877	2606	awdParam->HighBreakSignal);
ganlikun	0:13413ea9a877	2607	hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT \| DFSDM_FLTAWLTR_BKAWL);
ganlikun	0:13413ea9a877	2608	hdfsdm_filter->Instance->FLTAWLTR \|= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) \| \
ganlikun	0:13413ea9a877	2609	awdParam->LowBreakSignal);
ganlikun	0:13413ea9a877	2610
ganlikun	0:13413ea9a877	2611	/* Set channels and interrupt for analog watchdog */
ganlikun	0:13413ea9a877	2612	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
ganlikun	0:13413ea9a877	2613	hdfsdm_filter->Instance->FLTCR2 \|= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) \| \
ganlikun	0:13413ea9a877	2614	DFSDM_FLTCR2_AWDIE);
ganlikun	0:13413ea9a877	2615	}
ganlikun	0:13413ea9a877	2616	/* Return function status */
ganlikun	0:13413ea9a877	2617	return status;
ganlikun	0:13413ea9a877	2618	}
ganlikun	0:13413ea9a877	2619
ganlikun	0:13413ea9a877	2620	/**
ganlikun	0:13413ea9a877	2621	* @brief This function allows to stop filter analog watchdog in interrupt mode.
ganlikun	0:13413ea9a877	2622	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2623	* @retval HAL status
ganlikun	0:13413ea9a877	2624	*/
ganlikun	0:13413ea9a877	2625	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2626	{
ganlikun	0:13413ea9a877	2627	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2628
ganlikun	0:13413ea9a877	2629	/* Check parameters */
ganlikun	0:13413ea9a877	2630	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2631
ganlikun	0:13413ea9a877	2632	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2633	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
ganlikun	0:13413ea9a877	2634	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
ganlikun	0:13413ea9a877	2635	{
ganlikun	0:13413ea9a877	2636	/* Return error status */
ganlikun	0:13413ea9a877	2637	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2638	}
ganlikun	0:13413ea9a877	2639	else
ganlikun	0:13413ea9a877	2640	{
ganlikun	0:13413ea9a877	2641	/* Reset channels for analog watchdog and deactivate interrupt */
ganlikun	0:13413ea9a877	2642	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH \| DFSDM_FLTCR2_AWDIE);
ganlikun	0:13413ea9a877	2643
ganlikun	0:13413ea9a877	2644	/* Clear all analog watchdog flags */
ganlikun	0:13413ea9a877	2645	hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF \| DFSDM_FLTAWCFR_CLRAWLTF);
ganlikun	0:13413ea9a877	2646
ganlikun	0:13413ea9a877	2647	/* Reset thresholds and break signals */
ganlikun	0:13413ea9a877	2648	hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT \| DFSDM_FLTAWHTR_BKAWH);
ganlikun	0:13413ea9a877	2649	hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT \| DFSDM_FLTAWLTR_BKAWL);
ganlikun	0:13413ea9a877	2650
ganlikun	0:13413ea9a877	2651	/* Reset analog watchdog data source */
ganlikun	0:13413ea9a877	2652	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
ganlikun	0:13413ea9a877	2653	}
ganlikun	0:13413ea9a877	2654	/* Return function status */
ganlikun	0:13413ea9a877	2655	return status;
ganlikun	0:13413ea9a877	2656	}
ganlikun	0:13413ea9a877	2657
ganlikun	0:13413ea9a877	2658	/**
ganlikun	0:13413ea9a877	2659	* @brief This function allows to start extreme detector feature.
ganlikun	0:13413ea9a877	2660	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2661	* @param Channel : Channels where extreme detector is enabled.
ganlikun	0:13413ea9a877	2662	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
ganlikun	0:13413ea9a877	2663	* @retval HAL status
ganlikun	0:13413ea9a877	2664	*/
ganlikun	0:13413ea9a877	2665	HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2666	uint32_t Channel)
ganlikun	0:13413ea9a877	2667	{
ganlikun	0:13413ea9a877	2668	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2669
ganlikun	0:13413ea9a877	2670	/* Check parameters */
ganlikun	0:13413ea9a877	2671	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2672	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
ganlikun	0:13413ea9a877	2673
ganlikun	0:13413ea9a877	2674	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2675	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
ganlikun	0:13413ea9a877	2676	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
ganlikun	0:13413ea9a877	2677	{
ganlikun	0:13413ea9a877	2678	/* Return error status */
ganlikun	0:13413ea9a877	2679	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2680	}
ganlikun	0:13413ea9a877	2681	else
ganlikun	0:13413ea9a877	2682	{
ganlikun	0:13413ea9a877	2683	/* Set channels for extreme detector */
ganlikun	0:13413ea9a877	2684	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
ganlikun	0:13413ea9a877	2685	hdfsdm_filter->Instance->FLTCR2 \|= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);
ganlikun	0:13413ea9a877	2686	}
ganlikun	0:13413ea9a877	2687	/* Return function status */
ganlikun	0:13413ea9a877	2688	return status;
ganlikun	0:13413ea9a877	2689	}
ganlikun	0:13413ea9a877	2690
ganlikun	0:13413ea9a877	2691	/**
ganlikun	0:13413ea9a877	2692	* @brief This function allows to stop extreme detector feature.
ganlikun	0:13413ea9a877	2693	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2694	* @retval HAL status
ganlikun	0:13413ea9a877	2695	*/
ganlikun	0:13413ea9a877	2696	HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2697	{
ganlikun	0:13413ea9a877	2698	HAL_StatusTypeDef status = HAL_OK;
ganlikun	0:13413ea9a877	2699	__IO uint32_t reg1;
ganlikun	0:13413ea9a877	2700	__IO uint32_t reg2;
ganlikun	0:13413ea9a877	2701
ganlikun	0:13413ea9a877	2702	/* Check parameters */
ganlikun	0:13413ea9a877	2703	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2704
ganlikun	0:13413ea9a877	2705	/* Check DFSDM filter state */
ganlikun	0:13413ea9a877	2706	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
ganlikun	0:13413ea9a877	2707	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
ganlikun	0:13413ea9a877	2708	{
ganlikun	0:13413ea9a877	2709	/* Return error status */
ganlikun	0:13413ea9a877	2710	status = HAL_ERROR;
ganlikun	0:13413ea9a877	2711	}
ganlikun	0:13413ea9a877	2712	else
ganlikun	0:13413ea9a877	2713	{
ganlikun	0:13413ea9a877	2714	/* Reset channels for extreme detector */
ganlikun	0:13413ea9a877	2715	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
ganlikun	0:13413ea9a877	2716
ganlikun	0:13413ea9a877	2717	/* Clear extreme detector values */
ganlikun	0:13413ea9a877	2718	reg1 = hdfsdm_filter->Instance->FLTEXMAX;
ganlikun	0:13413ea9a877	2719	reg2 = hdfsdm_filter->Instance->FLTEXMIN;
ganlikun	0:13413ea9a877	2720	UNUSED(reg1); /* To avoid GCC warning */
ganlikun	0:13413ea9a877	2721	UNUSED(reg2); /* To avoid GCC warning */
ganlikun	0:13413ea9a877	2722	}
ganlikun	0:13413ea9a877	2723	/* Return function status */
ganlikun	0:13413ea9a877	2724	return status;
ganlikun	0:13413ea9a877	2725	}
ganlikun	0:13413ea9a877	2726
ganlikun	0:13413ea9a877	2727	/**
ganlikun	0:13413ea9a877	2728	* @brief This function allows to get extreme detector maximum value.
ganlikun	0:13413ea9a877	2729	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2730	* @param Channel : Corresponding channel.
ganlikun	0:13413ea9a877	2731	* @retval Extreme detector maximum value
ganlikun	0:13413ea9a877	2732	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
ganlikun	0:13413ea9a877	2733	*/
ganlikun	0:13413ea9a877	2734	int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2735	uint32_t *Channel)
ganlikun	0:13413ea9a877	2736	{
ganlikun	0:13413ea9a877	2737	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2738	int32_t value = 0;
ganlikun	0:13413ea9a877	2739
ganlikun	0:13413ea9a877	2740	/* Check parameters */
ganlikun	0:13413ea9a877	2741	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2742	assert_param(Channel != NULL);
ganlikun	0:13413ea9a877	2743
ganlikun	0:13413ea9a877	2744	/* Get value of extreme detector maximum register */
ganlikun	0:13413ea9a877	2745	reg = hdfsdm_filter->Instance->FLTEXMAX;
ganlikun	0:13413ea9a877	2746
ganlikun	0:13413ea9a877	2747	/* Extract channel and extreme detector maximum value */
ganlikun	0:13413ea9a877	2748	*Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
ganlikun	0:13413ea9a877	2749	value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
ganlikun	0:13413ea9a877	2750
ganlikun	0:13413ea9a877	2751	/* return extreme detector maximum value */
ganlikun	0:13413ea9a877	2752	return value;
ganlikun	0:13413ea9a877	2753	}
ganlikun	0:13413ea9a877	2754
ganlikun	0:13413ea9a877	2755	/**
ganlikun	0:13413ea9a877	2756	* @brief This function allows to get extreme detector minimum value.
ganlikun	0:13413ea9a877	2757	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2758	* @param Channel : Corresponding channel.
ganlikun	0:13413ea9a877	2759	* @retval Extreme detector minimum value
ganlikun	0:13413ea9a877	2760	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
ganlikun	0:13413ea9a877	2761	*/
ganlikun	0:13413ea9a877	2762	int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	2763	uint32_t *Channel)
ganlikun	0:13413ea9a877	2764	{
ganlikun	0:13413ea9a877	2765	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2766	int32_t value = 0;
ganlikun	0:13413ea9a877	2767
ganlikun	0:13413ea9a877	2768	/* Check parameters */
ganlikun	0:13413ea9a877	2769	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2770	assert_param(Channel != NULL);
ganlikun	0:13413ea9a877	2771
ganlikun	0:13413ea9a877	2772	/* Get value of extreme detector minimum register */
ganlikun	0:13413ea9a877	2773	reg = hdfsdm_filter->Instance->FLTEXMIN;
ganlikun	0:13413ea9a877	2774
ganlikun	0:13413ea9a877	2775	/* Extract channel and extreme detector minimum value */
ganlikun	0:13413ea9a877	2776	*Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
ganlikun	0:13413ea9a877	2777	value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
ganlikun	0:13413ea9a877	2778
ganlikun	0:13413ea9a877	2779	/* return extreme detector minimum value */
ganlikun	0:13413ea9a877	2780	return value;
ganlikun	0:13413ea9a877	2781	}
ganlikun	0:13413ea9a877	2782
ganlikun	0:13413ea9a877	2783	/**
ganlikun	0:13413ea9a877	2784	* @brief This function allows to get conversion time value.
ganlikun	0:13413ea9a877	2785	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2786	* @retval Conversion time value
ganlikun	0:13413ea9a877	2787	* @note To get time in second, this value has to be divided by DFSDM clock frequency.
ganlikun	0:13413ea9a877	2788	*/
ganlikun	0:13413ea9a877	2789	uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2790	{
ganlikun	0:13413ea9a877	2791	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2792	uint32_t value = 0U;
ganlikun	0:13413ea9a877	2793
ganlikun	0:13413ea9a877	2794	/* Check parameters */
ganlikun	0:13413ea9a877	2795	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
ganlikun	0:13413ea9a877	2796
ganlikun	0:13413ea9a877	2797	/* Get value of conversion timer register */
ganlikun	0:13413ea9a877	2798	reg = hdfsdm_filter->Instance->FLTCNVTIMR;
ganlikun	0:13413ea9a877	2799
ganlikun	0:13413ea9a877	2800	/* Extract conversion time value */
ganlikun	0:13413ea9a877	2801	value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
ganlikun	0:13413ea9a877	2802
ganlikun	0:13413ea9a877	2803	/* return extreme detector minimum value */
ganlikun	0:13413ea9a877	2804	return value;
ganlikun	0:13413ea9a877	2805	}
ganlikun	0:13413ea9a877	2806
ganlikun	0:13413ea9a877	2807	/**
ganlikun	0:13413ea9a877	2808	* @brief This function handles the DFSDM interrupts.
ganlikun	0:13413ea9a877	2809	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	2810	* @retval None
ganlikun	0:13413ea9a877	2811	*/
ganlikun	0:13413ea9a877	2812	void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	2813	{
ganlikun	0:13413ea9a877	2814	/* Check if overrun occurs during regular conversion */
ganlikun	0:13413ea9a877	2815	if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0U) && \
ganlikun	0:13413ea9a877	2816	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0U))
ganlikun	0:13413ea9a877	2817	{
ganlikun	0:13413ea9a877	2818	/* Clear regular overrun flag */
ganlikun	0:13413ea9a877	2819	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
ganlikun	0:13413ea9a877	2820
ganlikun	0:13413ea9a877	2821	/* Update error code */
ganlikun	0:13413ea9a877	2822	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
ganlikun	0:13413ea9a877	2823
ganlikun	0:13413ea9a877	2824	/* Call error callback */
ganlikun	0:13413ea9a877	2825	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	2826	}
ganlikun	0:13413ea9a877	2827	/* Check if overrun occurs during injected conversion */
ganlikun	0:13413ea9a877	2828	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0U) && \
ganlikun	0:13413ea9a877	2829	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0U))
ganlikun	0:13413ea9a877	2830	{
ganlikun	0:13413ea9a877	2831	/* Clear injected overrun flag */
ganlikun	0:13413ea9a877	2832	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
ganlikun	0:13413ea9a877	2833
ganlikun	0:13413ea9a877	2834	/* Update error code */
ganlikun	0:13413ea9a877	2835	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
ganlikun	0:13413ea9a877	2836
ganlikun	0:13413ea9a877	2837	/* Call error callback */
ganlikun	0:13413ea9a877	2838	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	2839	}
ganlikun	0:13413ea9a877	2840	/* Check if end of regular conversion */
ganlikun	0:13413ea9a877	2841	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0U) && \
ganlikun	0:13413ea9a877	2842	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0U))
ganlikun	0:13413ea9a877	2843	{
ganlikun	0:13413ea9a877	2844	/* Call regular conversion complete callback */
ganlikun	0:13413ea9a877	2845	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	2846
ganlikun	0:13413ea9a877	2847	/* End of conversion if mode is not continuous and software trigger */
ganlikun	0:13413ea9a877	2848	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
ganlikun	0:13413ea9a877	2849	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
ganlikun	0:13413ea9a877	2850	{
ganlikun	0:13413ea9a877	2851	/* Disable interrupts for regular conversions */
ganlikun	0:13413ea9a877	2852	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
ganlikun	0:13413ea9a877	2853
ganlikun	0:13413ea9a877	2854	/* Update DFSDM filter state */
ganlikun	0:13413ea9a877	2855	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
ganlikun	0:13413ea9a877	2856	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
ganlikun	0:13413ea9a877	2857	}
ganlikun	0:13413ea9a877	2858	}
ganlikun	0:13413ea9a877	2859	/* Check if end of injected conversion */
ganlikun	0:13413ea9a877	2860	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0U) && \
ganlikun	0:13413ea9a877	2861	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0U))
ganlikun	0:13413ea9a877	2862	{
ganlikun	0:13413ea9a877	2863	/* Call injected conversion complete callback */
ganlikun	0:13413ea9a877	2864	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	2865
ganlikun	0:13413ea9a877	2866	/* Update remaining injected conversions */
ganlikun	0:13413ea9a877	2867	hdfsdm_filter->InjConvRemaining--;
ganlikun	0:13413ea9a877	2868	if(hdfsdm_filter->InjConvRemaining == 0U)
ganlikun	0:13413ea9a877	2869	{
ganlikun	0:13413ea9a877	2870	/* End of conversion if trigger is software */
ganlikun	0:13413ea9a877	2871	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
ganlikun	0:13413ea9a877	2872	{
ganlikun	0:13413ea9a877	2873	/* Disable interrupts for injected conversions */
ganlikun	0:13413ea9a877	2874	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
ganlikun	0:13413ea9a877	2875
ganlikun	0:13413ea9a877	2876	/* Update DFSDM filter state */
ganlikun	0:13413ea9a877	2877	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
ganlikun	0:13413ea9a877	2878	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
ganlikun	0:13413ea9a877	2879	}
ganlikun	0:13413ea9a877	2880	/* end of injected sequence, reset the value */
ganlikun	0:13413ea9a877	2881	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
ganlikun	0:13413ea9a877	2882	hdfsdm_filter->InjectedChannelsNbr : 1U;
ganlikun	0:13413ea9a877	2883	}
ganlikun	0:13413ea9a877	2884	}
ganlikun	0:13413ea9a877	2885	/* Check if analog watchdog occurs */
ganlikun	0:13413ea9a877	2886	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0U) && \
ganlikun	0:13413ea9a877	2887	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0U))
ganlikun	0:13413ea9a877	2888	{
ganlikun	0:13413ea9a877	2889	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2890	uint32_t threshold = 0U;
ganlikun	0:13413ea9a877	2891	uint32_t channel = 0U;
ganlikun	0:13413ea9a877	2892
ganlikun	0:13413ea9a877	2893	/* Get channel and threshold */
ganlikun	0:13413ea9a877	2894	reg = hdfsdm_filter->Instance->FLTAWSR;
ganlikun	0:13413ea9a877	2895	threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
ganlikun	0:13413ea9a877	2896	if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
ganlikun	0:13413ea9a877	2897	{
ganlikun	0:13413ea9a877	2898	reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
ganlikun	0:13413ea9a877	2899	}
ganlikun	0:13413ea9a877	2900	while((reg & 1U) == 0U)
ganlikun	0:13413ea9a877	2901	{
ganlikun	0:13413ea9a877	2902	channel++;
ganlikun	0:13413ea9a877	2903	reg = reg >> 1U;
ganlikun	0:13413ea9a877	2904	}
ganlikun	0:13413ea9a877	2905	/* Clear analog watchdog flag */
ganlikun	0:13413ea9a877	2906	hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
ganlikun	0:13413ea9a877	2907	(1U << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
ganlikun	0:13413ea9a877	2908	(1U << channel);
ganlikun	0:13413ea9a877	2909
ganlikun	0:13413ea9a877	2910	/* Call analog watchdog callback */
ganlikun	0:13413ea9a877	2911	HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
ganlikun	0:13413ea9a877	2912	}
ganlikun	0:13413ea9a877	2913	/* Check if clock absence occurs */
ganlikun	0:13413ea9a877	2914	else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
ganlikun	0:13413ea9a877	2915	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0U) && \
ganlikun	0:13413ea9a877	2916	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0U))
ganlikun	0:13413ea9a877	2917	{
ganlikun	0:13413ea9a877	2918	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2919	uint32_t channel = 0U;
ganlikun	0:13413ea9a877	2920
ganlikun	0:13413ea9a877	2921	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
ganlikun	0:13413ea9a877	2922
ganlikun	0:13413ea9a877	2923	while(channel < DFSDM1_CHANNEL_NUMBER)
ganlikun	0:13413ea9a877	2924	{
ganlikun	0:13413ea9a877	2925	/* Check if flag is set and corresponding channel is enabled */
ganlikun	0:13413ea9a877	2926	if(((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))
ganlikun	0:13413ea9a877	2927	{
ganlikun	0:13413ea9a877	2928	/* Check clock absence has been enabled for this channel */
ganlikun	0:13413ea9a877	2929	if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
ganlikun	0:13413ea9a877	2930	{
ganlikun	0:13413ea9a877	2931	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	2932	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	2933
ganlikun	0:13413ea9a877	2934	/* Call clock absence callback */
ganlikun	0:13413ea9a877	2935	HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
ganlikun	0:13413ea9a877	2936	}
ganlikun	0:13413ea9a877	2937	}
ganlikun	0:13413ea9a877	2938	channel++;
ganlikun	0:13413ea9a877	2939	reg = reg >> 1U;
ganlikun	0:13413ea9a877	2940	}
ganlikun	0:13413ea9a877	2941	}
ganlikun	0:13413ea9a877	2942	#if defined (DFSDM2_Channel0)
ganlikun	0:13413ea9a877	2943	/* Check if clock absence occurs */
ganlikun	0:13413ea9a877	2944	else if((hdfsdm_filter->Instance == DFSDM2_Filter0) && \
ganlikun	0:13413ea9a877	2945	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0U) && \
ganlikun	0:13413ea9a877	2946	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0U))
ganlikun	0:13413ea9a877	2947	{
ganlikun	0:13413ea9a877	2948	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2949	uint32_t channel = 0U;
ganlikun	0:13413ea9a877	2950
ganlikun	0:13413ea9a877	2951	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
ganlikun	0:13413ea9a877	2952
ganlikun	0:13413ea9a877	2953	while(channel < DFSDM2_CHANNEL_NUMBER)
ganlikun	0:13413ea9a877	2954	{
ganlikun	0:13413ea9a877	2955	/* Check if flag is set and corresponding channel is enabled */
ganlikun	0:13413ea9a877	2956	if(((reg & 1U) != 0U) && (a_dfsdm2ChannelHandle[channel] != NULL))
ganlikun	0:13413ea9a877	2957	{
ganlikun	0:13413ea9a877	2958	/* Check clock absence has been enabled for this channel */
ganlikun	0:13413ea9a877	2959	if((a_dfsdm2ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
ganlikun	0:13413ea9a877	2960	{
ganlikun	0:13413ea9a877	2961	/* Clear clock absence flag */
ganlikun	0:13413ea9a877	2962	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
ganlikun	0:13413ea9a877	2963
ganlikun	0:13413ea9a877	2964	/* Call clock absence callback */
ganlikun	0:13413ea9a877	2965	HAL_DFSDM_ChannelCkabCallback(a_dfsdm2ChannelHandle[channel]);
ganlikun	0:13413ea9a877	2966	}
ganlikun	0:13413ea9a877	2967	}
ganlikun	0:13413ea9a877	2968	channel++;
ganlikun	0:13413ea9a877	2969	reg = reg >> 1U;
ganlikun	0:13413ea9a877	2970	}
ganlikun	0:13413ea9a877	2971	}
ganlikun	0:13413ea9a877	2972	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	2973	/* Check if short circuit detection occurs */
ganlikun	0:13413ea9a877	2974	else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
ganlikun	0:13413ea9a877	2975	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0U) && \
ganlikun	0:13413ea9a877	2976	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0U))
ganlikun	0:13413ea9a877	2977	{
ganlikun	0:13413ea9a877	2978	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	2979	uint32_t channel = 0U;
ganlikun	0:13413ea9a877	2980
ganlikun	0:13413ea9a877	2981	/* Get channel */
ganlikun	0:13413ea9a877	2982	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
ganlikun	0:13413ea9a877	2983	while((reg & 1U) == 0U)
ganlikun	0:13413ea9a877	2984	{
ganlikun	0:13413ea9a877	2985	channel++;
ganlikun	0:13413ea9a877	2986	reg = reg >> 1U;
ganlikun	0:13413ea9a877	2987	}
ganlikun	0:13413ea9a877	2988
ganlikun	0:13413ea9a877	2989	/* Clear short circuit detection flag */
ganlikun	0:13413ea9a877	2990	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	2991
ganlikun	0:13413ea9a877	2992	/* Call short circuit detection callback */
ganlikun	0:13413ea9a877	2993	HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
ganlikun	0:13413ea9a877	2994	}
ganlikun	0:13413ea9a877	2995	#if defined (DFSDM2_Channel0)
ganlikun	0:13413ea9a877	2996	/* Check if short circuit detection occurs */
ganlikun	0:13413ea9a877	2997	else if((hdfsdm_filter->Instance == DFSDM2_Filter0) && \
ganlikun	0:13413ea9a877	2998	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0U) && \
ganlikun	0:13413ea9a877	2999	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0U))
ganlikun	0:13413ea9a877	3000	{
ganlikun	0:13413ea9a877	3001	uint32_t reg = 0U;
ganlikun	0:13413ea9a877	3002	uint32_t channel = 0U;
ganlikun	0:13413ea9a877	3003
ganlikun	0:13413ea9a877	3004	/* Get channel */
ganlikun	0:13413ea9a877	3005	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
ganlikun	0:13413ea9a877	3006	while((reg & 1U) == 0U)
ganlikun	0:13413ea9a877	3007	{
ganlikun	0:13413ea9a877	3008	channel++;
ganlikun	0:13413ea9a877	3009	reg = reg >> 1U;
ganlikun	0:13413ea9a877	3010	}
ganlikun	0:13413ea9a877	3011
ganlikun	0:13413ea9a877	3012	/* Clear short circuit detection flag */
ganlikun	0:13413ea9a877	3013	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
ganlikun	0:13413ea9a877	3014
ganlikun	0:13413ea9a877	3015	/* Call short circuit detection callback */
ganlikun	0:13413ea9a877	3016	HAL_DFSDM_ChannelScdCallback(a_dfsdm2ChannelHandle[channel]);
ganlikun	0:13413ea9a877	3017	}
ganlikun	0:13413ea9a877	3018	#endif /* DFSDM2_Channel0 */
ganlikun	0:13413ea9a877	3019	}
ganlikun	0:13413ea9a877	3020
ganlikun	0:13413ea9a877	3021	/**
ganlikun	0:13413ea9a877	3022	* @brief Regular conversion complete callback.
ganlikun	0:13413ea9a877	3023	* @note In interrupt mode, user has to read conversion value in this function
ganlikun	0:13413ea9a877	3024	* using HAL_DFSDM_FilterGetRegularValue.
ganlikun	0:13413ea9a877	3025	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3026	* @retval None
ganlikun	0:13413ea9a877	3027	*/
ganlikun	0:13413ea9a877	3028	__weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	3029	{
ganlikun	0:13413ea9a877	3030	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	3031	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	3032	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	3033	the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
ganlikun	0:13413ea9a877	3034	*/
ganlikun	0:13413ea9a877	3035	}
ganlikun	0:13413ea9a877	3036
ganlikun	0:13413ea9a877	3037	/**
ganlikun	0:13413ea9a877	3038	* @brief Half regular conversion complete callback.
ganlikun	0:13413ea9a877	3039	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3040	* @retval None
ganlikun	0:13413ea9a877	3041	*/
ganlikun	0:13413ea9a877	3042	__weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	3043	{
ganlikun	0:13413ea9a877	3044	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	3045	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	3046	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	3047	the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
ganlikun	0:13413ea9a877	3048	*/
ganlikun	0:13413ea9a877	3049	}
ganlikun	0:13413ea9a877	3050
ganlikun	0:13413ea9a877	3051	/**
ganlikun	0:13413ea9a877	3052	* @brief Injected conversion complete callback.
ganlikun	0:13413ea9a877	3053	* @note In interrupt mode, user has to read conversion value in this function
ganlikun	0:13413ea9a877	3054	* using HAL_DFSDM_FilterGetInjectedValue.
ganlikun	0:13413ea9a877	3055	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3056	* @retval None
ganlikun	0:13413ea9a877	3057	*/
ganlikun	0:13413ea9a877	3058	__weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	3059	{
ganlikun	0:13413ea9a877	3060	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	3061	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	3062	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	3063	the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
ganlikun	0:13413ea9a877	3064	*/
ganlikun	0:13413ea9a877	3065	}
ganlikun	0:13413ea9a877	3066
ganlikun	0:13413ea9a877	3067	/**
ganlikun	0:13413ea9a877	3068	* @brief Half injected conversion complete callback.
ganlikun	0:13413ea9a877	3069	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3070	* @retval None
ganlikun	0:13413ea9a877	3071	*/
ganlikun	0:13413ea9a877	3072	__weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	3073	{
ganlikun	0:13413ea9a877	3074	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	3075	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	3076	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	3077	the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
ganlikun	0:13413ea9a877	3078	*/
ganlikun	0:13413ea9a877	3079	}
ganlikun	0:13413ea9a877	3080
ganlikun	0:13413ea9a877	3081	/**
ganlikun	0:13413ea9a877	3082	* @brief Filter analog watchdog callback.
ganlikun	0:13413ea9a877	3083	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3084	* @param Channel : Corresponding channel.
ganlikun	0:13413ea9a877	3085	* @param Threshold : Low or high threshold has been reached.
ganlikun	0:13413ea9a877	3086	* @retval None
ganlikun	0:13413ea9a877	3087	*/
ganlikun	0:13413ea9a877	3088	__weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
ganlikun	0:13413ea9a877	3089	uint32_t Channel, uint32_t Threshold)
ganlikun	0:13413ea9a877	3090	{
ganlikun	0:13413ea9a877	3091	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	3092	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	3093	UNUSED(Channel);
ganlikun	0:13413ea9a877	3094	UNUSED(Threshold);
ganlikun	0:13413ea9a877	3095
ganlikun	0:13413ea9a877	3096	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	3097	the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
ganlikun	0:13413ea9a877	3098	*/
ganlikun	0:13413ea9a877	3099	}
ganlikun	0:13413ea9a877	3100
ganlikun	0:13413ea9a877	3101	/**
ganlikun	0:13413ea9a877	3102	* @brief Error callback.
ganlikun	0:13413ea9a877	3103	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3104	* @retval None
ganlikun	0:13413ea9a877	3105	*/
ganlikun	0:13413ea9a877	3106	__weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	3107	{
ganlikun	0:13413ea9a877	3108	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	3109	UNUSED(hdfsdm_filter);
ganlikun	0:13413ea9a877	3110	/* NOTE : This function should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	3111	the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
ganlikun	0:13413ea9a877	3112	*/
ganlikun	0:13413ea9a877	3113	}
ganlikun	0:13413ea9a877	3114
ganlikun	0:13413ea9a877	3115	/**
ganlikun	0:13413ea9a877	3116	* @}
ganlikun	0:13413ea9a877	3117	*/
ganlikun	0:13413ea9a877	3118
ganlikun	0:13413ea9a877	3119	/** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
ganlikun	0:13413ea9a877	3120	* @brief Filter state functions
ganlikun	0:13413ea9a877	3121	*
ganlikun	0:13413ea9a877	3122	@verbatim
ganlikun	0:13413ea9a877	3123	==============================================================================
ganlikun	0:13413ea9a877	3124	##### Filter state functions #####
ganlikun	0:13413ea9a877	3125	==============================================================================
ganlikun	0:13413ea9a877	3126	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	3127	(+) Get the DFSDM filter state.
ganlikun	0:13413ea9a877	3128	(+) Get the DFSDM filter error.
ganlikun	0:13413ea9a877	3129	@endverbatim
ganlikun	0:13413ea9a877	3130	* @{
ganlikun	0:13413ea9a877	3131	*/
ganlikun	0:13413ea9a877	3132
ganlikun	0:13413ea9a877	3133	/**
ganlikun	0:13413ea9a877	3134	* @brief This function allows to get the current DFSDM filter handle state.
ganlikun	0:13413ea9a877	3135	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3136	* @retval DFSDM filter state.
ganlikun	0:13413ea9a877	3137	*/
ganlikun	0:13413ea9a877	3138	HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	3139	{
ganlikun	0:13413ea9a877	3140	/* Return DFSDM filter handle state */
ganlikun	0:13413ea9a877	3141	return hdfsdm_filter->State;
ganlikun	0:13413ea9a877	3142	}
ganlikun	0:13413ea9a877	3143
ganlikun	0:13413ea9a877	3144	/**
ganlikun	0:13413ea9a877	3145	* @brief This function allows to get the current DFSDM filter error.
ganlikun	0:13413ea9a877	3146	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3147	* @retval DFSDM filter error code.
ganlikun	0:13413ea9a877	3148	*/
ganlikun	0:13413ea9a877	3149	uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
ganlikun	0:13413ea9a877	3150	{
ganlikun	0:13413ea9a877	3151	return hdfsdm_filter->ErrorCode;
ganlikun	0:13413ea9a877	3152	}
ganlikun	0:13413ea9a877	3153
ganlikun	0:13413ea9a877	3154	/**
ganlikun	0:13413ea9a877	3155	* @}
ganlikun	0:13413ea9a877	3156	*/
ganlikun	0:13413ea9a877	3157
ganlikun	0:13413ea9a877	3158	/** @defgroup DFSDM_Exported_Functions_Group5_Filter MultiChannel operation functions
ganlikun	0:13413ea9a877	3159	* @brief Filter state functions
ganlikun	0:13413ea9a877	3160	*
ganlikun	0:13413ea9a877	3161	@verbatim
ganlikun	0:13413ea9a877	3162	==============================================================================
ganlikun	0:13413ea9a877	3163	##### Filter MultiChannel operation functions #####
ganlikun	0:13413ea9a877	3164	==============================================================================
ganlikun	0:13413ea9a877	3165	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	3166	(+) Control the DFSDM Multi channel delay block
ganlikun	0:13413ea9a877	3167	@endverbatim
ganlikun	0:13413ea9a877	3168	* @{
ganlikun	0:13413ea9a877	3169	*/
ganlikun	0:13413ea9a877	3170	#if defined(SYSCFG_MCHDLYCR_BSCKSEL)
ganlikun	0:13413ea9a877	3171	/**
ganlikun	0:13413ea9a877	3172	* @brief Select the DFSDM2 as clock source for the bitstream clock.
ganlikun	0:13413ea9a877	3173	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
ganlikun	0:13413ea9a877	3174	* before HAL_DFSDM_BitstreamClock_Start()
ganlikun	0:13413ea9a877	3175	*/
ganlikun	0:13413ea9a877	3176	void HAL_DFSDM_BitstreamClock_Start(void)
ganlikun	0:13413ea9a877	3177	{
ganlikun	0:13413ea9a877	3178	uint32_t tmp = 0;
ganlikun	0:13413ea9a877	3179
ganlikun	0:13413ea9a877	3180	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3181	tmp = (tmp &(~SYSCFG_MCHDLYCR_BSCKSEL));
ganlikun	0:13413ea9a877	3182
ganlikun	0:13413ea9a877	3183	SYSCFG->MCHDLYCR = (tmp\|SYSCFG_MCHDLYCR_BSCKSEL);
ganlikun	0:13413ea9a877	3184	}
ganlikun	0:13413ea9a877	3185
ganlikun	0:13413ea9a877	3186	/**
ganlikun	0:13413ea9a877	3187	* @brief Stop the DFSDM2 as clock source for the bitstream clock.
ganlikun	0:13413ea9a877	3188	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
ganlikun	0:13413ea9a877	3189	* before HAL_DFSDM_BitstreamClock_Stop()
ganlikun	0:13413ea9a877	3190	* @retval None
ganlikun	0:13413ea9a877	3191	*/
ganlikun	0:13413ea9a877	3192	void HAL_DFSDM_BitstreamClock_Stop(void)
ganlikun	0:13413ea9a877	3193	{
ganlikun	0:13413ea9a877	3194	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3195
ganlikun	0:13413ea9a877	3196	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3197	tmp = (tmp &(~SYSCFG_MCHDLYCR_BSCKSEL));
ganlikun	0:13413ea9a877	3198
ganlikun	0:13413ea9a877	3199	SYSCFG->MCHDLYCR = tmp;
ganlikun	0:13413ea9a877	3200	}
ganlikun	0:13413ea9a877	3201
ganlikun	0:13413ea9a877	3202	/**
ganlikun	0:13413ea9a877	3203	* @brief Disable Delay Clock for DFSDM1/2.
ganlikun	0:13413ea9a877	3204	* @param MCHDLY: HAL_MCHDLY_CLOCK_DFSDM2.
ganlikun	0:13413ea9a877	3205	* HAL_MCHDLY_CLOCK_DFSDM1.
ganlikun	0:13413ea9a877	3206	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
ganlikun	0:13413ea9a877	3207	* before HAL_DFSDM_DisableDelayClock()
ganlikun	0:13413ea9a877	3208	* @retval None
ganlikun	0:13413ea9a877	3209	*/
ganlikun	0:13413ea9a877	3210	void HAL_DFSDM_DisableDelayClock(uint32_t MCHDLY)
ganlikun	0:13413ea9a877	3211	{
ganlikun	0:13413ea9a877	3212	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3213
ganlikun	0:13413ea9a877	3214	assert_param(IS_DFSDM_DELAY_CLOCK(MCHDLY));
ganlikun	0:13413ea9a877	3215
ganlikun	0:13413ea9a877	3216	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3217	if(MCHDLY == HAL_MCHDLY_CLOCK_DFSDM2)
ganlikun	0:13413ea9a877	3218	{
ganlikun	0:13413ea9a877	3219	tmp = tmp &(~SYSCFG_MCHDLYCR_MCHDLY2EN);
ganlikun	0:13413ea9a877	3220	}
ganlikun	0:13413ea9a877	3221	else
ganlikun	0:13413ea9a877	3222	{
ganlikun	0:13413ea9a877	3223	tmp = tmp &(~SYSCFG_MCHDLYCR_MCHDLY1EN);
ganlikun	0:13413ea9a877	3224	}
ganlikun	0:13413ea9a877	3225
ganlikun	0:13413ea9a877	3226	SYSCFG->MCHDLYCR = tmp;
ganlikun	0:13413ea9a877	3227	}
ganlikun	0:13413ea9a877	3228
ganlikun	0:13413ea9a877	3229	/**
ganlikun	0:13413ea9a877	3230	* @brief Enable Delay Clock for DFSDM1/2.
ganlikun	0:13413ea9a877	3231	* @param MCHDLY: HAL_MCHDLY_CLOCK_DFSDM2.
ganlikun	0:13413ea9a877	3232	* HAL_MCHDLY_CLOCK_DFSDM1.
ganlikun	0:13413ea9a877	3233	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
ganlikun	0:13413ea9a877	3234	* before HAL_DFSDM_EnableDelayClock()
ganlikun	0:13413ea9a877	3235	* @retval None
ganlikun	0:13413ea9a877	3236	*/
ganlikun	0:13413ea9a877	3237	void HAL_DFSDM_EnableDelayClock(uint32_t MCHDLY)
ganlikun	0:13413ea9a877	3238	{
ganlikun	0:13413ea9a877	3239	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3240
ganlikun	0:13413ea9a877	3241	assert_param(IS_DFSDM_DELAY_CLOCK(MCHDLY));
ganlikun	0:13413ea9a877	3242
ganlikun	0:13413ea9a877	3243	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3244	tmp = tmp & ~MCHDLY;
ganlikun	0:13413ea9a877	3245
ganlikun	0:13413ea9a877	3246	SYSCFG->MCHDLYCR = (tmp\|MCHDLY);
ganlikun	0:13413ea9a877	3247	}
ganlikun	0:13413ea9a877	3248
ganlikun	0:13413ea9a877	3249	/**
ganlikun	0:13413ea9a877	3250	* @brief Select the source for CKin signals for DFSDM1/2.
ganlikun	0:13413ea9a877	3251	* @param source: DFSDM2_CKIN_PAD.
ganlikun	0:13413ea9a877	3252	* DFSDM2_CKIN_DM.
ganlikun	0:13413ea9a877	3253	* DFSDM1_CKIN_PAD.
ganlikun	0:13413ea9a877	3254	* DFSDM1_CKIN_DM.
ganlikun	0:13413ea9a877	3255	* @retval None
ganlikun	0:13413ea9a877	3256	*/
ganlikun	0:13413ea9a877	3257	void HAL_DFSDM_ClockIn_SourceSelection(uint32_t source)
ganlikun	0:13413ea9a877	3258	{
ganlikun	0:13413ea9a877	3259	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3260
ganlikun	0:13413ea9a877	3261	assert_param(IS_DFSDM_CLOCKIN_SELECTION(source));
ganlikun	0:13413ea9a877	3262
ganlikun	0:13413ea9a877	3263	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3264
ganlikun	0:13413ea9a877	3265	if((source == HAL_DFSDM2_CKIN_PAD) \|\| (source == HAL_DFSDM2_CKIN_DM))
ganlikun	0:13413ea9a877	3266	{
ganlikun	0:13413ea9a877	3267	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CFG);
ganlikun	0:13413ea9a877	3268
ganlikun	0:13413ea9a877	3269	if(source == HAL_DFSDM2_CKIN_PAD)
ganlikun	0:13413ea9a877	3270	{
ganlikun	0:13413ea9a877	3271	source = 0x000000U;
ganlikun	0:13413ea9a877	3272	}
ganlikun	0:13413ea9a877	3273	}
ganlikun	0:13413ea9a877	3274	else
ganlikun	0:13413ea9a877	3275	{
ganlikun	0:13413ea9a877	3276	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CFG);
ganlikun	0:13413ea9a877	3277	}
ganlikun	0:13413ea9a877	3278
ganlikun	0:13413ea9a877	3279	SYSCFG->MCHDLYCR = (source\|tmp);
ganlikun	0:13413ea9a877	3280	}
ganlikun	0:13413ea9a877	3281
ganlikun	0:13413ea9a877	3282	/**
ganlikun	0:13413ea9a877	3283	* @brief Select the source for CKOut signals for DFSDM1/2.
ganlikun	0:13413ea9a877	3284	* @param source: DFSDM2_CKOUT_DFSDM2.
ganlikun	0:13413ea9a877	3285	* DFSDM2_CKOUT_M27.
ganlikun	0:13413ea9a877	3286	* DFSDM1_CKOUT_DFSDM1.
ganlikun	0:13413ea9a877	3287	* DFSDM1_CKOUT_M27.
ganlikun	0:13413ea9a877	3288	* @retval None
ganlikun	0:13413ea9a877	3289	*/
ganlikun	0:13413ea9a877	3290	void HAL_DFSDM_ClockOut_SourceSelection(uint32_t source)
ganlikun	0:13413ea9a877	3291	{
ganlikun	0:13413ea9a877	3292	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3293
ganlikun	0:13413ea9a877	3294	assert_param(IS_DFSDM_CLOCKOUT_SELECTION(source));
ganlikun	0:13413ea9a877	3295
ganlikun	0:13413ea9a877	3296	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3297
ganlikun	0:13413ea9a877	3298	if((source == HAL_DFSDM2_CKOUT_DFSDM2) \|\| (source == HAL_DFSDM2_CKOUT_M27))
ganlikun	0:13413ea9a877	3299	{
ganlikun	0:13413ea9a877	3300	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CKOSEL);
ganlikun	0:13413ea9a877	3301
ganlikun	0:13413ea9a877	3302	if(source == HAL_DFSDM2_CKOUT_DFSDM2)
ganlikun	0:13413ea9a877	3303	{
ganlikun	0:13413ea9a877	3304	source = 0x000U;
ganlikun	0:13413ea9a877	3305	}
ganlikun	0:13413ea9a877	3306	}
ganlikun	0:13413ea9a877	3307	else
ganlikun	0:13413ea9a877	3308	{
ganlikun	0:13413ea9a877	3309	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CKOSEL);
ganlikun	0:13413ea9a877	3310	}
ganlikun	0:13413ea9a877	3311
ganlikun	0:13413ea9a877	3312	SYSCFG->MCHDLYCR = (source\|tmp);
ganlikun	0:13413ea9a877	3313	}
ganlikun	0:13413ea9a877	3314
ganlikun	0:13413ea9a877	3315	/**
ganlikun	0:13413ea9a877	3316	* @brief Select the source for DataIn0 signals for DFSDM1/2.
ganlikun	0:13413ea9a877	3317	* @param source: DATAIN0_DFSDM2_PAD.
ganlikun	0:13413ea9a877	3318	* DATAIN0_DFSDM2_DATAIN1.
ganlikun	0:13413ea9a877	3319	* DATAIN0_DFSDM1_PAD.
ganlikun	0:13413ea9a877	3320	* DATAIN0_DFSDM1_DATAIN1.
ganlikun	0:13413ea9a877	3321	* @retval None
ganlikun	0:13413ea9a877	3322	*/
ganlikun	0:13413ea9a877	3323	void HAL_DFSDM_DataIn0_SourceSelection(uint32_t source)
ganlikun	0:13413ea9a877	3324	{
ganlikun	0:13413ea9a877	3325	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3326
ganlikun	0:13413ea9a877	3327	assert_param(IS_DFSDM_DATAIN0_SRC_SELECTION(source));
ganlikun	0:13413ea9a877	3328
ganlikun	0:13413ea9a877	3329	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3330
ganlikun	0:13413ea9a877	3331	if((source == HAL_DATAIN0_DFSDM2_PAD)\|\| (source == HAL_DATAIN0_DFSDM2_DATAIN1))
ganlikun	0:13413ea9a877	3332	{
ganlikun	0:13413ea9a877	3333	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D0SEL);
ganlikun	0:13413ea9a877	3334	if(source == HAL_DATAIN0_DFSDM2_PAD)
ganlikun	0:13413ea9a877	3335	{
ganlikun	0:13413ea9a877	3336	source = 0x00000U;
ganlikun	0:13413ea9a877	3337	}
ganlikun	0:13413ea9a877	3338	}
ganlikun	0:13413ea9a877	3339	else
ganlikun	0:13413ea9a877	3340	{
ganlikun	0:13413ea9a877	3341	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1D0SEL);
ganlikun	0:13413ea9a877	3342	}
ganlikun	0:13413ea9a877	3343	SYSCFG->MCHDLYCR = (source\|tmp);
ganlikun	0:13413ea9a877	3344	}
ganlikun	0:13413ea9a877	3345
ganlikun	0:13413ea9a877	3346	/**
ganlikun	0:13413ea9a877	3347	* @brief Select the source for DataIn2 signals for DFSDM1/2.
ganlikun	0:13413ea9a877	3348	* @param source: DATAIN2_DFSDM2_PAD.
ganlikun	0:13413ea9a877	3349	* DATAIN2_DFSDM2_DATAIN3.
ganlikun	0:13413ea9a877	3350	* DATAIN2_DFSDM1_PAD.
ganlikun	0:13413ea9a877	3351	* DATAIN2_DFSDM1_DATAIN3.
ganlikun	0:13413ea9a877	3352	* @retval None
ganlikun	0:13413ea9a877	3353	*/
ganlikun	0:13413ea9a877	3354	void HAL_DFSDM_DataIn2_SourceSelection(uint32_t source)
ganlikun	0:13413ea9a877	3355	{
ganlikun	0:13413ea9a877	3356	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3357
ganlikun	0:13413ea9a877	3358	assert_param(IS_DFSDM_DATAIN2_SRC_SELECTION(source));
ganlikun	0:13413ea9a877	3359
ganlikun	0:13413ea9a877	3360	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3361
ganlikun	0:13413ea9a877	3362	if((source == HAL_DATAIN2_DFSDM2_PAD)\|\| (source == HAL_DATAIN2_DFSDM2_DATAIN3))
ganlikun	0:13413ea9a877	3363	{
ganlikun	0:13413ea9a877	3364	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D2SEL);
ganlikun	0:13413ea9a877	3365	if (source == HAL_DATAIN2_DFSDM2_PAD)
ganlikun	0:13413ea9a877	3366	{
ganlikun	0:13413ea9a877	3367	source = 0x0000U;
ganlikun	0:13413ea9a877	3368	}
ganlikun	0:13413ea9a877	3369	}
ganlikun	0:13413ea9a877	3370	else
ganlikun	0:13413ea9a877	3371	{
ganlikun	0:13413ea9a877	3372	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1D2SEL);
ganlikun	0:13413ea9a877	3373	}
ganlikun	0:13413ea9a877	3374	SYSCFG->MCHDLYCR = (source\|tmp);
ganlikun	0:13413ea9a877	3375	}
ganlikun	0:13413ea9a877	3376
ganlikun	0:13413ea9a877	3377	/**
ganlikun	0:13413ea9a877	3378	* @brief Select the source for DataIn4 signals for DFSDM2.
ganlikun	0:13413ea9a877	3379	* @param source: DATAIN4_DFSDM2_PAD.
ganlikun	0:13413ea9a877	3380	* DATAIN4_DFSDM2_DATAIN5
ganlikun	0:13413ea9a877	3381	* @retval None
ganlikun	0:13413ea9a877	3382	*/
ganlikun	0:13413ea9a877	3383	void HAL_DFSDM_DataIn4_SourceSelection(uint32_t source)
ganlikun	0:13413ea9a877	3384	{
ganlikun	0:13413ea9a877	3385	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3386
ganlikun	0:13413ea9a877	3387	assert_param(IS_DFSDM_DATAIN4_SRC_SELECTION(source));
ganlikun	0:13413ea9a877	3388
ganlikun	0:13413ea9a877	3389	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3390	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D4SEL);
ganlikun	0:13413ea9a877	3391
ganlikun	0:13413ea9a877	3392	SYSCFG->MCHDLYCR = (source\|tmp);
ganlikun	0:13413ea9a877	3393	}
ganlikun	0:13413ea9a877	3394
ganlikun	0:13413ea9a877	3395	/**
ganlikun	0:13413ea9a877	3396	* @brief Select the source for DataIn6 signals for DFSDM2.
ganlikun	0:13413ea9a877	3397	* @param source: DATAIN6_DFSDM2_PAD.
ganlikun	0:13413ea9a877	3398	* DATAIN6_DFSDM2_DATAIN7.
ganlikun	0:13413ea9a877	3399	* @retval None
ganlikun	0:13413ea9a877	3400	*/
ganlikun	0:13413ea9a877	3401	void HAL_DFSDM_DataIn6_SourceSelection(uint32_t source)
ganlikun	0:13413ea9a877	3402	{
ganlikun	0:13413ea9a877	3403	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3404
ganlikun	0:13413ea9a877	3405	assert_param(IS_DFSDM_DATAIN6_SRC_SELECTION(source));
ganlikun	0:13413ea9a877	3406
ganlikun	0:13413ea9a877	3407	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3408
ganlikun	0:13413ea9a877	3409	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D6SEL);
ganlikun	0:13413ea9a877	3410
ganlikun	0:13413ea9a877	3411	SYSCFG->MCHDLYCR = (source\|tmp);
ganlikun	0:13413ea9a877	3412	}
ganlikun	0:13413ea9a877	3413
ganlikun	0:13413ea9a877	3414	/**
ganlikun	0:13413ea9a877	3415	* @brief Configure the distribution of the bitstream clock gated from TIM4_OC
ganlikun	0:13413ea9a877	3416	* for DFSDM1 or TIM3_OC for DFSDM2
ganlikun	0:13413ea9a877	3417	* @param source: DFSDM1_CLKIN0_TIM4OC2
ganlikun	0:13413ea9a877	3418	* DFSDM1_CLKIN2_TIM4OC2
ganlikun	0:13413ea9a877	3419	* DFSDM1_CLKIN1_TIM4OC1
ganlikun	0:13413ea9a877	3420	* DFSDM1_CLKIN3_TIM4OC1
ganlikun	0:13413ea9a877	3421	* DFSDM2_CLKIN0_TIM3OC4
ganlikun	0:13413ea9a877	3422	* DFSDM2_CLKIN4_TIM3OC4
ganlikun	0:13413ea9a877	3423	* DFSDM2_CLKIN1_TIM3OC3
ganlikun	0:13413ea9a877	3424	* DFSDM2_CLKIN5_TIM3OC3
ganlikun	0:13413ea9a877	3425	* DFSDM2_CLKIN2_TIM3OC2
ganlikun	0:13413ea9a877	3426	* DFSDM2_CLKIN6_TIM3OC2
ganlikun	0:13413ea9a877	3427	* DFSDM2_CLKIN3_TIM3OC1
ganlikun	0:13413ea9a877	3428	* DFSDM2_CLKIN7_TIM3OC1
ganlikun	0:13413ea9a877	3429	* @retval None
ganlikun	0:13413ea9a877	3430	*/
ganlikun	0:13413ea9a877	3431	void HAL_DFSDM_BitStreamClkDistribution_Config(uint32_t source)
ganlikun	0:13413ea9a877	3432	{
ganlikun	0:13413ea9a877	3433	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	3434
ganlikun	0:13413ea9a877	3435	assert_param(IS_DFSDM_BITSTREM_CLK_DISTRIBUTION(source));
ganlikun	0:13413ea9a877	3436
ganlikun	0:13413ea9a877	3437	tmp = SYSCFG->MCHDLYCR;
ganlikun	0:13413ea9a877	3438
ganlikun	0:13413ea9a877	3439	if ((source == HAL_DFSDM1_CLKIN0_TIM4OC2) \|\| (source == HAL_DFSDM1_CLKIN2_TIM4OC2))
ganlikun	0:13413ea9a877	3440	{
ganlikun	0:13413ea9a877	3441	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CK02SEL);
ganlikun	0:13413ea9a877	3442	}
ganlikun	0:13413ea9a877	3443	else if ((source == HAL_DFSDM1_CLKIN1_TIM4OC1) \|\| (source == HAL_DFSDM1_CLKIN3_TIM4OC1))
ganlikun	0:13413ea9a877	3444	{
ganlikun	0:13413ea9a877	3445	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CK13SEL);
ganlikun	0:13413ea9a877	3446	}
ganlikun	0:13413ea9a877	3447	else if ((source == HAL_DFSDM2_CLKIN0_TIM3OC4) \|\| (source == HAL_DFSDM2_CLKIN4_TIM3OC4))
ganlikun	0:13413ea9a877	3448	{
ganlikun	0:13413ea9a877	3449	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK04SEL);
ganlikun	0:13413ea9a877	3450	}
ganlikun	0:13413ea9a877	3451	else if ((source == HAL_DFSDM2_CLKIN1_TIM3OC3) \|\| (source == HAL_DFSDM2_CLKIN5_TIM3OC3))
ganlikun	0:13413ea9a877	3452	{
ganlikun	0:13413ea9a877	3453	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK15SEL);
ganlikun	0:13413ea9a877	3454
ganlikun	0:13413ea9a877	3455	}else if ((source == HAL_DFSDM2_CLKIN2_TIM3OC2) \|\| (source == HAL_DFSDM2_CLKIN6_TIM3OC2))
ganlikun	0:13413ea9a877	3456	{
ganlikun	0:13413ea9a877	3457	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK26SEL);
ganlikun	0:13413ea9a877	3458	}
ganlikun	0:13413ea9a877	3459	else
ganlikun	0:13413ea9a877	3460	{
ganlikun	0:13413ea9a877	3461	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK37SEL);
ganlikun	0:13413ea9a877	3462	}
ganlikun	0:13413ea9a877	3463
ganlikun	0:13413ea9a877	3464	if((source == HAL_DFSDM1_CLKIN0_TIM4OC2) \|\|(source == HAL_DFSDM1_CLKIN1_TIM4OC1)\|\|
ganlikun	0:13413ea9a877	3465	(source == HAL_DFSDM2_CLKIN0_TIM3OC4) \|\|(source == HAL_DFSDM2_CLKIN1_TIM3OC3)\|\|
ganlikun	0:13413ea9a877	3466	(source == HAL_DFSDM2_CLKIN2_TIM3OC2) \|\|(source == HAL_DFSDM2_CLKIN3_TIM3OC1))
ganlikun	0:13413ea9a877	3467	{
ganlikun	0:13413ea9a877	3468	source = 0x0000U;
ganlikun	0:13413ea9a877	3469	}
ganlikun	0:13413ea9a877	3470
ganlikun	0:13413ea9a877	3471	SYSCFG->MCHDLYCR = (source\|tmp);
ganlikun	0:13413ea9a877	3472	}
ganlikun	0:13413ea9a877	3473
ganlikun	0:13413ea9a877	3474	/**
ganlikun	0:13413ea9a877	3475	* @brief Configure multi channel delay block: Use DFSDM2 audio clock source as input
ganlikun	0:13413ea9a877	3476	* clock for DFSDM1 and DFSDM2 filters to Synchronize DFSDMx filters.
ganlikun	0:13413ea9a877	3477	* Set the path of the DFSDM2 clock output (dfsdm2_ckout) to the
ganlikun	0:13413ea9a877	3478	* DFSDM1/2 CkInx and data inputs channels by configuring following MCHDLY muxes
ganlikun	0:13413ea9a877	3479	* or demuxes: M1, M2, M3, M4, M5, M6, M7, M8, DM1, DM2, DM3, DM4, DM5, DM6,
ganlikun	0:13413ea9a877	3480	* M9, M10, M11, M12, M13, M14, M15, M16, M17, M18, M19, M20 based on the
ganlikun	0:13413ea9a877	3481	* contains of the DFSDM_MultiChannelConfigTypeDef structure
ganlikun	0:13413ea9a877	3482	* @param mchdlystruct: Structure of multi channel configuration
ganlikun	0:13413ea9a877	3483	* @retval None
ganlikun	0:13413ea9a877	3484	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
ganlikun	0:13413ea9a877	3485	* before HAL_DFSDM_ConfigMultiChannelDelay()
ganlikun	0:13413ea9a877	3486	* @note The HAL_DFSDM_ConfigMultiChannelDelay() function clears the SYSCFG-MCHDLYCR
ganlikun	0:13413ea9a877	3487	* register before setting the new configuration.
ganlikun	0:13413ea9a877	3488	*/
ganlikun	0:13413ea9a877	3489	void HAL_DFSDM_ConfigMultiChannelDelay(DFSDM_MultiChannelConfigTypeDef* mchdlystruct)
ganlikun	0:13413ea9a877	3490	{
ganlikun	0:13413ea9a877	3491	uint32_t mchdlyreg = 0U;
ganlikun	0:13413ea9a877	3492
ganlikun	0:13413ea9a877	3493	assert_param(IS_DFSDM_DFSDM1_CLKOUT(mchdlystruct->DFSDM1ClockOut));
ganlikun	0:13413ea9a877	3494	assert_param(IS_DFSDM_DFSDM2_CLKOUT(mchdlystruct->DFSDM2ClockOut));
ganlikun	0:13413ea9a877	3495	assert_param(IS_DFSDM_DFSDM1_CLKIN(mchdlystruct->DFSDM1ClockIn));
ganlikun	0:13413ea9a877	3496	assert_param(IS_DFSDM_DFSDM2_CLKIN(mchdlystruct->DFSDM2ClockIn));
ganlikun	0:13413ea9a877	3497	assert_param(IS_DFSDM_DFSDM1_BIT_CLK((mchdlystruct->DFSDM1BitClkDistribution)));
ganlikun	0:13413ea9a877	3498	assert_param(IS_DFSDM_DFSDM2_BIT_CLK(mchdlystruct->DFSDM2BitClkDistribution));
ganlikun	0:13413ea9a877	3499	assert_param(IS_DFSDM_DFSDM1_DATA_DISTRIBUTION(mchdlystruct->DFSDM1DataDistribution));
ganlikun	0:13413ea9a877	3500	assert_param(IS_DFSDM_DFSDM2_DATA_DISTRIBUTION(mchdlystruct->DFSDM2DataDistribution));
ganlikun	0:13413ea9a877	3501
ganlikun	0:13413ea9a877	3502	mchdlyreg = (SYSCFG->MCHDLYCR & 0x80103U);
ganlikun	0:13413ea9a877	3503
ganlikun	0:13413ea9a877	3504	SYSCFG->MCHDLYCR = (mchdlyreg \|(mchdlystruct->DFSDM1ClockOut)\|(mchdlystruct->DFSDM2ClockOut)\|
ganlikun	0:13413ea9a877	3505	(mchdlystruct->DFSDM1ClockIn)\|(mchdlystruct->DFSDM2ClockIn)\|
ganlikun	0:13413ea9a877	3506	(mchdlystruct->DFSDM1BitClkDistribution)\| (mchdlystruct->DFSDM2BitClkDistribution)\|
ganlikun	0:13413ea9a877	3507	(mchdlystruct->DFSDM1DataDistribution)\| (mchdlystruct->DFSDM2DataDistribution));
ganlikun	0:13413ea9a877	3508
ganlikun	0:13413ea9a877	3509	}
ganlikun	0:13413ea9a877	3510	#endif /* SYSCFG_MCHDLYCR_BSCKSEL */
ganlikun	0:13413ea9a877	3511	/**
ganlikun	0:13413ea9a877	3512	* @}
ganlikun	0:13413ea9a877	3513	*/
ganlikun	0:13413ea9a877	3514	/**
ganlikun	0:13413ea9a877	3515	* @}
ganlikun	0:13413ea9a877	3516	*/
ganlikun	0:13413ea9a877	3517	/* End of exported functions -------------------------------------------------*/
ganlikun	0:13413ea9a877	3518
ganlikun	0:13413ea9a877	3519	/* Private functions ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	3520	/** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
ganlikun	0:13413ea9a877	3521	* @{
ganlikun	0:13413ea9a877	3522	*/
ganlikun	0:13413ea9a877	3523
ganlikun	0:13413ea9a877	3524	/**
ganlikun	0:13413ea9a877	3525	* @brief DMA half transfer complete callback for regular conversion.
ganlikun	0:13413ea9a877	3526	* @param hdma : DMA handle.
ganlikun	0:13413ea9a877	3527	* @retval None
ganlikun	0:13413ea9a877	3528	*/
ganlikun	0:13413ea9a877	3529	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	3530	{
ganlikun	0:13413ea9a877	3531	/* Get DFSDM filter handle */
ganlikun	0:13413ea9a877	3532	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	3533
ganlikun	0:13413ea9a877	3534	/* Call regular half conversion complete callback */
ganlikun	0:13413ea9a877	3535	HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	3536	}
ganlikun	0:13413ea9a877	3537
ganlikun	0:13413ea9a877	3538	/**
ganlikun	0:13413ea9a877	3539	* @brief DMA transfer complete callback for regular conversion.
ganlikun	0:13413ea9a877	3540	* @param hdma : DMA handle.
ganlikun	0:13413ea9a877	3541	* @retval None
ganlikun	0:13413ea9a877	3542	*/
ganlikun	0:13413ea9a877	3543	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	3544	{
ganlikun	0:13413ea9a877	3545	/* Get DFSDM filter handle */
ganlikun	0:13413ea9a877	3546	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	3547
ganlikun	0:13413ea9a877	3548	/* Call regular conversion complete callback */
ganlikun	0:13413ea9a877	3549	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	3550	}
ganlikun	0:13413ea9a877	3551
ganlikun	0:13413ea9a877	3552	/**
ganlikun	0:13413ea9a877	3553	* @brief DMA half transfer complete callback for injected conversion.
ganlikun	0:13413ea9a877	3554	* @param hdma : DMA handle.
ganlikun	0:13413ea9a877	3555	* @retval None
ganlikun	0:13413ea9a877	3556	*/
ganlikun	0:13413ea9a877	3557	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	3558	{
ganlikun	0:13413ea9a877	3559	/* Get DFSDM filter handle */
ganlikun	0:13413ea9a877	3560	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	3561
ganlikun	0:13413ea9a877	3562	/* Call injected half conversion complete callback */
ganlikun	0:13413ea9a877	3563	HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	3564	}
ganlikun	0:13413ea9a877	3565
ganlikun	0:13413ea9a877	3566	/**
ganlikun	0:13413ea9a877	3567	* @brief DMA transfer complete callback for injected conversion.
ganlikun	0:13413ea9a877	3568	* @param hdma : DMA handle.
ganlikun	0:13413ea9a877	3569	* @retval None
ganlikun	0:13413ea9a877	3570	*/
ganlikun	0:13413ea9a877	3571	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	3572	{
ganlikun	0:13413ea9a877	3573	/* Get DFSDM filter handle */
ganlikun	0:13413ea9a877	3574	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	3575
ganlikun	0:13413ea9a877	3576	/* Call injected conversion complete callback */
ganlikun	0:13413ea9a877	3577	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	3578	}
ganlikun	0:13413ea9a877	3579
ganlikun	0:13413ea9a877	3580	/**
ganlikun	0:13413ea9a877	3581	* @brief DMA error callback.
ganlikun	0:13413ea9a877	3582	* @param hdma : DMA handle.
ganlikun	0:13413ea9a877	3583	* @retval None
ganlikun	0:13413ea9a877	3584	*/
ganlikun	0:13413ea9a877	3585	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	3586	{
ganlikun	0:13413ea9a877	3587	/* Get DFSDM filter handle */
ganlikun	0:13413ea9a877	3588	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
ganlikun	0:13413ea9a877	3589
ganlikun	0:13413ea9a877	3590	/* Update error code */
ganlikun	0:13413ea9a877	3591	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
ganlikun	0:13413ea9a877	3592
ganlikun	0:13413ea9a877	3593	/* Call error callback */
ganlikun	0:13413ea9a877	3594	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
ganlikun	0:13413ea9a877	3595	}
ganlikun	0:13413ea9a877	3596
ganlikun	0:13413ea9a877	3597	/**
ganlikun	0:13413ea9a877	3598	* @brief This function allows to get the number of injected channels.
ganlikun	0:13413ea9a877	3599	* @param Channels : bitfield of injected channels.
ganlikun	0:13413ea9a877	3600	* @retval Number of injected channels.
ganlikun	0:13413ea9a877	3601	*/
ganlikun	0:13413ea9a877	3602	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
ganlikun	0:13413ea9a877	3603	{
ganlikun	0:13413ea9a877	3604	uint32_t nbChannels = 0U;
ganlikun	0:13413ea9a877	3605	uint32_t tmp;
ganlikun	0:13413ea9a877	3606
ganlikun	0:13413ea9a877	3607	/* Get the number of channels from bitfield */
ganlikun	0:13413ea9a877	3608	tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
ganlikun	0:13413ea9a877	3609	while(tmp != 0U)
ganlikun	0:13413ea9a877	3610	{
ganlikun	0:13413ea9a877	3611	if((tmp & 1U) != 0U)
ganlikun	0:13413ea9a877	3612	{
ganlikun	0:13413ea9a877	3613	nbChannels++;
ganlikun	0:13413ea9a877	3614	}
ganlikun	0:13413ea9a877	3615	tmp = (uint32_t) (tmp >> 1U);
ganlikun	0:13413ea9a877	3616	}
ganlikun	0:13413ea9a877	3617	return nbChannels;
ganlikun	0:13413ea9a877	3618	}
ganlikun	0:13413ea9a877	3619
ganlikun	0:13413ea9a877	3620	/**
ganlikun	0:13413ea9a877	3621	* @brief This function allows to get the channel number from channel instance.
ganlikun	0:13413ea9a877	3622	* @param Instance : DFSDM channel instance.
ganlikun	0:13413ea9a877	3623	* @retval Channel number.
ganlikun	0:13413ea9a877	3624	*/
ganlikun	0:13413ea9a877	3625	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
ganlikun	0:13413ea9a877	3626	{
ganlikun	0:13413ea9a877	3627	uint32_t channel = 0xFFU;
ganlikun	0:13413ea9a877	3628
ganlikun	0:13413ea9a877	3629	/* Get channel from instance */
ganlikun	0:13413ea9a877	3630	#if defined(DFSDM2_Channel0)
ganlikun	0:13413ea9a877	3631	if((Instance == DFSDM1_Channel0) \|\| (Instance == DFSDM2_Channel0))
ganlikun	0:13413ea9a877	3632	{
ganlikun	0:13413ea9a877	3633	channel = 0U;
ganlikun	0:13413ea9a877	3634	}
ganlikun	0:13413ea9a877	3635	else if((Instance == DFSDM1_Channel1) \|\| (Instance == DFSDM2_Channel1))
ganlikun	0:13413ea9a877	3636	{
ganlikun	0:13413ea9a877	3637	channel = 1U;
ganlikun	0:13413ea9a877	3638	}
ganlikun	0:13413ea9a877	3639	else if((Instance == DFSDM1_Channel2) \|\| (Instance == DFSDM2_Channel2))
ganlikun	0:13413ea9a877	3640	{
ganlikun	0:13413ea9a877	3641	channel = 2U;
ganlikun	0:13413ea9a877	3642	}
ganlikun	0:13413ea9a877	3643	else if((Instance == DFSDM1_Channel3) \|\| (Instance == DFSDM2_Channel3))
ganlikun	0:13413ea9a877	3644	{
ganlikun	0:13413ea9a877	3645	channel = 3U;
ganlikun	0:13413ea9a877	3646	}
ganlikun	0:13413ea9a877	3647	else if(Instance == DFSDM2_Channel4)
ganlikun	0:13413ea9a877	3648	{
ganlikun	0:13413ea9a877	3649	channel = 4U;
ganlikun	0:13413ea9a877	3650	}
ganlikun	0:13413ea9a877	3651	else if(Instance == DFSDM2_Channel5)
ganlikun	0:13413ea9a877	3652	{
ganlikun	0:13413ea9a877	3653	channel = 5U;
ganlikun	0:13413ea9a877	3654	}
ganlikun	0:13413ea9a877	3655	else if(Instance == DFSDM2_Channel6)
ganlikun	0:13413ea9a877	3656	{
ganlikun	0:13413ea9a877	3657	channel = 6U;
ganlikun	0:13413ea9a877	3658	}
ganlikun	0:13413ea9a877	3659	else if(Instance == DFSDM2_Channel7)
ganlikun	0:13413ea9a877	3660	{
ganlikun	0:13413ea9a877	3661	channel = 7U;
ganlikun	0:13413ea9a877	3662	}
ganlikun	0:13413ea9a877	3663	#else
ganlikun	0:13413ea9a877	3664	if(Instance == DFSDM1_Channel0)
ganlikun	0:13413ea9a877	3665	{
ganlikun	0:13413ea9a877	3666	channel = 0U;
ganlikun	0:13413ea9a877	3667	}
ganlikun	0:13413ea9a877	3668	else if(Instance == DFSDM1_Channel1)
ganlikun	0:13413ea9a877	3669	{
ganlikun	0:13413ea9a877	3670	channel = 1U;
ganlikun	0:13413ea9a877	3671	}
ganlikun	0:13413ea9a877	3672	else if(Instance == DFSDM1_Channel2)
ganlikun	0:13413ea9a877	3673	{
ganlikun	0:13413ea9a877	3674	channel = 2U;
ganlikun	0:13413ea9a877	3675	}
ganlikun	0:13413ea9a877	3676	else if(Instance == DFSDM1_Channel3)
ganlikun	0:13413ea9a877	3677	{
ganlikun	0:13413ea9a877	3678	channel = 3U;
ganlikun	0:13413ea9a877	3679	}
ganlikun	0:13413ea9a877	3680	#endif /* defined(DFSDM2_Channel0) */
ganlikun	0:13413ea9a877	3681
ganlikun	0:13413ea9a877	3682	return channel;
ganlikun	0:13413ea9a877	3683	}
ganlikun	0:13413ea9a877	3684
ganlikun	0:13413ea9a877	3685	/**
ganlikun	0:13413ea9a877	3686	* @brief This function allows to really start regular conversion.
ganlikun	0:13413ea9a877	3687	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3688	* @retval None
ganlikun	0:13413ea9a877	3689	*/
ganlikun	0:13413ea9a877	3690	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
ganlikun	0:13413ea9a877	3691	{
ganlikun	0:13413ea9a877	3692	/* Check regular trigger */
ganlikun	0:13413ea9a877	3693	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
ganlikun	0:13413ea9a877	3694	{
ganlikun	0:13413ea9a877	3695	/* Software start of regular conversion */
ganlikun	0:13413ea9a877	3696	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
ganlikun	0:13413ea9a877	3697	}
ganlikun	0:13413ea9a877	3698	else /* synchronous trigger */
ganlikun	0:13413ea9a877	3699	{
ganlikun	0:13413ea9a877	3700	/* Disable DFSDM filter */
ganlikun	0:13413ea9a877	3701	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
ganlikun	0:13413ea9a877	3702
ganlikun	0:13413ea9a877	3703	/* Set RSYNC bit in DFSDM_FLTCR1 register */
ganlikun	0:13413ea9a877	3704	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSYNC;
ganlikun	0:13413ea9a877	3705
ganlikun	0:13413ea9a877	3706	/* Enable DFSDM filter */
ganlikun	0:13413ea9a877	3707	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
ganlikun	0:13413ea9a877	3708
ganlikun	0:13413ea9a877	3709	/* If injected conversion was in progress, restart it */
ganlikun	0:13413ea9a877	3710	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
ganlikun	0:13413ea9a877	3711	{
ganlikun	0:13413ea9a877	3712	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
ganlikun	0:13413ea9a877	3713	{
ganlikun	0:13413ea9a877	3714	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
ganlikun	0:13413ea9a877	3715	}
ganlikun	0:13413ea9a877	3716	/* Update remaining injected conversions */
ganlikun	0:13413ea9a877	3717	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
ganlikun	0:13413ea9a877	3718	hdfsdm_filter->InjectedChannelsNbr : 1U;
ganlikun	0:13413ea9a877	3719	}
ganlikun	0:13413ea9a877	3720	}
ganlikun	0:13413ea9a877	3721	/* Update DFSDM filter state */
ganlikun	0:13413ea9a877	3722	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
ganlikun	0:13413ea9a877	3723	HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
ganlikun	0:13413ea9a877	3724	}
ganlikun	0:13413ea9a877	3725
ganlikun	0:13413ea9a877	3726	/**
ganlikun	0:13413ea9a877	3727	* @brief This function allows to really stop regular conversion.
ganlikun	0:13413ea9a877	3728	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3729	* @retval None
ganlikun	0:13413ea9a877	3730	*/
ganlikun	0:13413ea9a877	3731	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
ganlikun	0:13413ea9a877	3732	{
ganlikun	0:13413ea9a877	3733	/* Disable DFSDM filter */
ganlikun	0:13413ea9a877	3734	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
ganlikun	0:13413ea9a877	3735
ganlikun	0:13413ea9a877	3736	/* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
ganlikun	0:13413ea9a877	3737	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
ganlikun	0:13413ea9a877	3738	{
ganlikun	0:13413ea9a877	3739	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
ganlikun	0:13413ea9a877	3740	}
ganlikun	0:13413ea9a877	3741
ganlikun	0:13413ea9a877	3742	/* Enable DFSDM filter */
ganlikun	0:13413ea9a877	3743	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
ganlikun	0:13413ea9a877	3744
ganlikun	0:13413ea9a877	3745	/* If injected conversion was in progress, restart it */
ganlikun	0:13413ea9a877	3746	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
ganlikun	0:13413ea9a877	3747	{
ganlikun	0:13413ea9a877	3748	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
ganlikun	0:13413ea9a877	3749	{
ganlikun	0:13413ea9a877	3750	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
ganlikun	0:13413ea9a877	3751	}
ganlikun	0:13413ea9a877	3752	/* Update remaining injected conversions */
ganlikun	0:13413ea9a877	3753	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
ganlikun	0:13413ea9a877	3754	hdfsdm_filter->InjectedChannelsNbr : 1U;
ganlikun	0:13413ea9a877	3755	}
ganlikun	0:13413ea9a877	3756
ganlikun	0:13413ea9a877	3757	/* Update DFSDM filter state */
ganlikun	0:13413ea9a877	3758	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
ganlikun	0:13413ea9a877	3759	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
ganlikun	0:13413ea9a877	3760	}
ganlikun	0:13413ea9a877	3761
ganlikun	0:13413ea9a877	3762	/**
ganlikun	0:13413ea9a877	3763	* @brief This function allows to really start injected conversion.
ganlikun	0:13413ea9a877	3764	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3765	* @retval None
ganlikun	0:13413ea9a877	3766	*/
ganlikun	0:13413ea9a877	3767	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
ganlikun	0:13413ea9a877	3768	{
ganlikun	0:13413ea9a877	3769	/* Check injected trigger */
ganlikun	0:13413ea9a877	3770	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
ganlikun	0:13413ea9a877	3771	{
ganlikun	0:13413ea9a877	3772	/* Software start of injected conversion */
ganlikun	0:13413ea9a877	3773	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
ganlikun	0:13413ea9a877	3774	}
ganlikun	0:13413ea9a877	3775	else /* external or synchronous trigger */
ganlikun	0:13413ea9a877	3776	{
ganlikun	0:13413ea9a877	3777	/* Disable DFSDM filter */
ganlikun	0:13413ea9a877	3778	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
ganlikun	0:13413ea9a877	3779
ganlikun	0:13413ea9a877	3780	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
ganlikun	0:13413ea9a877	3781	{
ganlikun	0:13413ea9a877	3782	/* Set JSYNC bit in DFSDM_FLTCR1 register */
ganlikun	0:13413ea9a877	3783	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSYNC;
ganlikun	0:13413ea9a877	3784	}
ganlikun	0:13413ea9a877	3785	else /* external trigger */
ganlikun	0:13413ea9a877	3786	{
ganlikun	0:13413ea9a877	3787	/* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
ganlikun	0:13413ea9a877	3788	hdfsdm_filter->Instance->FLTCR1 \|= hdfsdm_filter->ExtTriggerEdge;
ganlikun	0:13413ea9a877	3789	}
ganlikun	0:13413ea9a877	3790
ganlikun	0:13413ea9a877	3791	/* Enable DFSDM filter */
ganlikun	0:13413ea9a877	3792	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
ganlikun	0:13413ea9a877	3793
ganlikun	0:13413ea9a877	3794	/* If regular conversion was in progress, restart it */
ganlikun	0:13413ea9a877	3795	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
ganlikun	0:13413ea9a877	3796	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
ganlikun	0:13413ea9a877	3797	{
ganlikun	0:13413ea9a877	3798	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
ganlikun	0:13413ea9a877	3799	}
ganlikun	0:13413ea9a877	3800	}
ganlikun	0:13413ea9a877	3801	/* Update DFSDM filter state */
ganlikun	0:13413ea9a877	3802	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
ganlikun	0:13413ea9a877	3803	HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
ganlikun	0:13413ea9a877	3804	}
ganlikun	0:13413ea9a877	3805
ganlikun	0:13413ea9a877	3806	/**
ganlikun	0:13413ea9a877	3807	* @brief This function allows to really stop injected conversion.
ganlikun	0:13413ea9a877	3808	* @param hdfsdm_filter : DFSDM filter handle.
ganlikun	0:13413ea9a877	3809	* @retval None
ganlikun	0:13413ea9a877	3810	*/
ganlikun	0:13413ea9a877	3811	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
ganlikun	0:13413ea9a877	3812	{
ganlikun	0:13413ea9a877	3813	/* Disable DFSDM filter */
ganlikun	0:13413ea9a877	3814	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
ganlikun	0:13413ea9a877	3815
ganlikun	0:13413ea9a877	3816	/* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
ganlikun	0:13413ea9a877	3817	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
ganlikun	0:13413ea9a877	3818	{
ganlikun	0:13413ea9a877	3819	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
ganlikun	0:13413ea9a877	3820	}
ganlikun	0:13413ea9a877	3821	else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
ganlikun	0:13413ea9a877	3822	{
ganlikun	0:13413ea9a877	3823	/* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
ganlikun	0:13413ea9a877	3824	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
ganlikun	0:13413ea9a877	3825	}
ganlikun	0:13413ea9a877	3826
ganlikun	0:13413ea9a877	3827	/* Enable DFSDM filter */
ganlikun	0:13413ea9a877	3828	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
ganlikun	0:13413ea9a877	3829
ganlikun	0:13413ea9a877	3830	/* If regular conversion was in progress, restart it */
ganlikun	0:13413ea9a877	3831	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
ganlikun	0:13413ea9a877	3832	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
ganlikun	0:13413ea9a877	3833	{
ganlikun	0:13413ea9a877	3834	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
ganlikun	0:13413ea9a877	3835	}
ganlikun	0:13413ea9a877	3836
ganlikun	0:13413ea9a877	3837	/* Update remaining injected conversions */
ganlikun	0:13413ea9a877	3838	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
ganlikun	0:13413ea9a877	3839	hdfsdm_filter->InjectedChannelsNbr : 1U;
ganlikun	0:13413ea9a877	3840
ganlikun	0:13413ea9a877	3841	/* Update DFSDM filter state */
ganlikun	0:13413ea9a877	3842	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
ganlikun	0:13413ea9a877	3843	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
ganlikun	0:13413ea9a877	3844	}
ganlikun	0:13413ea9a877	3845	/**
ganlikun	0:13413ea9a877	3846	* @}
ganlikun	0:13413ea9a877	3847	*/
ganlikun	0:13413ea9a877	3848	/* End of private functions --------------------------------------------------*/
ganlikun	0:13413ea9a877	3849
ganlikun	0:13413ea9a877	3850	/**
ganlikun	0:13413ea9a877	3851	* @}
ganlikun	0:13413ea9a877	3852	*/
ganlikun	0:13413ea9a877	3853	#endif /* STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
ganlikun	0:13413ea9a877	3854	#endif /* HAL_DFSDM_MODULE_ENABLED */
ganlikun	0:13413ea9a877	3855	/**
ganlikun	0:13413ea9a877	3856	* @}
ganlikun	0:13413ea9a877	3857	*/
ganlikun	0:13413ea9a877	3858
ganlikun	0:13413ea9a877	3859	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	3860

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Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	1

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.c@0:13413ea9a877, 2022-06-12 (annotated)

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