Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_cortex.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_cortex.c
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief CORTEX HAL module driver.
ganlikun 0:13413ea9a877 8 * This file provides firmware functions to manage the following
ganlikun 0:13413ea9a877 9 * functionalities of the CORTEX:
ganlikun 0:13413ea9a877 10 * + Initialization and de-initialization functions
ganlikun 0:13413ea9a877 11 * + Peripheral Control functions
ganlikun 0:13413ea9a877 12 *
ganlikun 0:13413ea9a877 13 @verbatim
ganlikun 0:13413ea9a877 14 ==============================================================================
ganlikun 0:13413ea9a877 15 ##### How to use this driver #####
ganlikun 0:13413ea9a877 16 ==============================================================================
ganlikun 0:13413ea9a877 17
ganlikun 0:13413ea9a877 18 [..]
ganlikun 0:13413ea9a877 19 *** How to configure Interrupts using CORTEX HAL driver ***
ganlikun 0:13413ea9a877 20 ===========================================================
ganlikun 0:13413ea9a877 21 [..]
ganlikun 0:13413ea9a877 22 This section provides functions allowing to configure the NVIC interrupts (IRQ).
ganlikun 0:13413ea9a877 23 The Cortex-M4 exceptions are managed by CMSIS functions.
ganlikun 0:13413ea9a877 24
ganlikun 0:13413ea9a877 25 (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
ganlikun 0:13413ea9a877 26 function according to the following table.
ganlikun 0:13413ea9a877 27 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
ganlikun 0:13413ea9a877 28 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
ganlikun 0:13413ea9a877 29 (#) please refer to programming manual for details in how to configure priority.
ganlikun 0:13413ea9a877 30
ganlikun 0:13413ea9a877 31 -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ preemption is no more possible.
ganlikun 0:13413ea9a877 32 The pending IRQ priority will be managed only by the sub priority.
ganlikun 0:13413ea9a877 33
ganlikun 0:13413ea9a877 34 -@- IRQ priority order (sorted by highest to lowest priority):
ganlikun 0:13413ea9a877 35 (+@) Lowest preemption priority
ganlikun 0:13413ea9a877 36 (+@) Lowest sub priority
ganlikun 0:13413ea9a877 37 (+@) Lowest hardware priority (IRQ number)
ganlikun 0:13413ea9a877 38
ganlikun 0:13413ea9a877 39 [..]
ganlikun 0:13413ea9a877 40 *** How to configure Systick using CORTEX HAL driver ***
ganlikun 0:13413ea9a877 41 ========================================================
ganlikun 0:13413ea9a877 42 [..]
ganlikun 0:13413ea9a877 43 Setup SysTick Timer for time base.
ganlikun 0:13413ea9a877 44
ganlikun 0:13413ea9a877 45 (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
ganlikun 0:13413ea9a877 46 is a CMSIS function that:
ganlikun 0:13413ea9a877 47 (++) Configures the SysTick Reload register with value passed as function parameter.
ganlikun 0:13413ea9a877 48 (++) Configures the SysTick IRQ priority to the lowest value 0x0F.
ganlikun 0:13413ea9a877 49 (++) Resets the SysTick Counter register.
ganlikun 0:13413ea9a877 50 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
ganlikun 0:13413ea9a877 51 (++) Enables the SysTick Interrupt.
ganlikun 0:13413ea9a877 52 (++) Starts the SysTick Counter.
ganlikun 0:13413ea9a877 53
ganlikun 0:13413ea9a877 54 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
ganlikun 0:13413ea9a877 55 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
ganlikun 0:13413ea9a877 56 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
ganlikun 0:13413ea9a877 57 inside the stm32f4xx_hal_cortex.h file.
ganlikun 0:13413ea9a877 58
ganlikun 0:13413ea9a877 59 (+) You can change the SysTick IRQ priority by calling the
ganlikun 0:13413ea9a877 60 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
ganlikun 0:13413ea9a877 61 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
ganlikun 0:13413ea9a877 62
ganlikun 0:13413ea9a877 63 (+) To adjust the SysTick time base, use the following formula:
ganlikun 0:13413ea9a877 64
ganlikun 0:13413ea9a877 65 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
ganlikun 0:13413ea9a877 66 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
ganlikun 0:13413ea9a877 67 (++) Reload Value should not exceed 0xFFFFFF
ganlikun 0:13413ea9a877 68
ganlikun 0:13413ea9a877 69 @endverbatim
ganlikun 0:13413ea9a877 70 ******************************************************************************
ganlikun 0:13413ea9a877 71 * @attention
ganlikun 0:13413ea9a877 72 *
ganlikun 0:13413ea9a877 73 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 74 *
ganlikun 0:13413ea9a877 75 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 76 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 77 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 78 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 79 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 80 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 81 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 83 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 84 * without specific prior written permission.
ganlikun 0:13413ea9a877 85 *
ganlikun 0:13413ea9a877 86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 96 *
ganlikun 0:13413ea9a877 97 ******************************************************************************
ganlikun 0:13413ea9a877 98 */
ganlikun 0:13413ea9a877 99
ganlikun 0:13413ea9a877 100 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 101 #include "stm32f4xx_hal.h"
ganlikun 0:13413ea9a877 102
ganlikun 0:13413ea9a877 103 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 104 * @{
ganlikun 0:13413ea9a877 105 */
ganlikun 0:13413ea9a877 106
ganlikun 0:13413ea9a877 107 /** @defgroup CORTEX CORTEX
ganlikun 0:13413ea9a877 108 * @brief CORTEX HAL module driver
ganlikun 0:13413ea9a877 109 * @{
ganlikun 0:13413ea9a877 110 */
ganlikun 0:13413ea9a877 111
ganlikun 0:13413ea9a877 112 #ifdef HAL_CORTEX_MODULE_ENABLED
ganlikun 0:13413ea9a877 113
ganlikun 0:13413ea9a877 114 /* Private types -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 115 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 116 /* Private constants ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 117 /* Private macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 118 /* Private functions ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 119 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 120
ganlikun 0:13413ea9a877 121 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
ganlikun 0:13413ea9a877 122 * @{
ganlikun 0:13413ea9a877 123 */
ganlikun 0:13413ea9a877 124
ganlikun 0:13413ea9a877 125
ganlikun 0:13413ea9a877 126 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
ganlikun 0:13413ea9a877 127 * @brief Initialization and Configuration functions
ganlikun 0:13413ea9a877 128 *
ganlikun 0:13413ea9a877 129 @verbatim
ganlikun 0:13413ea9a877 130 ==============================================================================
ganlikun 0:13413ea9a877 131 ##### Initialization and de-initialization functions #####
ganlikun 0:13413ea9a877 132 ==============================================================================
ganlikun 0:13413ea9a877 133 [..]
ganlikun 0:13413ea9a877 134 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
ganlikun 0:13413ea9a877 135 Systick functionalities
ganlikun 0:13413ea9a877 136
ganlikun 0:13413ea9a877 137 @endverbatim
ganlikun 0:13413ea9a877 138 * @{
ganlikun 0:13413ea9a877 139 */
ganlikun 0:13413ea9a877 140
ganlikun 0:13413ea9a877 141
ganlikun 0:13413ea9a877 142 /**
ganlikun 0:13413ea9a877 143 * @brief Sets the priority grouping field (preemption priority and subpriority)
ganlikun 0:13413ea9a877 144 * using the required unlock sequence.
ganlikun 0:13413ea9a877 145 * @param PriorityGroup: The priority grouping bits length.
ganlikun 0:13413ea9a877 146 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 147 * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
ganlikun 0:13413ea9a877 148 * 4 bits for subpriority
ganlikun 0:13413ea9a877 149 * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
ganlikun 0:13413ea9a877 150 * 3 bits for subpriority
ganlikun 0:13413ea9a877 151 * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
ganlikun 0:13413ea9a877 152 * 2 bits for subpriority
ganlikun 0:13413ea9a877 153 * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
ganlikun 0:13413ea9a877 154 * 1 bits for subpriority
ganlikun 0:13413ea9a877 155 * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
ganlikun 0:13413ea9a877 156 * 0 bits for subpriority
ganlikun 0:13413ea9a877 157 * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
ganlikun 0:13413ea9a877 158 * The pending IRQ priority will be managed only by the subpriority.
ganlikun 0:13413ea9a877 159 * @retval None
ganlikun 0:13413ea9a877 160 */
ganlikun 0:13413ea9a877 161 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
ganlikun 0:13413ea9a877 162 {
ganlikun 0:13413ea9a877 163 /* Check the parameters */
ganlikun 0:13413ea9a877 164 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
ganlikun 0:13413ea9a877 165
ganlikun 0:13413ea9a877 166 /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
ganlikun 0:13413ea9a877 167 NVIC_SetPriorityGrouping(PriorityGroup);
ganlikun 0:13413ea9a877 168 }
ganlikun 0:13413ea9a877 169
ganlikun 0:13413ea9a877 170 /**
ganlikun 0:13413ea9a877 171 * @brief Sets the priority of an interrupt.
ganlikun 0:13413ea9a877 172 * @param IRQn: External interrupt number.
ganlikun 0:13413ea9a877 173 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 174 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 175 * @param PreemptPriority: The preemption priority for the IRQn channel.
ganlikun 0:13413ea9a877 176 * This parameter can be a value between 0 and 15
ganlikun 0:13413ea9a877 177 * A lower priority value indicates a higher priority
ganlikun 0:13413ea9a877 178 * @param SubPriority: the subpriority level for the IRQ channel.
ganlikun 0:13413ea9a877 179 * This parameter can be a value between 0 and 15
ganlikun 0:13413ea9a877 180 * A lower priority value indicates a higher priority.
ganlikun 0:13413ea9a877 181 * @retval None
ganlikun 0:13413ea9a877 182 */
ganlikun 0:13413ea9a877 183 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
ganlikun 0:13413ea9a877 184 {
ganlikun 0:13413ea9a877 185 uint32_t prioritygroup = 0x00U;
ganlikun 0:13413ea9a877 186
ganlikun 0:13413ea9a877 187 /* Check the parameters */
ganlikun 0:13413ea9a877 188 assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
ganlikun 0:13413ea9a877 189 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
ganlikun 0:13413ea9a877 190
ganlikun 0:13413ea9a877 191 prioritygroup = NVIC_GetPriorityGrouping();
ganlikun 0:13413ea9a877 192
ganlikun 0:13413ea9a877 193 NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
ganlikun 0:13413ea9a877 194 }
ganlikun 0:13413ea9a877 195
ganlikun 0:13413ea9a877 196 /**
ganlikun 0:13413ea9a877 197 * @brief Enables a device specific interrupt in the NVIC interrupt controller.
ganlikun 0:13413ea9a877 198 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
ganlikun 0:13413ea9a877 199 * function should be called before.
ganlikun 0:13413ea9a877 200 * @param IRQn External interrupt number.
ganlikun 0:13413ea9a877 201 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 202 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 203 * @retval None
ganlikun 0:13413ea9a877 204 */
ganlikun 0:13413ea9a877 205 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
ganlikun 0:13413ea9a877 206 {
ganlikun 0:13413ea9a877 207 /* Check the parameters */
ganlikun 0:13413ea9a877 208 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
ganlikun 0:13413ea9a877 209
ganlikun 0:13413ea9a877 210 /* Enable interrupt */
ganlikun 0:13413ea9a877 211 NVIC_EnableIRQ(IRQn);
ganlikun 0:13413ea9a877 212 }
ganlikun 0:13413ea9a877 213
ganlikun 0:13413ea9a877 214 /**
ganlikun 0:13413ea9a877 215 * @brief Disables a device specific interrupt in the NVIC interrupt controller.
ganlikun 0:13413ea9a877 216 * @param IRQn External interrupt number.
ganlikun 0:13413ea9a877 217 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 218 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 219 * @retval None
ganlikun 0:13413ea9a877 220 */
ganlikun 0:13413ea9a877 221 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
ganlikun 0:13413ea9a877 222 {
ganlikun 0:13413ea9a877 223 /* Check the parameters */
ganlikun 0:13413ea9a877 224 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
ganlikun 0:13413ea9a877 225
ganlikun 0:13413ea9a877 226 /* Disable interrupt */
ganlikun 0:13413ea9a877 227 NVIC_DisableIRQ(IRQn);
ganlikun 0:13413ea9a877 228 }
ganlikun 0:13413ea9a877 229
ganlikun 0:13413ea9a877 230 /**
ganlikun 0:13413ea9a877 231 * @brief Initiates a system reset request to reset the MCU.
ganlikun 0:13413ea9a877 232 * @retval None
ganlikun 0:13413ea9a877 233 */
ganlikun 0:13413ea9a877 234 void HAL_NVIC_SystemReset(void)
ganlikun 0:13413ea9a877 235 {
ganlikun 0:13413ea9a877 236 /* System Reset */
ganlikun 0:13413ea9a877 237 NVIC_SystemReset();
ganlikun 0:13413ea9a877 238 }
ganlikun 0:13413ea9a877 239
ganlikun 0:13413ea9a877 240 /**
ganlikun 0:13413ea9a877 241 * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
ganlikun 0:13413ea9a877 242 * Counter is in free running mode to generate periodic interrupts.
ganlikun 0:13413ea9a877 243 * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
ganlikun 0:13413ea9a877 244 * @retval status: - 0 Function succeeded.
ganlikun 0:13413ea9a877 245 * - 1 Function failed.
ganlikun 0:13413ea9a877 246 */
ganlikun 0:13413ea9a877 247 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
ganlikun 0:13413ea9a877 248 {
ganlikun 0:13413ea9a877 249 return SysTick_Config(TicksNumb);
ganlikun 0:13413ea9a877 250 }
ganlikun 0:13413ea9a877 251 /**
ganlikun 0:13413ea9a877 252 * @}
ganlikun 0:13413ea9a877 253 */
ganlikun 0:13413ea9a877 254
ganlikun 0:13413ea9a877 255 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
ganlikun 0:13413ea9a877 256 * @brief Cortex control functions
ganlikun 0:13413ea9a877 257 *
ganlikun 0:13413ea9a877 258 @verbatim
ganlikun 0:13413ea9a877 259 ==============================================================================
ganlikun 0:13413ea9a877 260 ##### Peripheral Control functions #####
ganlikun 0:13413ea9a877 261 ==============================================================================
ganlikun 0:13413ea9a877 262 [..]
ganlikun 0:13413ea9a877 263 This subsection provides a set of functions allowing to control the CORTEX
ganlikun 0:13413ea9a877 264 (NVIC, SYSTICK, MPU) functionalities.
ganlikun 0:13413ea9a877 265
ganlikun 0:13413ea9a877 266
ganlikun 0:13413ea9a877 267 @endverbatim
ganlikun 0:13413ea9a877 268 * @{
ganlikun 0:13413ea9a877 269 */
ganlikun 0:13413ea9a877 270
ganlikun 0:13413ea9a877 271 #if (__MPU_PRESENT == 1U)
ganlikun 0:13413ea9a877 272 /**
ganlikun 0:13413ea9a877 273 * @brief Disables the MPU
ganlikun 0:13413ea9a877 274 * @retval None
ganlikun 0:13413ea9a877 275 */
ganlikun 0:13413ea9a877 276 void HAL_MPU_Disable(void)
ganlikun 0:13413ea9a877 277 {
ganlikun 0:13413ea9a877 278 /* Make sure outstanding transfers are done */
ganlikun 0:13413ea9a877 279 __DMB();
ganlikun 0:13413ea9a877 280
ganlikun 0:13413ea9a877 281 /* Disable fault exceptions */
ganlikun 0:13413ea9a877 282 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
ganlikun 0:13413ea9a877 283
ganlikun 0:13413ea9a877 284 /* Disable the MPU and clear the control register*/
ganlikun 0:13413ea9a877 285 MPU->CTRL = 0U;
ganlikun 0:13413ea9a877 286 }
ganlikun 0:13413ea9a877 287
ganlikun 0:13413ea9a877 288 /**
ganlikun 0:13413ea9a877 289 * @brief Enable the MPU.
ganlikun 0:13413ea9a877 290 * @param MPU_Control: Specifies the control mode of the MPU during hard fault,
ganlikun 0:13413ea9a877 291 * NMI, FAULTMASK and privileged access to the default memory
ganlikun 0:13413ea9a877 292 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 293 * @arg MPU_HFNMI_PRIVDEF_NONE
ganlikun 0:13413ea9a877 294 * @arg MPU_HARDFAULT_NMI
ganlikun 0:13413ea9a877 295 * @arg MPU_PRIVILEGED_DEFAULT
ganlikun 0:13413ea9a877 296 * @arg MPU_HFNMI_PRIVDEF
ganlikun 0:13413ea9a877 297 * @retval None
ganlikun 0:13413ea9a877 298 */
ganlikun 0:13413ea9a877 299 void HAL_MPU_Enable(uint32_t MPU_Control)
ganlikun 0:13413ea9a877 300 {
ganlikun 0:13413ea9a877 301 /* Enable the MPU */
ganlikun 0:13413ea9a877 302 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
ganlikun 0:13413ea9a877 303
ganlikun 0:13413ea9a877 304 /* Enable fault exceptions */
ganlikun 0:13413ea9a877 305 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
ganlikun 0:13413ea9a877 306
ganlikun 0:13413ea9a877 307 /* Ensure MPU setting take effects */
ganlikun 0:13413ea9a877 308 __DSB();
ganlikun 0:13413ea9a877 309 __ISB();
ganlikun 0:13413ea9a877 310 }
ganlikun 0:13413ea9a877 311
ganlikun 0:13413ea9a877 312 /**
ganlikun 0:13413ea9a877 313 * @brief Initializes and configures the Region and the memory to be protected.
ganlikun 0:13413ea9a877 314 * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
ganlikun 0:13413ea9a877 315 * the initialization and configuration information.
ganlikun 0:13413ea9a877 316 * @retval None
ganlikun 0:13413ea9a877 317 */
ganlikun 0:13413ea9a877 318 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
ganlikun 0:13413ea9a877 319 {
ganlikun 0:13413ea9a877 320 /* Check the parameters */
ganlikun 0:13413ea9a877 321 assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
ganlikun 0:13413ea9a877 322 assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
ganlikun 0:13413ea9a877 323
ganlikun 0:13413ea9a877 324 /* Set the Region number */
ganlikun 0:13413ea9a877 325 MPU->RNR = MPU_Init->Number;
ganlikun 0:13413ea9a877 326
ganlikun 0:13413ea9a877 327 if ((MPU_Init->Enable) != RESET)
ganlikun 0:13413ea9a877 328 {
ganlikun 0:13413ea9a877 329 /* Check the parameters */
ganlikun 0:13413ea9a877 330 assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
ganlikun 0:13413ea9a877 331 assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
ganlikun 0:13413ea9a877 332 assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
ganlikun 0:13413ea9a877 333 assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
ganlikun 0:13413ea9a877 334 assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
ganlikun 0:13413ea9a877 335 assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
ganlikun 0:13413ea9a877 336 assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
ganlikun 0:13413ea9a877 337 assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
ganlikun 0:13413ea9a877 338
ganlikun 0:13413ea9a877 339 MPU->RBAR = MPU_Init->BaseAddress;
ganlikun 0:13413ea9a877 340 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
ganlikun 0:13413ea9a877 341 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
ganlikun 0:13413ea9a877 342 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
ganlikun 0:13413ea9a877 343 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
ganlikun 0:13413ea9a877 344 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
ganlikun 0:13413ea9a877 345 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
ganlikun 0:13413ea9a877 346 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
ganlikun 0:13413ea9a877 347 ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
ganlikun 0:13413ea9a877 348 ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
ganlikun 0:13413ea9a877 349 }
ganlikun 0:13413ea9a877 350 else
ganlikun 0:13413ea9a877 351 {
ganlikun 0:13413ea9a877 352 MPU->RBAR = 0x00U;
ganlikun 0:13413ea9a877 353 MPU->RASR = 0x00U;
ganlikun 0:13413ea9a877 354 }
ganlikun 0:13413ea9a877 355 }
ganlikun 0:13413ea9a877 356 #endif /* __MPU_PRESENT */
ganlikun 0:13413ea9a877 357
ganlikun 0:13413ea9a877 358 /**
ganlikun 0:13413ea9a877 359 * @brief Gets the priority grouping field from the NVIC Interrupt Controller.
ganlikun 0:13413ea9a877 360 * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
ganlikun 0:13413ea9a877 361 */
ganlikun 0:13413ea9a877 362 uint32_t HAL_NVIC_GetPriorityGrouping(void)
ganlikun 0:13413ea9a877 363 {
ganlikun 0:13413ea9a877 364 /* Get the PRIGROUP[10:8] field value */
ganlikun 0:13413ea9a877 365 return NVIC_GetPriorityGrouping();
ganlikun 0:13413ea9a877 366 }
ganlikun 0:13413ea9a877 367
ganlikun 0:13413ea9a877 368 /**
ganlikun 0:13413ea9a877 369 * @brief Gets the priority of an interrupt.
ganlikun 0:13413ea9a877 370 * @param IRQn: External interrupt number.
ganlikun 0:13413ea9a877 371 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 372 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 373 * @param PriorityGroup: the priority grouping bits length.
ganlikun 0:13413ea9a877 374 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 375 * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
ganlikun 0:13413ea9a877 376 * 4 bits for subpriority
ganlikun 0:13413ea9a877 377 * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
ganlikun 0:13413ea9a877 378 * 3 bits for subpriority
ganlikun 0:13413ea9a877 379 * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
ganlikun 0:13413ea9a877 380 * 2 bits for subpriority
ganlikun 0:13413ea9a877 381 * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
ganlikun 0:13413ea9a877 382 * 1 bits for subpriority
ganlikun 0:13413ea9a877 383 * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
ganlikun 0:13413ea9a877 384 * 0 bits for subpriority
ganlikun 0:13413ea9a877 385 * @param pPreemptPriority: Pointer on the Preemptive priority value (starting from 0).
ganlikun 0:13413ea9a877 386 * @param pSubPriority: Pointer on the Subpriority value (starting from 0).
ganlikun 0:13413ea9a877 387 * @retval None
ganlikun 0:13413ea9a877 388 */
ganlikun 0:13413ea9a877 389 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
ganlikun 0:13413ea9a877 390 {
ganlikun 0:13413ea9a877 391 /* Check the parameters */
ganlikun 0:13413ea9a877 392 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
ganlikun 0:13413ea9a877 393 /* Get priority for Cortex-M system or device specific interrupts */
ganlikun 0:13413ea9a877 394 NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
ganlikun 0:13413ea9a877 395 }
ganlikun 0:13413ea9a877 396
ganlikun 0:13413ea9a877 397 /**
ganlikun 0:13413ea9a877 398 * @brief Sets Pending bit of an external interrupt.
ganlikun 0:13413ea9a877 399 * @param IRQn External interrupt number
ganlikun 0:13413ea9a877 400 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 401 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 402 * @retval None
ganlikun 0:13413ea9a877 403 */
ganlikun 0:13413ea9a877 404 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
ganlikun 0:13413ea9a877 405 {
ganlikun 0:13413ea9a877 406 /* Check the parameters */
ganlikun 0:13413ea9a877 407 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
ganlikun 0:13413ea9a877 408
ganlikun 0:13413ea9a877 409 /* Set interrupt pending */
ganlikun 0:13413ea9a877 410 NVIC_SetPendingIRQ(IRQn);
ganlikun 0:13413ea9a877 411 }
ganlikun 0:13413ea9a877 412
ganlikun 0:13413ea9a877 413 /**
ganlikun 0:13413ea9a877 414 * @brief Gets Pending Interrupt (reads the pending register in the NVIC
ganlikun 0:13413ea9a877 415 * and returns the pending bit for the specified interrupt).
ganlikun 0:13413ea9a877 416 * @param IRQn External interrupt number.
ganlikun 0:13413ea9a877 417 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 418 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 419 * @retval status: - 0 Interrupt status is not pending.
ganlikun 0:13413ea9a877 420 * - 1 Interrupt status is pending.
ganlikun 0:13413ea9a877 421 */
ganlikun 0:13413ea9a877 422 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
ganlikun 0:13413ea9a877 423 {
ganlikun 0:13413ea9a877 424 /* Check the parameters */
ganlikun 0:13413ea9a877 425 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
ganlikun 0:13413ea9a877 426
ganlikun 0:13413ea9a877 427 /* Return 1 if pending else 0 */
ganlikun 0:13413ea9a877 428 return NVIC_GetPendingIRQ(IRQn);
ganlikun 0:13413ea9a877 429 }
ganlikun 0:13413ea9a877 430
ganlikun 0:13413ea9a877 431 /**
ganlikun 0:13413ea9a877 432 * @brief Clears the pending bit of an external interrupt.
ganlikun 0:13413ea9a877 433 * @param IRQn External interrupt number.
ganlikun 0:13413ea9a877 434 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 435 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 436 * @retval None
ganlikun 0:13413ea9a877 437 */
ganlikun 0:13413ea9a877 438 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
ganlikun 0:13413ea9a877 439 {
ganlikun 0:13413ea9a877 440 /* Check the parameters */
ganlikun 0:13413ea9a877 441 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
ganlikun 0:13413ea9a877 442
ganlikun 0:13413ea9a877 443 /* Clear pending interrupt */
ganlikun 0:13413ea9a877 444 NVIC_ClearPendingIRQ(IRQn);
ganlikun 0:13413ea9a877 445 }
ganlikun 0:13413ea9a877 446
ganlikun 0:13413ea9a877 447 /**
ganlikun 0:13413ea9a877 448 * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
ganlikun 0:13413ea9a877 449 * @param IRQn External interrupt number
ganlikun 0:13413ea9a877 450 * This parameter can be an enumerator of IRQn_Type enumeration
ganlikun 0:13413ea9a877 451 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
ganlikun 0:13413ea9a877 452 * @retval status: - 0 Interrupt status is not pending.
ganlikun 0:13413ea9a877 453 * - 1 Interrupt status is pending.
ganlikun 0:13413ea9a877 454 */
ganlikun 0:13413ea9a877 455 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
ganlikun 0:13413ea9a877 456 {
ganlikun 0:13413ea9a877 457 /* Check the parameters */
ganlikun 0:13413ea9a877 458 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
ganlikun 0:13413ea9a877 459
ganlikun 0:13413ea9a877 460 /* Return 1 if active else 0 */
ganlikun 0:13413ea9a877 461 return NVIC_GetActive(IRQn);
ganlikun 0:13413ea9a877 462 }
ganlikun 0:13413ea9a877 463
ganlikun 0:13413ea9a877 464 /**
ganlikun 0:13413ea9a877 465 * @brief Configures the SysTick clock source.
ganlikun 0:13413ea9a877 466 * @param CLKSource: specifies the SysTick clock source.
ganlikun 0:13413ea9a877 467 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 468 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
ganlikun 0:13413ea9a877 469 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
ganlikun 0:13413ea9a877 470 * @retval None
ganlikun 0:13413ea9a877 471 */
ganlikun 0:13413ea9a877 472 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
ganlikun 0:13413ea9a877 473 {
ganlikun 0:13413ea9a877 474 /* Check the parameters */
ganlikun 0:13413ea9a877 475 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
ganlikun 0:13413ea9a877 476 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
ganlikun 0:13413ea9a877 477 {
ganlikun 0:13413ea9a877 478 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
ganlikun 0:13413ea9a877 479 }
ganlikun 0:13413ea9a877 480 else
ganlikun 0:13413ea9a877 481 {
ganlikun 0:13413ea9a877 482 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
ganlikun 0:13413ea9a877 483 }
ganlikun 0:13413ea9a877 484 }
ganlikun 0:13413ea9a877 485
ganlikun 0:13413ea9a877 486 /**
ganlikun 0:13413ea9a877 487 * @brief This function handles SYSTICK interrupt request.
ganlikun 0:13413ea9a877 488 * @retval None
ganlikun 0:13413ea9a877 489 */
ganlikun 0:13413ea9a877 490 void HAL_SYSTICK_IRQHandler(void)
ganlikun 0:13413ea9a877 491 {
ganlikun 0:13413ea9a877 492 HAL_SYSTICK_Callback();
ganlikun 0:13413ea9a877 493 }
ganlikun 0:13413ea9a877 494
ganlikun 0:13413ea9a877 495 /**
ganlikun 0:13413ea9a877 496 * @brief SYSTICK callback.
ganlikun 0:13413ea9a877 497 * @retval None
ganlikun 0:13413ea9a877 498 */
ganlikun 0:13413ea9a877 499 __weak void HAL_SYSTICK_Callback(void)
ganlikun 0:13413ea9a877 500 {
ganlikun 0:13413ea9a877 501 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 502 the HAL_SYSTICK_Callback could be implemented in the user file
ganlikun 0:13413ea9a877 503 */
ganlikun 0:13413ea9a877 504 }
ganlikun 0:13413ea9a877 505
ganlikun 0:13413ea9a877 506 /**
ganlikun 0:13413ea9a877 507 * @}
ganlikun 0:13413ea9a877 508 */
ganlikun 0:13413ea9a877 509
ganlikun 0:13413ea9a877 510 /**
ganlikun 0:13413ea9a877 511 * @}
ganlikun 0:13413ea9a877 512 */
ganlikun 0:13413ea9a877 513
ganlikun 0:13413ea9a877 514 #endif /* HAL_CORTEX_MODULE_ENABLED */
ganlikun 0:13413ea9a877 515 /**
ganlikun 0:13413ea9a877 516 * @}
ganlikun 0:13413ea9a877 517 */
ganlikun 0:13413ea9a877 518
ganlikun 0:13413ea9a877 519 /**
ganlikun 0:13413ea9a877 520 * @}
ganlikun 0:13413ea9a877 521 */
ganlikun 0:13413ea9a877 522
ganlikun 0:13413ea9a877 523 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 524