Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc_ex.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal_adc_ex.c
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief This file provides firmware functions to manage the following
ganlikun 0:13413ea9a877 8 * functionalities of the ADC extension peripheral:
ganlikun 0:13413ea9a877 9 * + Extended features functions
ganlikun 0:13413ea9a877 10 *
ganlikun 0:13413ea9a877 11 @verbatim
ganlikun 0:13413ea9a877 12 ==============================================================================
ganlikun 0:13413ea9a877 13 ##### How to use this driver #####
ganlikun 0:13413ea9a877 14 ==============================================================================
ganlikun 0:13413ea9a877 15 [..]
ganlikun 0:13413ea9a877 16 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
ganlikun 0:13413ea9a877 17 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
ganlikun 0:13413ea9a877 18 (##) ADC pins configuration
ganlikun 0:13413ea9a877 19 (+++) Enable the clock for the ADC GPIOs using the following function:
ganlikun 0:13413ea9a877 20 __HAL_RCC_GPIOx_CLK_ENABLE()
ganlikun 0:13413ea9a877 21 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
ganlikun 0:13413ea9a877 22 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
ganlikun 0:13413ea9a877 23 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
ganlikun 0:13413ea9a877 24 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
ganlikun 0:13413ea9a877 25 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
ganlikun 0:13413ea9a877 26 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
ganlikun 0:13413ea9a877 27 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
ganlikun 0:13413ea9a877 28 (+++) Configure and enable two DMA streams stream for managing data
ganlikun 0:13413ea9a877 29 transfer from peripheral to memory (output stream)
ganlikun 0:13413ea9a877 30 (+++) Associate the initialized DMA handle to the ADC DMA handle
ganlikun 0:13413ea9a877 31 using __HAL_LINKDMA()
ganlikun 0:13413ea9a877 32 (+++) Configure the priority and enable the NVIC for the transfer complete
ganlikun 0:13413ea9a877 33 interrupt on the two DMA Streams. The output stream should have higher
ganlikun 0:13413ea9a877 34 priority than the input stream.
ganlikun 0:13413ea9a877 35 (#) Configure the ADC Prescaler, conversion resolution and data alignment
ganlikun 0:13413ea9a877 36 using the HAL_ADC_Init() function.
ganlikun 0:13413ea9a877 37
ganlikun 0:13413ea9a877 38 (#) Configure the ADC Injected channels group features, use HAL_ADC_Init()
ganlikun 0:13413ea9a877 39 and HAL_ADC_ConfigChannel() functions.
ganlikun 0:13413ea9a877 40
ganlikun 0:13413ea9a877 41 (#) Three operation modes are available within this driver :
ganlikun 0:13413ea9a877 42
ganlikun 0:13413ea9a877 43 *** Polling mode IO operation ***
ganlikun 0:13413ea9a877 44 =================================
ganlikun 0:13413ea9a877 45 [..]
ganlikun 0:13413ea9a877 46 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart()
ganlikun 0:13413ea9a877 47 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
ganlikun 0:13413ea9a877 48 user can specify the value of timeout according to his end application
ganlikun 0:13413ea9a877 49 (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function.
ganlikun 0:13413ea9a877 50 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop()
ganlikun 0:13413ea9a877 51
ganlikun 0:13413ea9a877 52 *** Interrupt mode IO operation ***
ganlikun 0:13413ea9a877 53 ===================================
ganlikun 0:13413ea9a877 54 [..]
ganlikun 0:13413ea9a877 55 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT()
ganlikun 0:13413ea9a877 56 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
ganlikun 0:13413ea9a877 57 (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
ganlikun 0:13413ea9a877 58 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
ganlikun 0:13413ea9a877 59 (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
ganlikun 0:13413ea9a877 60 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
ganlikun 0:13413ea9a877 61 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT()
ganlikun 0:13413ea9a877 62
ganlikun 0:13413ea9a877 63
ganlikun 0:13413ea9a877 64 *** DMA mode IO operation ***
ganlikun 0:13413ea9a877 65 ==============================
ganlikun 0:13413ea9a877 66 [..]
ganlikun 0:13413ea9a877 67 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length
ganlikun 0:13413ea9a877 68 of data to be transferred at each end of conversion
ganlikun 0:13413ea9a877 69 (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
ganlikun 0:13413ea9a877 70 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
ganlikun 0:13413ea9a877 71 (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
ganlikun 0:13413ea9a877 72 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
ganlikun 0:13413ea9a877 73 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA()
ganlikun 0:13413ea9a877 74
ganlikun 0:13413ea9a877 75 *** Multi mode ADCs Regular channels configuration ***
ganlikun 0:13413ea9a877 76 ======================================================
ganlikun 0:13413ea9a877 77 [..]
ganlikun 0:13413ea9a877 78 (+) Select the Multi mode ADC regular channels features (dual or triple mode)
ganlikun 0:13413ea9a877 79 and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions.
ganlikun 0:13413ea9a877 80 (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length
ganlikun 0:13413ea9a877 81 of data to be transferred at each end of conversion
ganlikun 0:13413ea9a877 82 (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
ganlikun 0:13413ea9a877 83
ganlikun 0:13413ea9a877 84
ganlikun 0:13413ea9a877 85 @endverbatim
ganlikun 0:13413ea9a877 86 ******************************************************************************
ganlikun 0:13413ea9a877 87 * @attention
ganlikun 0:13413ea9a877 88 *
ganlikun 0:13413ea9a877 89 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 90 *
ganlikun 0:13413ea9a877 91 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 92 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 93 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 94 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 95 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 96 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 97 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 99 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 100 * without specific prior written permission.
ganlikun 0:13413ea9a877 101 *
ganlikun 0:13413ea9a877 102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 112 *
ganlikun 0:13413ea9a877 113 ******************************************************************************
ganlikun 0:13413ea9a877 114 */
ganlikun 0:13413ea9a877 115
ganlikun 0:13413ea9a877 116 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 117 #include "stm32f4xx_hal.h"
ganlikun 0:13413ea9a877 118
ganlikun 0:13413ea9a877 119 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 120 * @{
ganlikun 0:13413ea9a877 121 */
ganlikun 0:13413ea9a877 122
ganlikun 0:13413ea9a877 123 /** @defgroup ADCEx ADCEx
ganlikun 0:13413ea9a877 124 * @brief ADC Extended driver modules
ganlikun 0:13413ea9a877 125 * @{
ganlikun 0:13413ea9a877 126 */
ganlikun 0:13413ea9a877 127
ganlikun 0:13413ea9a877 128 #ifdef HAL_ADC_MODULE_ENABLED
ganlikun 0:13413ea9a877 129
ganlikun 0:13413ea9a877 130 /* Private typedef -----------------------------------------------------------*/
ganlikun 0:13413ea9a877 131 /* Private define ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 132 /* Private macro -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 133 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 134 /** @addtogroup ADCEx_Private_Functions
ganlikun 0:13413ea9a877 135 * @{
ganlikun 0:13413ea9a877 136 */
ganlikun 0:13413ea9a877 137 /* Private function prototypes -----------------------------------------------*/
ganlikun 0:13413ea9a877 138 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma);
ganlikun 0:13413ea9a877 139 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma);
ganlikun 0:13413ea9a877 140 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
ganlikun 0:13413ea9a877 141 /**
ganlikun 0:13413ea9a877 142 * @}
ganlikun 0:13413ea9a877 143 */
ganlikun 0:13413ea9a877 144
ganlikun 0:13413ea9a877 145 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 146 /** @defgroup ADCEx_Exported_Functions ADC Exported Functions
ganlikun 0:13413ea9a877 147 * @{
ganlikun 0:13413ea9a877 148 */
ganlikun 0:13413ea9a877 149
ganlikun 0:13413ea9a877 150 /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions
ganlikun 0:13413ea9a877 151 * @brief Extended features functions
ganlikun 0:13413ea9a877 152 *
ganlikun 0:13413ea9a877 153 @verbatim
ganlikun 0:13413ea9a877 154 ===============================================================================
ganlikun 0:13413ea9a877 155 ##### Extended features functions #####
ganlikun 0:13413ea9a877 156 ===============================================================================
ganlikun 0:13413ea9a877 157 [..] This section provides functions allowing to:
ganlikun 0:13413ea9a877 158 (+) Start conversion of injected channel.
ganlikun 0:13413ea9a877 159 (+) Stop conversion of injected channel.
ganlikun 0:13413ea9a877 160 (+) Start multimode and enable DMA transfer.
ganlikun 0:13413ea9a877 161 (+) Stop multimode and disable DMA transfer.
ganlikun 0:13413ea9a877 162 (+) Get result of injected channel conversion.
ganlikun 0:13413ea9a877 163 (+) Get result of multimode conversion.
ganlikun 0:13413ea9a877 164 (+) Configure injected channels.
ganlikun 0:13413ea9a877 165 (+) Configure multimode.
ganlikun 0:13413ea9a877 166
ganlikun 0:13413ea9a877 167 @endverbatim
ganlikun 0:13413ea9a877 168 * @{
ganlikun 0:13413ea9a877 169 */
ganlikun 0:13413ea9a877 170
ganlikun 0:13413ea9a877 171 /**
ganlikun 0:13413ea9a877 172 * @brief Enables the selected ADC software start conversion of the injected channels.
ganlikun 0:13413ea9a877 173 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 174 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 175 * @retval HAL status
ganlikun 0:13413ea9a877 176 */
ganlikun 0:13413ea9a877 177 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
ganlikun 0:13413ea9a877 178 {
ganlikun 0:13413ea9a877 179 __IO uint32_t counter = 0U;
ganlikun 0:13413ea9a877 180 uint32_t tmp1 = 0U, tmp2 = 0U;
ganlikun 0:13413ea9a877 181 ADC_Common_TypeDef *tmpADC_Common;
ganlikun 0:13413ea9a877 182
ganlikun 0:13413ea9a877 183 /* Process locked */
ganlikun 0:13413ea9a877 184 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 185
ganlikun 0:13413ea9a877 186 /* Enable the ADC peripheral */
ganlikun 0:13413ea9a877 187
ganlikun 0:13413ea9a877 188 /* Check if ADC peripheral is disabled in order to enable it and wait during
ganlikun 0:13413ea9a877 189 Tstab time the ADC's stabilization */
ganlikun 0:13413ea9a877 190 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
ganlikun 0:13413ea9a877 191 {
ganlikun 0:13413ea9a877 192 /* Enable the Peripheral */
ganlikun 0:13413ea9a877 193 __HAL_ADC_ENABLE(hadc);
ganlikun 0:13413ea9a877 194
ganlikun 0:13413ea9a877 195 /* Delay for ADC stabilization time */
ganlikun 0:13413ea9a877 196 /* Compute number of CPU cycles to wait for */
ganlikun 0:13413ea9a877 197 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
ganlikun 0:13413ea9a877 198 while(counter != 0U)
ganlikun 0:13413ea9a877 199 {
ganlikun 0:13413ea9a877 200 counter--;
ganlikun 0:13413ea9a877 201 }
ganlikun 0:13413ea9a877 202 }
ganlikun 0:13413ea9a877 203
ganlikun 0:13413ea9a877 204 /* Start conversion if ADC is effectively enabled */
ganlikun 0:13413ea9a877 205 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun 0:13413ea9a877 206 {
ganlikun 0:13413ea9a877 207 /* Set ADC state */
ganlikun 0:13413ea9a877 208 /* - Clear state bitfield related to injected group conversion results */
ganlikun 0:13413ea9a877 209 /* - Set state bitfield related to injected operation */
ganlikun 0:13413ea9a877 210 ADC_STATE_CLR_SET(hadc->State,
ganlikun 0:13413ea9a877 211 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
ganlikun 0:13413ea9a877 212 HAL_ADC_STATE_INJ_BUSY);
ganlikun 0:13413ea9a877 213
ganlikun 0:13413ea9a877 214 /* Check if a regular conversion is ongoing */
ganlikun 0:13413ea9a877 215 /* Note: On this device, there is no ADC error code fields related to */
ganlikun 0:13413ea9a877 216 /* conversions on group injected only. In case of conversion on */
ganlikun 0:13413ea9a877 217 /* going on group regular, no error code is reset. */
ganlikun 0:13413ea9a877 218 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
ganlikun 0:13413ea9a877 219 {
ganlikun 0:13413ea9a877 220 /* Reset ADC all error code fields */
ganlikun 0:13413ea9a877 221 ADC_CLEAR_ERRORCODE(hadc);
ganlikun 0:13413ea9a877 222 }
ganlikun 0:13413ea9a877 223
ganlikun 0:13413ea9a877 224 /* Process unlocked */
ganlikun 0:13413ea9a877 225 /* Unlock before starting ADC conversions: in case of potential */
ganlikun 0:13413ea9a877 226 /* interruption, to let the process to ADC IRQ Handler. */
ganlikun 0:13413ea9a877 227 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 228
ganlikun 0:13413ea9a877 229 /* Clear injected group conversion flag */
ganlikun 0:13413ea9a877 230 /* (To ensure of no unknown state from potential previous ADC operations) */
ganlikun 0:13413ea9a877 231 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
ganlikun 0:13413ea9a877 232
ganlikun 0:13413ea9a877 233 /* Pointer to the common control register to which is belonging hadc */
ganlikun 0:13413ea9a877 234 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
ganlikun 0:13413ea9a877 235 /* control register) */
ganlikun 0:13413ea9a877 236 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun 0:13413ea9a877 237
ganlikun 0:13413ea9a877 238 /* Check if Multimode enabled */
ganlikun 0:13413ea9a877 239 if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
ganlikun 0:13413ea9a877 240 {
ganlikun 0:13413ea9a877 241 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
ganlikun 0:13413ea9a877 242 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
ganlikun 0:13413ea9a877 243 if(tmp1 && tmp2)
ganlikun 0:13413ea9a877 244 {
ganlikun 0:13413ea9a877 245 /* Enable the selected ADC software conversion for injected group */
ganlikun 0:13413ea9a877 246 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
ganlikun 0:13413ea9a877 247 }
ganlikun 0:13413ea9a877 248 }
ganlikun 0:13413ea9a877 249 else
ganlikun 0:13413ea9a877 250 {
ganlikun 0:13413ea9a877 251 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
ganlikun 0:13413ea9a877 252 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
ganlikun 0:13413ea9a877 253 if((hadc->Instance == ADC1) && tmp1 && tmp2)
ganlikun 0:13413ea9a877 254 {
ganlikun 0:13413ea9a877 255 /* Enable the selected ADC software conversion for injected group */
ganlikun 0:13413ea9a877 256 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
ganlikun 0:13413ea9a877 257 }
ganlikun 0:13413ea9a877 258 }
ganlikun 0:13413ea9a877 259 }
ganlikun 0:13413ea9a877 260
ganlikun 0:13413ea9a877 261 /* Return function status */
ganlikun 0:13413ea9a877 262 return HAL_OK;
ganlikun 0:13413ea9a877 263 }
ganlikun 0:13413ea9a877 264
ganlikun 0:13413ea9a877 265 /**
ganlikun 0:13413ea9a877 266 * @brief Enables the interrupt and starts ADC conversion of injected channels.
ganlikun 0:13413ea9a877 267 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 268 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 269 *
ganlikun 0:13413ea9a877 270 * @retval HAL status.
ganlikun 0:13413ea9a877 271 */
ganlikun 0:13413ea9a877 272 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
ganlikun 0:13413ea9a877 273 {
ganlikun 0:13413ea9a877 274 __IO uint32_t counter = 0U;
ganlikun 0:13413ea9a877 275 uint32_t tmp1 = 0U, tmp2 = 0U;
ganlikun 0:13413ea9a877 276 ADC_Common_TypeDef *tmpADC_Common;
ganlikun 0:13413ea9a877 277
ganlikun 0:13413ea9a877 278 /* Process locked */
ganlikun 0:13413ea9a877 279 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 280
ganlikun 0:13413ea9a877 281 /* Enable the ADC peripheral */
ganlikun 0:13413ea9a877 282
ganlikun 0:13413ea9a877 283 /* Check if ADC peripheral is disabled in order to enable it and wait during
ganlikun 0:13413ea9a877 284 Tstab time the ADC's stabilization */
ganlikun 0:13413ea9a877 285 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
ganlikun 0:13413ea9a877 286 {
ganlikun 0:13413ea9a877 287 /* Enable the Peripheral */
ganlikun 0:13413ea9a877 288 __HAL_ADC_ENABLE(hadc);
ganlikun 0:13413ea9a877 289
ganlikun 0:13413ea9a877 290 /* Delay for ADC stabilization time */
ganlikun 0:13413ea9a877 291 /* Compute number of CPU cycles to wait for */
ganlikun 0:13413ea9a877 292 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
ganlikun 0:13413ea9a877 293 while(counter != 0U)
ganlikun 0:13413ea9a877 294 {
ganlikun 0:13413ea9a877 295 counter--;
ganlikun 0:13413ea9a877 296 }
ganlikun 0:13413ea9a877 297 }
ganlikun 0:13413ea9a877 298
ganlikun 0:13413ea9a877 299 /* Start conversion if ADC is effectively enabled */
ganlikun 0:13413ea9a877 300 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun 0:13413ea9a877 301 {
ganlikun 0:13413ea9a877 302 /* Set ADC state */
ganlikun 0:13413ea9a877 303 /* - Clear state bitfield related to injected group conversion results */
ganlikun 0:13413ea9a877 304 /* - Set state bitfield related to injected operation */
ganlikun 0:13413ea9a877 305 ADC_STATE_CLR_SET(hadc->State,
ganlikun 0:13413ea9a877 306 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
ganlikun 0:13413ea9a877 307 HAL_ADC_STATE_INJ_BUSY);
ganlikun 0:13413ea9a877 308
ganlikun 0:13413ea9a877 309 /* Check if a regular conversion is ongoing */
ganlikun 0:13413ea9a877 310 /* Note: On this device, there is no ADC error code fields related to */
ganlikun 0:13413ea9a877 311 /* conversions on group injected only. In case of conversion on */
ganlikun 0:13413ea9a877 312 /* going on group regular, no error code is reset. */
ganlikun 0:13413ea9a877 313 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
ganlikun 0:13413ea9a877 314 {
ganlikun 0:13413ea9a877 315 /* Reset ADC all error code fields */
ganlikun 0:13413ea9a877 316 ADC_CLEAR_ERRORCODE(hadc);
ganlikun 0:13413ea9a877 317 }
ganlikun 0:13413ea9a877 318
ganlikun 0:13413ea9a877 319 /* Process unlocked */
ganlikun 0:13413ea9a877 320 /* Unlock before starting ADC conversions: in case of potential */
ganlikun 0:13413ea9a877 321 /* interruption, to let the process to ADC IRQ Handler. */
ganlikun 0:13413ea9a877 322 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 323
ganlikun 0:13413ea9a877 324 /* Clear injected group conversion flag */
ganlikun 0:13413ea9a877 325 /* (To ensure of no unknown state from potential previous ADC operations) */
ganlikun 0:13413ea9a877 326 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
ganlikun 0:13413ea9a877 327
ganlikun 0:13413ea9a877 328 /* Enable end of conversion interrupt for injected channels */
ganlikun 0:13413ea9a877 329 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
ganlikun 0:13413ea9a877 330
ganlikun 0:13413ea9a877 331 /* Pointer to the common control register to which is belonging hadc */
ganlikun 0:13413ea9a877 332 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
ganlikun 0:13413ea9a877 333 /* control register) */
ganlikun 0:13413ea9a877 334 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun 0:13413ea9a877 335
ganlikun 0:13413ea9a877 336 /* Check if Multimode enabled */
ganlikun 0:13413ea9a877 337 if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
ganlikun 0:13413ea9a877 338 {
ganlikun 0:13413ea9a877 339 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
ganlikun 0:13413ea9a877 340 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
ganlikun 0:13413ea9a877 341 if(tmp1 && tmp2)
ganlikun 0:13413ea9a877 342 {
ganlikun 0:13413ea9a877 343 /* Enable the selected ADC software conversion for injected group */
ganlikun 0:13413ea9a877 344 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
ganlikun 0:13413ea9a877 345 }
ganlikun 0:13413ea9a877 346 }
ganlikun 0:13413ea9a877 347 else
ganlikun 0:13413ea9a877 348 {
ganlikun 0:13413ea9a877 349 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
ganlikun 0:13413ea9a877 350 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
ganlikun 0:13413ea9a877 351 if((hadc->Instance == ADC1) && tmp1 && tmp2)
ganlikun 0:13413ea9a877 352 {
ganlikun 0:13413ea9a877 353 /* Enable the selected ADC software conversion for injected group */
ganlikun 0:13413ea9a877 354 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
ganlikun 0:13413ea9a877 355 }
ganlikun 0:13413ea9a877 356 }
ganlikun 0:13413ea9a877 357 }
ganlikun 0:13413ea9a877 358
ganlikun 0:13413ea9a877 359 /* Return function status */
ganlikun 0:13413ea9a877 360 return HAL_OK;
ganlikun 0:13413ea9a877 361 }
ganlikun 0:13413ea9a877 362
ganlikun 0:13413ea9a877 363 /**
ganlikun 0:13413ea9a877 364 * @brief Stop conversion of injected channels. Disable ADC peripheral if
ganlikun 0:13413ea9a877 365 * no regular conversion is on going.
ganlikun 0:13413ea9a877 366 * @note If ADC must be disabled and if conversion is on going on
ganlikun 0:13413ea9a877 367 * regular group, function HAL_ADC_Stop must be used to stop both
ganlikun 0:13413ea9a877 368 * injected and regular groups, and disable the ADC.
ganlikun 0:13413ea9a877 369 * @note If injected group mode auto-injection is enabled,
ganlikun 0:13413ea9a877 370 * function HAL_ADC_Stop must be used.
ganlikun 0:13413ea9a877 371 * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
ganlikun 0:13413ea9a877 372 * @param hadc: ADC handle
ganlikun 0:13413ea9a877 373 * @retval None
ganlikun 0:13413ea9a877 374 */
ganlikun 0:13413ea9a877 375 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
ganlikun 0:13413ea9a877 376 {
ganlikun 0:13413ea9a877 377 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
ganlikun 0:13413ea9a877 378
ganlikun 0:13413ea9a877 379 /* Check the parameters */
ganlikun 0:13413ea9a877 380 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun 0:13413ea9a877 381
ganlikun 0:13413ea9a877 382 /* Process locked */
ganlikun 0:13413ea9a877 383 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 384
ganlikun 0:13413ea9a877 385 /* Stop potential conversion and disable ADC peripheral */
ganlikun 0:13413ea9a877 386 /* Conditioned to: */
ganlikun 0:13413ea9a877 387 /* - No conversion on the other group (regular group) is intended to */
ganlikun 0:13413ea9a877 388 /* continue (injected and regular groups stop conversion and ADC disable */
ganlikun 0:13413ea9a877 389 /* are common) */
ganlikun 0:13413ea9a877 390 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
ganlikun 0:13413ea9a877 391 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
ganlikun 0:13413ea9a877 392 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
ganlikun 0:13413ea9a877 393 {
ganlikun 0:13413ea9a877 394 /* Stop potential conversion on going, on regular and injected groups */
ganlikun 0:13413ea9a877 395 /* Disable ADC peripheral */
ganlikun 0:13413ea9a877 396 __HAL_ADC_DISABLE(hadc);
ganlikun 0:13413ea9a877 397
ganlikun 0:13413ea9a877 398 /* Check if ADC is effectively disabled */
ganlikun 0:13413ea9a877 399 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun 0:13413ea9a877 400 {
ganlikun 0:13413ea9a877 401 /* Set ADC state */
ganlikun 0:13413ea9a877 402 ADC_STATE_CLR_SET(hadc->State,
ganlikun 0:13413ea9a877 403 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
ganlikun 0:13413ea9a877 404 HAL_ADC_STATE_READY);
ganlikun 0:13413ea9a877 405 }
ganlikun 0:13413ea9a877 406 }
ganlikun 0:13413ea9a877 407 else
ganlikun 0:13413ea9a877 408 {
ganlikun 0:13413ea9a877 409 /* Update ADC state machine to error */
ganlikun 0:13413ea9a877 410 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
ganlikun 0:13413ea9a877 411
ganlikun 0:13413ea9a877 412 tmp_hal_status = HAL_ERROR;
ganlikun 0:13413ea9a877 413 }
ganlikun 0:13413ea9a877 414
ganlikun 0:13413ea9a877 415 /* Process unlocked */
ganlikun 0:13413ea9a877 416 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 417
ganlikun 0:13413ea9a877 418 /* Return function status */
ganlikun 0:13413ea9a877 419 return tmp_hal_status;
ganlikun 0:13413ea9a877 420 }
ganlikun 0:13413ea9a877 421
ganlikun 0:13413ea9a877 422 /**
ganlikun 0:13413ea9a877 423 * @brief Poll for injected conversion complete
ganlikun 0:13413ea9a877 424 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 425 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 426 * @param Timeout: Timeout value in millisecond.
ganlikun 0:13413ea9a877 427 * @retval HAL status
ganlikun 0:13413ea9a877 428 */
ganlikun 0:13413ea9a877 429 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
ganlikun 0:13413ea9a877 430 {
ganlikun 0:13413ea9a877 431 uint32_t tickstart = 0U;
ganlikun 0:13413ea9a877 432
ganlikun 0:13413ea9a877 433 /* Get tick */
ganlikun 0:13413ea9a877 434 tickstart = HAL_GetTick();
ganlikun 0:13413ea9a877 435
ganlikun 0:13413ea9a877 436 /* Check End of conversion flag */
ganlikun 0:13413ea9a877 437 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC)))
ganlikun 0:13413ea9a877 438 {
ganlikun 0:13413ea9a877 439 /* Check for the Timeout */
ganlikun 0:13413ea9a877 440 if(Timeout != HAL_MAX_DELAY)
ganlikun 0:13413ea9a877 441 {
ganlikun 0:13413ea9a877 442 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
ganlikun 0:13413ea9a877 443 {
ganlikun 0:13413ea9a877 444 hadc->State= HAL_ADC_STATE_TIMEOUT;
ganlikun 0:13413ea9a877 445 /* Process unlocked */
ganlikun 0:13413ea9a877 446 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 447 return HAL_TIMEOUT;
ganlikun 0:13413ea9a877 448 }
ganlikun 0:13413ea9a877 449 }
ganlikun 0:13413ea9a877 450 }
ganlikun 0:13413ea9a877 451
ganlikun 0:13413ea9a877 452 /* Clear injected group conversion flag */
ganlikun 0:13413ea9a877 453 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
ganlikun 0:13413ea9a877 454
ganlikun 0:13413ea9a877 455 /* Update ADC state machine */
ganlikun 0:13413ea9a877 456 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
ganlikun 0:13413ea9a877 457
ganlikun 0:13413ea9a877 458 /* Determine whether any further conversion upcoming on group injected */
ganlikun 0:13413ea9a877 459 /* by external trigger, continuous mode or scan sequence on going. */
ganlikun 0:13413ea9a877 460 /* Note: On STM32F4, there is no independent flag of end of sequence. */
ganlikun 0:13413ea9a877 461 /* The test of scan sequence on going is done either with scan */
ganlikun 0:13413ea9a877 462 /* sequence disabled or with end of conversion flag set to */
ganlikun 0:13413ea9a877 463 /* of end of sequence. */
ganlikun 0:13413ea9a877 464 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
ganlikun 0:13413ea9a877 465 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
ganlikun 0:13413ea9a877 466 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
ganlikun 0:13413ea9a877 467 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
ganlikun 0:13413ea9a877 468 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
ganlikun 0:13413ea9a877 469 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
ganlikun 0:13413ea9a877 470 {
ganlikun 0:13413ea9a877 471 /* Set ADC state */
ganlikun 0:13413ea9a877 472 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
ganlikun 0:13413ea9a877 473
ganlikun 0:13413ea9a877 474 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
ganlikun 0:13413ea9a877 475 {
ganlikun 0:13413ea9a877 476 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
ganlikun 0:13413ea9a877 477 }
ganlikun 0:13413ea9a877 478 }
ganlikun 0:13413ea9a877 479
ganlikun 0:13413ea9a877 480 /* Return ADC state */
ganlikun 0:13413ea9a877 481 return HAL_OK;
ganlikun 0:13413ea9a877 482 }
ganlikun 0:13413ea9a877 483
ganlikun 0:13413ea9a877 484 /**
ganlikun 0:13413ea9a877 485 * @brief Stop conversion of injected channels, disable interruption of
ganlikun 0:13413ea9a877 486 * end-of-conversion. Disable ADC peripheral if no regular conversion
ganlikun 0:13413ea9a877 487 * is on going.
ganlikun 0:13413ea9a877 488 * @note If ADC must be disabled and if conversion is on going on
ganlikun 0:13413ea9a877 489 * regular group, function HAL_ADC_Stop must be used to stop both
ganlikun 0:13413ea9a877 490 * injected and regular groups, and disable the ADC.
ganlikun 0:13413ea9a877 491 * @note If injected group mode auto-injection is enabled,
ganlikun 0:13413ea9a877 492 * function HAL_ADC_Stop must be used.
ganlikun 0:13413ea9a877 493 * @param hadc: ADC handle
ganlikun 0:13413ea9a877 494 * @retval None
ganlikun 0:13413ea9a877 495 */
ganlikun 0:13413ea9a877 496 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
ganlikun 0:13413ea9a877 497 {
ganlikun 0:13413ea9a877 498 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
ganlikun 0:13413ea9a877 499
ganlikun 0:13413ea9a877 500 /* Check the parameters */
ganlikun 0:13413ea9a877 501 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun 0:13413ea9a877 502
ganlikun 0:13413ea9a877 503 /* Process locked */
ganlikun 0:13413ea9a877 504 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 505
ganlikun 0:13413ea9a877 506 /* Stop potential conversion and disable ADC peripheral */
ganlikun 0:13413ea9a877 507 /* Conditioned to: */
ganlikun 0:13413ea9a877 508 /* - No conversion on the other group (regular group) is intended to */
ganlikun 0:13413ea9a877 509 /* continue (injected and regular groups stop conversion and ADC disable */
ganlikun 0:13413ea9a877 510 /* are common) */
ganlikun 0:13413ea9a877 511 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
ganlikun 0:13413ea9a877 512 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
ganlikun 0:13413ea9a877 513 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
ganlikun 0:13413ea9a877 514 {
ganlikun 0:13413ea9a877 515 /* Stop potential conversion on going, on regular and injected groups */
ganlikun 0:13413ea9a877 516 /* Disable ADC peripheral */
ganlikun 0:13413ea9a877 517 __HAL_ADC_DISABLE(hadc);
ganlikun 0:13413ea9a877 518
ganlikun 0:13413ea9a877 519 /* Check if ADC is effectively disabled */
ganlikun 0:13413ea9a877 520 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun 0:13413ea9a877 521 {
ganlikun 0:13413ea9a877 522 /* Disable ADC end of conversion interrupt for injected channels */
ganlikun 0:13413ea9a877 523 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
ganlikun 0:13413ea9a877 524
ganlikun 0:13413ea9a877 525 /* Set ADC state */
ganlikun 0:13413ea9a877 526 ADC_STATE_CLR_SET(hadc->State,
ganlikun 0:13413ea9a877 527 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
ganlikun 0:13413ea9a877 528 HAL_ADC_STATE_READY);
ganlikun 0:13413ea9a877 529 }
ganlikun 0:13413ea9a877 530 }
ganlikun 0:13413ea9a877 531 else
ganlikun 0:13413ea9a877 532 {
ganlikun 0:13413ea9a877 533 /* Update ADC state machine to error */
ganlikun 0:13413ea9a877 534 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
ganlikun 0:13413ea9a877 535
ganlikun 0:13413ea9a877 536 tmp_hal_status = HAL_ERROR;
ganlikun 0:13413ea9a877 537 }
ganlikun 0:13413ea9a877 538
ganlikun 0:13413ea9a877 539 /* Process unlocked */
ganlikun 0:13413ea9a877 540 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 541
ganlikun 0:13413ea9a877 542 /* Return function status */
ganlikun 0:13413ea9a877 543 return tmp_hal_status;
ganlikun 0:13413ea9a877 544 }
ganlikun 0:13413ea9a877 545
ganlikun 0:13413ea9a877 546 /**
ganlikun 0:13413ea9a877 547 * @brief Gets the converted value from data register of injected channel.
ganlikun 0:13413ea9a877 548 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 549 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 550 * @param InjectedRank: the ADC injected rank.
ganlikun 0:13413ea9a877 551 * This parameter can be one of the following values:
ganlikun 0:13413ea9a877 552 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
ganlikun 0:13413ea9a877 553 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
ganlikun 0:13413ea9a877 554 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
ganlikun 0:13413ea9a877 555 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
ganlikun 0:13413ea9a877 556 * @retval None
ganlikun 0:13413ea9a877 557 */
ganlikun 0:13413ea9a877 558 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
ganlikun 0:13413ea9a877 559 {
ganlikun 0:13413ea9a877 560 __IO uint32_t tmp = 0U;
ganlikun 0:13413ea9a877 561
ganlikun 0:13413ea9a877 562 /* Check the parameters */
ganlikun 0:13413ea9a877 563 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
ganlikun 0:13413ea9a877 564
ganlikun 0:13413ea9a877 565 /* Clear injected group conversion flag to have similar behaviour as */
ganlikun 0:13413ea9a877 566 /* regular group: reading data register also clears end of conversion flag. */
ganlikun 0:13413ea9a877 567 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
ganlikun 0:13413ea9a877 568
ganlikun 0:13413ea9a877 569 /* Return the selected ADC converted value */
ganlikun 0:13413ea9a877 570 switch(InjectedRank)
ganlikun 0:13413ea9a877 571 {
ganlikun 0:13413ea9a877 572 case ADC_INJECTED_RANK_4:
ganlikun 0:13413ea9a877 573 {
ganlikun 0:13413ea9a877 574 tmp = hadc->Instance->JDR4;
ganlikun 0:13413ea9a877 575 }
ganlikun 0:13413ea9a877 576 break;
ganlikun 0:13413ea9a877 577 case ADC_INJECTED_RANK_3:
ganlikun 0:13413ea9a877 578 {
ganlikun 0:13413ea9a877 579 tmp = hadc->Instance->JDR3;
ganlikun 0:13413ea9a877 580 }
ganlikun 0:13413ea9a877 581 break;
ganlikun 0:13413ea9a877 582 case ADC_INJECTED_RANK_2:
ganlikun 0:13413ea9a877 583 {
ganlikun 0:13413ea9a877 584 tmp = hadc->Instance->JDR2;
ganlikun 0:13413ea9a877 585 }
ganlikun 0:13413ea9a877 586 break;
ganlikun 0:13413ea9a877 587 case ADC_INJECTED_RANK_1:
ganlikun 0:13413ea9a877 588 {
ganlikun 0:13413ea9a877 589 tmp = hadc->Instance->JDR1;
ganlikun 0:13413ea9a877 590 }
ganlikun 0:13413ea9a877 591 break;
ganlikun 0:13413ea9a877 592 default:
ganlikun 0:13413ea9a877 593 break;
ganlikun 0:13413ea9a877 594 }
ganlikun 0:13413ea9a877 595 return tmp;
ganlikun 0:13413ea9a877 596 }
ganlikun 0:13413ea9a877 597
ganlikun 0:13413ea9a877 598 /**
ganlikun 0:13413ea9a877 599 * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral
ganlikun 0:13413ea9a877 600 *
ganlikun 0:13413ea9a877 601 * @note Caution: This function must be used only with the ADC master.
ganlikun 0:13413ea9a877 602 *
ganlikun 0:13413ea9a877 603 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 604 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 605 * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
ganlikun 0:13413ea9a877 606 * @param Length: The length of data to be transferred from ADC peripheral to memory.
ganlikun 0:13413ea9a877 607 * @retval HAL status
ganlikun 0:13413ea9a877 608 */
ganlikun 0:13413ea9a877 609 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
ganlikun 0:13413ea9a877 610 {
ganlikun 0:13413ea9a877 611 __IO uint32_t counter = 0U;
ganlikun 0:13413ea9a877 612 ADC_Common_TypeDef *tmpADC_Common;
ganlikun 0:13413ea9a877 613
ganlikun 0:13413ea9a877 614 /* Check the parameters */
ganlikun 0:13413ea9a877 615 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
ganlikun 0:13413ea9a877 616 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
ganlikun 0:13413ea9a877 617 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
ganlikun 0:13413ea9a877 618
ganlikun 0:13413ea9a877 619 /* Process locked */
ganlikun 0:13413ea9a877 620 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 621
ganlikun 0:13413ea9a877 622 /* Check if ADC peripheral is disabled in order to enable it and wait during
ganlikun 0:13413ea9a877 623 Tstab time the ADC's stabilization */
ganlikun 0:13413ea9a877 624 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
ganlikun 0:13413ea9a877 625 {
ganlikun 0:13413ea9a877 626 /* Enable the Peripheral */
ganlikun 0:13413ea9a877 627 __HAL_ADC_ENABLE(hadc);
ganlikun 0:13413ea9a877 628
ganlikun 0:13413ea9a877 629 /* Delay for temperature sensor stabilization time */
ganlikun 0:13413ea9a877 630 /* Compute number of CPU cycles to wait for */
ganlikun 0:13413ea9a877 631 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
ganlikun 0:13413ea9a877 632 while(counter != 0U)
ganlikun 0:13413ea9a877 633 {
ganlikun 0:13413ea9a877 634 counter--;
ganlikun 0:13413ea9a877 635 }
ganlikun 0:13413ea9a877 636 }
ganlikun 0:13413ea9a877 637
ganlikun 0:13413ea9a877 638 /* Start conversion if ADC is effectively enabled */
ganlikun 0:13413ea9a877 639 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun 0:13413ea9a877 640 {
ganlikun 0:13413ea9a877 641 /* Set ADC state */
ganlikun 0:13413ea9a877 642 /* - Clear state bitfield related to regular group conversion results */
ganlikun 0:13413ea9a877 643 /* - Set state bitfield related to regular group operation */
ganlikun 0:13413ea9a877 644 ADC_STATE_CLR_SET(hadc->State,
ganlikun 0:13413ea9a877 645 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
ganlikun 0:13413ea9a877 646 HAL_ADC_STATE_REG_BUSY);
ganlikun 0:13413ea9a877 647
ganlikun 0:13413ea9a877 648 /* If conversions on group regular are also triggering group injected, */
ganlikun 0:13413ea9a877 649 /* update ADC state. */
ganlikun 0:13413ea9a877 650 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
ganlikun 0:13413ea9a877 651 {
ganlikun 0:13413ea9a877 652 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
ganlikun 0:13413ea9a877 653 }
ganlikun 0:13413ea9a877 654
ganlikun 0:13413ea9a877 655 /* State machine update: Check if an injected conversion is ongoing */
ganlikun 0:13413ea9a877 656 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun 0:13413ea9a877 657 {
ganlikun 0:13413ea9a877 658 /* Reset ADC error code fields related to conversions on group regular */
ganlikun 0:13413ea9a877 659 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
ganlikun 0:13413ea9a877 660 }
ganlikun 0:13413ea9a877 661 else
ganlikun 0:13413ea9a877 662 {
ganlikun 0:13413ea9a877 663 /* Reset ADC all error code fields */
ganlikun 0:13413ea9a877 664 ADC_CLEAR_ERRORCODE(hadc);
ganlikun 0:13413ea9a877 665 }
ganlikun 0:13413ea9a877 666
ganlikun 0:13413ea9a877 667 /* Process unlocked */
ganlikun 0:13413ea9a877 668 /* Unlock before starting ADC conversions: in case of potential */
ganlikun 0:13413ea9a877 669 /* interruption, to let the process to ADC IRQ Handler. */
ganlikun 0:13413ea9a877 670 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 671
ganlikun 0:13413ea9a877 672 /* Set the DMA transfer complete callback */
ganlikun 0:13413ea9a877 673 hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt;
ganlikun 0:13413ea9a877 674
ganlikun 0:13413ea9a877 675 /* Set the DMA half transfer complete callback */
ganlikun 0:13413ea9a877 676 hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt;
ganlikun 0:13413ea9a877 677
ganlikun 0:13413ea9a877 678 /* Set the DMA error callback */
ganlikun 0:13413ea9a877 679 hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
ganlikun 0:13413ea9a877 680
ganlikun 0:13413ea9a877 681 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
ganlikun 0:13413ea9a877 682 /* start (in case of SW start): */
ganlikun 0:13413ea9a877 683
ganlikun 0:13413ea9a877 684 /* Clear regular group conversion flag and overrun flag */
ganlikun 0:13413ea9a877 685 /* (To ensure of no unknown state from potential previous ADC operations) */
ganlikun 0:13413ea9a877 686 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
ganlikun 0:13413ea9a877 687
ganlikun 0:13413ea9a877 688 /* Enable ADC overrun interrupt */
ganlikun 0:13413ea9a877 689 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
ganlikun 0:13413ea9a877 690
ganlikun 0:13413ea9a877 691 /* Pointer to the common control register to which is belonging hadc */
ganlikun 0:13413ea9a877 692 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
ganlikun 0:13413ea9a877 693 /* control register) */
ganlikun 0:13413ea9a877 694 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun 0:13413ea9a877 695
ganlikun 0:13413ea9a877 696 if (hadc->Init.DMAContinuousRequests != DISABLE)
ganlikun 0:13413ea9a877 697 {
ganlikun 0:13413ea9a877 698 /* Enable the selected ADC DMA request after last transfer */
ganlikun 0:13413ea9a877 699 tmpADC_Common->CCR |= ADC_CCR_DDS;
ganlikun 0:13413ea9a877 700 }
ganlikun 0:13413ea9a877 701 else
ganlikun 0:13413ea9a877 702 {
ganlikun 0:13413ea9a877 703 /* Disable the selected ADC EOC rising on each regular channel conversion */
ganlikun 0:13413ea9a877 704 tmpADC_Common->CCR &= ~ADC_CCR_DDS;
ganlikun 0:13413ea9a877 705 }
ganlikun 0:13413ea9a877 706
ganlikun 0:13413ea9a877 707 /* Enable the DMA Stream */
ganlikun 0:13413ea9a877 708 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
ganlikun 0:13413ea9a877 709
ganlikun 0:13413ea9a877 710 /* if no external trigger present enable software conversion of regular channels */
ganlikun 0:13413ea9a877 711 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
ganlikun 0:13413ea9a877 712 {
ganlikun 0:13413ea9a877 713 /* Enable the selected ADC software conversion for regular group */
ganlikun 0:13413ea9a877 714 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
ganlikun 0:13413ea9a877 715 }
ganlikun 0:13413ea9a877 716 }
ganlikun 0:13413ea9a877 717
ganlikun 0:13413ea9a877 718 /* Return function status */
ganlikun 0:13413ea9a877 719 return HAL_OK;
ganlikun 0:13413ea9a877 720 }
ganlikun 0:13413ea9a877 721
ganlikun 0:13413ea9a877 722 /**
ganlikun 0:13413ea9a877 723 * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
ganlikun 0:13413ea9a877 724 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 725 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 726 * @retval HAL status
ganlikun 0:13413ea9a877 727 */
ganlikun 0:13413ea9a877 728 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
ganlikun 0:13413ea9a877 729 {
ganlikun 0:13413ea9a877 730 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
ganlikun 0:13413ea9a877 731 ADC_Common_TypeDef *tmpADC_Common;
ganlikun 0:13413ea9a877 732
ganlikun 0:13413ea9a877 733 /* Check the parameters */
ganlikun 0:13413ea9a877 734 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun 0:13413ea9a877 735
ganlikun 0:13413ea9a877 736 /* Process locked */
ganlikun 0:13413ea9a877 737 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 738
ganlikun 0:13413ea9a877 739 /* Stop potential conversion on going, on regular and injected groups */
ganlikun 0:13413ea9a877 740 /* Disable ADC peripheral */
ganlikun 0:13413ea9a877 741 __HAL_ADC_DISABLE(hadc);
ganlikun 0:13413ea9a877 742
ganlikun 0:13413ea9a877 743 /* Pointer to the common control register to which is belonging hadc */
ganlikun 0:13413ea9a877 744 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
ganlikun 0:13413ea9a877 745 /* control register) */
ganlikun 0:13413ea9a877 746 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun 0:13413ea9a877 747
ganlikun 0:13413ea9a877 748 /* Check if ADC is effectively disabled */
ganlikun 0:13413ea9a877 749 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun 0:13413ea9a877 750 {
ganlikun 0:13413ea9a877 751 /* Disable the selected ADC DMA mode for multimode */
ganlikun 0:13413ea9a877 752 tmpADC_Common->CCR &= ~ADC_CCR_DDS;
ganlikun 0:13413ea9a877 753
ganlikun 0:13413ea9a877 754 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
ganlikun 0:13413ea9a877 755 /* DMA transfer is on going) */
ganlikun 0:13413ea9a877 756 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
ganlikun 0:13413ea9a877 757
ganlikun 0:13413ea9a877 758 /* Disable ADC overrun interrupt */
ganlikun 0:13413ea9a877 759 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
ganlikun 0:13413ea9a877 760
ganlikun 0:13413ea9a877 761 /* Set ADC state */
ganlikun 0:13413ea9a877 762 ADC_STATE_CLR_SET(hadc->State,
ganlikun 0:13413ea9a877 763 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
ganlikun 0:13413ea9a877 764 HAL_ADC_STATE_READY);
ganlikun 0:13413ea9a877 765 }
ganlikun 0:13413ea9a877 766
ganlikun 0:13413ea9a877 767 /* Process unlocked */
ganlikun 0:13413ea9a877 768 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 769
ganlikun 0:13413ea9a877 770 /* Return function status */
ganlikun 0:13413ea9a877 771 return tmp_hal_status;
ganlikun 0:13413ea9a877 772 }
ganlikun 0:13413ea9a877 773
ganlikun 0:13413ea9a877 774 /**
ganlikun 0:13413ea9a877 775 * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
ganlikun 0:13413ea9a877 776 * data in the selected multi mode.
ganlikun 0:13413ea9a877 777 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 778 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 779 * @retval The converted data value.
ganlikun 0:13413ea9a877 780 */
ganlikun 0:13413ea9a877 781 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
ganlikun 0:13413ea9a877 782 {
ganlikun 0:13413ea9a877 783 ADC_Common_TypeDef *tmpADC_Common;
ganlikun 0:13413ea9a877 784
ganlikun 0:13413ea9a877 785 /* Pointer to the common control register to which is belonging hadc */
ganlikun 0:13413ea9a877 786 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
ganlikun 0:13413ea9a877 787 /* control register) */
ganlikun 0:13413ea9a877 788 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun 0:13413ea9a877 789
ganlikun 0:13413ea9a877 790 /* Return the multi mode conversion value */
ganlikun 0:13413ea9a877 791 return tmpADC_Common->CDR;
ganlikun 0:13413ea9a877 792 }
ganlikun 0:13413ea9a877 793
ganlikun 0:13413ea9a877 794 /**
ganlikun 0:13413ea9a877 795 * @brief Injected conversion complete callback in non blocking mode
ganlikun 0:13413ea9a877 796 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 797 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 798 * @retval None
ganlikun 0:13413ea9a877 799 */
ganlikun 0:13413ea9a877 800 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
ganlikun 0:13413ea9a877 801 {
ganlikun 0:13413ea9a877 802 /* Prevent unused argument(s) compilation warning */
ganlikun 0:13413ea9a877 803 UNUSED(hadc);
ganlikun 0:13413ea9a877 804 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:13413ea9a877 805 the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
ganlikun 0:13413ea9a877 806 */
ganlikun 0:13413ea9a877 807 }
ganlikun 0:13413ea9a877 808
ganlikun 0:13413ea9a877 809 /**
ganlikun 0:13413ea9a877 810 * @brief Configures for the selected ADC injected channel its corresponding
ganlikun 0:13413ea9a877 811 * rank in the sequencer and its sample time.
ganlikun 0:13413ea9a877 812 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 813 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 814 * @param sConfigInjected: ADC configuration structure for injected channel.
ganlikun 0:13413ea9a877 815 * @retval None
ganlikun 0:13413ea9a877 816 */
ganlikun 0:13413ea9a877 817 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
ganlikun 0:13413ea9a877 818 {
ganlikun 0:13413ea9a877 819
ganlikun 0:13413ea9a877 820 #ifdef USE_FULL_ASSERT
ganlikun 0:13413ea9a877 821 uint32_t tmp = 0U;
ganlikun 0:13413ea9a877 822
ganlikun 0:13413ea9a877 823 #endif /* USE_FULL_ASSERT */
ganlikun 0:13413ea9a877 824
ganlikun 0:13413ea9a877 825 ADC_Common_TypeDef *tmpADC_Common;
ganlikun 0:13413ea9a877 826
ganlikun 0:13413ea9a877 827 /* Check the parameters */
ganlikun 0:13413ea9a877 828 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
ganlikun 0:13413ea9a877 829 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
ganlikun 0:13413ea9a877 830 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
ganlikun 0:13413ea9a877 831 assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
ganlikun 0:13413ea9a877 832 assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
ganlikun 0:13413ea9a877 833 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
ganlikun 0:13413ea9a877 834 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
ganlikun 0:13413ea9a877 835
ganlikun 0:13413ea9a877 836 #ifdef USE_FULL_ASSERT
ganlikun 0:13413ea9a877 837 tmp = ADC_GET_RESOLUTION(hadc);
ganlikun 0:13413ea9a877 838 assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
ganlikun 0:13413ea9a877 839 #endif /* USE_FULL_ASSERT */
ganlikun 0:13413ea9a877 840
ganlikun 0:13413ea9a877 841 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
ganlikun 0:13413ea9a877 842 {
ganlikun 0:13413ea9a877 843 assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
ganlikun 0:13413ea9a877 844 }
ganlikun 0:13413ea9a877 845
ganlikun 0:13413ea9a877 846 /* Process locked */
ganlikun 0:13413ea9a877 847 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 848
ganlikun 0:13413ea9a877 849 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
ganlikun 0:13413ea9a877 850 if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9)
ganlikun 0:13413ea9a877 851 {
ganlikun 0:13413ea9a877 852 /* Clear the old sample time */
ganlikun 0:13413ea9a877 853 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
ganlikun 0:13413ea9a877 854
ganlikun 0:13413ea9a877 855 /* Set the new sample time */
ganlikun 0:13413ea9a877 856 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
ganlikun 0:13413ea9a877 857 }
ganlikun 0:13413ea9a877 858 else /* ADC_Channel include in ADC_Channel_[0..9] */
ganlikun 0:13413ea9a877 859 {
ganlikun 0:13413ea9a877 860 /* Clear the old sample time */
ganlikun 0:13413ea9a877 861 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
ganlikun 0:13413ea9a877 862
ganlikun 0:13413ea9a877 863 /* Set the new sample time */
ganlikun 0:13413ea9a877 864 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
ganlikun 0:13413ea9a877 865 }
ganlikun 0:13413ea9a877 866
ganlikun 0:13413ea9a877 867 /*---------------------------- ADCx JSQR Configuration -----------------*/
ganlikun 0:13413ea9a877 868 hadc->Instance->JSQR &= ~(ADC_JSQR_JL);
ganlikun 0:13413ea9a877 869 hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion);
ganlikun 0:13413ea9a877 870
ganlikun 0:13413ea9a877 871 /* Rank configuration */
ganlikun 0:13413ea9a877 872
ganlikun 0:13413ea9a877 873 /* Clear the old SQx bits for the selected rank */
ganlikun 0:13413ea9a877 874 hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
ganlikun 0:13413ea9a877 875
ganlikun 0:13413ea9a877 876 /* Set the SQx bits for the selected rank */
ganlikun 0:13413ea9a877 877 hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
ganlikun 0:13413ea9a877 878
ganlikun 0:13413ea9a877 879 /* Enable external trigger if trigger selection is different of software */
ganlikun 0:13413ea9a877 880 /* start. */
ganlikun 0:13413ea9a877 881 /* Note: This configuration keeps the hardware feature of parameter */
ganlikun 0:13413ea9a877 882 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
ganlikun 0:13413ea9a877 883 /* software start. */
ganlikun 0:13413ea9a877 884 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
ganlikun 0:13413ea9a877 885 {
ganlikun 0:13413ea9a877 886 /* Select external trigger to start conversion */
ganlikun 0:13413ea9a877 887 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
ganlikun 0:13413ea9a877 888 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv;
ganlikun 0:13413ea9a877 889
ganlikun 0:13413ea9a877 890 /* Select external trigger polarity */
ganlikun 0:13413ea9a877 891 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
ganlikun 0:13413ea9a877 892 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
ganlikun 0:13413ea9a877 893 }
ganlikun 0:13413ea9a877 894 else
ganlikun 0:13413ea9a877 895 {
ganlikun 0:13413ea9a877 896 /* Reset the external trigger */
ganlikun 0:13413ea9a877 897 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
ganlikun 0:13413ea9a877 898 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
ganlikun 0:13413ea9a877 899 }
ganlikun 0:13413ea9a877 900
ganlikun 0:13413ea9a877 901 if (sConfigInjected->AutoInjectedConv != DISABLE)
ganlikun 0:13413ea9a877 902 {
ganlikun 0:13413ea9a877 903 /* Enable the selected ADC automatic injected group conversion */
ganlikun 0:13413ea9a877 904 hadc->Instance->CR1 |= ADC_CR1_JAUTO;
ganlikun 0:13413ea9a877 905 }
ganlikun 0:13413ea9a877 906 else
ganlikun 0:13413ea9a877 907 {
ganlikun 0:13413ea9a877 908 /* Disable the selected ADC automatic injected group conversion */
ganlikun 0:13413ea9a877 909 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO);
ganlikun 0:13413ea9a877 910 }
ganlikun 0:13413ea9a877 911
ganlikun 0:13413ea9a877 912 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE)
ganlikun 0:13413ea9a877 913 {
ganlikun 0:13413ea9a877 914 /* Enable the selected ADC injected discontinuous mode */
ganlikun 0:13413ea9a877 915 hadc->Instance->CR1 |= ADC_CR1_JDISCEN;
ganlikun 0:13413ea9a877 916 }
ganlikun 0:13413ea9a877 917 else
ganlikun 0:13413ea9a877 918 {
ganlikun 0:13413ea9a877 919 /* Disable the selected ADC injected discontinuous mode */
ganlikun 0:13413ea9a877 920 hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
ganlikun 0:13413ea9a877 921 }
ganlikun 0:13413ea9a877 922
ganlikun 0:13413ea9a877 923 switch(sConfigInjected->InjectedRank)
ganlikun 0:13413ea9a877 924 {
ganlikun 0:13413ea9a877 925 case 1U:
ganlikun 0:13413ea9a877 926 /* Set injected channel 1 offset */
ganlikun 0:13413ea9a877 927 hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
ganlikun 0:13413ea9a877 928 hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset;
ganlikun 0:13413ea9a877 929 break;
ganlikun 0:13413ea9a877 930 case 2U:
ganlikun 0:13413ea9a877 931 /* Set injected channel 2 offset */
ganlikun 0:13413ea9a877 932 hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
ganlikun 0:13413ea9a877 933 hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset;
ganlikun 0:13413ea9a877 934 break;
ganlikun 0:13413ea9a877 935 case 3U:
ganlikun 0:13413ea9a877 936 /* Set injected channel 3 offset */
ganlikun 0:13413ea9a877 937 hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
ganlikun 0:13413ea9a877 938 hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset;
ganlikun 0:13413ea9a877 939 break;
ganlikun 0:13413ea9a877 940 default:
ganlikun 0:13413ea9a877 941 /* Set injected channel 4 offset */
ganlikun 0:13413ea9a877 942 hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
ganlikun 0:13413ea9a877 943 hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset;
ganlikun 0:13413ea9a877 944 break;
ganlikun 0:13413ea9a877 945 }
ganlikun 0:13413ea9a877 946
ganlikun 0:13413ea9a877 947 /* Pointer to the common control register to which is belonging hadc */
ganlikun 0:13413ea9a877 948 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
ganlikun 0:13413ea9a877 949 /* control register) */
ganlikun 0:13413ea9a877 950 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun 0:13413ea9a877 951
ganlikun 0:13413ea9a877 952 /* if ADC1 Channel_18 is selected enable VBAT Channel */
ganlikun 0:13413ea9a877 953 if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT))
ganlikun 0:13413ea9a877 954 {
ganlikun 0:13413ea9a877 955 /* Enable the VBAT channel*/
ganlikun 0:13413ea9a877 956 tmpADC_Common->CCR |= ADC_CCR_VBATE;
ganlikun 0:13413ea9a877 957 }
ganlikun 0:13413ea9a877 958
ganlikun 0:13413ea9a877 959 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
ganlikun 0:13413ea9a877 960 if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)))
ganlikun 0:13413ea9a877 961 {
ganlikun 0:13413ea9a877 962 /* Enable the TSVREFE channel*/
ganlikun 0:13413ea9a877 963 tmpADC_Common->CCR |= ADC_CCR_TSVREFE;
ganlikun 0:13413ea9a877 964 }
ganlikun 0:13413ea9a877 965
ganlikun 0:13413ea9a877 966 /* Process unlocked */
ganlikun 0:13413ea9a877 967 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 968
ganlikun 0:13413ea9a877 969 /* Return function status */
ganlikun 0:13413ea9a877 970 return HAL_OK;
ganlikun 0:13413ea9a877 971 }
ganlikun 0:13413ea9a877 972
ganlikun 0:13413ea9a877 973 /**
ganlikun 0:13413ea9a877 974 * @brief Configures the ADC multi-mode
ganlikun 0:13413ea9a877 975 * @param hadc : pointer to a ADC_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 976 * the configuration information for the specified ADC.
ganlikun 0:13413ea9a877 977 * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
ganlikun 0:13413ea9a877 978 * the configuration information for multimode.
ganlikun 0:13413ea9a877 979 * @retval HAL status
ganlikun 0:13413ea9a877 980 */
ganlikun 0:13413ea9a877 981 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
ganlikun 0:13413ea9a877 982 {
ganlikun 0:13413ea9a877 983
ganlikun 0:13413ea9a877 984 ADC_Common_TypeDef *tmpADC_Common;
ganlikun 0:13413ea9a877 985
ganlikun 0:13413ea9a877 986 /* Check the parameters */
ganlikun 0:13413ea9a877 987 assert_param(IS_ADC_MODE(multimode->Mode));
ganlikun 0:13413ea9a877 988 assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
ganlikun 0:13413ea9a877 989 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
ganlikun 0:13413ea9a877 990
ganlikun 0:13413ea9a877 991 /* Process locked */
ganlikun 0:13413ea9a877 992 __HAL_LOCK(hadc);
ganlikun 0:13413ea9a877 993
ganlikun 0:13413ea9a877 994 /* Pointer to the common control register to which is belonging hadc */
ganlikun 0:13413ea9a877 995 /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */
ganlikun 0:13413ea9a877 996 /* control register) */
ganlikun 0:13413ea9a877 997 tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun 0:13413ea9a877 998
ganlikun 0:13413ea9a877 999 /* Set ADC mode */
ganlikun 0:13413ea9a877 1000 tmpADC_Common->CCR &= ~(ADC_CCR_MULTI);
ganlikun 0:13413ea9a877 1001 tmpADC_Common->CCR |= multimode->Mode;
ganlikun 0:13413ea9a877 1002
ganlikun 0:13413ea9a877 1003 /* Set the ADC DMA access mode */
ganlikun 0:13413ea9a877 1004 tmpADC_Common->CCR &= ~(ADC_CCR_DMA);
ganlikun 0:13413ea9a877 1005 tmpADC_Common->CCR |= multimode->DMAAccessMode;
ganlikun 0:13413ea9a877 1006
ganlikun 0:13413ea9a877 1007 /* Set delay between two sampling phases */
ganlikun 0:13413ea9a877 1008 tmpADC_Common->CCR &= ~(ADC_CCR_DELAY);
ganlikun 0:13413ea9a877 1009 tmpADC_Common->CCR |= multimode->TwoSamplingDelay;
ganlikun 0:13413ea9a877 1010
ganlikun 0:13413ea9a877 1011 /* Process unlocked */
ganlikun 0:13413ea9a877 1012 __HAL_UNLOCK(hadc);
ganlikun 0:13413ea9a877 1013
ganlikun 0:13413ea9a877 1014 /* Return function status */
ganlikun 0:13413ea9a877 1015 return HAL_OK;
ganlikun 0:13413ea9a877 1016 }
ganlikun 0:13413ea9a877 1017
ganlikun 0:13413ea9a877 1018 /**
ganlikun 0:13413ea9a877 1019 * @}
ganlikun 0:13413ea9a877 1020 */
ganlikun 0:13413ea9a877 1021
ganlikun 0:13413ea9a877 1022 /**
ganlikun 0:13413ea9a877 1023 * @brief DMA transfer complete callback.
ganlikun 0:13413ea9a877 1024 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 1025 * the configuration information for the specified DMA module.
ganlikun 0:13413ea9a877 1026 * @retval None
ganlikun 0:13413ea9a877 1027 */
ganlikun 0:13413ea9a877 1028 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
ganlikun 0:13413ea9a877 1029 {
ganlikun 0:13413ea9a877 1030 /* Retrieve ADC handle corresponding to current DMA handle */
ganlikun 0:13413ea9a877 1031 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun 0:13413ea9a877 1032
ganlikun 0:13413ea9a877 1033 /* Update state machine on conversion status if not in error state */
ganlikun 0:13413ea9a877 1034 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
ganlikun 0:13413ea9a877 1035 {
ganlikun 0:13413ea9a877 1036 /* Update ADC state machine */
ganlikun 0:13413ea9a877 1037 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
ganlikun 0:13413ea9a877 1038
ganlikun 0:13413ea9a877 1039 /* Determine whether any further conversion upcoming on group regular */
ganlikun 0:13413ea9a877 1040 /* by external trigger, continuous mode or scan sequence on going. */
ganlikun 0:13413ea9a877 1041 /* Note: On STM32F4, there is no independent flag of end of sequence. */
ganlikun 0:13413ea9a877 1042 /* The test of scan sequence on going is done either with scan */
ganlikun 0:13413ea9a877 1043 /* sequence disabled or with end of conversion flag set to */
ganlikun 0:13413ea9a877 1044 /* of end of sequence. */
ganlikun 0:13413ea9a877 1045 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
ganlikun 0:13413ea9a877 1046 (hadc->Init.ContinuousConvMode == DISABLE) &&
ganlikun 0:13413ea9a877 1047 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
ganlikun 0:13413ea9a877 1048 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
ganlikun 0:13413ea9a877 1049 {
ganlikun 0:13413ea9a877 1050 /* Disable ADC end of single conversion interrupt on group regular */
ganlikun 0:13413ea9a877 1051 /* Note: Overrun interrupt was enabled with EOC interrupt in */
ganlikun 0:13413ea9a877 1052 /* HAL_ADC_Start_IT(), but is not disabled here because can be used */
ganlikun 0:13413ea9a877 1053 /* by overrun IRQ process below. */
ganlikun 0:13413ea9a877 1054 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
ganlikun 0:13413ea9a877 1055
ganlikun 0:13413ea9a877 1056 /* Set ADC state */
ganlikun 0:13413ea9a877 1057 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
ganlikun 0:13413ea9a877 1058
ganlikun 0:13413ea9a877 1059 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun 0:13413ea9a877 1060 {
ganlikun 0:13413ea9a877 1061 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
ganlikun 0:13413ea9a877 1062 }
ganlikun 0:13413ea9a877 1063 }
ganlikun 0:13413ea9a877 1064
ganlikun 0:13413ea9a877 1065 /* Conversion complete callback */
ganlikun 0:13413ea9a877 1066 HAL_ADC_ConvCpltCallback(hadc);
ganlikun 0:13413ea9a877 1067 }
ganlikun 0:13413ea9a877 1068 else
ganlikun 0:13413ea9a877 1069 {
ganlikun 0:13413ea9a877 1070 /* Call DMA error callback */
ganlikun 0:13413ea9a877 1071 hadc->DMA_Handle->XferErrorCallback(hdma);
ganlikun 0:13413ea9a877 1072 }
ganlikun 0:13413ea9a877 1073 }
ganlikun 0:13413ea9a877 1074
ganlikun 0:13413ea9a877 1075 /**
ganlikun 0:13413ea9a877 1076 * @brief DMA half transfer complete callback.
ganlikun 0:13413ea9a877 1077 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 1078 * the configuration information for the specified DMA module.
ganlikun 0:13413ea9a877 1079 * @retval None
ganlikun 0:13413ea9a877 1080 */
ganlikun 0:13413ea9a877 1081 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
ganlikun 0:13413ea9a877 1082 {
ganlikun 0:13413ea9a877 1083 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun 0:13413ea9a877 1084 /* Conversion complete callback */
ganlikun 0:13413ea9a877 1085 HAL_ADC_ConvHalfCpltCallback(hadc);
ganlikun 0:13413ea9a877 1086 }
ganlikun 0:13413ea9a877 1087
ganlikun 0:13413ea9a877 1088 /**
ganlikun 0:13413ea9a877 1089 * @brief DMA error callback
ganlikun 0:13413ea9a877 1090 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun 0:13413ea9a877 1091 * the configuration information for the specified DMA module.
ganlikun 0:13413ea9a877 1092 * @retval None
ganlikun 0:13413ea9a877 1093 */
ganlikun 0:13413ea9a877 1094 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma)
ganlikun 0:13413ea9a877 1095 {
ganlikun 0:13413ea9a877 1096 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun 0:13413ea9a877 1097 hadc->State= HAL_ADC_STATE_ERROR_DMA;
ganlikun 0:13413ea9a877 1098 /* Set ADC error code to DMA error */
ganlikun 0:13413ea9a877 1099 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
ganlikun 0:13413ea9a877 1100 HAL_ADC_ErrorCallback(hadc);
ganlikun 0:13413ea9a877 1101 }
ganlikun 0:13413ea9a877 1102
ganlikun 0:13413ea9a877 1103 /**
ganlikun 0:13413ea9a877 1104 * @}
ganlikun 0:13413ea9a877 1105 */
ganlikun 0:13413ea9a877 1106
ganlikun 0:13413ea9a877 1107 #endif /* HAL_ADC_MODULE_ENABLED */
ganlikun 0:13413ea9a877 1108 /**
ganlikun 0:13413ea9a877 1109 * @}
ganlikun 0:13413ea9a877 1110 */
ganlikun 0:13413ea9a877 1111
ganlikun 0:13413ea9a877 1112 /**
ganlikun 0:13413ea9a877 1113 * @}
ganlikun 0:13413ea9a877 1114 */
ganlikun 0:13413ea9a877 1115
ganlikun 0:13413ea9a877 1116 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:13413ea9a877 1117