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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c@0:13413ea9a877, 2022-06-12 (annotated)

Committer:: ganlikun
Date:: Sun Jun 12 14:02:44 2022 +0000
Revision:: 0:13413ea9a877

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User	Revision	Line number	New contents of line
ganlikun	0:13413ea9a877	1	/**
ganlikun	0:13413ea9a877	2	******************************************************************************
ganlikun	0:13413ea9a877	3	* @file stm32f4xx_hal_adc.c
ganlikun	0:13413ea9a877	4	* @author MCD Application Team
ganlikun	0:13413ea9a877	5	* @version V1.7.1
ganlikun	0:13413ea9a877	6	* @date 14-April-2017
ganlikun	0:13413ea9a877	7	* @brief This file provides firmware functions to manage the following
ganlikun	0:13413ea9a877	8	* functionalities of the Analog to Digital Convertor (ADC) peripheral:
ganlikun	0:13413ea9a877	9	* + Initialization and de-initialization functions
ganlikun	0:13413ea9a877	10	* + IO operation functions
ganlikun	0:13413ea9a877	11	* + State and errors functions
ganlikun	0:13413ea9a877	12	*
ganlikun	0:13413ea9a877	13	@verbatim
ganlikun	0:13413ea9a877	14	==============================================================================
ganlikun	0:13413ea9a877	15	##### ADC Peripheral features #####
ganlikun	0:13413ea9a877	16	==============================================================================
ganlikun	0:13413ea9a877	17	[..]
ganlikun	0:13413ea9a877	18	(#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
ganlikun	0:13413ea9a877	19	(#) Interrupt generation at the end of conversion, end of injected conversion,
ganlikun	0:13413ea9a877	20	and in case of analog watchdog or overrun events
ganlikun	0:13413ea9a877	21	(#) Single and continuous conversion modes.
ganlikun	0:13413ea9a877	22	(#) Scan mode for automatic conversion of channel 0 to channel x.
ganlikun	0:13413ea9a877	23	(#) Data alignment with in-built data coherency.
ganlikun	0:13413ea9a877	24	(#) Channel-wise programmable sampling time.
ganlikun	0:13413ea9a877	25	(#) External trigger option with configurable polarity for both regular and
ganlikun	0:13413ea9a877	26	injected conversion.
ganlikun	0:13413ea9a877	27	(#) Dual/Triple mode (on devices with 2 ADCs or more).
ganlikun	0:13413ea9a877	28	(#) Configurable DMA data storage in Dual/Triple ADC mode.
ganlikun	0:13413ea9a877	29	(#) Configurable delay between conversions in Dual/Triple interleaved mode.
ganlikun	0:13413ea9a877	30	(#) ADC conversion type (refer to the datasheets).
ganlikun	0:13413ea9a877	31	(#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
ganlikun	0:13413ea9a877	32	slower speed.
ganlikun	0:13413ea9a877	33	(#) ADC input range: VREF(minus) = VIN = VREF(plus).
ganlikun	0:13413ea9a877	34	(#) DMA request generation during regular channel conversion.
ganlikun	0:13413ea9a877	35
ganlikun	0:13413ea9a877	36
ganlikun	0:13413ea9a877	37	##### How to use this driver #####
ganlikun	0:13413ea9a877	38	==============================================================================
ganlikun	0:13413ea9a877	39	[..]
ganlikun	0:13413ea9a877	40	(#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
ganlikun	0:13413ea9a877	41	(##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
ganlikun	0:13413ea9a877	42	(##) ADC pins configuration
ganlikun	0:13413ea9a877	43	(+++) Enable the clock for the ADC GPIOs using the following function:
ganlikun	0:13413ea9a877	44	__HAL_RCC_GPIOx_CLK_ENABLE()
ganlikun	0:13413ea9a877	45	(+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
ganlikun	0:13413ea9a877	46	(##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
ganlikun	0:13413ea9a877	47	(+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
ganlikun	0:13413ea9a877	48	(+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
ganlikun	0:13413ea9a877	49	(+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
ganlikun	0:13413ea9a877	50	(##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
ganlikun	0:13413ea9a877	51	(+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
ganlikun	0:13413ea9a877	52	(+++) Configure and enable two DMA streams stream for managing data
ganlikun	0:13413ea9a877	53	transfer from peripheral to memory (output stream)
ganlikun	0:13413ea9a877	54	(+++) Associate the initialized DMA handle to the CRYP DMA handle
ganlikun	0:13413ea9a877	55	using __HAL_LINKDMA()
ganlikun	0:13413ea9a877	56	(+++) Configure the priority and enable the NVIC for the transfer complete
ganlikun	0:13413ea9a877	57	interrupt on the two DMA Streams. The output stream should have higher
ganlikun	0:13413ea9a877	58	priority than the input stream.
ganlikun	0:13413ea9a877	59
ganlikun	0:13413ea9a877	60	* Configuration of ADC, groups regular/injected, channels parameters *
ganlikun	0:13413ea9a877	61	==============================================================================
ganlikun	0:13413ea9a877	62	[..]
ganlikun	0:13413ea9a877	63	(#) Configure the ADC parameters (resolution, data alignment, ...)
ganlikun	0:13413ea9a877	64	and regular group parameters (conversion trigger, sequencer, ...)
ganlikun	0:13413ea9a877	65	using function HAL_ADC_Init().
ganlikun	0:13413ea9a877	66
ganlikun	0:13413ea9a877	67	(#) Configure the channels for regular group parameters (channel number,
ganlikun	0:13413ea9a877	68	channel rank into sequencer, ..., into regular group)
ganlikun	0:13413ea9a877	69	using function HAL_ADC_ConfigChannel().
ganlikun	0:13413ea9a877	70
ganlikun	0:13413ea9a877	71	(#) Optionally, configure the injected group parameters (conversion trigger,
ganlikun	0:13413ea9a877	72	sequencer, ..., of injected group)
ganlikun	0:13413ea9a877	73	and the channels for injected group parameters (channel number,
ganlikun	0:13413ea9a877	74	channel rank into sequencer, ..., into injected group)
ganlikun	0:13413ea9a877	75	using function HAL_ADCEx_InjectedConfigChannel().
ganlikun	0:13413ea9a877	76
ganlikun	0:13413ea9a877	77	(#) Optionally, configure the analog watchdog parameters (channels
ganlikun	0:13413ea9a877	78	monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig().
ganlikun	0:13413ea9a877	79
ganlikun	0:13413ea9a877	80	(#) Optionally, for devices with several ADC instances: configure the
ganlikun	0:13413ea9a877	81	multimode parameters using function HAL_ADCEx_MultiModeConfigChannel().
ganlikun	0:13413ea9a877	82
ganlikun	0:13413ea9a877	83	* Execution of ADC conversions *
ganlikun	0:13413ea9a877	84	==============================================================================
ganlikun	0:13413ea9a877	85	[..]
ganlikun	0:13413ea9a877	86	(#) ADC driver can be used among three modes: polling, interruption,
ganlikun	0:13413ea9a877	87	transfer by DMA.
ganlikun	0:13413ea9a877	88
ganlikun	0:13413ea9a877	89	* Polling mode IO operation *
ganlikun	0:13413ea9a877	90	=================================
ganlikun	0:13413ea9a877	91	[..]
ganlikun	0:13413ea9a877	92	(+) Start the ADC peripheral using HAL_ADC_Start()
ganlikun	0:13413ea9a877	93	(+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
ganlikun	0:13413ea9a877	94	user can specify the value of timeout according to his end application
ganlikun	0:13413ea9a877	95	(+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
ganlikun	0:13413ea9a877	96	(+) Stop the ADC peripheral using HAL_ADC_Stop()
ganlikun	0:13413ea9a877	97
ganlikun	0:13413ea9a877	98	* Interrupt mode IO operation *
ganlikun	0:13413ea9a877	99	===================================
ganlikun	0:13413ea9a877	100	[..]
ganlikun	0:13413ea9a877	101	(+) Start the ADC peripheral using HAL_ADC_Start_IT()
ganlikun	0:13413ea9a877	102	(+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
ganlikun	0:13413ea9a877	103	(+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can
ganlikun	0:13413ea9a877	104	add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
ganlikun	0:13413ea9a877	105	(+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can
ganlikun	0:13413ea9a877	106	add his own code by customization of function pointer HAL_ADC_ErrorCallback
ganlikun	0:13413ea9a877	107	(+) Stop the ADC peripheral using HAL_ADC_Stop_IT()
ganlikun	0:13413ea9a877	108
ganlikun	0:13413ea9a877	109	* DMA mode IO operation *
ganlikun	0:13413ea9a877	110	==============================
ganlikun	0:13413ea9a877	111	[..]
ganlikun	0:13413ea9a877	112	(+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length
ganlikun	0:13413ea9a877	113	of data to be transferred at each end of conversion
ganlikun	0:13413ea9a877	114	(+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can
ganlikun	0:13413ea9a877	115	add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
ganlikun	0:13413ea9a877	116	(+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can
ganlikun	0:13413ea9a877	117	add his own code by customization of function pointer HAL_ADC_ErrorCallback
ganlikun	0:13413ea9a877	118	(+) Stop the ADC peripheral using HAL_ADC_Stop_DMA()
ganlikun	0:13413ea9a877	119
ganlikun	0:13413ea9a877	120	* ADC HAL driver macros list *
ganlikun	0:13413ea9a877	121	=============================================
ganlikun	0:13413ea9a877	122	[..]
ganlikun	0:13413ea9a877	123	Below the list of most used macros in ADC HAL driver.
ganlikun	0:13413ea9a877	124
ganlikun	0:13413ea9a877	125	(+) __HAL_ADC_ENABLE : Enable the ADC peripheral
ganlikun	0:13413ea9a877	126	(+) __HAL_ADC_DISABLE : Disable the ADC peripheral
ganlikun	0:13413ea9a877	127	(+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt
ganlikun	0:13413ea9a877	128	(+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt
ganlikun	0:13413ea9a877	129	(+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled
ganlikun	0:13413ea9a877	130	(+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags
ganlikun	0:13413ea9a877	131	(+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status
ganlikun	0:13413ea9a877	132	(+) ADC_GET_RESOLUTION: Return resolution bits in CR1 register
ganlikun	0:13413ea9a877	133
ganlikun	0:13413ea9a877	134	[..]
ganlikun	0:13413ea9a877	135	(@) You can refer to the ADC HAL driver header file for more useful macros
ganlikun	0:13413ea9a877	136
ganlikun	0:13413ea9a877	137	* Deinitialization of ADC *
ganlikun	0:13413ea9a877	138	==============================================================================
ganlikun	0:13413ea9a877	139	[..]
ganlikun	0:13413ea9a877	140	(#) Disable the ADC interface
ganlikun	0:13413ea9a877	141	(++) ADC clock can be hard reset and disabled at RCC top level.
ganlikun	0:13413ea9a877	142	(++) Hard reset of ADC peripherals
ganlikun	0:13413ea9a877	143	using macro __HAL_RCC_ADC_FORCE_RESET(), __HAL_RCC_ADC_RELEASE_RESET().
ganlikun	0:13413ea9a877	144	(++) ADC clock disable using the equivalent macro/functions as configuration step.
ganlikun	0:13413ea9a877	145	(+++) Example:
ganlikun	0:13413ea9a877	146	Into HAL_ADC_MspDeInit() (recommended code location) or with
ganlikun	0:13413ea9a877	147	other device clock parameters configuration:
ganlikun	0:13413ea9a877	148	(+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
ganlikun	0:13413ea9a877	149	(+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
ganlikun	0:13413ea9a877	150	(+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
ganlikun	0:13413ea9a877	151	(+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
ganlikun	0:13413ea9a877	152
ganlikun	0:13413ea9a877	153	(#) ADC pins configuration
ganlikun	0:13413ea9a877	154	(++) Disable the clock for the ADC GPIOs using macro __HAL_RCC_GPIOx_CLK_DISABLE()
ganlikun	0:13413ea9a877	155
ganlikun	0:13413ea9a877	156	(#) Optionally, in case of usage of ADC with interruptions:
ganlikun	0:13413ea9a877	157	(++) Disable the NVIC for ADC using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
ganlikun	0:13413ea9a877	158
ganlikun	0:13413ea9a877	159	(#) Optionally, in case of usage of DMA:
ganlikun	0:13413ea9a877	160	(++) Deinitialize the DMA using function HAL_DMA_DeInit().
ganlikun	0:13413ea9a877	161	(++) Disable the NVIC for DMA using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
ganlikun	0:13413ea9a877	162
ganlikun	0:13413ea9a877	163	@endverbatim
ganlikun	0:13413ea9a877	164	******************************************************************************
ganlikun	0:13413ea9a877	165	* @attention
ganlikun	0:13413ea9a877	166	*
ganlikun	0:13413ea9a877	167	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun	0:13413ea9a877	168	*
ganlikun	0:13413ea9a877	169	* Redistribution and use in source and binary forms, with or without modification,
ganlikun	0:13413ea9a877	170	* are permitted provided that the following conditions are met:
ganlikun	0:13413ea9a877	171	* 1. Redistributions of source code must retain the above copyright notice,
ganlikun	0:13413ea9a877	172	* this list of conditions and the following disclaimer.
ganlikun	0:13413ea9a877	173	* 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun	0:13413ea9a877	174	* this list of conditions and the following disclaimer in the documentation
ganlikun	0:13413ea9a877	175	* and/or other materials provided with the distribution.
ganlikun	0:13413ea9a877	176	* 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun	0:13413ea9a877	177	* may be used to endorse or promote products derived from this software
ganlikun	0:13413ea9a877	178	* without specific prior written permission.
ganlikun	0:13413ea9a877	179	*
ganlikun	0:13413ea9a877	180	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun	0:13413ea9a877	181	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun	0:13413ea9a877	182	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun	0:13413ea9a877	183	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun	0:13413ea9a877	184	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun	0:13413ea9a877	185	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun	0:13413ea9a877	186	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun	0:13413ea9a877	187	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun	0:13413ea9a877	188	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun	0:13413ea9a877	189	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun	0:13413ea9a877	190	*
ganlikun	0:13413ea9a877	191	******************************************************************************
ganlikun	0:13413ea9a877	192	*/
ganlikun	0:13413ea9a877	193
ganlikun	0:13413ea9a877	194	/* Includes ------------------------------------------------------------------*/
ganlikun	0:13413ea9a877	195	#include "stm32f4xx_hal.h"
ganlikun	0:13413ea9a877	196
ganlikun	0:13413ea9a877	197	/** @addtogroup STM32F4xx_HAL_Driver
ganlikun	0:13413ea9a877	198	* @{
ganlikun	0:13413ea9a877	199	*/
ganlikun	0:13413ea9a877	200
ganlikun	0:13413ea9a877	201	/** @defgroup ADC ADC
ganlikun	0:13413ea9a877	202	* @brief ADC driver modules
ganlikun	0:13413ea9a877	203	* @{
ganlikun	0:13413ea9a877	204	*/
ganlikun	0:13413ea9a877	205
ganlikun	0:13413ea9a877	206	#ifdef HAL_ADC_MODULE_ENABLED
ganlikun	0:13413ea9a877	207
ganlikun	0:13413ea9a877	208	/* Private typedef -----------------------------------------------------------*/
ganlikun	0:13413ea9a877	209	/* Private define ------------------------------------------------------------*/
ganlikun	0:13413ea9a877	210	/* Private macro -------------------------------------------------------------*/
ganlikun	0:13413ea9a877	211	/* Private variables ---------------------------------------------------------*/
ganlikun	0:13413ea9a877	212	/** @addtogroup ADC_Private_Functions
ganlikun	0:13413ea9a877	213	* @{
ganlikun	0:13413ea9a877	214	*/
ganlikun	0:13413ea9a877	215	/* Private function prototypes -----------------------------------------------*/
ganlikun	0:13413ea9a877	216	static void ADC_Init(ADC_HandleTypeDef* hadc);
ganlikun	0:13413ea9a877	217	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	218	static void ADC_DMAError(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	219	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
ganlikun	0:13413ea9a877	220	/**
ganlikun	0:13413ea9a877	221	* @}
ganlikun	0:13413ea9a877	222	*/
ganlikun	0:13413ea9a877	223	/* Exported functions --------------------------------------------------------*/
ganlikun	0:13413ea9a877	224	/** @defgroup ADC_Exported_Functions ADC Exported Functions
ganlikun	0:13413ea9a877	225	* @{
ganlikun	0:13413ea9a877	226	*/
ganlikun	0:13413ea9a877	227
ganlikun	0:13413ea9a877	228	/** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
ganlikun	0:13413ea9a877	229	* @brief Initialization and Configuration functions
ganlikun	0:13413ea9a877	230	*
ganlikun	0:13413ea9a877	231	@verbatim
ganlikun	0:13413ea9a877	232	===============================================================================
ganlikun	0:13413ea9a877	233	##### Initialization and de-initialization functions #####
ganlikun	0:13413ea9a877	234	===============================================================================
ganlikun	0:13413ea9a877	235	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	236	(+) Initialize and configure the ADC.
ganlikun	0:13413ea9a877	237	(+) De-initialize the ADC.
ganlikun	0:13413ea9a877	238
ganlikun	0:13413ea9a877	239	@endverbatim
ganlikun	0:13413ea9a877	240	* @{
ganlikun	0:13413ea9a877	241	*/
ganlikun	0:13413ea9a877	242
ganlikun	0:13413ea9a877	243	/**
ganlikun	0:13413ea9a877	244	* @brief Initializes the ADCx peripheral according to the specified parameters
ganlikun	0:13413ea9a877	245	* in the ADC_InitStruct and initializes the ADC MSP.
ganlikun	0:13413ea9a877	246	*
ganlikun	0:13413ea9a877	247	* @note This function is used to configure the global features of the ADC (
ganlikun	0:13413ea9a877	248	* ClockPrescaler, Resolution, Data Alignment and number of conversion), however,
ganlikun	0:13413ea9a877	249	* the rest of the configuration parameters are specific to the regular
ganlikun	0:13413ea9a877	250	* channels group (scan mode activation, continuous mode activation,
ganlikun	0:13413ea9a877	251	* External trigger source and edge, DMA continuous request after the
ganlikun	0:13413ea9a877	252	* last transfer and End of conversion selection).
ganlikun	0:13413ea9a877	253	*
ganlikun	0:13413ea9a877	254	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	255	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	256	* @retval HAL status
ganlikun	0:13413ea9a877	257	*/
ganlikun	0:13413ea9a877	258	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	259	{
ganlikun	0:13413ea9a877	260	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
ganlikun	0:13413ea9a877	261
ganlikun	0:13413ea9a877	262	/* Check ADC handle */
ganlikun	0:13413ea9a877	263	if(hadc == NULL)
ganlikun	0:13413ea9a877	264	{
ganlikun	0:13413ea9a877	265	return HAL_ERROR;
ganlikun	0:13413ea9a877	266	}
ganlikun	0:13413ea9a877	267
ganlikun	0:13413ea9a877	268	/* Check the parameters */
ganlikun	0:13413ea9a877	269	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun	0:13413ea9a877	270	assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
ganlikun	0:13413ea9a877	271	assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
ganlikun	0:13413ea9a877	272	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode));
ganlikun	0:13413ea9a877	273	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
ganlikun	0:13413ea9a877	274	assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv));
ganlikun	0:13413ea9a877	275	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
ganlikun	0:13413ea9a877	276	assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
ganlikun	0:13413ea9a877	277	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
ganlikun	0:13413ea9a877	278	assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
ganlikun	0:13413ea9a877	279	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
ganlikun	0:13413ea9a877	280
ganlikun	0:13413ea9a877	281	if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
ganlikun	0:13413ea9a877	282	{
ganlikun	0:13413ea9a877	283	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
ganlikun	0:13413ea9a877	284	}
ganlikun	0:13413ea9a877	285
ganlikun	0:13413ea9a877	286	if(hadc->State == HAL_ADC_STATE_RESET)
ganlikun	0:13413ea9a877	287	{
ganlikun	0:13413ea9a877	288	/* Initialize ADC error code */
ganlikun	0:13413ea9a877	289	ADC_CLEAR_ERRORCODE(hadc);
ganlikun	0:13413ea9a877	290
ganlikun	0:13413ea9a877	291	/* Allocate lock resource and initialize it */
ganlikun	0:13413ea9a877	292	hadc->Lock = HAL_UNLOCKED;
ganlikun	0:13413ea9a877	293
ganlikun	0:13413ea9a877	294	/* Init the low level hardware */
ganlikun	0:13413ea9a877	295	HAL_ADC_MspInit(hadc);
ganlikun	0:13413ea9a877	296	}
ganlikun	0:13413ea9a877	297
ganlikun	0:13413ea9a877	298	/* Configuration of ADC parameters if previous preliminary actions are */
ganlikun	0:13413ea9a877	299	/* correctly completed. */
ganlikun	0:13413ea9a877	300	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
ganlikun	0:13413ea9a877	301	{
ganlikun	0:13413ea9a877	302	/* Set ADC state */
ganlikun	0:13413ea9a877	303	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	304	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
ganlikun	0:13413ea9a877	305	HAL_ADC_STATE_BUSY_INTERNAL);
ganlikun	0:13413ea9a877	306
ganlikun	0:13413ea9a877	307	/* Set ADC parameters */
ganlikun	0:13413ea9a877	308	ADC_Init(hadc);
ganlikun	0:13413ea9a877	309
ganlikun	0:13413ea9a877	310	/* Set ADC error code to none */
ganlikun	0:13413ea9a877	311	ADC_CLEAR_ERRORCODE(hadc);
ganlikun	0:13413ea9a877	312
ganlikun	0:13413ea9a877	313	/* Set the ADC state */
ganlikun	0:13413ea9a877	314	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	315	HAL_ADC_STATE_BUSY_INTERNAL,
ganlikun	0:13413ea9a877	316	HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	317	}
ganlikun	0:13413ea9a877	318	else
ganlikun	0:13413ea9a877	319	{
ganlikun	0:13413ea9a877	320	tmp_hal_status = HAL_ERROR;
ganlikun	0:13413ea9a877	321	}
ganlikun	0:13413ea9a877	322
ganlikun	0:13413ea9a877	323	/* Release Lock */
ganlikun	0:13413ea9a877	324	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	325
ganlikun	0:13413ea9a877	326	/* Return function status */
ganlikun	0:13413ea9a877	327	return tmp_hal_status;
ganlikun	0:13413ea9a877	328	}
ganlikun	0:13413ea9a877	329
ganlikun	0:13413ea9a877	330	/**
ganlikun	0:13413ea9a877	331	* @brief Deinitializes the ADCx peripheral registers to their default reset values.
ganlikun	0:13413ea9a877	332	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	333	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	334	* @retval HAL status
ganlikun	0:13413ea9a877	335	*/
ganlikun	0:13413ea9a877	336	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	337	{
ganlikun	0:13413ea9a877	338	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
ganlikun	0:13413ea9a877	339
ganlikun	0:13413ea9a877	340	/* Check ADC handle */
ganlikun	0:13413ea9a877	341	if(hadc == NULL)
ganlikun	0:13413ea9a877	342	{
ganlikun	0:13413ea9a877	343	return HAL_ERROR;
ganlikun	0:13413ea9a877	344	}
ganlikun	0:13413ea9a877	345
ganlikun	0:13413ea9a877	346	/* Check the parameters */
ganlikun	0:13413ea9a877	347	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun	0:13413ea9a877	348
ganlikun	0:13413ea9a877	349	/* Set ADC state */
ganlikun	0:13413ea9a877	350	SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
ganlikun	0:13413ea9a877	351
ganlikun	0:13413ea9a877	352	/* Stop potential conversion on going, on regular and injected groups */
ganlikun	0:13413ea9a877	353	/* Disable ADC peripheral */
ganlikun	0:13413ea9a877	354	__HAL_ADC_DISABLE(hadc);
ganlikun	0:13413ea9a877	355
ganlikun	0:13413ea9a877	356	/* Configuration of ADC parameters if previous preliminary actions are */
ganlikun	0:13413ea9a877	357	/* correctly completed. */
ganlikun	0:13413ea9a877	358	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun	0:13413ea9a877	359	{
ganlikun	0:13413ea9a877	360	/* DeInit the low level hardware */
ganlikun	0:13413ea9a877	361	HAL_ADC_MspDeInit(hadc);
ganlikun	0:13413ea9a877	362
ganlikun	0:13413ea9a877	363	/* Set ADC error code to none */
ganlikun	0:13413ea9a877	364	ADC_CLEAR_ERRORCODE(hadc);
ganlikun	0:13413ea9a877	365
ganlikun	0:13413ea9a877	366	/* Set ADC state */
ganlikun	0:13413ea9a877	367	hadc->State = HAL_ADC_STATE_RESET;
ganlikun	0:13413ea9a877	368	}
ganlikun	0:13413ea9a877	369
ganlikun	0:13413ea9a877	370	/* Process unlocked */
ganlikun	0:13413ea9a877	371	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	372
ganlikun	0:13413ea9a877	373	/* Return function status */
ganlikun	0:13413ea9a877	374	return tmp_hal_status;
ganlikun	0:13413ea9a877	375	}
ganlikun	0:13413ea9a877	376
ganlikun	0:13413ea9a877	377	/**
ganlikun	0:13413ea9a877	378	* @brief Initializes the ADC MSP.
ganlikun	0:13413ea9a877	379	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	380	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	381	* @retval None
ganlikun	0:13413ea9a877	382	*/
ganlikun	0:13413ea9a877	383	__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	384	{
ganlikun	0:13413ea9a877	385	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	386	UNUSED(hadc);
ganlikun	0:13413ea9a877	387	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	388	the HAL_ADC_MspInit could be implemented in the user file
ganlikun	0:13413ea9a877	389	*/
ganlikun	0:13413ea9a877	390	}
ganlikun	0:13413ea9a877	391
ganlikun	0:13413ea9a877	392	/**
ganlikun	0:13413ea9a877	393	* @brief DeInitializes the ADC MSP.
ganlikun	0:13413ea9a877	394	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	395	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	396	* @retval None
ganlikun	0:13413ea9a877	397	*/
ganlikun	0:13413ea9a877	398	__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	399	{
ganlikun	0:13413ea9a877	400	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	401	UNUSED(hadc);
ganlikun	0:13413ea9a877	402	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	403	the HAL_ADC_MspDeInit could be implemented in the user file
ganlikun	0:13413ea9a877	404	*/
ganlikun	0:13413ea9a877	405	}
ganlikun	0:13413ea9a877	406
ganlikun	0:13413ea9a877	407	/**
ganlikun	0:13413ea9a877	408	* @}
ganlikun	0:13413ea9a877	409	*/
ganlikun	0:13413ea9a877	410
ganlikun	0:13413ea9a877	411	/** @defgroup ADC_Exported_Functions_Group2 IO operation functions
ganlikun	0:13413ea9a877	412	* @brief IO operation functions
ganlikun	0:13413ea9a877	413	*
ganlikun	0:13413ea9a877	414	@verbatim
ganlikun	0:13413ea9a877	415	===============================================================================
ganlikun	0:13413ea9a877	416	##### IO operation functions #####
ganlikun	0:13413ea9a877	417	===============================================================================
ganlikun	0:13413ea9a877	418	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	419	(+) Start conversion of regular channel.
ganlikun	0:13413ea9a877	420	(+) Stop conversion of regular channel.
ganlikun	0:13413ea9a877	421	(+) Start conversion of regular channel and enable interrupt.
ganlikun	0:13413ea9a877	422	(+) Stop conversion of regular channel and disable interrupt.
ganlikun	0:13413ea9a877	423	(+) Start conversion of regular channel and enable DMA transfer.
ganlikun	0:13413ea9a877	424	(+) Stop conversion of regular channel and disable DMA transfer.
ganlikun	0:13413ea9a877	425	(+) Handle ADC interrupt request.
ganlikun	0:13413ea9a877	426
ganlikun	0:13413ea9a877	427	@endverbatim
ganlikun	0:13413ea9a877	428	* @{
ganlikun	0:13413ea9a877	429	*/
ganlikun	0:13413ea9a877	430
ganlikun	0:13413ea9a877	431	/**
ganlikun	0:13413ea9a877	432	* @brief Enables ADC and starts conversion of the regular channels.
ganlikun	0:13413ea9a877	433	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	434	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	435	* @retval HAL status
ganlikun	0:13413ea9a877	436	*/
ganlikun	0:13413ea9a877	437	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	438	{
ganlikun	0:13413ea9a877	439	__IO uint32_t counter = 0U;
ganlikun	0:13413ea9a877	440	ADC_Common_TypeDef *tmpADC_Common;
ganlikun	0:13413ea9a877	441
ganlikun	0:13413ea9a877	442	/* Check the parameters */
ganlikun	0:13413ea9a877	443	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
ganlikun	0:13413ea9a877	444	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
ganlikun	0:13413ea9a877	445
ganlikun	0:13413ea9a877	446	/* Process locked */
ganlikun	0:13413ea9a877	447	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	448
ganlikun	0:13413ea9a877	449	/* Enable the ADC peripheral */
ganlikun	0:13413ea9a877	450	/* Check if ADC peripheral is disabled in order to enable it and wait during
ganlikun	0:13413ea9a877	451	Tstab time the ADC's stabilization */
ganlikun	0:13413ea9a877	452	if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
ganlikun	0:13413ea9a877	453	{
ganlikun	0:13413ea9a877	454	/* Enable the Peripheral */
ganlikun	0:13413ea9a877	455	__HAL_ADC_ENABLE(hadc);
ganlikun	0:13413ea9a877	456
ganlikun	0:13413ea9a877	457	/* Delay for ADC stabilization time */
ganlikun	0:13413ea9a877	458	/* Compute number of CPU cycles to wait for */
ganlikun	0:13413ea9a877	459	counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
ganlikun	0:13413ea9a877	460	while(counter != 0U)
ganlikun	0:13413ea9a877	461	{
ganlikun	0:13413ea9a877	462	counter--;
ganlikun	0:13413ea9a877	463	}
ganlikun	0:13413ea9a877	464	}
ganlikun	0:13413ea9a877	465
ganlikun	0:13413ea9a877	466	/* Start conversion if ADC is effectively enabled */
ganlikun	0:13413ea9a877	467	if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun	0:13413ea9a877	468	{
ganlikun	0:13413ea9a877	469	/* Set ADC state */
ganlikun	0:13413ea9a877	470	/* - Clear state bitfield related to regular group conversion results */
ganlikun	0:13413ea9a877	471	/* - Set state bitfield related to regular group operation */
ganlikun	0:13413ea9a877	472	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	473	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR,
ganlikun	0:13413ea9a877	474	HAL_ADC_STATE_REG_BUSY);
ganlikun	0:13413ea9a877	475
ganlikun	0:13413ea9a877	476	/* If conversions on group regular are also triggering group injected, */
ganlikun	0:13413ea9a877	477	/* update ADC state. */
ganlikun	0:13413ea9a877	478	if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
ganlikun	0:13413ea9a877	479	{
ganlikun	0:13413ea9a877	480	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
ganlikun	0:13413ea9a877	481	}
ganlikun	0:13413ea9a877	482
ganlikun	0:13413ea9a877	483	/* State machine update: Check if an injected conversion is ongoing */
ganlikun	0:13413ea9a877	484	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun	0:13413ea9a877	485	{
ganlikun	0:13413ea9a877	486	/* Reset ADC error code fields related to conversions on group regular */
ganlikun	0:13413ea9a877	487	CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR \| HAL_ADC_ERROR_DMA));
ganlikun	0:13413ea9a877	488	}
ganlikun	0:13413ea9a877	489	else
ganlikun	0:13413ea9a877	490	{
ganlikun	0:13413ea9a877	491	/* Reset ADC all error code fields */
ganlikun	0:13413ea9a877	492	ADC_CLEAR_ERRORCODE(hadc);
ganlikun	0:13413ea9a877	493	}
ganlikun	0:13413ea9a877	494
ganlikun	0:13413ea9a877	495	/* Process unlocked */
ganlikun	0:13413ea9a877	496	/* Unlock before starting ADC conversions: in case of potential */
ganlikun	0:13413ea9a877	497	/* interruption, to let the process to ADC IRQ Handler. */
ganlikun	0:13413ea9a877	498	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	499
ganlikun	0:13413ea9a877	500	/* Pointer to the common control register to which is belonging hadc */
ganlikun	0:13413ea9a877	501	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
ganlikun	0:13413ea9a877	502	/* control register) */
ganlikun	0:13413ea9a877	503	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun	0:13413ea9a877	504
ganlikun	0:13413ea9a877	505	/* Clear regular group conversion flag and overrun flag */
ganlikun	0:13413ea9a877	506	/* (To ensure of no unknown state from potential previous ADC operations) */
ganlikun	0:13413ea9a877	507	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC \| ADC_FLAG_OVR);
ganlikun	0:13413ea9a877	508
ganlikun	0:13413ea9a877	509	/* Check if Multimode enabled */
ganlikun	0:13413ea9a877	510	if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
ganlikun	0:13413ea9a877	511	{
ganlikun	0:13413ea9a877	512	/* if no external trigger present enable software conversion of regular channels */
ganlikun	0:13413ea9a877	513	if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
ganlikun	0:13413ea9a877	514	{
ganlikun	0:13413ea9a877	515	/* Enable the selected ADC software conversion for regular group */
ganlikun	0:13413ea9a877	516	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
ganlikun	0:13413ea9a877	517	}
ganlikun	0:13413ea9a877	518	}
ganlikun	0:13413ea9a877	519	else
ganlikun	0:13413ea9a877	520	{
ganlikun	0:13413ea9a877	521	/* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
ganlikun	0:13413ea9a877	522	if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
ganlikun	0:13413ea9a877	523	{
ganlikun	0:13413ea9a877	524	/* Enable the selected ADC software conversion for regular group */
ganlikun	0:13413ea9a877	525	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
ganlikun	0:13413ea9a877	526	}
ganlikun	0:13413ea9a877	527	}
ganlikun	0:13413ea9a877	528	}
ganlikun	0:13413ea9a877	529
ganlikun	0:13413ea9a877	530	/* Return function status */
ganlikun	0:13413ea9a877	531	return HAL_OK;
ganlikun	0:13413ea9a877	532	}
ganlikun	0:13413ea9a877	533
ganlikun	0:13413ea9a877	534	/**
ganlikun	0:13413ea9a877	535	* @brief Disables ADC and stop conversion of regular channels.
ganlikun	0:13413ea9a877	536	*
ganlikun	0:13413ea9a877	537	* @note Caution: This function will stop also injected channels.
ganlikun	0:13413ea9a877	538	*
ganlikun	0:13413ea9a877	539	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	540	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	541	*
ganlikun	0:13413ea9a877	542	* @retval HAL status.
ganlikun	0:13413ea9a877	543	*/
ganlikun	0:13413ea9a877	544	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	545	{
ganlikun	0:13413ea9a877	546	/* Check the parameters */
ganlikun	0:13413ea9a877	547	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun	0:13413ea9a877	548
ganlikun	0:13413ea9a877	549	/* Process locked */
ganlikun	0:13413ea9a877	550	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	551
ganlikun	0:13413ea9a877	552	/* Stop potential conversion on going, on regular and injected groups */
ganlikun	0:13413ea9a877	553	/* Disable ADC peripheral */
ganlikun	0:13413ea9a877	554	__HAL_ADC_DISABLE(hadc);
ganlikun	0:13413ea9a877	555
ganlikun	0:13413ea9a877	556	/* Check if ADC is effectively disabled */
ganlikun	0:13413ea9a877	557	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun	0:13413ea9a877	558	{
ganlikun	0:13413ea9a877	559	/* Set ADC state */
ganlikun	0:13413ea9a877	560	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	561	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
ganlikun	0:13413ea9a877	562	HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	563	}
ganlikun	0:13413ea9a877	564
ganlikun	0:13413ea9a877	565	/* Process unlocked */
ganlikun	0:13413ea9a877	566	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	567
ganlikun	0:13413ea9a877	568	/* Return function status */
ganlikun	0:13413ea9a877	569	return HAL_OK;
ganlikun	0:13413ea9a877	570	}
ganlikun	0:13413ea9a877	571
ganlikun	0:13413ea9a877	572	/**
ganlikun	0:13413ea9a877	573	* @brief Poll for regular conversion complete
ganlikun	0:13413ea9a877	574	* @note ADC conversion flags EOS (end of sequence) and EOC (end of
ganlikun	0:13413ea9a877	575	* conversion) are cleared by this function.
ganlikun	0:13413ea9a877	576	* @note This function cannot be used in a particular setup: ADC configured
ganlikun	0:13413ea9a877	577	* in DMA mode and polling for end of each conversion (ADC init
ganlikun	0:13413ea9a877	578	* parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
ganlikun	0:13413ea9a877	579	* In this case, DMA resets the flag EOC and polling cannot be
ganlikun	0:13413ea9a877	580	* performed on each conversion. Nevertheless, polling can still
ganlikun	0:13413ea9a877	581	* be performed on the complete sequence.
ganlikun	0:13413ea9a877	582	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	583	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	584	* @param Timeout: Timeout value in millisecond.
ganlikun	0:13413ea9a877	585	* @retval HAL status
ganlikun	0:13413ea9a877	586	*/
ganlikun	0:13413ea9a877	587	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
ganlikun	0:13413ea9a877	588	{
ganlikun	0:13413ea9a877	589	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	590
ganlikun	0:13413ea9a877	591	/* Verification that ADC configuration is compliant with polling for */
ganlikun	0:13413ea9a877	592	/* each conversion: */
ganlikun	0:13413ea9a877	593	/* Particular case is ADC configured in DMA mode and ADC sequencer with */
ganlikun	0:13413ea9a877	594	/* several ranks and polling for end of each conversion. */
ganlikun	0:13413ea9a877	595	/* For code simplicity sake, this particular case is generalized to */
ganlikun	0:13413ea9a877	596	/* ADC configured in DMA mode and polling for end of each conversion. */
ganlikun	0:13413ea9a877	597	if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
ganlikun	0:13413ea9a877	598	HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) )
ganlikun	0:13413ea9a877	599	{
ganlikun	0:13413ea9a877	600	/* Update ADC state machine to error */
ganlikun	0:13413ea9a877	601	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
ganlikun	0:13413ea9a877	602
ganlikun	0:13413ea9a877	603	/* Process unlocked */
ganlikun	0:13413ea9a877	604	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	605
ganlikun	0:13413ea9a877	606	return HAL_ERROR;
ganlikun	0:13413ea9a877	607	}
ganlikun	0:13413ea9a877	608
ganlikun	0:13413ea9a877	609	/* Get tick */
ganlikun	0:13413ea9a877	610	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	611
ganlikun	0:13413ea9a877	612	/* Check End of conversion flag */
ganlikun	0:13413ea9a877	613	while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
ganlikun	0:13413ea9a877	614	{
ganlikun	0:13413ea9a877	615	/* Check if timeout is disabled (set to infinite wait) */
ganlikun	0:13413ea9a877	616	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	617	{
ganlikun	0:13413ea9a877	618	if((Timeout == 0U) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
ganlikun	0:13413ea9a877	619	{
ganlikun	0:13413ea9a877	620	/* Update ADC state machine to timeout */
ganlikun	0:13413ea9a877	621	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
ganlikun	0:13413ea9a877	622
ganlikun	0:13413ea9a877	623	/* Process unlocked */
ganlikun	0:13413ea9a877	624	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	625
ganlikun	0:13413ea9a877	626	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	627	}
ganlikun	0:13413ea9a877	628	}
ganlikun	0:13413ea9a877	629	}
ganlikun	0:13413ea9a877	630
ganlikun	0:13413ea9a877	631	/* Clear regular group conversion flag */
ganlikun	0:13413ea9a877	632	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
ganlikun	0:13413ea9a877	633
ganlikun	0:13413ea9a877	634	/* Update ADC state machine */
ganlikun	0:13413ea9a877	635	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
ganlikun	0:13413ea9a877	636
ganlikun	0:13413ea9a877	637	/* Determine whether any further conversion upcoming on group regular */
ganlikun	0:13413ea9a877	638	/* by external trigger, continuous mode or scan sequence on going. */
ganlikun	0:13413ea9a877	639	/* Note: On STM32F4, there is no independent flag of end of sequence. */
ganlikun	0:13413ea9a877	640	/* The test of scan sequence on going is done either with scan */
ganlikun	0:13413ea9a877	641	/* sequence disabled or with end of conversion flag set to */
ganlikun	0:13413ea9a877	642	/* of end of sequence. */
ganlikun	0:13413ea9a877	643	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
ganlikun	0:13413ea9a877	644	(hadc->Init.ContinuousConvMode == DISABLE) &&
ganlikun	0:13413ea9a877	645	(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) \|\|
ganlikun	0:13413ea9a877	646	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
ganlikun	0:13413ea9a877	647	{
ganlikun	0:13413ea9a877	648	/* Set ADC state */
ganlikun	0:13413ea9a877	649	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
ganlikun	0:13413ea9a877	650
ganlikun	0:13413ea9a877	651	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun	0:13413ea9a877	652	{
ganlikun	0:13413ea9a877	653	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	654	}
ganlikun	0:13413ea9a877	655	}
ganlikun	0:13413ea9a877	656
ganlikun	0:13413ea9a877	657	/* Return ADC state */
ganlikun	0:13413ea9a877	658	return HAL_OK;
ganlikun	0:13413ea9a877	659	}
ganlikun	0:13413ea9a877	660
ganlikun	0:13413ea9a877	661	/**
ganlikun	0:13413ea9a877	662	* @brief Poll for conversion event
ganlikun	0:13413ea9a877	663	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	664	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	665	* @param EventType: the ADC event type.
ganlikun	0:13413ea9a877	666	* This parameter can be one of the following values:
ganlikun	0:13413ea9a877	667	* @arg ADC_AWD_EVENT: ADC Analog watch Dog event.
ganlikun	0:13413ea9a877	668	* @arg ADC_OVR_EVENT: ADC Overrun event.
ganlikun	0:13413ea9a877	669	* @param Timeout: Timeout value in millisecond.
ganlikun	0:13413ea9a877	670	* @retval HAL status
ganlikun	0:13413ea9a877	671	*/
ganlikun	0:13413ea9a877	672	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
ganlikun	0:13413ea9a877	673	{
ganlikun	0:13413ea9a877	674	uint32_t tickstart = 0U;
ganlikun	0:13413ea9a877	675
ganlikun	0:13413ea9a877	676	/* Check the parameters */
ganlikun	0:13413ea9a877	677	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun	0:13413ea9a877	678	assert_param(IS_ADC_EVENT_TYPE(EventType));
ganlikun	0:13413ea9a877	679
ganlikun	0:13413ea9a877	680	/* Get tick */
ganlikun	0:13413ea9a877	681	tickstart = HAL_GetTick();
ganlikun	0:13413ea9a877	682
ganlikun	0:13413ea9a877	683	/* Check selected event flag */
ganlikun	0:13413ea9a877	684	while(!(__HAL_ADC_GET_FLAG(hadc,EventType)))
ganlikun	0:13413ea9a877	685	{
ganlikun	0:13413ea9a877	686	/* Check for the Timeout */
ganlikun	0:13413ea9a877	687	if(Timeout != HAL_MAX_DELAY)
ganlikun	0:13413ea9a877	688	{
ganlikun	0:13413ea9a877	689	if((Timeout == 0U) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
ganlikun	0:13413ea9a877	690	{
ganlikun	0:13413ea9a877	691	/* Update ADC state machine to timeout */
ganlikun	0:13413ea9a877	692	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
ganlikun	0:13413ea9a877	693
ganlikun	0:13413ea9a877	694	/* Process unlocked */
ganlikun	0:13413ea9a877	695	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	696
ganlikun	0:13413ea9a877	697	return HAL_TIMEOUT;
ganlikun	0:13413ea9a877	698	}
ganlikun	0:13413ea9a877	699	}
ganlikun	0:13413ea9a877	700	}
ganlikun	0:13413ea9a877	701
ganlikun	0:13413ea9a877	702	/* Analog watchdog (level out of window) event */
ganlikun	0:13413ea9a877	703	if(EventType == ADC_AWD_EVENT)
ganlikun	0:13413ea9a877	704	{
ganlikun	0:13413ea9a877	705	/* Set ADC state */
ganlikun	0:13413ea9a877	706	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
ganlikun	0:13413ea9a877	707
ganlikun	0:13413ea9a877	708	/* Clear ADC analog watchdog flag */
ganlikun	0:13413ea9a877	709	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
ganlikun	0:13413ea9a877	710	}
ganlikun	0:13413ea9a877	711	/* Overrun event */
ganlikun	0:13413ea9a877	712	else
ganlikun	0:13413ea9a877	713	{
ganlikun	0:13413ea9a877	714	/* Set ADC state */
ganlikun	0:13413ea9a877	715	SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
ganlikun	0:13413ea9a877	716	/* Set ADC error code to overrun */
ganlikun	0:13413ea9a877	717	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
ganlikun	0:13413ea9a877	718
ganlikun	0:13413ea9a877	719	/* Clear ADC overrun flag */
ganlikun	0:13413ea9a877	720	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
ganlikun	0:13413ea9a877	721	}
ganlikun	0:13413ea9a877	722
ganlikun	0:13413ea9a877	723	/* Return ADC state */
ganlikun	0:13413ea9a877	724	return HAL_OK;
ganlikun	0:13413ea9a877	725	}
ganlikun	0:13413ea9a877	726
ganlikun	0:13413ea9a877	727
ganlikun	0:13413ea9a877	728	/**
ganlikun	0:13413ea9a877	729	* @brief Enables the interrupt and starts ADC conversion of regular channels.
ganlikun	0:13413ea9a877	730	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	731	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	732	* @retval HAL status.
ganlikun	0:13413ea9a877	733	*/
ganlikun	0:13413ea9a877	734	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	735	{
ganlikun	0:13413ea9a877	736	__IO uint32_t counter = 0U;
ganlikun	0:13413ea9a877	737	ADC_Common_TypeDef *tmpADC_Common;
ganlikun	0:13413ea9a877	738
ganlikun	0:13413ea9a877	739	/* Check the parameters */
ganlikun	0:13413ea9a877	740	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
ganlikun	0:13413ea9a877	741	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
ganlikun	0:13413ea9a877	742
ganlikun	0:13413ea9a877	743	/* Process locked */
ganlikun	0:13413ea9a877	744	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	745
ganlikun	0:13413ea9a877	746	/* Enable the ADC peripheral */
ganlikun	0:13413ea9a877	747	/* Check if ADC peripheral is disabled in order to enable it and wait during
ganlikun	0:13413ea9a877	748	Tstab time the ADC's stabilization */
ganlikun	0:13413ea9a877	749	if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
ganlikun	0:13413ea9a877	750	{
ganlikun	0:13413ea9a877	751	/* Enable the Peripheral */
ganlikun	0:13413ea9a877	752	__HAL_ADC_ENABLE(hadc);
ganlikun	0:13413ea9a877	753
ganlikun	0:13413ea9a877	754	/* Delay for ADC stabilization time */
ganlikun	0:13413ea9a877	755	/* Compute number of CPU cycles to wait for */
ganlikun	0:13413ea9a877	756	counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
ganlikun	0:13413ea9a877	757	while(counter != 0U)
ganlikun	0:13413ea9a877	758	{
ganlikun	0:13413ea9a877	759	counter--;
ganlikun	0:13413ea9a877	760	}
ganlikun	0:13413ea9a877	761	}
ganlikun	0:13413ea9a877	762
ganlikun	0:13413ea9a877	763	/* Start conversion if ADC is effectively enabled */
ganlikun	0:13413ea9a877	764	if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun	0:13413ea9a877	765	{
ganlikun	0:13413ea9a877	766	/* Set ADC state */
ganlikun	0:13413ea9a877	767	/* - Clear state bitfield related to regular group conversion results */
ganlikun	0:13413ea9a877	768	/* - Set state bitfield related to regular group operation */
ganlikun	0:13413ea9a877	769	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	770	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR,
ganlikun	0:13413ea9a877	771	HAL_ADC_STATE_REG_BUSY);
ganlikun	0:13413ea9a877	772
ganlikun	0:13413ea9a877	773	/* If conversions on group regular are also triggering group injected, */
ganlikun	0:13413ea9a877	774	/* update ADC state. */
ganlikun	0:13413ea9a877	775	if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
ganlikun	0:13413ea9a877	776	{
ganlikun	0:13413ea9a877	777	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
ganlikun	0:13413ea9a877	778	}
ganlikun	0:13413ea9a877	779
ganlikun	0:13413ea9a877	780	/* State machine update: Check if an injected conversion is ongoing */
ganlikun	0:13413ea9a877	781	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun	0:13413ea9a877	782	{
ganlikun	0:13413ea9a877	783	/* Reset ADC error code fields related to conversions on group regular */
ganlikun	0:13413ea9a877	784	CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR \| HAL_ADC_ERROR_DMA));
ganlikun	0:13413ea9a877	785	}
ganlikun	0:13413ea9a877	786	else
ganlikun	0:13413ea9a877	787	{
ganlikun	0:13413ea9a877	788	/* Reset ADC all error code fields */
ganlikun	0:13413ea9a877	789	ADC_CLEAR_ERRORCODE(hadc);
ganlikun	0:13413ea9a877	790	}
ganlikun	0:13413ea9a877	791
ganlikun	0:13413ea9a877	792	/* Process unlocked */
ganlikun	0:13413ea9a877	793	/* Unlock before starting ADC conversions: in case of potential */
ganlikun	0:13413ea9a877	794	/* interruption, to let the process to ADC IRQ Handler. */
ganlikun	0:13413ea9a877	795	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	796
ganlikun	0:13413ea9a877	797	/* Pointer to the common control register to which is belonging hadc */
ganlikun	0:13413ea9a877	798	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
ganlikun	0:13413ea9a877	799	/* control register) */
ganlikun	0:13413ea9a877	800	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun	0:13413ea9a877	801
ganlikun	0:13413ea9a877	802	/* Clear regular group conversion flag and overrun flag */
ganlikun	0:13413ea9a877	803	/* (To ensure of no unknown state from potential previous ADC operations) */
ganlikun	0:13413ea9a877	804	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC \| ADC_FLAG_OVR);
ganlikun	0:13413ea9a877	805
ganlikun	0:13413ea9a877	806	/* Enable end of conversion interrupt for regular group */
ganlikun	0:13413ea9a877	807	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_OVR));
ganlikun	0:13413ea9a877	808
ganlikun	0:13413ea9a877	809	/* Check if Multimode enabled */
ganlikun	0:13413ea9a877	810	if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
ganlikun	0:13413ea9a877	811	{
ganlikun	0:13413ea9a877	812	/* if no external trigger present enable software conversion of regular channels */
ganlikun	0:13413ea9a877	813	if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
ganlikun	0:13413ea9a877	814	{
ganlikun	0:13413ea9a877	815	/* Enable the selected ADC software conversion for regular group */
ganlikun	0:13413ea9a877	816	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
ganlikun	0:13413ea9a877	817	}
ganlikun	0:13413ea9a877	818	}
ganlikun	0:13413ea9a877	819	else
ganlikun	0:13413ea9a877	820	{
ganlikun	0:13413ea9a877	821	/* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
ganlikun	0:13413ea9a877	822	if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
ganlikun	0:13413ea9a877	823	{
ganlikun	0:13413ea9a877	824	/* Enable the selected ADC software conversion for regular group */
ganlikun	0:13413ea9a877	825	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
ganlikun	0:13413ea9a877	826	}
ganlikun	0:13413ea9a877	827	}
ganlikun	0:13413ea9a877	828	}
ganlikun	0:13413ea9a877	829
ganlikun	0:13413ea9a877	830	/* Return function status */
ganlikun	0:13413ea9a877	831	return HAL_OK;
ganlikun	0:13413ea9a877	832	}
ganlikun	0:13413ea9a877	833
ganlikun	0:13413ea9a877	834	/**
ganlikun	0:13413ea9a877	835	* @brief Disables the interrupt and stop ADC conversion of regular channels.
ganlikun	0:13413ea9a877	836	*
ganlikun	0:13413ea9a877	837	* @note Caution: This function will stop also injected channels.
ganlikun	0:13413ea9a877	838	*
ganlikun	0:13413ea9a877	839	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	840	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	841	* @retval HAL status.
ganlikun	0:13413ea9a877	842	*/
ganlikun	0:13413ea9a877	843	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	844	{
ganlikun	0:13413ea9a877	845	/* Check the parameters */
ganlikun	0:13413ea9a877	846	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun	0:13413ea9a877	847
ganlikun	0:13413ea9a877	848	/* Process locked */
ganlikun	0:13413ea9a877	849	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	850
ganlikun	0:13413ea9a877	851	/* Stop potential conversion on going, on regular and injected groups */
ganlikun	0:13413ea9a877	852	/* Disable ADC peripheral */
ganlikun	0:13413ea9a877	853	__HAL_ADC_DISABLE(hadc);
ganlikun	0:13413ea9a877	854
ganlikun	0:13413ea9a877	855	/* Check if ADC is effectively disabled */
ganlikun	0:13413ea9a877	856	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun	0:13413ea9a877	857	{
ganlikun	0:13413ea9a877	858	/* Disable ADC end of conversion interrupt for regular group */
ganlikun	0:13413ea9a877	859	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_OVR));
ganlikun	0:13413ea9a877	860
ganlikun	0:13413ea9a877	861	/* Set ADC state */
ganlikun	0:13413ea9a877	862	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	863	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
ganlikun	0:13413ea9a877	864	HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	865	}
ganlikun	0:13413ea9a877	866
ganlikun	0:13413ea9a877	867	/* Process unlocked */
ganlikun	0:13413ea9a877	868	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	869
ganlikun	0:13413ea9a877	870	/* Return function status */
ganlikun	0:13413ea9a877	871	return HAL_OK;
ganlikun	0:13413ea9a877	872	}
ganlikun	0:13413ea9a877	873
ganlikun	0:13413ea9a877	874	/**
ganlikun	0:13413ea9a877	875	* @brief Handles ADC interrupt request
ganlikun	0:13413ea9a877	876	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	877	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	878	* @retval None
ganlikun	0:13413ea9a877	879	*/
ganlikun	0:13413ea9a877	880	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	881	{
ganlikun	0:13413ea9a877	882	uint32_t tmp1 = 0U, tmp2 = 0U;
ganlikun	0:13413ea9a877	883
ganlikun	0:13413ea9a877	884	/* Check the parameters */
ganlikun	0:13413ea9a877	885	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
ganlikun	0:13413ea9a877	886	assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
ganlikun	0:13413ea9a877	887	assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
ganlikun	0:13413ea9a877	888
ganlikun	0:13413ea9a877	889	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC);
ganlikun	0:13413ea9a877	890	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC);
ganlikun	0:13413ea9a877	891	/* Check End of conversion flag for regular channels */
ganlikun	0:13413ea9a877	892	if(tmp1 && tmp2)
ganlikun	0:13413ea9a877	893	{
ganlikun	0:13413ea9a877	894	/* Update state machine on conversion status if not in error state */
ganlikun	0:13413ea9a877	895	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
ganlikun	0:13413ea9a877	896	{
ganlikun	0:13413ea9a877	897	/* Set ADC state */
ganlikun	0:13413ea9a877	898	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
ganlikun	0:13413ea9a877	899	}
ganlikun	0:13413ea9a877	900
ganlikun	0:13413ea9a877	901	/* Determine whether any further conversion upcoming on group regular */
ganlikun	0:13413ea9a877	902	/* by external trigger, continuous mode or scan sequence on going. */
ganlikun	0:13413ea9a877	903	/* Note: On STM32F4, there is no independent flag of end of sequence. */
ganlikun	0:13413ea9a877	904	/* The test of scan sequence on going is done either with scan */
ganlikun	0:13413ea9a877	905	/* sequence disabled or with end of conversion flag set to */
ganlikun	0:13413ea9a877	906	/* of end of sequence. */
ganlikun	0:13413ea9a877	907	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
ganlikun	0:13413ea9a877	908	(hadc->Init.ContinuousConvMode == DISABLE) &&
ganlikun	0:13413ea9a877	909	(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) \|\|
ganlikun	0:13413ea9a877	910	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
ganlikun	0:13413ea9a877	911	{
ganlikun	0:13413ea9a877	912	/* Disable ADC end of single conversion interrupt on group regular */
ganlikun	0:13413ea9a877	913	/* Note: Overrun interrupt was enabled with EOC interrupt in */
ganlikun	0:13413ea9a877	914	/* HAL_ADC_Start_IT(), but is not disabled here because can be used */
ganlikun	0:13413ea9a877	915	/* by overrun IRQ process below. */
ganlikun	0:13413ea9a877	916	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
ganlikun	0:13413ea9a877	917
ganlikun	0:13413ea9a877	918	/* Set ADC state */
ganlikun	0:13413ea9a877	919	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
ganlikun	0:13413ea9a877	920
ganlikun	0:13413ea9a877	921	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun	0:13413ea9a877	922	{
ganlikun	0:13413ea9a877	923	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	924	}
ganlikun	0:13413ea9a877	925	}
ganlikun	0:13413ea9a877	926
ganlikun	0:13413ea9a877	927	/* Conversion complete callback */
ganlikun	0:13413ea9a877	928	HAL_ADC_ConvCpltCallback(hadc);
ganlikun	0:13413ea9a877	929
ganlikun	0:13413ea9a877	930	/* Clear regular group conversion flag */
ganlikun	0:13413ea9a877	931	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
ganlikun	0:13413ea9a877	932	}
ganlikun	0:13413ea9a877	933
ganlikun	0:13413ea9a877	934	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC);
ganlikun	0:13413ea9a877	935	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC);
ganlikun	0:13413ea9a877	936	/* Check End of conversion flag for injected channels */
ganlikun	0:13413ea9a877	937	if(tmp1 && tmp2)
ganlikun	0:13413ea9a877	938	{
ganlikun	0:13413ea9a877	939	/* Update state machine on conversion status if not in error state */
ganlikun	0:13413ea9a877	940	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
ganlikun	0:13413ea9a877	941	{
ganlikun	0:13413ea9a877	942	/* Set ADC state */
ganlikun	0:13413ea9a877	943	SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
ganlikun	0:13413ea9a877	944	}
ganlikun	0:13413ea9a877	945
ganlikun	0:13413ea9a877	946	/* Determine whether any further conversion upcoming on group injected */
ganlikun	0:13413ea9a877	947	/* by external trigger, scan sequence on going or by automatic injected */
ganlikun	0:13413ea9a877	948	/* conversion from group regular (same conditions as group regular */
ganlikun	0:13413ea9a877	949	/* interruption disabling above). */
ganlikun	0:13413ea9a877	950	if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
ganlikun	0:13413ea9a877	951	(HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) \|\|
ganlikun	0:13413ea9a877	952	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
ganlikun	0:13413ea9a877	953	(HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
ganlikun	0:13413ea9a877	954	(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
ganlikun	0:13413ea9a877	955	(hadc->Init.ContinuousConvMode == DISABLE) ) ) )
ganlikun	0:13413ea9a877	956	{
ganlikun	0:13413ea9a877	957	/* Disable ADC end of single conversion interrupt on group injected */
ganlikun	0:13413ea9a877	958	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
ganlikun	0:13413ea9a877	959
ganlikun	0:13413ea9a877	960	/* Set ADC state */
ganlikun	0:13413ea9a877	961	CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
ganlikun	0:13413ea9a877	962
ganlikun	0:13413ea9a877	963	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
ganlikun	0:13413ea9a877	964	{
ganlikun	0:13413ea9a877	965	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	966	}
ganlikun	0:13413ea9a877	967	}
ganlikun	0:13413ea9a877	968
ganlikun	0:13413ea9a877	969	/* Conversion complete callback */
ganlikun	0:13413ea9a877	970	HAL_ADCEx_InjectedConvCpltCallback(hadc);
ganlikun	0:13413ea9a877	971
ganlikun	0:13413ea9a877	972	/* Clear injected group conversion flag */
ganlikun	0:13413ea9a877	973	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT \| ADC_FLAG_JEOC));
ganlikun	0:13413ea9a877	974	}
ganlikun	0:13413ea9a877	975
ganlikun	0:13413ea9a877	976	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD);
ganlikun	0:13413ea9a877	977	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD);
ganlikun	0:13413ea9a877	978	/* Check Analog watchdog flag */
ganlikun	0:13413ea9a877	979	if(tmp1 && tmp2)
ganlikun	0:13413ea9a877	980	{
ganlikun	0:13413ea9a877	981	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
ganlikun	0:13413ea9a877	982	{
ganlikun	0:13413ea9a877	983	/* Set ADC state */
ganlikun	0:13413ea9a877	984	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
ganlikun	0:13413ea9a877	985
ganlikun	0:13413ea9a877	986	/* Level out of window callback */
ganlikun	0:13413ea9a877	987	HAL_ADC_LevelOutOfWindowCallback(hadc);
ganlikun	0:13413ea9a877	988
ganlikun	0:13413ea9a877	989	/* Clear the ADC analog watchdog flag */
ganlikun	0:13413ea9a877	990	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
ganlikun	0:13413ea9a877	991	}
ganlikun	0:13413ea9a877	992	}
ganlikun	0:13413ea9a877	993
ganlikun	0:13413ea9a877	994	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR);
ganlikun	0:13413ea9a877	995	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR);
ganlikun	0:13413ea9a877	996	/* Check Overrun flag */
ganlikun	0:13413ea9a877	997	if(tmp1 && tmp2)
ganlikun	0:13413ea9a877	998	{
ganlikun	0:13413ea9a877	999	/* Note: On STM32F4, ADC overrun can be set through other parameters */
ganlikun	0:13413ea9a877	1000	/* refer to description of parameter "EOCSelection" for more */
ganlikun	0:13413ea9a877	1001	/* details. */
ganlikun	0:13413ea9a877	1002
ganlikun	0:13413ea9a877	1003	/* Set ADC error code to overrun */
ganlikun	0:13413ea9a877	1004	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
ganlikun	0:13413ea9a877	1005
ganlikun	0:13413ea9a877	1006	/* Clear ADC overrun flag */
ganlikun	0:13413ea9a877	1007	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
ganlikun	0:13413ea9a877	1008
ganlikun	0:13413ea9a877	1009	/* Error callback */
ganlikun	0:13413ea9a877	1010	HAL_ADC_ErrorCallback(hadc);
ganlikun	0:13413ea9a877	1011
ganlikun	0:13413ea9a877	1012	/* Clear the Overrun flag */
ganlikun	0:13413ea9a877	1013	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
ganlikun	0:13413ea9a877	1014	}
ganlikun	0:13413ea9a877	1015	}
ganlikun	0:13413ea9a877	1016
ganlikun	0:13413ea9a877	1017	/**
ganlikun	0:13413ea9a877	1018	* @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral
ganlikun	0:13413ea9a877	1019	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1020	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1021	* @param pData: The destination Buffer address.
ganlikun	0:13413ea9a877	1022	* @param Length: The length of data to be transferred from ADC peripheral to memory.
ganlikun	0:13413ea9a877	1023	* @retval HAL status
ganlikun	0:13413ea9a877	1024	*/
ganlikun	0:13413ea9a877	1025	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
ganlikun	0:13413ea9a877	1026	{
ganlikun	0:13413ea9a877	1027	__IO uint32_t counter = 0U;
ganlikun	0:13413ea9a877	1028	ADC_Common_TypeDef *tmpADC_Common;
ganlikun	0:13413ea9a877	1029
ganlikun	0:13413ea9a877	1030	/* Check the parameters */
ganlikun	0:13413ea9a877	1031	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
ganlikun	0:13413ea9a877	1032	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
ganlikun	0:13413ea9a877	1033
ganlikun	0:13413ea9a877	1034	/* Process locked */
ganlikun	0:13413ea9a877	1035	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	1036
ganlikun	0:13413ea9a877	1037	/* Enable the ADC peripheral */
ganlikun	0:13413ea9a877	1038	/* Check if ADC peripheral is disabled in order to enable it and wait during
ganlikun	0:13413ea9a877	1039	Tstab time the ADC's stabilization */
ganlikun	0:13413ea9a877	1040	if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
ganlikun	0:13413ea9a877	1041	{
ganlikun	0:13413ea9a877	1042	/* Enable the Peripheral */
ganlikun	0:13413ea9a877	1043	__HAL_ADC_ENABLE(hadc);
ganlikun	0:13413ea9a877	1044
ganlikun	0:13413ea9a877	1045	/* Delay for ADC stabilization time */
ganlikun	0:13413ea9a877	1046	/* Compute number of CPU cycles to wait for */
ganlikun	0:13413ea9a877	1047	counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
ganlikun	0:13413ea9a877	1048	while(counter != 0U)
ganlikun	0:13413ea9a877	1049	{
ganlikun	0:13413ea9a877	1050	counter--;
ganlikun	0:13413ea9a877	1051	}
ganlikun	0:13413ea9a877	1052	}
ganlikun	0:13413ea9a877	1053
ganlikun	0:13413ea9a877	1054	/* Start conversion if ADC is effectively enabled */
ganlikun	0:13413ea9a877	1055	if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun	0:13413ea9a877	1056	{
ganlikun	0:13413ea9a877	1057	/* Set ADC state */
ganlikun	0:13413ea9a877	1058	/* - Clear state bitfield related to regular group conversion results */
ganlikun	0:13413ea9a877	1059	/* - Set state bitfield related to regular group operation */
ganlikun	0:13413ea9a877	1060	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	1061	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR,
ganlikun	0:13413ea9a877	1062	HAL_ADC_STATE_REG_BUSY);
ganlikun	0:13413ea9a877	1063
ganlikun	0:13413ea9a877	1064	/* If conversions on group regular are also triggering group injected, */
ganlikun	0:13413ea9a877	1065	/* update ADC state. */
ganlikun	0:13413ea9a877	1066	if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
ganlikun	0:13413ea9a877	1067	{
ganlikun	0:13413ea9a877	1068	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
ganlikun	0:13413ea9a877	1069	}
ganlikun	0:13413ea9a877	1070
ganlikun	0:13413ea9a877	1071	/* State machine update: Check if an injected conversion is ongoing */
ganlikun	0:13413ea9a877	1072	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun	0:13413ea9a877	1073	{
ganlikun	0:13413ea9a877	1074	/* Reset ADC error code fields related to conversions on group regular */
ganlikun	0:13413ea9a877	1075	CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR \| HAL_ADC_ERROR_DMA));
ganlikun	0:13413ea9a877	1076	}
ganlikun	0:13413ea9a877	1077	else
ganlikun	0:13413ea9a877	1078	{
ganlikun	0:13413ea9a877	1079	/* Reset ADC all error code fields */
ganlikun	0:13413ea9a877	1080	ADC_CLEAR_ERRORCODE(hadc);
ganlikun	0:13413ea9a877	1081	}
ganlikun	0:13413ea9a877	1082
ganlikun	0:13413ea9a877	1083	/* Process unlocked */
ganlikun	0:13413ea9a877	1084	/* Unlock before starting ADC conversions: in case of potential */
ganlikun	0:13413ea9a877	1085	/* interruption, to let the process to ADC IRQ Handler. */
ganlikun	0:13413ea9a877	1086	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	1087
ganlikun	0:13413ea9a877	1088	/* Pointer to the common control register to which is belonging hadc */
ganlikun	0:13413ea9a877	1089	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
ganlikun	0:13413ea9a877	1090	/* control register) */
ganlikun	0:13413ea9a877	1091	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun	0:13413ea9a877	1092
ganlikun	0:13413ea9a877	1093	/* Set the DMA transfer complete callback */
ganlikun	0:13413ea9a877	1094	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
ganlikun	0:13413ea9a877	1095
ganlikun	0:13413ea9a877	1096	/* Set the DMA half transfer complete callback */
ganlikun	0:13413ea9a877	1097	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
ganlikun	0:13413ea9a877	1098
ganlikun	0:13413ea9a877	1099	/* Set the DMA error callback */
ganlikun	0:13413ea9a877	1100	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
ganlikun	0:13413ea9a877	1101
ganlikun	0:13413ea9a877	1102
ganlikun	0:13413ea9a877	1103	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
ganlikun	0:13413ea9a877	1104	/* start (in case of SW start): */
ganlikun	0:13413ea9a877	1105
ganlikun	0:13413ea9a877	1106	/* Clear regular group conversion flag and overrun flag */
ganlikun	0:13413ea9a877	1107	/* (To ensure of no unknown state from potential previous ADC operations) */
ganlikun	0:13413ea9a877	1108	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC \| ADC_FLAG_OVR);
ganlikun	0:13413ea9a877	1109
ganlikun	0:13413ea9a877	1110	/* Enable ADC overrun interrupt */
ganlikun	0:13413ea9a877	1111	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
ganlikun	0:13413ea9a877	1112
ganlikun	0:13413ea9a877	1113	/* Enable ADC DMA mode */
ganlikun	0:13413ea9a877	1114	hadc->Instance->CR2 \|= ADC_CR2_DMA;
ganlikun	0:13413ea9a877	1115
ganlikun	0:13413ea9a877	1116	/* Start the DMA channel */
ganlikun	0:13413ea9a877	1117	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
ganlikun	0:13413ea9a877	1118
ganlikun	0:13413ea9a877	1119	/* Check if Multimode enabled */
ganlikun	0:13413ea9a877	1120	if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
ganlikun	0:13413ea9a877	1121	{
ganlikun	0:13413ea9a877	1122	/* if no external trigger present enable software conversion of regular channels */
ganlikun	0:13413ea9a877	1123	if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
ganlikun	0:13413ea9a877	1124	{
ganlikun	0:13413ea9a877	1125	/* Enable the selected ADC software conversion for regular group */
ganlikun	0:13413ea9a877	1126	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
ganlikun	0:13413ea9a877	1127	}
ganlikun	0:13413ea9a877	1128	}
ganlikun	0:13413ea9a877	1129	else
ganlikun	0:13413ea9a877	1130	{
ganlikun	0:13413ea9a877	1131	/* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
ganlikun	0:13413ea9a877	1132	if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
ganlikun	0:13413ea9a877	1133	{
ganlikun	0:13413ea9a877	1134	/* Enable the selected ADC software conversion for regular group */
ganlikun	0:13413ea9a877	1135	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
ganlikun	0:13413ea9a877	1136	}
ganlikun	0:13413ea9a877	1137	}
ganlikun	0:13413ea9a877	1138	}
ganlikun	0:13413ea9a877	1139
ganlikun	0:13413ea9a877	1140	/* Return function status */
ganlikun	0:13413ea9a877	1141	return HAL_OK;
ganlikun	0:13413ea9a877	1142	}
ganlikun	0:13413ea9a877	1143
ganlikun	0:13413ea9a877	1144	/**
ganlikun	0:13413ea9a877	1145	* @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral
ganlikun	0:13413ea9a877	1146	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1147	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1148	* @retval HAL status
ganlikun	0:13413ea9a877	1149	*/
ganlikun	0:13413ea9a877	1150	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	1151	{
ganlikun	0:13413ea9a877	1152	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
ganlikun	0:13413ea9a877	1153
ganlikun	0:13413ea9a877	1154	/* Check the parameters */
ganlikun	0:13413ea9a877	1155	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
ganlikun	0:13413ea9a877	1156
ganlikun	0:13413ea9a877	1157	/* Process locked */
ganlikun	0:13413ea9a877	1158	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	1159
ganlikun	0:13413ea9a877	1160	/* Stop potential conversion on going, on regular and injected groups */
ganlikun	0:13413ea9a877	1161	/* Disable ADC peripheral */
ganlikun	0:13413ea9a877	1162	__HAL_ADC_DISABLE(hadc);
ganlikun	0:13413ea9a877	1163
ganlikun	0:13413ea9a877	1164	/* Check if ADC is effectively disabled */
ganlikun	0:13413ea9a877	1165	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
ganlikun	0:13413ea9a877	1166	{
ganlikun	0:13413ea9a877	1167	/* Disable the selected ADC DMA mode */
ganlikun	0:13413ea9a877	1168	hadc->Instance->CR2 &= ~ADC_CR2_DMA;
ganlikun	0:13413ea9a877	1169
ganlikun	0:13413ea9a877	1170	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
ganlikun	0:13413ea9a877	1171	/* DMA transfer is on going) */
ganlikun	0:13413ea9a877	1172	tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
ganlikun	0:13413ea9a877	1173
ganlikun	0:13413ea9a877	1174	/* Disable ADC overrun interrupt */
ganlikun	0:13413ea9a877	1175	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
ganlikun	0:13413ea9a877	1176
ganlikun	0:13413ea9a877	1177	/* Set ADC state */
ganlikun	0:13413ea9a877	1178	ADC_STATE_CLR_SET(hadc->State,
ganlikun	0:13413ea9a877	1179	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
ganlikun	0:13413ea9a877	1180	HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	1181	}
ganlikun	0:13413ea9a877	1182
ganlikun	0:13413ea9a877	1183	/* Process unlocked */
ganlikun	0:13413ea9a877	1184	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	1185
ganlikun	0:13413ea9a877	1186	/* Return function status */
ganlikun	0:13413ea9a877	1187	return tmp_hal_status;
ganlikun	0:13413ea9a877	1188	}
ganlikun	0:13413ea9a877	1189
ganlikun	0:13413ea9a877	1190	/**
ganlikun	0:13413ea9a877	1191	* @brief Gets the converted value from data register of regular channel.
ganlikun	0:13413ea9a877	1192	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1193	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1194	* @retval Converted value
ganlikun	0:13413ea9a877	1195	*/
ganlikun	0:13413ea9a877	1196	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	1197	{
ganlikun	0:13413ea9a877	1198	/* Return the selected ADC converted value */
ganlikun	0:13413ea9a877	1199	return hadc->Instance->DR;
ganlikun	0:13413ea9a877	1200	}
ganlikun	0:13413ea9a877	1201
ganlikun	0:13413ea9a877	1202	/**
ganlikun	0:13413ea9a877	1203	* @brief Regular conversion complete callback in non blocking mode
ganlikun	0:13413ea9a877	1204	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1205	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1206	* @retval None
ganlikun	0:13413ea9a877	1207	*/
ganlikun	0:13413ea9a877	1208	__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	1209	{
ganlikun	0:13413ea9a877	1210	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1211	UNUSED(hadc);
ganlikun	0:13413ea9a877	1212	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1213	the HAL_ADC_ConvCpltCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1214	*/
ganlikun	0:13413ea9a877	1215	}
ganlikun	0:13413ea9a877	1216
ganlikun	0:13413ea9a877	1217	/**
ganlikun	0:13413ea9a877	1218	* @brief Regular conversion half DMA transfer callback in non blocking mode
ganlikun	0:13413ea9a877	1219	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1220	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1221	* @retval None
ganlikun	0:13413ea9a877	1222	*/
ganlikun	0:13413ea9a877	1223	__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	1224	{
ganlikun	0:13413ea9a877	1225	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1226	UNUSED(hadc);
ganlikun	0:13413ea9a877	1227	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1228	the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1229	*/
ganlikun	0:13413ea9a877	1230	}
ganlikun	0:13413ea9a877	1231
ganlikun	0:13413ea9a877	1232	/**
ganlikun	0:13413ea9a877	1233	* @brief Analog watchdog callback in non blocking mode
ganlikun	0:13413ea9a877	1234	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1235	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1236	* @retval None
ganlikun	0:13413ea9a877	1237	*/
ganlikun	0:13413ea9a877	1238	__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	1239	{
ganlikun	0:13413ea9a877	1240	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1241	UNUSED(hadc);
ganlikun	0:13413ea9a877	1242	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1243	the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1244	*/
ganlikun	0:13413ea9a877	1245	}
ganlikun	0:13413ea9a877	1246
ganlikun	0:13413ea9a877	1247	/**
ganlikun	0:13413ea9a877	1248	* @brief Error ADC callback.
ganlikun	0:13413ea9a877	1249	* @note In case of error due to overrun when using ADC with DMA transfer
ganlikun	0:13413ea9a877	1250	* (HAL ADC handle paramater "ErrorCode" to state "HAL_ADC_ERROR_OVR"):
ganlikun	0:13413ea9a877	1251	* - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()".
ganlikun	0:13413ea9a877	1252	* - If needed, restart a new ADC conversion using function
ganlikun	0:13413ea9a877	1253	* "HAL_ADC_Start_DMA()"
ganlikun	0:13413ea9a877	1254	* (this function is also clearing overrun flag)
ganlikun	0:13413ea9a877	1255	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1256	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1257	* @retval None
ganlikun	0:13413ea9a877	1258	*/
ganlikun	0:13413ea9a877	1259	__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
ganlikun	0:13413ea9a877	1260	{
ganlikun	0:13413ea9a877	1261	/* Prevent unused argument(s) compilation warning */
ganlikun	0:13413ea9a877	1262	UNUSED(hadc);
ganlikun	0:13413ea9a877	1263	/* NOTE : This function Should not be modified, when the callback is needed,
ganlikun	0:13413ea9a877	1264	the HAL_ADC_ErrorCallback could be implemented in the user file
ganlikun	0:13413ea9a877	1265	*/
ganlikun	0:13413ea9a877	1266	}
ganlikun	0:13413ea9a877	1267
ganlikun	0:13413ea9a877	1268	/**
ganlikun	0:13413ea9a877	1269	* @}
ganlikun	0:13413ea9a877	1270	*/
ganlikun	0:13413ea9a877	1271
ganlikun	0:13413ea9a877	1272	/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
ganlikun	0:13413ea9a877	1273	* @brief Peripheral Control functions
ganlikun	0:13413ea9a877	1274	*
ganlikun	0:13413ea9a877	1275	@verbatim
ganlikun	0:13413ea9a877	1276	===============================================================================
ganlikun	0:13413ea9a877	1277	##### Peripheral Control functions #####
ganlikun	0:13413ea9a877	1278	===============================================================================
ganlikun	0:13413ea9a877	1279	[..] This section provides functions allowing to:
ganlikun	0:13413ea9a877	1280	(+) Configure regular channels.
ganlikun	0:13413ea9a877	1281	(+) Configure injected channels.
ganlikun	0:13413ea9a877	1282	(+) Configure multimode.
ganlikun	0:13413ea9a877	1283	(+) Configure the analog watch dog.
ganlikun	0:13413ea9a877	1284
ganlikun	0:13413ea9a877	1285	@endverbatim
ganlikun	0:13413ea9a877	1286	* @{
ganlikun	0:13413ea9a877	1287	*/
ganlikun	0:13413ea9a877	1288
ganlikun	0:13413ea9a877	1289	/**
ganlikun	0:13413ea9a877	1290	* @brief Configures for the selected ADC regular channel its corresponding
ganlikun	0:13413ea9a877	1291	* rank in the sequencer and its sample time.
ganlikun	0:13413ea9a877	1292	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1293	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1294	* @param sConfig: ADC configuration structure.
ganlikun	0:13413ea9a877	1295	* @retval HAL status
ganlikun	0:13413ea9a877	1296	*/
ganlikun	0:13413ea9a877	1297	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
ganlikun	0:13413ea9a877	1298	{
ganlikun	0:13413ea9a877	1299	__IO uint32_t counter = 0U;
ganlikun	0:13413ea9a877	1300	ADC_Common_TypeDef *tmpADC_Common;
ganlikun	0:13413ea9a877	1301
ganlikun	0:13413ea9a877	1302	/* Check the parameters */
ganlikun	0:13413ea9a877	1303	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
ganlikun	0:13413ea9a877	1304	assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
ganlikun	0:13413ea9a877	1305	assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
ganlikun	0:13413ea9a877	1306
ganlikun	0:13413ea9a877	1307	/* Process locked */
ganlikun	0:13413ea9a877	1308	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	1309
ganlikun	0:13413ea9a877	1310	/* if ADC_Channel_10 ... ADC_Channel_18 is selected */
ganlikun	0:13413ea9a877	1311	if (sConfig->Channel > ADC_CHANNEL_9)
ganlikun	0:13413ea9a877	1312	{
ganlikun	0:13413ea9a877	1313	/* Clear the old sample time */
ganlikun	0:13413ea9a877	1314	hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
ganlikun	0:13413ea9a877	1315
ganlikun	0:13413ea9a877	1316	/* Set the new sample time */
ganlikun	0:13413ea9a877	1317	hadc->Instance->SMPR1 \|= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
ganlikun	0:13413ea9a877	1318	}
ganlikun	0:13413ea9a877	1319	else /* ADC_Channel include in ADC_Channel_[0..9] */
ganlikun	0:13413ea9a877	1320	{
ganlikun	0:13413ea9a877	1321	/* Clear the old sample time */
ganlikun	0:13413ea9a877	1322	hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
ganlikun	0:13413ea9a877	1323
ganlikun	0:13413ea9a877	1324	/* Set the new sample time */
ganlikun	0:13413ea9a877	1325	hadc->Instance->SMPR2 \|= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
ganlikun	0:13413ea9a877	1326	}
ganlikun	0:13413ea9a877	1327
ganlikun	0:13413ea9a877	1328	/* For Rank 1 to 6 */
ganlikun	0:13413ea9a877	1329	if (sConfig->Rank < 7U)
ganlikun	0:13413ea9a877	1330	{
ganlikun	0:13413ea9a877	1331	/* Clear the old SQx bits for the selected rank */
ganlikun	0:13413ea9a877	1332	hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
ganlikun	0:13413ea9a877	1333
ganlikun	0:13413ea9a877	1334	/* Set the SQx bits for the selected rank */
ganlikun	0:13413ea9a877	1335	hadc->Instance->SQR3 \|= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
ganlikun	0:13413ea9a877	1336	}
ganlikun	0:13413ea9a877	1337	/* For Rank 7 to 12 */
ganlikun	0:13413ea9a877	1338	else if (sConfig->Rank < 13U)
ganlikun	0:13413ea9a877	1339	{
ganlikun	0:13413ea9a877	1340	/* Clear the old SQx bits for the selected rank */
ganlikun	0:13413ea9a877	1341	hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
ganlikun	0:13413ea9a877	1342
ganlikun	0:13413ea9a877	1343	/* Set the SQx bits for the selected rank */
ganlikun	0:13413ea9a877	1344	hadc->Instance->SQR2 \|= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
ganlikun	0:13413ea9a877	1345	}
ganlikun	0:13413ea9a877	1346	/* For Rank 13 to 16 */
ganlikun	0:13413ea9a877	1347	else
ganlikun	0:13413ea9a877	1348	{
ganlikun	0:13413ea9a877	1349	/* Clear the old SQx bits for the selected rank */
ganlikun	0:13413ea9a877	1350	hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
ganlikun	0:13413ea9a877	1351
ganlikun	0:13413ea9a877	1352	/* Set the SQx bits for the selected rank */
ganlikun	0:13413ea9a877	1353	hadc->Instance->SQR1 \|= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
ganlikun	0:13413ea9a877	1354	}
ganlikun	0:13413ea9a877	1355
ganlikun	0:13413ea9a877	1356	/* Pointer to the common control register to which is belonging hadc */
ganlikun	0:13413ea9a877	1357	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
ganlikun	0:13413ea9a877	1358	/* control register) */
ganlikun	0:13413ea9a877	1359	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun	0:13413ea9a877	1360
ganlikun	0:13413ea9a877	1361	/* if ADC1 Channel_18 is selected enable VBAT Channel */
ganlikun	0:13413ea9a877	1362	if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
ganlikun	0:13413ea9a877	1363	{
ganlikun	0:13413ea9a877	1364	/* Enable the VBAT channel*/
ganlikun	0:13413ea9a877	1365	tmpADC_Common->CCR \|= ADC_CCR_VBATE;
ganlikun	0:13413ea9a877	1366	}
ganlikun	0:13413ea9a877	1367
ganlikun	0:13413ea9a877	1368	/* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
ganlikun	0:13413ea9a877	1369	if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) \|\| (sConfig->Channel == ADC_CHANNEL_VREFINT)))
ganlikun	0:13413ea9a877	1370	{
ganlikun	0:13413ea9a877	1371	/* Enable the TSVREFE channel*/
ganlikun	0:13413ea9a877	1372	tmpADC_Common->CCR \|= ADC_CCR_TSVREFE;
ganlikun	0:13413ea9a877	1373
ganlikun	0:13413ea9a877	1374	if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
ganlikun	0:13413ea9a877	1375	{
ganlikun	0:13413ea9a877	1376	/* Delay for temperature sensor stabilization time */
ganlikun	0:13413ea9a877	1377	/* Compute number of CPU cycles to wait for */
ganlikun	0:13413ea9a877	1378	counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
ganlikun	0:13413ea9a877	1379	while(counter != 0U)
ganlikun	0:13413ea9a877	1380	{
ganlikun	0:13413ea9a877	1381	counter--;
ganlikun	0:13413ea9a877	1382	}
ganlikun	0:13413ea9a877	1383	}
ganlikun	0:13413ea9a877	1384	}
ganlikun	0:13413ea9a877	1385
ganlikun	0:13413ea9a877	1386	/* Process unlocked */
ganlikun	0:13413ea9a877	1387	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	1388
ganlikun	0:13413ea9a877	1389	/* Return function status */
ganlikun	0:13413ea9a877	1390	return HAL_OK;
ganlikun	0:13413ea9a877	1391	}
ganlikun	0:13413ea9a877	1392
ganlikun	0:13413ea9a877	1393	/**
ganlikun	0:13413ea9a877	1394	* @brief Configures the analog watchdog.
ganlikun	0:13413ea9a877	1395	* @note Analog watchdog thresholds can be modified while ADC conversion
ganlikun	0:13413ea9a877	1396	* is on going.
ganlikun	0:13413ea9a877	1397	* In this case, some constraints must be taken into account:
ganlikun	0:13413ea9a877	1398	* The programmed threshold values are effective from the next
ganlikun	0:13413ea9a877	1399	* ADC EOC (end of unitary conversion).
ganlikun	0:13413ea9a877	1400	* Considering that registers write delay may happen due to
ganlikun	0:13413ea9a877	1401	* bus activity, this might cause an uncertainty on the
ganlikun	0:13413ea9a877	1402	* effective timing of the new programmed threshold values.
ganlikun	0:13413ea9a877	1403	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1404	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1405	* @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure
ganlikun	0:13413ea9a877	1406	* that contains the configuration information of ADC analog watchdog.
ganlikun	0:13413ea9a877	1407	* @retval HAL status
ganlikun	0:13413ea9a877	1408	*/
ganlikun	0:13413ea9a877	1409	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
ganlikun	0:13413ea9a877	1410	{
ganlikun	0:13413ea9a877	1411	#ifdef USE_FULL_ASSERT
ganlikun	0:13413ea9a877	1412	uint32_t tmp = 0U;
ganlikun	0:13413ea9a877	1413	#endif /* USE_FULL_ASSERT */
ganlikun	0:13413ea9a877	1414
ganlikun	0:13413ea9a877	1415	/* Check the parameters */
ganlikun	0:13413ea9a877	1416	assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode));
ganlikun	0:13413ea9a877	1417	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
ganlikun	0:13413ea9a877	1418	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
ganlikun	0:13413ea9a877	1419
ganlikun	0:13413ea9a877	1420	#ifdef USE_FULL_ASSERT
ganlikun	0:13413ea9a877	1421	tmp = ADC_GET_RESOLUTION(hadc);
ganlikun	0:13413ea9a877	1422	assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold));
ganlikun	0:13413ea9a877	1423	assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold));
ganlikun	0:13413ea9a877	1424	#endif /* USE_FULL_ASSERT */
ganlikun	0:13413ea9a877	1425
ganlikun	0:13413ea9a877	1426	/* Process locked */
ganlikun	0:13413ea9a877	1427	__HAL_LOCK(hadc);
ganlikun	0:13413ea9a877	1428
ganlikun	0:13413ea9a877	1429	if(AnalogWDGConfig->ITMode == ENABLE)
ganlikun	0:13413ea9a877	1430	{
ganlikun	0:13413ea9a877	1431	/* Enable the ADC Analog watchdog interrupt */
ganlikun	0:13413ea9a877	1432	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
ganlikun	0:13413ea9a877	1433	}
ganlikun	0:13413ea9a877	1434	else
ganlikun	0:13413ea9a877	1435	{
ganlikun	0:13413ea9a877	1436	/* Disable the ADC Analog watchdog interrupt */
ganlikun	0:13413ea9a877	1437	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
ganlikun	0:13413ea9a877	1438	}
ganlikun	0:13413ea9a877	1439
ganlikun	0:13413ea9a877	1440	/* Clear AWDEN, JAWDEN and AWDSGL bits */
ganlikun	0:13413ea9a877	1441	hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL \| ADC_CR1_JAWDEN \| ADC_CR1_AWDEN);
ganlikun	0:13413ea9a877	1442
ganlikun	0:13413ea9a877	1443	/* Set the analog watchdog enable mode */
ganlikun	0:13413ea9a877	1444	hadc->Instance->CR1 \|= AnalogWDGConfig->WatchdogMode;
ganlikun	0:13413ea9a877	1445
ganlikun	0:13413ea9a877	1446	/* Set the high threshold */
ganlikun	0:13413ea9a877	1447	hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
ganlikun	0:13413ea9a877	1448
ganlikun	0:13413ea9a877	1449	/* Set the low threshold */
ganlikun	0:13413ea9a877	1450	hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
ganlikun	0:13413ea9a877	1451
ganlikun	0:13413ea9a877	1452	/* Clear the Analog watchdog channel select bits */
ganlikun	0:13413ea9a877	1453	hadc->Instance->CR1 &= ~ADC_CR1_AWDCH;
ganlikun	0:13413ea9a877	1454
ganlikun	0:13413ea9a877	1455	/* Set the Analog watchdog channel */
ganlikun	0:13413ea9a877	1456	hadc->Instance->CR1 \|= (uint32_t)((uint16_t)(AnalogWDGConfig->Channel));
ganlikun	0:13413ea9a877	1457
ganlikun	0:13413ea9a877	1458	/* Process unlocked */
ganlikun	0:13413ea9a877	1459	__HAL_UNLOCK(hadc);
ganlikun	0:13413ea9a877	1460
ganlikun	0:13413ea9a877	1461	/* Return function status */
ganlikun	0:13413ea9a877	1462	return HAL_OK;
ganlikun	0:13413ea9a877	1463	}
ganlikun	0:13413ea9a877	1464
ganlikun	0:13413ea9a877	1465	/**
ganlikun	0:13413ea9a877	1466	* @}
ganlikun	0:13413ea9a877	1467	*/
ganlikun	0:13413ea9a877	1468
ganlikun	0:13413ea9a877	1469	/** @defgroup ADC_Exported_Functions_Group4 ADC Peripheral State functions
ganlikun	0:13413ea9a877	1470	* @brief ADC Peripheral State functions
ganlikun	0:13413ea9a877	1471	*
ganlikun	0:13413ea9a877	1472	@verbatim
ganlikun	0:13413ea9a877	1473	===============================================================================
ganlikun	0:13413ea9a877	1474	##### Peripheral State and errors functions #####
ganlikun	0:13413ea9a877	1475	===============================================================================
ganlikun	0:13413ea9a877	1476	[..]
ganlikun	0:13413ea9a877	1477	This subsection provides functions allowing to
ganlikun	0:13413ea9a877	1478	(+) Check the ADC state
ganlikun	0:13413ea9a877	1479	(+) Check the ADC Error
ganlikun	0:13413ea9a877	1480
ganlikun	0:13413ea9a877	1481	@endverbatim
ganlikun	0:13413ea9a877	1482	* @{
ganlikun	0:13413ea9a877	1483	*/
ganlikun	0:13413ea9a877	1484
ganlikun	0:13413ea9a877	1485	/**
ganlikun	0:13413ea9a877	1486	* @brief return the ADC state
ganlikun	0:13413ea9a877	1487	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1488	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1489	* @retval HAL state
ganlikun	0:13413ea9a877	1490	*/
ganlikun	0:13413ea9a877	1491	uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	1492	{
ganlikun	0:13413ea9a877	1493	/* Return ADC state */
ganlikun	0:13413ea9a877	1494	return hadc->State;
ganlikun	0:13413ea9a877	1495	}
ganlikun	0:13413ea9a877	1496
ganlikun	0:13413ea9a877	1497	/**
ganlikun	0:13413ea9a877	1498	* @brief Return the ADC error code
ganlikun	0:13413ea9a877	1499	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1500	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1501	* @retval ADC Error Code
ganlikun	0:13413ea9a877	1502	*/
ganlikun	0:13413ea9a877	1503	uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
ganlikun	0:13413ea9a877	1504	{
ganlikun	0:13413ea9a877	1505	return hadc->ErrorCode;
ganlikun	0:13413ea9a877	1506	}
ganlikun	0:13413ea9a877	1507
ganlikun	0:13413ea9a877	1508	/**
ganlikun	0:13413ea9a877	1509	* @}
ganlikun	0:13413ea9a877	1510	*/
ganlikun	0:13413ea9a877	1511
ganlikun	0:13413ea9a877	1512	/** @addtogroup ADC_Private_Functions
ganlikun	0:13413ea9a877	1513	* @{
ganlikun	0:13413ea9a877	1514	*/
ganlikun	0:13413ea9a877	1515
ganlikun	0:13413ea9a877	1516	/**
ganlikun	0:13413ea9a877	1517	* @brief Initializes the ADCx peripheral according to the specified parameters
ganlikun	0:13413ea9a877	1518	* in the ADC_InitStruct without initializing the ADC MSP.
ganlikun	0:13413ea9a877	1519	* @param hadc: pointer to a ADC_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1520	* the configuration information for the specified ADC.
ganlikun	0:13413ea9a877	1521	* @retval None
ganlikun	0:13413ea9a877	1522	*/
ganlikun	0:13413ea9a877	1523	static void ADC_Init(ADC_HandleTypeDef* hadc)
ganlikun	0:13413ea9a877	1524	{
ganlikun	0:13413ea9a877	1525	ADC_Common_TypeDef *tmpADC_Common;
ganlikun	0:13413ea9a877	1526
ganlikun	0:13413ea9a877	1527	/* Set ADC parameters */
ganlikun	0:13413ea9a877	1528	/* Pointer to the common control register to which is belonging hadc */
ganlikun	0:13413ea9a877	1529	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
ganlikun	0:13413ea9a877	1530	/* control register) */
ganlikun	0:13413ea9a877	1531	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
ganlikun	0:13413ea9a877	1532
ganlikun	0:13413ea9a877	1533	/* Set the ADC clock prescaler */
ganlikun	0:13413ea9a877	1534	tmpADC_Common->CCR &= ~(ADC_CCR_ADCPRE);
ganlikun	0:13413ea9a877	1535	tmpADC_Common->CCR \|= hadc->Init.ClockPrescaler;
ganlikun	0:13413ea9a877	1536
ganlikun	0:13413ea9a877	1537	/* Set ADC scan mode */
ganlikun	0:13413ea9a877	1538	hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
ganlikun	0:13413ea9a877	1539	hadc->Instance->CR1 \|= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
ganlikun	0:13413ea9a877	1540
ganlikun	0:13413ea9a877	1541	/* Set ADC resolution */
ganlikun	0:13413ea9a877	1542	hadc->Instance->CR1 &= ~(ADC_CR1_RES);
ganlikun	0:13413ea9a877	1543	hadc->Instance->CR1 \|= hadc->Init.Resolution;
ganlikun	0:13413ea9a877	1544
ganlikun	0:13413ea9a877	1545	/* Set ADC data alignment */
ganlikun	0:13413ea9a877	1546	hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
ganlikun	0:13413ea9a877	1547	hadc->Instance->CR2 \|= hadc->Init.DataAlign;
ganlikun	0:13413ea9a877	1548
ganlikun	0:13413ea9a877	1549	/* Enable external trigger if trigger selection is different of software */
ganlikun	0:13413ea9a877	1550	/* start. */
ganlikun	0:13413ea9a877	1551	/* Note: This configuration keeps the hardware feature of parameter */
ganlikun	0:13413ea9a877	1552	/* ExternalTrigConvEdge "trigger edge none" equivalent to */
ganlikun	0:13413ea9a877	1553	/* software start. */
ganlikun	0:13413ea9a877	1554	if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
ganlikun	0:13413ea9a877	1555	{
ganlikun	0:13413ea9a877	1556	/* Select external trigger to start conversion */
ganlikun	0:13413ea9a877	1557	hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
ganlikun	0:13413ea9a877	1558	hadc->Instance->CR2 \|= hadc->Init.ExternalTrigConv;
ganlikun	0:13413ea9a877	1559
ganlikun	0:13413ea9a877	1560	/* Select external trigger polarity */
ganlikun	0:13413ea9a877	1561	hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
ganlikun	0:13413ea9a877	1562	hadc->Instance->CR2 \|= hadc->Init.ExternalTrigConvEdge;
ganlikun	0:13413ea9a877	1563	}
ganlikun	0:13413ea9a877	1564	else
ganlikun	0:13413ea9a877	1565	{
ganlikun	0:13413ea9a877	1566	/* Reset the external trigger */
ganlikun	0:13413ea9a877	1567	hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
ganlikun	0:13413ea9a877	1568	hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
ganlikun	0:13413ea9a877	1569	}
ganlikun	0:13413ea9a877	1570
ganlikun	0:13413ea9a877	1571	/* Enable or disable ADC continuous conversion mode */
ganlikun	0:13413ea9a877	1572	hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
ganlikun	0:13413ea9a877	1573	hadc->Instance->CR2 \|= ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode);
ganlikun	0:13413ea9a877	1574
ganlikun	0:13413ea9a877	1575	if(hadc->Init.DiscontinuousConvMode != DISABLE)
ganlikun	0:13413ea9a877	1576	{
ganlikun	0:13413ea9a877	1577	assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
ganlikun	0:13413ea9a877	1578
ganlikun	0:13413ea9a877	1579	/* Enable the selected ADC regular discontinuous mode */
ganlikun	0:13413ea9a877	1580	hadc->Instance->CR1 \|= (uint32_t)ADC_CR1_DISCEN;
ganlikun	0:13413ea9a877	1581
ganlikun	0:13413ea9a877	1582	/* Set the number of channels to be converted in discontinuous mode */
ganlikun	0:13413ea9a877	1583	hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
ganlikun	0:13413ea9a877	1584	hadc->Instance->CR1 \|= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
ganlikun	0:13413ea9a877	1585	}
ganlikun	0:13413ea9a877	1586	else
ganlikun	0:13413ea9a877	1587	{
ganlikun	0:13413ea9a877	1588	/* Disable the selected ADC regular discontinuous mode */
ganlikun	0:13413ea9a877	1589	hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
ganlikun	0:13413ea9a877	1590	}
ganlikun	0:13413ea9a877	1591
ganlikun	0:13413ea9a877	1592	/* Set ADC number of conversion */
ganlikun	0:13413ea9a877	1593	hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
ganlikun	0:13413ea9a877	1594	hadc->Instance->SQR1 \|= ADC_SQR1(hadc->Init.NbrOfConversion);
ganlikun	0:13413ea9a877	1595
ganlikun	0:13413ea9a877	1596	/* Enable or disable ADC DMA continuous request */
ganlikun	0:13413ea9a877	1597	hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
ganlikun	0:13413ea9a877	1598	hadc->Instance->CR2 \|= ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests);
ganlikun	0:13413ea9a877	1599
ganlikun	0:13413ea9a877	1600	/* Enable or disable ADC end of conversion selection */
ganlikun	0:13413ea9a877	1601	hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
ganlikun	0:13413ea9a877	1602	hadc->Instance->CR2 \|= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
ganlikun	0:13413ea9a877	1603	}
ganlikun	0:13413ea9a877	1604
ganlikun	0:13413ea9a877	1605	/**
ganlikun	0:13413ea9a877	1606	* @brief DMA transfer complete callback.
ganlikun	0:13413ea9a877	1607	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1608	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1609	* @retval None
ganlikun	0:13413ea9a877	1610	*/
ganlikun	0:13413ea9a877	1611	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1612	{
ganlikun	0:13413ea9a877	1613	/* Retrieve ADC handle corresponding to current DMA handle */
ganlikun	0:13413ea9a877	1614	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	1615
ganlikun	0:13413ea9a877	1616	/* Update state machine on conversion status if not in error state */
ganlikun	0:13413ea9a877	1617	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL \| HAL_ADC_STATE_ERROR_DMA))
ganlikun	0:13413ea9a877	1618	{
ganlikun	0:13413ea9a877	1619	/* Update ADC state machine */
ganlikun	0:13413ea9a877	1620	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
ganlikun	0:13413ea9a877	1621
ganlikun	0:13413ea9a877	1622	/* Determine whether any further conversion upcoming on group regular */
ganlikun	0:13413ea9a877	1623	/* by external trigger, continuous mode or scan sequence on going. */
ganlikun	0:13413ea9a877	1624	/* Note: On STM32F4, there is no independent flag of end of sequence. */
ganlikun	0:13413ea9a877	1625	/* The test of scan sequence on going is done either with scan */
ganlikun	0:13413ea9a877	1626	/* sequence disabled or with end of conversion flag set to */
ganlikun	0:13413ea9a877	1627	/* of end of sequence. */
ganlikun	0:13413ea9a877	1628	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
ganlikun	0:13413ea9a877	1629	(hadc->Init.ContinuousConvMode == DISABLE) &&
ganlikun	0:13413ea9a877	1630	(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) \|\|
ganlikun	0:13413ea9a877	1631	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
ganlikun	0:13413ea9a877	1632	{
ganlikun	0:13413ea9a877	1633	/* Disable ADC end of single conversion interrupt on group regular */
ganlikun	0:13413ea9a877	1634	/* Note: Overrun interrupt was enabled with EOC interrupt in */
ganlikun	0:13413ea9a877	1635	/* HAL_ADC_Start_IT(), but is not disabled here because can be used */
ganlikun	0:13413ea9a877	1636	/* by overrun IRQ process below. */
ganlikun	0:13413ea9a877	1637	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
ganlikun	0:13413ea9a877	1638
ganlikun	0:13413ea9a877	1639	/* Set ADC state */
ganlikun	0:13413ea9a877	1640	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
ganlikun	0:13413ea9a877	1641
ganlikun	0:13413ea9a877	1642	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
ganlikun	0:13413ea9a877	1643	{
ganlikun	0:13413ea9a877	1644	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
ganlikun	0:13413ea9a877	1645	}
ganlikun	0:13413ea9a877	1646	}
ganlikun	0:13413ea9a877	1647
ganlikun	0:13413ea9a877	1648	/* Conversion complete callback */
ganlikun	0:13413ea9a877	1649	HAL_ADC_ConvCpltCallback(hadc);
ganlikun	0:13413ea9a877	1650	}
ganlikun	0:13413ea9a877	1651	else
ganlikun	0:13413ea9a877	1652	{
ganlikun	0:13413ea9a877	1653	/* Call DMA error callback */
ganlikun	0:13413ea9a877	1654	hadc->DMA_Handle->XferErrorCallback(hdma);
ganlikun	0:13413ea9a877	1655	}
ganlikun	0:13413ea9a877	1656	}
ganlikun	0:13413ea9a877	1657
ganlikun	0:13413ea9a877	1658	/**
ganlikun	0:13413ea9a877	1659	* @brief DMA half transfer complete callback.
ganlikun	0:13413ea9a877	1660	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1661	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1662	* @retval None
ganlikun	0:13413ea9a877	1663	*/
ganlikun	0:13413ea9a877	1664	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1665	{
ganlikun	0:13413ea9a877	1666	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	1667	/* Conversion complete callback */
ganlikun	0:13413ea9a877	1668	HAL_ADC_ConvHalfCpltCallback(hadc);
ganlikun	0:13413ea9a877	1669	}
ganlikun	0:13413ea9a877	1670
ganlikun	0:13413ea9a877	1671	/**
ganlikun	0:13413ea9a877	1672	* @brief DMA error callback
ganlikun	0:13413ea9a877	1673	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
ganlikun	0:13413ea9a877	1674	* the configuration information for the specified DMA module.
ganlikun	0:13413ea9a877	1675	* @retval None
ganlikun	0:13413ea9a877	1676	*/
ganlikun	0:13413ea9a877	1677	static void ADC_DMAError(DMA_HandleTypeDef *hdma)
ganlikun	0:13413ea9a877	1678	{
ganlikun	0:13413ea9a877	1679	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
ganlikun	0:13413ea9a877	1680	hadc->State= HAL_ADC_STATE_ERROR_DMA;
ganlikun	0:13413ea9a877	1681	/* Set ADC error code to DMA error */
ganlikun	0:13413ea9a877	1682	hadc->ErrorCode \|= HAL_ADC_ERROR_DMA;
ganlikun	0:13413ea9a877	1683	HAL_ADC_ErrorCallback(hadc);
ganlikun	0:13413ea9a877	1684	}
ganlikun	0:13413ea9a877	1685
ganlikun	0:13413ea9a877	1686	/**
ganlikun	0:13413ea9a877	1687	* @}
ganlikun	0:13413ea9a877	1688	*/
ganlikun	0:13413ea9a877	1689
ganlikun	0:13413ea9a877	1690	/**
ganlikun	0:13413ea9a877	1691	* @}
ganlikun	0:13413ea9a877	1692	*/
ganlikun	0:13413ea9a877	1693
ganlikun	0:13413ea9a877	1694	#endif /* HAL_ADC_MODULE_ENABLED */
ganlikun	0:13413ea9a877	1695	/**
ganlikun	0:13413ea9a877	1696	* @}
ganlikun	0:13413ea9a877	1697	*/
ganlikun	0:13413ea9a877	1698
ganlikun	0:13413ea9a877	1699	/**
ganlikun	0:13413ea9a877	1700	* @}
ganlikun	0:13413ea9a877	1701	*/
ganlikun	0:13413ea9a877	1702
ganlikun	0:13413ea9a877	1703	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
ganlikun	0:13413ea9a877	1704

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Type:	Library
Created:	05 Jul 2022
Imports:	1
Forks:	0
Commits:	1
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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c@0:13413ea9a877, 2022-06-12 (annotated)

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