Gan likun / mbed1-dev

001

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.h@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ganlikun 0:13413ea9a877 1 /**
ganlikun 0:13413ea9a877 2 ******************************************************************************
ganlikun 0:13413ea9a877 3 * @file stm32f4xx_hal.h
ganlikun 0:13413ea9a877 4 * @author MCD Application Team
ganlikun 0:13413ea9a877 5 * @version V1.7.1
ganlikun 0:13413ea9a877 6 * @date 14-April-2017
ganlikun 0:13413ea9a877 7 * @brief This file contains all the functions prototypes for the HAL
ganlikun 0:13413ea9a877 8 * module driver.
ganlikun 0:13413ea9a877 9 ******************************************************************************
ganlikun 0:13413ea9a877 10 * @attention
ganlikun 0:13413ea9a877 11 *
ganlikun 0:13413ea9a877 12 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:13413ea9a877 13 *
ganlikun 0:13413ea9a877 14 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:13413ea9a877 15 * are permitted provided that the following conditions are met:
ganlikun 0:13413ea9a877 16 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:13413ea9a877 17 * this list of conditions and the following disclaimer.
ganlikun 0:13413ea9a877 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:13413ea9a877 19 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:13413ea9a877 20 * and/or other materials provided with the distribution.
ganlikun 0:13413ea9a877 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:13413ea9a877 22 * may be used to endorse or promote products derived from this software
ganlikun 0:13413ea9a877 23 * without specific prior written permission.
ganlikun 0:13413ea9a877 24 *
ganlikun 0:13413ea9a877 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:13413ea9a877 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:13413ea9a877 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:13413ea9a877 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:13413ea9a877 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:13413ea9a877 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:13413ea9a877 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:13413ea9a877 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:13413ea9a877 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:13413ea9a877 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:13413ea9a877 35 *
ganlikun 0:13413ea9a877 36 ******************************************************************************
ganlikun 0:13413ea9a877 37 */
ganlikun 0:13413ea9a877 38
ganlikun 0:13413ea9a877 39 /* Define to prevent recursive inclusion -------------------------------------*/
ganlikun 0:13413ea9a877 40 #ifndef __STM32F4xx_HAL_H
ganlikun 0:13413ea9a877 41 #define __STM32F4xx_HAL_H
ganlikun 0:13413ea9a877 42
ganlikun 0:13413ea9a877 43 #ifdef __cplusplus
ganlikun 0:13413ea9a877 44 extern "C" {
ganlikun 0:13413ea9a877 45 #endif
ganlikun 0:13413ea9a877 46
ganlikun 0:13413ea9a877 47 /* Includes ------------------------------------------------------------------*/
ganlikun 0:13413ea9a877 48 #include "stm32f4xx_hal_conf.h"
ganlikun 0:13413ea9a877 49
ganlikun 0:13413ea9a877 50 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:13413ea9a877 51 * @{
ganlikun 0:13413ea9a877 52 */
ganlikun 0:13413ea9a877 53
ganlikun 0:13413ea9a877 54 /** @addtogroup HAL
ganlikun 0:13413ea9a877 55 * @{
ganlikun 0:13413ea9a877 56 */
ganlikun 0:13413ea9a877 57
ganlikun 0:13413ea9a877 58 /* Exported types ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 59 /* Exported constants --------------------------------------------------------*/
ganlikun 0:13413ea9a877 60
ganlikun 0:13413ea9a877 61 /* Exported macro ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 62 /** @defgroup HAL_Exported_Macros HAL Exported Macros
ganlikun 0:13413ea9a877 63 * @{
ganlikun 0:13413ea9a877 64 */
ganlikun 0:13413ea9a877 65
ganlikun 0:13413ea9a877 66 /** @brief Freeze/Unfreeze Peripherals in Debug mode
ganlikun 0:13413ea9a877 67 */
ganlikun 0:13413ea9a877 68 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
ganlikun 0:13413ea9a877 69 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
ganlikun 0:13413ea9a877 70 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
ganlikun 0:13413ea9a877 71 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
ganlikun 0:13413ea9a877 72 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
ganlikun 0:13413ea9a877 73 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
ganlikun 0:13413ea9a877 74 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
ganlikun 0:13413ea9a877 75 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
ganlikun 0:13413ea9a877 76 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
ganlikun 0:13413ea9a877 77 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
ganlikun 0:13413ea9a877 78 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
ganlikun 0:13413ea9a877 79 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
ganlikun 0:13413ea9a877 80 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
ganlikun 0:13413ea9a877 81 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
ganlikun 0:13413ea9a877 82 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
ganlikun 0:13413ea9a877 83 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
ganlikun 0:13413ea9a877 84 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
ganlikun 0:13413ea9a877 85 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
ganlikun 0:13413ea9a877 86 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
ganlikun 0:13413ea9a877 87 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
ganlikun 0:13413ea9a877 88 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
ganlikun 0:13413ea9a877 89 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
ganlikun 0:13413ea9a877 90
ganlikun 0:13413ea9a877 91 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
ganlikun 0:13413ea9a877 92 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
ganlikun 0:13413ea9a877 93 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
ganlikun 0:13413ea9a877 94 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
ganlikun 0:13413ea9a877 95 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
ganlikun 0:13413ea9a877 96 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
ganlikun 0:13413ea9a877 97 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
ganlikun 0:13413ea9a877 98 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
ganlikun 0:13413ea9a877 99 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
ganlikun 0:13413ea9a877 100 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
ganlikun 0:13413ea9a877 101 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
ganlikun 0:13413ea9a877 102 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
ganlikun 0:13413ea9a877 103 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
ganlikun 0:13413ea9a877 104 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
ganlikun 0:13413ea9a877 105 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
ganlikun 0:13413ea9a877 106 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
ganlikun 0:13413ea9a877 107 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
ganlikun 0:13413ea9a877 108 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
ganlikun 0:13413ea9a877 109 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
ganlikun 0:13413ea9a877 110 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
ganlikun 0:13413ea9a877 111 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
ganlikun 0:13413ea9a877 112 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
ganlikun 0:13413ea9a877 113
ganlikun 0:13413ea9a877 114 /** @brief Main Flash memory mapped at 0x00000000
ganlikun 0:13413ea9a877 115 */
ganlikun 0:13413ea9a877 116 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
ganlikun 0:13413ea9a877 117
ganlikun 0:13413ea9a877 118 /** @brief System Flash memory mapped at 0x00000000
ganlikun 0:13413ea9a877 119 */
ganlikun 0:13413ea9a877 120 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
ganlikun 0:13413ea9a877 121 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
ganlikun 0:13413ea9a877 122 }while(0);
ganlikun 0:13413ea9a877 123
ganlikun 0:13413ea9a877 124 /** @brief Embedded SRAM mapped at 0x00000000
ganlikun 0:13413ea9a877 125 */
ganlikun 0:13413ea9a877 126 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
ganlikun 0:13413ea9a877 127 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
ganlikun 0:13413ea9a877 128 }while(0);
ganlikun 0:13413ea9a877 129
ganlikun 0:13413ea9a877 130 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
ganlikun 0:13413ea9a877 131 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
ganlikun 0:13413ea9a877 132 */
ganlikun 0:13413ea9a877 133 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
ganlikun 0:13413ea9a877 134 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
ganlikun 0:13413ea9a877 135 }while(0);
ganlikun 0:13413ea9a877 136 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
ganlikun 0:13413ea9a877 137
ganlikun 0:13413ea9a877 138 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 139 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 140 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
ganlikun 0:13413ea9a877 141 */
ganlikun 0:13413ea9a877 142 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
ganlikun 0:13413ea9a877 143 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
ganlikun 0:13413ea9a877 144 }while(0);
ganlikun 0:13413ea9a877 145
ganlikun 0:13413ea9a877 146 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
ganlikun 0:13413ea9a877 147 */
ganlikun 0:13413ea9a877 148 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
ganlikun 0:13413ea9a877 149 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
ganlikun 0:13413ea9a877 150 }while(0);
ganlikun 0:13413ea9a877 151 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 152
ganlikun 0:13413ea9a877 153 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
ganlikun 0:13413ea9a877 154 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
ganlikun 0:13413ea9a877 155 * @{
ganlikun 0:13413ea9a877 156 */
ganlikun 0:13413ea9a877 157 /** @brief SYSCFG Break Lockup lock
ganlikun 0:13413ea9a877 158 * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
ganlikun 0:13413ea9a877 159 * @note The selected configuration is locked and can be unlocked by system reset
ganlikun 0:13413ea9a877 160 */
ganlikun 0:13413ea9a877 161 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
ganlikun 0:13413ea9a877 162 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
ganlikun 0:13413ea9a877 163 }while(0)
ganlikun 0:13413ea9a877 164 /**
ganlikun 0:13413ea9a877 165 * @}
ganlikun 0:13413ea9a877 166 */
ganlikun 0:13413ea9a877 167
ganlikun 0:13413ea9a877 168 /** @defgroup PVD_Lock_Enable PVD Lock
ganlikun 0:13413ea9a877 169 * @{
ganlikun 0:13413ea9a877 170 */
ganlikun 0:13413ea9a877 171 /** @brief SYSCFG Break PVD lock
ganlikun 0:13413ea9a877 172 * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
ganlikun 0:13413ea9a877 173 * @note The selected configuration is locked and can be unlocked by system reset
ganlikun 0:13413ea9a877 174 */
ganlikun 0:13413ea9a877 175 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
ganlikun 0:13413ea9a877 176 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
ganlikun 0:13413ea9a877 177 }while(0)
ganlikun 0:13413ea9a877 178 /**
ganlikun 0:13413ea9a877 179 * @}
ganlikun 0:13413ea9a877 180 */
ganlikun 0:13413ea9a877 181 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
ganlikun 0:13413ea9a877 182 /**
ganlikun 0:13413ea9a877 183 * @}
ganlikun 0:13413ea9a877 184 */
ganlikun 0:13413ea9a877 185
ganlikun 0:13413ea9a877 186 /* Exported functions --------------------------------------------------------*/
ganlikun 0:13413ea9a877 187 /** @addtogroup HAL_Exported_Functions
ganlikun 0:13413ea9a877 188 * @{
ganlikun 0:13413ea9a877 189 */
ganlikun 0:13413ea9a877 190 /** @addtogroup HAL_Exported_Functions_Group1
ganlikun 0:13413ea9a877 191 * @{
ganlikun 0:13413ea9a877 192 */
ganlikun 0:13413ea9a877 193 /* Initialization and de-initialization functions ******************************/
ganlikun 0:13413ea9a877 194 HAL_StatusTypeDef HAL_InitPre(void);
ganlikun 0:13413ea9a877 195 HAL_StatusTypeDef HAL_Init(void);
ganlikun 0:13413ea9a877 196 HAL_StatusTypeDef HAL_DeInit(void);
ganlikun 0:13413ea9a877 197 void HAL_MspInit(void);
ganlikun 0:13413ea9a877 198 void HAL_MspDeInit(void);
ganlikun 0:13413ea9a877 199 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
ganlikun 0:13413ea9a877 200 /**
ganlikun 0:13413ea9a877 201 * @}
ganlikun 0:13413ea9a877 202 */
ganlikun 0:13413ea9a877 203
ganlikun 0:13413ea9a877 204 /** @addtogroup HAL_Exported_Functions_Group2
ganlikun 0:13413ea9a877 205 * @{
ganlikun 0:13413ea9a877 206 */
ganlikun 0:13413ea9a877 207 /* Peripheral Control functions ************************************************/
ganlikun 0:13413ea9a877 208 void HAL_IncTick(void);
ganlikun 0:13413ea9a877 209 void HAL_Delay(__IO uint32_t Delay);
ganlikun 0:13413ea9a877 210 uint32_t HAL_GetTick(void);
ganlikun 0:13413ea9a877 211 void HAL_SuspendTick(void);
ganlikun 0:13413ea9a877 212 void HAL_ResumeTick(void);
ganlikun 0:13413ea9a877 213 uint32_t HAL_GetHalVersion(void);
ganlikun 0:13413ea9a877 214 uint32_t HAL_GetREVID(void);
ganlikun 0:13413ea9a877 215 uint32_t HAL_GetDEVID(void);
ganlikun 0:13413ea9a877 216 void HAL_DBGMCU_EnableDBGSleepMode(void);
ganlikun 0:13413ea9a877 217 void HAL_DBGMCU_DisableDBGSleepMode(void);
ganlikun 0:13413ea9a877 218 void HAL_DBGMCU_EnableDBGStopMode(void);
ganlikun 0:13413ea9a877 219 void HAL_DBGMCU_DisableDBGStopMode(void);
ganlikun 0:13413ea9a877 220 void HAL_DBGMCU_EnableDBGStandbyMode(void);
ganlikun 0:13413ea9a877 221 void HAL_DBGMCU_DisableDBGStandbyMode(void);
ganlikun 0:13413ea9a877 222 void HAL_EnableCompensationCell(void);
ganlikun 0:13413ea9a877 223 void HAL_DisableCompensationCell(void);
ganlikun 0:13413ea9a877 224 void HAL_GetUID(uint32_t *UID);
ganlikun 0:13413ea9a877 225 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
ganlikun 0:13413ea9a877 226 defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:13413ea9a877 227 void HAL_EnableMemorySwappingBank(void);
ganlikun 0:13413ea9a877 228 void HAL_DisableMemorySwappingBank(void);
ganlikun 0:13413ea9a877 229 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
ganlikun 0:13413ea9a877 230 /**
ganlikun 0:13413ea9a877 231 * @}
ganlikun 0:13413ea9a877 232 */
ganlikun 0:13413ea9a877 233
ganlikun 0:13413ea9a877 234 /**
ganlikun 0:13413ea9a877 235 * @}
ganlikun 0:13413ea9a877 236 */
ganlikun 0:13413ea9a877 237 /* Private types -------------------------------------------------------------*/
ganlikun 0:13413ea9a877 238 /* Private variables ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 239 /** @defgroup HAL_Private_Variables HAL Private Variables
ganlikun 0:13413ea9a877 240 * @{
ganlikun 0:13413ea9a877 241 */
ganlikun 0:13413ea9a877 242 /**
ganlikun 0:13413ea9a877 243 * @}
ganlikun 0:13413ea9a877 244 */
ganlikun 0:13413ea9a877 245 /* Private constants ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 246 /** @defgroup HAL_Private_Constants HAL Private Constants
ganlikun 0:13413ea9a877 247 * @{
ganlikun 0:13413ea9a877 248 */
ganlikun 0:13413ea9a877 249 /**
ganlikun 0:13413ea9a877 250 * @}
ganlikun 0:13413ea9a877 251 */
ganlikun 0:13413ea9a877 252 /* Private macros ------------------------------------------------------------*/
ganlikun 0:13413ea9a877 253 /* Private functions ---------------------------------------------------------*/
ganlikun 0:13413ea9a877 254 /**
ganlikun 0:13413ea9a877 255 * @}
ganlikun 0:13413ea9a877 256 */
ganlikun 0:13413ea9a877 257
ganlikun 0:13413ea9a877 258 /**
ganlikun 0:13413ea9a877 259 * @}
ganlikun 0:13413ea9a877 260 */
ganlikun 0:13413ea9a877 261
ganlikun 0:13413ea9a877 262 #ifdef __cplusplus
ganlikun 0:13413ea9a877 263 }
ganlikun 0:13413ea9a877 264 #endif
ganlikun 0:13413ea9a877 265
ganlikun 0:13413ea9a877 266 #endif /* __STM32F4xx_HAL_H */
ganlikun 0:13413ea9a877 267
ganlikun 0:13413ea9a877 268 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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