Gan likun / mbed1-dev

001

cmsis/TARGET_CORTEX_A/TOOLCHAIN_ARM/cmsis_armcc.h@0:13413ea9a877, 2022-06-12 (annotated)

Committer:
ganlikun
Date:
Sun Jun 12 14:02:44 2022 +0000
Revision:
0:13413ea9a877
00

Who changed what in which revision?

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ganlikun 0:13413ea9a877 1 /**************************************************************************//**
ganlikun 0:13413ea9a877 2 * @file cmsis_armcc.h
ganlikun 0:13413ea9a877 3 * @brief CMSIS compiler ARMCC (ARM compiler V5) header file
ganlikun 0:13413ea9a877 4 * @version V5.0.2
ganlikun 0:13413ea9a877 5 * @date 13. February 2017
ganlikun 0:13413ea9a877 6 ******************************************************************************/
ganlikun 0:13413ea9a877 7 /*
ganlikun 0:13413ea9a877 8 * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
ganlikun 0:13413ea9a877 9 *
ganlikun 0:13413ea9a877 10 * SPDX-License-Identifier: Apache-2.0
ganlikun 0:13413ea9a877 11 *
ganlikun 0:13413ea9a877 12 * Licensed under the Apache License, Version 2.0 (the License); you may
ganlikun 0:13413ea9a877 13 * not use this file except in compliance with the License.
ganlikun 0:13413ea9a877 14 * You may obtain a copy of the License at
ganlikun 0:13413ea9a877 15 *
ganlikun 0:13413ea9a877 16 * www.apache.org/licenses/LICENSE-2.0
ganlikun 0:13413ea9a877 17 *
ganlikun 0:13413ea9a877 18 * Unless required by applicable law or agreed to in writing, software
ganlikun 0:13413ea9a877 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
ganlikun 0:13413ea9a877 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ganlikun 0:13413ea9a877 21 * See the License for the specific language governing permissions and
ganlikun 0:13413ea9a877 22 * limitations under the License.
ganlikun 0:13413ea9a877 23 */
ganlikun 0:13413ea9a877 24
ganlikun 0:13413ea9a877 25 #ifndef __CMSIS_ARMCC_H
ganlikun 0:13413ea9a877 26 #define __CMSIS_ARMCC_H
ganlikun 0:13413ea9a877 27
ganlikun 0:13413ea9a877 28
ganlikun 0:13413ea9a877 29 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
ganlikun 0:13413ea9a877 30 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
ganlikun 0:13413ea9a877 31 #endif
ganlikun 0:13413ea9a877 32
ganlikun 0:13413ea9a877 33 /* CMSIS compiler control architecture macros */
ganlikun 0:13413ea9a877 34 #if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
ganlikun 0:13413ea9a877 35 (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
ganlikun 0:13413ea9a877 36 #define __ARM_ARCH_6M__ 1
ganlikun 0:13413ea9a877 37 #endif
ganlikun 0:13413ea9a877 38
ganlikun 0:13413ea9a877 39 #if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
ganlikun 0:13413ea9a877 40 #define __ARM_ARCH_7M__ 1
ganlikun 0:13413ea9a877 41 #endif
ganlikun 0:13413ea9a877 42
ganlikun 0:13413ea9a877 43 #if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
ganlikun 0:13413ea9a877 44 #define __ARM_ARCH_7EM__ 1
ganlikun 0:13413ea9a877 45 #endif
ganlikun 0:13413ea9a877 46
ganlikun 0:13413ea9a877 47 /* __ARM_ARCH_8M_BASE__ not applicable */
ganlikun 0:13413ea9a877 48 /* __ARM_ARCH_8M_MAIN__ not applicable */
ganlikun 0:13413ea9a877 49
ganlikun 0:13413ea9a877 50
ganlikun 0:13413ea9a877 51 /* CMSIS compiler specific defines */
ganlikun 0:13413ea9a877 52 #ifndef __ASM
ganlikun 0:13413ea9a877 53 #define __ASM __asm
ganlikun 0:13413ea9a877 54 #endif
ganlikun 0:13413ea9a877 55 #ifndef __INLINE
ganlikun 0:13413ea9a877 56 #define __INLINE __inline
ganlikun 0:13413ea9a877 57 #endif
ganlikun 0:13413ea9a877 58 #ifndef __STATIC_INLINE
ganlikun 0:13413ea9a877 59 #define __STATIC_INLINE static __inline
ganlikun 0:13413ea9a877 60 #endif
ganlikun 0:13413ea9a877 61 #ifndef __NO_RETURN
ganlikun 0:13413ea9a877 62 #define __NO_RETURN __declspec(noreturn)
ganlikun 0:13413ea9a877 63 #endif
ganlikun 0:13413ea9a877 64 #ifndef __USED
ganlikun 0:13413ea9a877 65 #define __USED __attribute__((used))
ganlikun 0:13413ea9a877 66 #endif
ganlikun 0:13413ea9a877 67 #ifndef __WEAK
ganlikun 0:13413ea9a877 68 #define __WEAK __attribute__((weak))
ganlikun 0:13413ea9a877 69 #endif
ganlikun 0:13413ea9a877 70 #ifndef __PACKED
ganlikun 0:13413ea9a877 71 #define __PACKED __attribute__((packed))
ganlikun 0:13413ea9a877 72 #endif
ganlikun 0:13413ea9a877 73 #ifndef __PACKED_STRUCT
ganlikun 0:13413ea9a877 74 #define __PACKED_STRUCT __packed struct
ganlikun 0:13413ea9a877 75 #endif
ganlikun 0:13413ea9a877 76 #ifndef __UNALIGNED_UINT32 /* deprecated */
ganlikun 0:13413ea9a877 77 #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
ganlikun 0:13413ea9a877 78 #endif
ganlikun 0:13413ea9a877 79 #ifndef __UNALIGNED_UINT16_WRITE
ganlikun 0:13413ea9a877 80 #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
ganlikun 0:13413ea9a877 81 #endif
ganlikun 0:13413ea9a877 82 #ifndef __UNALIGNED_UINT16_READ
ganlikun 0:13413ea9a877 83 #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
ganlikun 0:13413ea9a877 84 #endif
ganlikun 0:13413ea9a877 85 #ifndef __UNALIGNED_UINT32_WRITE
ganlikun 0:13413ea9a877 86 #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
ganlikun 0:13413ea9a877 87 #endif
ganlikun 0:13413ea9a877 88 #ifndef __UNALIGNED_UINT32_READ
ganlikun 0:13413ea9a877 89 #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
ganlikun 0:13413ea9a877 90 #endif
ganlikun 0:13413ea9a877 91 #ifndef __ALIGNED
ganlikun 0:13413ea9a877 92 #define __ALIGNED(x) __attribute__((aligned(x)))
ganlikun 0:13413ea9a877 93 #endif
ganlikun 0:13413ea9a877 94
ganlikun 0:13413ea9a877 95
ganlikun 0:13413ea9a877 96 /* ########################### Core Function Access ########################### */
ganlikun 0:13413ea9a877 97 /** \ingroup CMSIS_Core_FunctionInterface
ganlikun 0:13413ea9a877 98 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
ganlikun 0:13413ea9a877 99 @{
ganlikun 0:13413ea9a877 100 */
ganlikun 0:13413ea9a877 101
ganlikun 0:13413ea9a877 102 /**
ganlikun 0:13413ea9a877 103 \brief Enable IRQ Interrupts
ganlikun 0:13413ea9a877 104 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
ganlikun 0:13413ea9a877 105 Can only be executed in Privileged modes.
ganlikun 0:13413ea9a877 106 */
ganlikun 0:13413ea9a877 107 /* intrinsic void __enable_irq(); */
ganlikun 0:13413ea9a877 108
ganlikun 0:13413ea9a877 109
ganlikun 0:13413ea9a877 110 /**
ganlikun 0:13413ea9a877 111 \brief Disable IRQ Interrupts
ganlikun 0:13413ea9a877 112 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
ganlikun 0:13413ea9a877 113 Can only be executed in Privileged modes.
ganlikun 0:13413ea9a877 114 */
ganlikun 0:13413ea9a877 115 /* intrinsic void __disable_irq(); */
ganlikun 0:13413ea9a877 116
ganlikun 0:13413ea9a877 117 /**
ganlikun 0:13413ea9a877 118 \brief Get Control Register
ganlikun 0:13413ea9a877 119 \details Returns the content of the Control Register.
ganlikun 0:13413ea9a877 120 \return Control Register value
ganlikun 0:13413ea9a877 121 */
ganlikun 0:13413ea9a877 122 __STATIC_INLINE uint32_t __get_CONTROL(void)
ganlikun 0:13413ea9a877 123 {
ganlikun 0:13413ea9a877 124 register uint32_t __regControl __ASM("control");
ganlikun 0:13413ea9a877 125 return(__regControl);
ganlikun 0:13413ea9a877 126 }
ganlikun 0:13413ea9a877 127
ganlikun 0:13413ea9a877 128
ganlikun 0:13413ea9a877 129 /**
ganlikun 0:13413ea9a877 130 \brief Set Control Register
ganlikun 0:13413ea9a877 131 \details Writes the given value to the Control Register.
ganlikun 0:13413ea9a877 132 \param [in] control Control Register value to set
ganlikun 0:13413ea9a877 133 */
ganlikun 0:13413ea9a877 134 __STATIC_INLINE void __set_CONTROL(uint32_t control)
ganlikun 0:13413ea9a877 135 {
ganlikun 0:13413ea9a877 136 register uint32_t __regControl __ASM("control");
ganlikun 0:13413ea9a877 137 __regControl = control;
ganlikun 0:13413ea9a877 138 }
ganlikun 0:13413ea9a877 139
ganlikun 0:13413ea9a877 140
ganlikun 0:13413ea9a877 141 /**
ganlikun 0:13413ea9a877 142 \brief Get IPSR Register
ganlikun 0:13413ea9a877 143 \details Returns the content of the IPSR Register.
ganlikun 0:13413ea9a877 144 \return IPSR Register value
ganlikun 0:13413ea9a877 145 */
ganlikun 0:13413ea9a877 146 __STATIC_INLINE uint32_t __get_IPSR(void)
ganlikun 0:13413ea9a877 147 {
ganlikun 0:13413ea9a877 148 register uint32_t __regIPSR __ASM("ipsr");
ganlikun 0:13413ea9a877 149 return(__regIPSR);
ganlikun 0:13413ea9a877 150 }
ganlikun 0:13413ea9a877 151
ganlikun 0:13413ea9a877 152
ganlikun 0:13413ea9a877 153 /**
ganlikun 0:13413ea9a877 154 \brief Get APSR Register
ganlikun 0:13413ea9a877 155 \details Returns the content of the APSR Register.
ganlikun 0:13413ea9a877 156 \return APSR Register value
ganlikun 0:13413ea9a877 157 */
ganlikun 0:13413ea9a877 158 __STATIC_INLINE uint32_t __get_APSR(void)
ganlikun 0:13413ea9a877 159 {
ganlikun 0:13413ea9a877 160 register uint32_t __regAPSR __ASM("apsr");
ganlikun 0:13413ea9a877 161 return(__regAPSR);
ganlikun 0:13413ea9a877 162 }
ganlikun 0:13413ea9a877 163
ganlikun 0:13413ea9a877 164
ganlikun 0:13413ea9a877 165 /**
ganlikun 0:13413ea9a877 166 \brief Get xPSR Register
ganlikun 0:13413ea9a877 167 \details Returns the content of the xPSR Register.
ganlikun 0:13413ea9a877 168 \return xPSR Register value
ganlikun 0:13413ea9a877 169 */
ganlikun 0:13413ea9a877 170 __STATIC_INLINE uint32_t __get_xPSR(void)
ganlikun 0:13413ea9a877 171 {
ganlikun 0:13413ea9a877 172 register uint32_t __regXPSR __ASM("xpsr");
ganlikun 0:13413ea9a877 173 return(__regXPSR);
ganlikun 0:13413ea9a877 174 }
ganlikun 0:13413ea9a877 175
ganlikun 0:13413ea9a877 176
ganlikun 0:13413ea9a877 177 /**
ganlikun 0:13413ea9a877 178 \brief Get Process Stack Pointer
ganlikun 0:13413ea9a877 179 \details Returns the current value of the Process Stack Pointer (PSP).
ganlikun 0:13413ea9a877 180 \return PSP Register value
ganlikun 0:13413ea9a877 181 */
ganlikun 0:13413ea9a877 182 __STATIC_INLINE uint32_t __get_PSP(void)
ganlikun 0:13413ea9a877 183 {
ganlikun 0:13413ea9a877 184 register uint32_t __regProcessStackPointer __ASM("psp");
ganlikun 0:13413ea9a877 185 return(__regProcessStackPointer);
ganlikun 0:13413ea9a877 186 }
ganlikun 0:13413ea9a877 187
ganlikun 0:13413ea9a877 188
ganlikun 0:13413ea9a877 189 /**
ganlikun 0:13413ea9a877 190 \brief Set Process Stack Pointer
ganlikun 0:13413ea9a877 191 \details Assigns the given value to the Process Stack Pointer (PSP).
ganlikun 0:13413ea9a877 192 \param [in] topOfProcStack Process Stack Pointer value to set
ganlikun 0:13413ea9a877 193 */
ganlikun 0:13413ea9a877 194 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
ganlikun 0:13413ea9a877 195 {
ganlikun 0:13413ea9a877 196 register uint32_t __regProcessStackPointer __ASM("psp");
ganlikun 0:13413ea9a877 197 __regProcessStackPointer = topOfProcStack;
ganlikun 0:13413ea9a877 198 }
ganlikun 0:13413ea9a877 199
ganlikun 0:13413ea9a877 200
ganlikun 0:13413ea9a877 201 /**
ganlikun 0:13413ea9a877 202 \brief Get Main Stack Pointer
ganlikun 0:13413ea9a877 203 \details Returns the current value of the Main Stack Pointer (MSP).
ganlikun 0:13413ea9a877 204 \return MSP Register value
ganlikun 0:13413ea9a877 205 */
ganlikun 0:13413ea9a877 206 __STATIC_INLINE uint32_t __get_MSP(void)
ganlikun 0:13413ea9a877 207 {
ganlikun 0:13413ea9a877 208 register uint32_t __regMainStackPointer __ASM("msp");
ganlikun 0:13413ea9a877 209 return(__regMainStackPointer);
ganlikun 0:13413ea9a877 210 }
ganlikun 0:13413ea9a877 211
ganlikun 0:13413ea9a877 212
ganlikun 0:13413ea9a877 213 /**
ganlikun 0:13413ea9a877 214 \brief Set Main Stack Pointer
ganlikun 0:13413ea9a877 215 \details Assigns the given value to the Main Stack Pointer (MSP).
ganlikun 0:13413ea9a877 216 \param [in] topOfMainStack Main Stack Pointer value to set
ganlikun 0:13413ea9a877 217 */
ganlikun 0:13413ea9a877 218 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
ganlikun 0:13413ea9a877 219 {
ganlikun 0:13413ea9a877 220 register uint32_t __regMainStackPointer __ASM("msp");
ganlikun 0:13413ea9a877 221 __regMainStackPointer = topOfMainStack;
ganlikun 0:13413ea9a877 222 }
ganlikun 0:13413ea9a877 223
ganlikun 0:13413ea9a877 224
ganlikun 0:13413ea9a877 225 /**
ganlikun 0:13413ea9a877 226 \brief Get Priority Mask
ganlikun 0:13413ea9a877 227 \details Returns the current state of the priority mask bit from the Priority Mask Register.
ganlikun 0:13413ea9a877 228 \return Priority Mask value
ganlikun 0:13413ea9a877 229 */
ganlikun 0:13413ea9a877 230 __STATIC_INLINE uint32_t __get_PRIMASK(void)
ganlikun 0:13413ea9a877 231 {
ganlikun 0:13413ea9a877 232 register uint32_t __regPriMask __ASM("primask");
ganlikun 0:13413ea9a877 233 return(__regPriMask);
ganlikun 0:13413ea9a877 234 }
ganlikun 0:13413ea9a877 235
ganlikun 0:13413ea9a877 236
ganlikun 0:13413ea9a877 237 /**
ganlikun 0:13413ea9a877 238 \brief Set Priority Mask
ganlikun 0:13413ea9a877 239 \details Assigns the given value to the Priority Mask Register.
ganlikun 0:13413ea9a877 240 \param [in] priMask Priority Mask
ganlikun 0:13413ea9a877 241 */
ganlikun 0:13413ea9a877 242 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
ganlikun 0:13413ea9a877 243 {
ganlikun 0:13413ea9a877 244 register uint32_t __regPriMask __ASM("primask");
ganlikun 0:13413ea9a877 245 __regPriMask = (priMask);
ganlikun 0:13413ea9a877 246 }
ganlikun 0:13413ea9a877 247
ganlikun 0:13413ea9a877 248
ganlikun 0:13413ea9a877 249 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
ganlikun 0:13413ea9a877 250 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
ganlikun 0:13413ea9a877 251
ganlikun 0:13413ea9a877 252 /**
ganlikun 0:13413ea9a877 253 \brief Enable FIQ
ganlikun 0:13413ea9a877 254 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
ganlikun 0:13413ea9a877 255 Can only be executed in Privileged modes.
ganlikun 0:13413ea9a877 256 */
ganlikun 0:13413ea9a877 257 #define __enable_fault_irq __enable_fiq
ganlikun 0:13413ea9a877 258
ganlikun 0:13413ea9a877 259
ganlikun 0:13413ea9a877 260 /**
ganlikun 0:13413ea9a877 261 \brief Disable FIQ
ganlikun 0:13413ea9a877 262 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
ganlikun 0:13413ea9a877 263 Can only be executed in Privileged modes.
ganlikun 0:13413ea9a877 264 */
ganlikun 0:13413ea9a877 265 #define __disable_fault_irq __disable_fiq
ganlikun 0:13413ea9a877 266
ganlikun 0:13413ea9a877 267
ganlikun 0:13413ea9a877 268 /**
ganlikun 0:13413ea9a877 269 \brief Get Base Priority
ganlikun 0:13413ea9a877 270 \details Returns the current value of the Base Priority register.
ganlikun 0:13413ea9a877 271 \return Base Priority register value
ganlikun 0:13413ea9a877 272 */
ganlikun 0:13413ea9a877 273 __STATIC_INLINE uint32_t __get_BASEPRI(void)
ganlikun 0:13413ea9a877 274 {
ganlikun 0:13413ea9a877 275 register uint32_t __regBasePri __ASM("basepri");
ganlikun 0:13413ea9a877 276 return(__regBasePri);
ganlikun 0:13413ea9a877 277 }
ganlikun 0:13413ea9a877 278
ganlikun 0:13413ea9a877 279
ganlikun 0:13413ea9a877 280 /**
ganlikun 0:13413ea9a877 281 \brief Set Base Priority
ganlikun 0:13413ea9a877 282 \details Assigns the given value to the Base Priority register.
ganlikun 0:13413ea9a877 283 \param [in] basePri Base Priority value to set
ganlikun 0:13413ea9a877 284 */
ganlikun 0:13413ea9a877 285 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
ganlikun 0:13413ea9a877 286 {
ganlikun 0:13413ea9a877 287 register uint32_t __regBasePri __ASM("basepri");
ganlikun 0:13413ea9a877 288 __regBasePri = (basePri & 0xFFU);
ganlikun 0:13413ea9a877 289 }
ganlikun 0:13413ea9a877 290
ganlikun 0:13413ea9a877 291
ganlikun 0:13413ea9a877 292 /**
ganlikun 0:13413ea9a877 293 \brief Set Base Priority with condition
ganlikun 0:13413ea9a877 294 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
ganlikun 0:13413ea9a877 295 or the new value increases the BASEPRI priority level.
ganlikun 0:13413ea9a877 296 \param [in] basePri Base Priority value to set
ganlikun 0:13413ea9a877 297 */
ganlikun 0:13413ea9a877 298 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
ganlikun 0:13413ea9a877 299 {
ganlikun 0:13413ea9a877 300 register uint32_t __regBasePriMax __ASM("basepri_max");
ganlikun 0:13413ea9a877 301 __regBasePriMax = (basePri & 0xFFU);
ganlikun 0:13413ea9a877 302 }
ganlikun 0:13413ea9a877 303
ganlikun 0:13413ea9a877 304
ganlikun 0:13413ea9a877 305 /**
ganlikun 0:13413ea9a877 306 \brief Get Fault Mask
ganlikun 0:13413ea9a877 307 \details Returns the current value of the Fault Mask register.
ganlikun 0:13413ea9a877 308 \return Fault Mask register value
ganlikun 0:13413ea9a877 309 */
ganlikun 0:13413ea9a877 310 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
ganlikun 0:13413ea9a877 311 {
ganlikun 0:13413ea9a877 312 register uint32_t __regFaultMask __ASM("faultmask");
ganlikun 0:13413ea9a877 313 return(__regFaultMask);
ganlikun 0:13413ea9a877 314 }
ganlikun 0:13413ea9a877 315
ganlikun 0:13413ea9a877 316
ganlikun 0:13413ea9a877 317 /**
ganlikun 0:13413ea9a877 318 \brief Set Fault Mask
ganlikun 0:13413ea9a877 319 \details Assigns the given value to the Fault Mask register.
ganlikun 0:13413ea9a877 320 \param [in] faultMask Fault Mask value to set
ganlikun 0:13413ea9a877 321 */
ganlikun 0:13413ea9a877 322 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
ganlikun 0:13413ea9a877 323 {
ganlikun 0:13413ea9a877 324 register uint32_t __regFaultMask __ASM("faultmask");
ganlikun 0:13413ea9a877 325 __regFaultMask = (faultMask & (uint32_t)1U);
ganlikun 0:13413ea9a877 326 }
ganlikun 0:13413ea9a877 327
ganlikun 0:13413ea9a877 328 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
ganlikun 0:13413ea9a877 329 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
ganlikun 0:13413ea9a877 330
ganlikun 0:13413ea9a877 331
ganlikun 0:13413ea9a877 332 #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
ganlikun 0:13413ea9a877 333
ganlikun 0:13413ea9a877 334 /**
ganlikun 0:13413ea9a877 335 \brief Get FPSCR
ganlikun 0:13413ea9a877 336 \details Returns the current value of the Floating Point Status/Control register.
ganlikun 0:13413ea9a877 337 \return Floating Point Status/Control register value
ganlikun 0:13413ea9a877 338 */
ganlikun 0:13413ea9a877 339 __STATIC_INLINE uint32_t __get_FPSCR(void)
ganlikun 0:13413ea9a877 340 {
ganlikun 0:13413ea9a877 341 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
ganlikun 0:13413ea9a877 342 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
ganlikun 0:13413ea9a877 343 register uint32_t __regfpscr __ASM("fpscr");
ganlikun 0:13413ea9a877 344 return(__regfpscr);
ganlikun 0:13413ea9a877 345 #else
ganlikun 0:13413ea9a877 346 return(0U);
ganlikun 0:13413ea9a877 347 #endif
ganlikun 0:13413ea9a877 348 }
ganlikun 0:13413ea9a877 349
ganlikun 0:13413ea9a877 350
ganlikun 0:13413ea9a877 351 /**
ganlikun 0:13413ea9a877 352 \brief Set FPSCR
ganlikun 0:13413ea9a877 353 \details Assigns the given value to the Floating Point Status/Control register.
ganlikun 0:13413ea9a877 354 \param [in] fpscr Floating Point Status/Control value to set
ganlikun 0:13413ea9a877 355 */
ganlikun 0:13413ea9a877 356 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
ganlikun 0:13413ea9a877 357 {
ganlikun 0:13413ea9a877 358 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
ganlikun 0:13413ea9a877 359 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
ganlikun 0:13413ea9a877 360 register uint32_t __regfpscr __ASM("fpscr");
ganlikun 0:13413ea9a877 361 __regfpscr = (fpscr);
ganlikun 0:13413ea9a877 362 #else
ganlikun 0:13413ea9a877 363 (void)fpscr;
ganlikun 0:13413ea9a877 364 #endif
ganlikun 0:13413ea9a877 365 }
ganlikun 0:13413ea9a877 366
ganlikun 0:13413ea9a877 367 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
ganlikun 0:13413ea9a877 368
ganlikun 0:13413ea9a877 369
ganlikun 0:13413ea9a877 370
ganlikun 0:13413ea9a877 371 /*@} end of CMSIS_Core_RegAccFunctions */
ganlikun 0:13413ea9a877 372
ganlikun 0:13413ea9a877 373
ganlikun 0:13413ea9a877 374 /* ########################## Core Instruction Access ######################### */
ganlikun 0:13413ea9a877 375 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
ganlikun 0:13413ea9a877 376 Access to dedicated instructions
ganlikun 0:13413ea9a877 377 @{
ganlikun 0:13413ea9a877 378 */
ganlikun 0:13413ea9a877 379
ganlikun 0:13413ea9a877 380 /**
ganlikun 0:13413ea9a877 381 \brief No Operation
ganlikun 0:13413ea9a877 382 \details No Operation does nothing. This instruction can be used for code alignment purposes.
ganlikun 0:13413ea9a877 383 */
ganlikun 0:13413ea9a877 384 #define __NOP __nop
ganlikun 0:13413ea9a877 385
ganlikun 0:13413ea9a877 386
ganlikun 0:13413ea9a877 387 /**
ganlikun 0:13413ea9a877 388 \brief Wait For Interrupt
ganlikun 0:13413ea9a877 389 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
ganlikun 0:13413ea9a877 390 */
ganlikun 0:13413ea9a877 391 #define __WFI __wfi
ganlikun 0:13413ea9a877 392
ganlikun 0:13413ea9a877 393
ganlikun 0:13413ea9a877 394 /**
ganlikun 0:13413ea9a877 395 \brief Wait For Event
ganlikun 0:13413ea9a877 396 \details Wait For Event is a hint instruction that permits the processor to enter
ganlikun 0:13413ea9a877 397 a low-power state until one of a number of events occurs.
ganlikun 0:13413ea9a877 398 */
ganlikun 0:13413ea9a877 399 #define __WFE __wfe
ganlikun 0:13413ea9a877 400
ganlikun 0:13413ea9a877 401
ganlikun 0:13413ea9a877 402 /**
ganlikun 0:13413ea9a877 403 \brief Send Event
ganlikun 0:13413ea9a877 404 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
ganlikun 0:13413ea9a877 405 */
ganlikun 0:13413ea9a877 406 #define __SEV __sev
ganlikun 0:13413ea9a877 407
ganlikun 0:13413ea9a877 408
ganlikun 0:13413ea9a877 409 /**
ganlikun 0:13413ea9a877 410 \brief Instruction Synchronization Barrier
ganlikun 0:13413ea9a877 411 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
ganlikun 0:13413ea9a877 412 so that all instructions following the ISB are fetched from cache or memory,
ganlikun 0:13413ea9a877 413 after the instruction has been completed.
ganlikun 0:13413ea9a877 414 */
ganlikun 0:13413ea9a877 415 #define __ISB() do {\
ganlikun 0:13413ea9a877 416 __schedule_barrier();\
ganlikun 0:13413ea9a877 417 __isb(0xF);\
ganlikun 0:13413ea9a877 418 __schedule_barrier();\
ganlikun 0:13413ea9a877 419 } while (0U)
ganlikun 0:13413ea9a877 420
ganlikun 0:13413ea9a877 421 /**
ganlikun 0:13413ea9a877 422 \brief Data Synchronization Barrier
ganlikun 0:13413ea9a877 423 \details Acts as a special kind of Data Memory Barrier.
ganlikun 0:13413ea9a877 424 It completes when all explicit memory accesses before this instruction complete.
ganlikun 0:13413ea9a877 425 */
ganlikun 0:13413ea9a877 426 #define __DSB() do {\
ganlikun 0:13413ea9a877 427 __schedule_barrier();\
ganlikun 0:13413ea9a877 428 __dsb(0xF);\
ganlikun 0:13413ea9a877 429 __schedule_barrier();\
ganlikun 0:13413ea9a877 430 } while (0U)
ganlikun 0:13413ea9a877 431
ganlikun 0:13413ea9a877 432 /**
ganlikun 0:13413ea9a877 433 \brief Data Memory Barrier
ganlikun 0:13413ea9a877 434 \details Ensures the apparent order of the explicit memory operations before
ganlikun 0:13413ea9a877 435 and after the instruction, without ensuring their completion.
ganlikun 0:13413ea9a877 436 */
ganlikun 0:13413ea9a877 437 #define __DMB() do {\
ganlikun 0:13413ea9a877 438 __schedule_barrier();\
ganlikun 0:13413ea9a877 439 __dmb(0xF);\
ganlikun 0:13413ea9a877 440 __schedule_barrier();\
ganlikun 0:13413ea9a877 441 } while (0U)
ganlikun 0:13413ea9a877 442
ganlikun 0:13413ea9a877 443 /**
ganlikun 0:13413ea9a877 444 \brief Reverse byte order (32 bit)
ganlikun 0:13413ea9a877 445 \details Reverses the byte order in integer value.
ganlikun 0:13413ea9a877 446 \param [in] value Value to reverse
ganlikun 0:13413ea9a877 447 \return Reversed value
ganlikun 0:13413ea9a877 448 */
ganlikun 0:13413ea9a877 449 #define __REV __rev
ganlikun 0:13413ea9a877 450
ganlikun 0:13413ea9a877 451
ganlikun 0:13413ea9a877 452 /**
ganlikun 0:13413ea9a877 453 \brief Reverse byte order (16 bit)
ganlikun 0:13413ea9a877 454 \details Reverses the byte order in two unsigned short values.
ganlikun 0:13413ea9a877 455 \param [in] value Value to reverse
ganlikun 0:13413ea9a877 456 \return Reversed value
ganlikun 0:13413ea9a877 457 */
ganlikun 0:13413ea9a877 458 #ifndef __NO_EMBEDDED_ASM
ganlikun 0:13413ea9a877 459 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
ganlikun 0:13413ea9a877 460 {
ganlikun 0:13413ea9a877 461 rev16 r0, r0
ganlikun 0:13413ea9a877 462 bx lr
ganlikun 0:13413ea9a877 463 }
ganlikun 0:13413ea9a877 464 #endif
ganlikun 0:13413ea9a877 465
ganlikun 0:13413ea9a877 466
ganlikun 0:13413ea9a877 467 /**
ganlikun 0:13413ea9a877 468 \brief Reverse byte order in signed short value
ganlikun 0:13413ea9a877 469 \details Reverses the byte order in a signed short value with sign extension to integer.
ganlikun 0:13413ea9a877 470 \param [in] value Value to reverse
ganlikun 0:13413ea9a877 471 \return Reversed value
ganlikun 0:13413ea9a877 472 */
ganlikun 0:13413ea9a877 473 #ifndef __NO_EMBEDDED_ASM
ganlikun 0:13413ea9a877 474 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
ganlikun 0:13413ea9a877 475 {
ganlikun 0:13413ea9a877 476 revsh r0, r0
ganlikun 0:13413ea9a877 477 bx lr
ganlikun 0:13413ea9a877 478 }
ganlikun 0:13413ea9a877 479 #endif
ganlikun 0:13413ea9a877 480
ganlikun 0:13413ea9a877 481
ganlikun 0:13413ea9a877 482 /**
ganlikun 0:13413ea9a877 483 \brief Rotate Right in unsigned value (32 bit)
ganlikun 0:13413ea9a877 484 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
ganlikun 0:13413ea9a877 485 \param [in] op1 Value to rotate
ganlikun 0:13413ea9a877 486 \param [in] op2 Number of Bits to rotate
ganlikun 0:13413ea9a877 487 \return Rotated value
ganlikun 0:13413ea9a877 488 */
ganlikun 0:13413ea9a877 489 #define __ROR __ror
ganlikun 0:13413ea9a877 490
ganlikun 0:13413ea9a877 491
ganlikun 0:13413ea9a877 492 /**
ganlikun 0:13413ea9a877 493 \brief Breakpoint
ganlikun 0:13413ea9a877 494 \details Causes the processor to enter Debug state.
ganlikun 0:13413ea9a877 495 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
ganlikun 0:13413ea9a877 496 \param [in] value is ignored by the processor.
ganlikun 0:13413ea9a877 497 If required, a debugger can use it to store additional information about the breakpoint.
ganlikun 0:13413ea9a877 498 */
ganlikun 0:13413ea9a877 499 #define __BKPT(value) __breakpoint(value)
ganlikun 0:13413ea9a877 500
ganlikun 0:13413ea9a877 501
ganlikun 0:13413ea9a877 502 /**
ganlikun 0:13413ea9a877 503 \brief Reverse bit order of value
ganlikun 0:13413ea9a877 504 \details Reverses the bit order of the given value.
ganlikun 0:13413ea9a877 505 \param [in] value Value to reverse
ganlikun 0:13413ea9a877 506 \return Reversed value
ganlikun 0:13413ea9a877 507 */
ganlikun 0:13413ea9a877 508 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
ganlikun 0:13413ea9a877 509 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
ganlikun 0:13413ea9a877 510 #define __RBIT __rbit
ganlikun 0:13413ea9a877 511 #else
ganlikun 0:13413ea9a877 512 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
ganlikun 0:13413ea9a877 513 {
ganlikun 0:13413ea9a877 514 uint32_t result;
ganlikun 0:13413ea9a877 515 int32_t s = (4 /*sizeof(v)*/ * 8) - 1; /* extra shift needed at end */
ganlikun 0:13413ea9a877 516
ganlikun 0:13413ea9a877 517 result = value; /* r will be reversed bits of v; first get LSB of v */
ganlikun 0:13413ea9a877 518 for (value >>= 1U; value; value >>= 1U)
ganlikun 0:13413ea9a877 519 {
ganlikun 0:13413ea9a877 520 result <<= 1U;
ganlikun 0:13413ea9a877 521 result |= value & 1U;
ganlikun 0:13413ea9a877 522 s--;
ganlikun 0:13413ea9a877 523 }
ganlikun 0:13413ea9a877 524 result <<= s; /* shift when v's highest bits are zero */
ganlikun 0:13413ea9a877 525 return(result);
ganlikun 0:13413ea9a877 526 }
ganlikun 0:13413ea9a877 527 #endif
ganlikun 0:13413ea9a877 528
ganlikun 0:13413ea9a877 529
ganlikun 0:13413ea9a877 530 /**
ganlikun 0:13413ea9a877 531 \brief Count leading zeros
ganlikun 0:13413ea9a877 532 \details Counts the number of leading zeros of a data value.
ganlikun 0:13413ea9a877 533 \param [in] value Value to count the leading zeros
ganlikun 0:13413ea9a877 534 \return number of leading zeros in value
ganlikun 0:13413ea9a877 535 */
ganlikun 0:13413ea9a877 536 #define __CLZ __clz
ganlikun 0:13413ea9a877 537
ganlikun 0:13413ea9a877 538
ganlikun 0:13413ea9a877 539 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
ganlikun 0:13413ea9a877 540 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
ganlikun 0:13413ea9a877 541
ganlikun 0:13413ea9a877 542 /**
ganlikun 0:13413ea9a877 543 \brief LDR Exclusive (8 bit)
ganlikun 0:13413ea9a877 544 \details Executes a exclusive LDR instruction for 8 bit value.
ganlikun 0:13413ea9a877 545 \param [in] ptr Pointer to data
ganlikun 0:13413ea9a877 546 \return value of type uint8_t at (*ptr)
ganlikun 0:13413ea9a877 547 */
ganlikun 0:13413ea9a877 548 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
ganlikun 0:13413ea9a877 549 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
ganlikun 0:13413ea9a877 550 #else
ganlikun 0:13413ea9a877 551 #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
ganlikun 0:13413ea9a877 552 #endif
ganlikun 0:13413ea9a877 553
ganlikun 0:13413ea9a877 554
ganlikun 0:13413ea9a877 555 /**
ganlikun 0:13413ea9a877 556 \brief LDR Exclusive (16 bit)
ganlikun 0:13413ea9a877 557 \details Executes a exclusive LDR instruction for 16 bit values.
ganlikun 0:13413ea9a877 558 \param [in] ptr Pointer to data
ganlikun 0:13413ea9a877 559 \return value of type uint16_t at (*ptr)
ganlikun 0:13413ea9a877 560 */
ganlikun 0:13413ea9a877 561 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
ganlikun 0:13413ea9a877 562 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
ganlikun 0:13413ea9a877 563 #else
ganlikun 0:13413ea9a877 564 #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
ganlikun 0:13413ea9a877 565 #endif
ganlikun 0:13413ea9a877 566
ganlikun 0:13413ea9a877 567
ganlikun 0:13413ea9a877 568 /**
ganlikun 0:13413ea9a877 569 \brief LDR Exclusive (32 bit)
ganlikun 0:13413ea9a877 570 \details Executes a exclusive LDR instruction for 32 bit values.
ganlikun 0:13413ea9a877 571 \param [in] ptr Pointer to data
ganlikun 0:13413ea9a877 572 \return value of type uint32_t at (*ptr)
ganlikun 0:13413ea9a877 573 */
ganlikun 0:13413ea9a877 574 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
ganlikun 0:13413ea9a877 575 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
ganlikun 0:13413ea9a877 576 #else
ganlikun 0:13413ea9a877 577 #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
ganlikun 0:13413ea9a877 578 #endif
ganlikun 0:13413ea9a877 579
ganlikun 0:13413ea9a877 580
ganlikun 0:13413ea9a877 581 /**
ganlikun 0:13413ea9a877 582 \brief STR Exclusive (8 bit)
ganlikun 0:13413ea9a877 583 \details Executes a exclusive STR instruction for 8 bit values.
ganlikun 0:13413ea9a877 584 \param [in] value Value to store
ganlikun 0:13413ea9a877 585 \param [in] ptr Pointer to location
ganlikun 0:13413ea9a877 586 \return 0 Function succeeded
ganlikun 0:13413ea9a877 587 \return 1 Function failed
ganlikun 0:13413ea9a877 588 */
ganlikun 0:13413ea9a877 589 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
ganlikun 0:13413ea9a877 590 #define __STREXB(value, ptr) __strex(value, ptr)
ganlikun 0:13413ea9a877 591 #else
ganlikun 0:13413ea9a877 592 #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
ganlikun 0:13413ea9a877 593 #endif
ganlikun 0:13413ea9a877 594
ganlikun 0:13413ea9a877 595
ganlikun 0:13413ea9a877 596 /**
ganlikun 0:13413ea9a877 597 \brief STR Exclusive (16 bit)
ganlikun 0:13413ea9a877 598 \details Executes a exclusive STR instruction for 16 bit values.
ganlikun 0:13413ea9a877 599 \param [in] value Value to store
ganlikun 0:13413ea9a877 600 \param [in] ptr Pointer to location
ganlikun 0:13413ea9a877 601 \return 0 Function succeeded
ganlikun 0:13413ea9a877 602 \return 1 Function failed
ganlikun 0:13413ea9a877 603 */
ganlikun 0:13413ea9a877 604 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
ganlikun 0:13413ea9a877 605 #define __STREXH(value, ptr) __strex(value, ptr)
ganlikun 0:13413ea9a877 606 #else
ganlikun 0:13413ea9a877 607 #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
ganlikun 0:13413ea9a877 608 #endif
ganlikun 0:13413ea9a877 609
ganlikun 0:13413ea9a877 610
ganlikun 0:13413ea9a877 611 /**
ganlikun 0:13413ea9a877 612 \brief STR Exclusive (32 bit)
ganlikun 0:13413ea9a877 613 \details Executes a exclusive STR instruction for 32 bit values.
ganlikun 0:13413ea9a877 614 \param [in] value Value to store
ganlikun 0:13413ea9a877 615 \param [in] ptr Pointer to location
ganlikun 0:13413ea9a877 616 \return 0 Function succeeded
ganlikun 0:13413ea9a877 617 \return 1 Function failed
ganlikun 0:13413ea9a877 618 */
ganlikun 0:13413ea9a877 619 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
ganlikun 0:13413ea9a877 620 #define __STREXW(value, ptr) __strex(value, ptr)
ganlikun 0:13413ea9a877 621 #else
ganlikun 0:13413ea9a877 622 #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
ganlikun 0:13413ea9a877 623 #endif
ganlikun 0:13413ea9a877 624
ganlikun 0:13413ea9a877 625
ganlikun 0:13413ea9a877 626 /**
ganlikun 0:13413ea9a877 627 \brief Remove the exclusive lock
ganlikun 0:13413ea9a877 628 \details Removes the exclusive lock which is created by LDREX.
ganlikun 0:13413ea9a877 629 */
ganlikun 0:13413ea9a877 630 #define __CLREX __clrex
ganlikun 0:13413ea9a877 631
ganlikun 0:13413ea9a877 632
ganlikun 0:13413ea9a877 633 /**
ganlikun 0:13413ea9a877 634 \brief Signed Saturate
ganlikun 0:13413ea9a877 635 \details Saturates a signed value.
ganlikun 0:13413ea9a877 636 \param [in] value Value to be saturated
ganlikun 0:13413ea9a877 637 \param [in] sat Bit position to saturate to (1..32)
ganlikun 0:13413ea9a877 638 \return Saturated value
ganlikun 0:13413ea9a877 639 */
ganlikun 0:13413ea9a877 640 #define __SSAT __ssat
ganlikun 0:13413ea9a877 641
ganlikun 0:13413ea9a877 642
ganlikun 0:13413ea9a877 643 /**
ganlikun 0:13413ea9a877 644 \brief Unsigned Saturate
ganlikun 0:13413ea9a877 645 \details Saturates an unsigned value.
ganlikun 0:13413ea9a877 646 \param [in] value Value to be saturated
ganlikun 0:13413ea9a877 647 \param [in] sat Bit position to saturate to (0..31)
ganlikun 0:13413ea9a877 648 \return Saturated value
ganlikun 0:13413ea9a877 649 */
ganlikun 0:13413ea9a877 650 #define __USAT __usat
ganlikun 0:13413ea9a877 651
ganlikun 0:13413ea9a877 652
ganlikun 0:13413ea9a877 653 /**
ganlikun 0:13413ea9a877 654 \brief Rotate Right with Extend (32 bit)
ganlikun 0:13413ea9a877 655 \details Moves each bit of a bitstring right by one bit.
ganlikun 0:13413ea9a877 656 The carry input is shifted in at the left end of the bitstring.
ganlikun 0:13413ea9a877 657 \param [in] value Value to rotate
ganlikun 0:13413ea9a877 658 \return Rotated value
ganlikun 0:13413ea9a877 659 */
ganlikun 0:13413ea9a877 660 #ifndef __NO_EMBEDDED_ASM
ganlikun 0:13413ea9a877 661 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
ganlikun 0:13413ea9a877 662 {
ganlikun 0:13413ea9a877 663 rrx r0, r0
ganlikun 0:13413ea9a877 664 bx lr
ganlikun 0:13413ea9a877 665 }
ganlikun 0:13413ea9a877 666 #endif
ganlikun 0:13413ea9a877 667
ganlikun 0:13413ea9a877 668
ganlikun 0:13413ea9a877 669 /**
ganlikun 0:13413ea9a877 670 \brief LDRT Unprivileged (8 bit)
ganlikun 0:13413ea9a877 671 \details Executes a Unprivileged LDRT instruction for 8 bit value.
ganlikun 0:13413ea9a877 672 \param [in] ptr Pointer to data
ganlikun 0:13413ea9a877 673 \return value of type uint8_t at (*ptr)
ganlikun 0:13413ea9a877 674 */
ganlikun 0:13413ea9a877 675 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
ganlikun 0:13413ea9a877 676
ganlikun 0:13413ea9a877 677
ganlikun 0:13413ea9a877 678 /**
ganlikun 0:13413ea9a877 679 \brief LDRT Unprivileged (16 bit)
ganlikun 0:13413ea9a877 680 \details Executes a Unprivileged LDRT instruction for 16 bit values.
ganlikun 0:13413ea9a877 681 \param [in] ptr Pointer to data
ganlikun 0:13413ea9a877 682 \return value of type uint16_t at (*ptr)
ganlikun 0:13413ea9a877 683 */
ganlikun 0:13413ea9a877 684 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
ganlikun 0:13413ea9a877 685
ganlikun 0:13413ea9a877 686
ganlikun 0:13413ea9a877 687 /**
ganlikun 0:13413ea9a877 688 \brief LDRT Unprivileged (32 bit)
ganlikun 0:13413ea9a877 689 \details Executes a Unprivileged LDRT instruction for 32 bit values.
ganlikun 0:13413ea9a877 690 \param [in] ptr Pointer to data
ganlikun 0:13413ea9a877 691 \return value of type uint32_t at (*ptr)
ganlikun 0:13413ea9a877 692 */
ganlikun 0:13413ea9a877 693 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
ganlikun 0:13413ea9a877 694
ganlikun 0:13413ea9a877 695
ganlikun 0:13413ea9a877 696 /**
ganlikun 0:13413ea9a877 697 \brief STRT Unprivileged (8 bit)
ganlikun 0:13413ea9a877 698 \details Executes a Unprivileged STRT instruction for 8 bit values.
ganlikun 0:13413ea9a877 699 \param [in] value Value to store
ganlikun 0:13413ea9a877 700 \param [in] ptr Pointer to location
ganlikun 0:13413ea9a877 701 */
ganlikun 0:13413ea9a877 702 #define __STRBT(value, ptr) __strt(value, ptr)
ganlikun 0:13413ea9a877 703
ganlikun 0:13413ea9a877 704
ganlikun 0:13413ea9a877 705 /**
ganlikun 0:13413ea9a877 706 \brief STRT Unprivileged (16 bit)
ganlikun 0:13413ea9a877 707 \details Executes a Unprivileged STRT instruction for 16 bit values.
ganlikun 0:13413ea9a877 708 \param [in] value Value to store
ganlikun 0:13413ea9a877 709 \param [in] ptr Pointer to location
ganlikun 0:13413ea9a877 710 */
ganlikun 0:13413ea9a877 711 #define __STRHT(value, ptr) __strt(value, ptr)
ganlikun 0:13413ea9a877 712
ganlikun 0:13413ea9a877 713
ganlikun 0:13413ea9a877 714 /**
ganlikun 0:13413ea9a877 715 \brief STRT Unprivileged (32 bit)
ganlikun 0:13413ea9a877 716 \details Executes a Unprivileged STRT instruction for 32 bit values.
ganlikun 0:13413ea9a877 717 \param [in] value Value to store
ganlikun 0:13413ea9a877 718 \param [in] ptr Pointer to location
ganlikun 0:13413ea9a877 719 */
ganlikun 0:13413ea9a877 720 #define __STRT(value, ptr) __strt(value, ptr)
ganlikun 0:13413ea9a877 721
ganlikun 0:13413ea9a877 722 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
ganlikun 0:13413ea9a877 723 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
ganlikun 0:13413ea9a877 724
ganlikun 0:13413ea9a877 725 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
ganlikun 0:13413ea9a877 726
ganlikun 0:13413ea9a877 727
ganlikun 0:13413ea9a877 728 /* ################### Compiler specific Intrinsics ########################### */
ganlikun 0:13413ea9a877 729 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
ganlikun 0:13413ea9a877 730 Access to dedicated SIMD instructions
ganlikun 0:13413ea9a877 731 @{
ganlikun 0:13413ea9a877 732 */
ganlikun 0:13413ea9a877 733
ganlikun 0:13413ea9a877 734 #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
ganlikun 0:13413ea9a877 735
ganlikun 0:13413ea9a877 736 #define __SADD8 __sadd8
ganlikun 0:13413ea9a877 737 #define __QADD8 __qadd8
ganlikun 0:13413ea9a877 738 #define __SHADD8 __shadd8
ganlikun 0:13413ea9a877 739 #define __UADD8 __uadd8
ganlikun 0:13413ea9a877 740 #define __UQADD8 __uqadd8
ganlikun 0:13413ea9a877 741 #define __UHADD8 __uhadd8
ganlikun 0:13413ea9a877 742 #define __SSUB8 __ssub8
ganlikun 0:13413ea9a877 743 #define __QSUB8 __qsub8
ganlikun 0:13413ea9a877 744 #define __SHSUB8 __shsub8
ganlikun 0:13413ea9a877 745 #define __USUB8 __usub8
ganlikun 0:13413ea9a877 746 #define __UQSUB8 __uqsub8
ganlikun 0:13413ea9a877 747 #define __UHSUB8 __uhsub8
ganlikun 0:13413ea9a877 748 #define __SADD16 __sadd16
ganlikun 0:13413ea9a877 749 #define __QADD16 __qadd16
ganlikun 0:13413ea9a877 750 #define __SHADD16 __shadd16
ganlikun 0:13413ea9a877 751 #define __UADD16 __uadd16
ganlikun 0:13413ea9a877 752 #define __UQADD16 __uqadd16
ganlikun 0:13413ea9a877 753 #define __UHADD16 __uhadd16
ganlikun 0:13413ea9a877 754 #define __SSUB16 __ssub16
ganlikun 0:13413ea9a877 755 #define __QSUB16 __qsub16
ganlikun 0:13413ea9a877 756 #define __SHSUB16 __shsub16
ganlikun 0:13413ea9a877 757 #define __USUB16 __usub16
ganlikun 0:13413ea9a877 758 #define __UQSUB16 __uqsub16
ganlikun 0:13413ea9a877 759 #define __UHSUB16 __uhsub16
ganlikun 0:13413ea9a877 760 #define __SASX __sasx
ganlikun 0:13413ea9a877 761 #define __QASX __qasx
ganlikun 0:13413ea9a877 762 #define __SHASX __shasx
ganlikun 0:13413ea9a877 763 #define __UASX __uasx
ganlikun 0:13413ea9a877 764 #define __UQASX __uqasx
ganlikun 0:13413ea9a877 765 #define __UHASX __uhasx
ganlikun 0:13413ea9a877 766 #define __SSAX __ssax
ganlikun 0:13413ea9a877 767 #define __QSAX __qsax
ganlikun 0:13413ea9a877 768 #define __SHSAX __shsax
ganlikun 0:13413ea9a877 769 #define __USAX __usax
ganlikun 0:13413ea9a877 770 #define __UQSAX __uqsax
ganlikun 0:13413ea9a877 771 #define __UHSAX __uhsax
ganlikun 0:13413ea9a877 772 #define __USAD8 __usad8
ganlikun 0:13413ea9a877 773 #define __USADA8 __usada8
ganlikun 0:13413ea9a877 774 #define __SSAT16 __ssat16
ganlikun 0:13413ea9a877 775 #define __USAT16 __usat16
ganlikun 0:13413ea9a877 776 #define __UXTB16 __uxtb16
ganlikun 0:13413ea9a877 777 #define __UXTAB16 __uxtab16
ganlikun 0:13413ea9a877 778 #define __SXTB16 __sxtb16
ganlikun 0:13413ea9a877 779 #define __SXTAB16 __sxtab16
ganlikun 0:13413ea9a877 780 #define __SMUAD __smuad
ganlikun 0:13413ea9a877 781 #define __SMUADX __smuadx
ganlikun 0:13413ea9a877 782 #define __SMLAD __smlad
ganlikun 0:13413ea9a877 783 #define __SMLADX __smladx
ganlikun 0:13413ea9a877 784 #define __SMLALD __smlald
ganlikun 0:13413ea9a877 785 #define __SMLALDX __smlaldx
ganlikun 0:13413ea9a877 786 #define __SMUSD __smusd
ganlikun 0:13413ea9a877 787 #define __SMUSDX __smusdx
ganlikun 0:13413ea9a877 788 #define __SMLSD __smlsd
ganlikun 0:13413ea9a877 789 #define __SMLSDX __smlsdx
ganlikun 0:13413ea9a877 790 #define __SMLSLD __smlsld
ganlikun 0:13413ea9a877 791 #define __SMLSLDX __smlsldx
ganlikun 0:13413ea9a877 792 #define __SEL __sel
ganlikun 0:13413ea9a877 793 #define __QADD __qadd
ganlikun 0:13413ea9a877 794 #define __QSUB __qsub
ganlikun 0:13413ea9a877 795
ganlikun 0:13413ea9a877 796 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
ganlikun 0:13413ea9a877 797 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
ganlikun 0:13413ea9a877 798
ganlikun 0:13413ea9a877 799 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
ganlikun 0:13413ea9a877 800 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
ganlikun 0:13413ea9a877 801
ganlikun 0:13413ea9a877 802 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
ganlikun 0:13413ea9a877 803 ((int64_t)(ARG3) << 32U) ) >> 32U))
ganlikun 0:13413ea9a877 804
ganlikun 0:13413ea9a877 805 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
ganlikun 0:13413ea9a877 806 /*@} end of group CMSIS_SIMD_intrinsics */
ganlikun 0:13413ea9a877 807
ganlikun 0:13413ea9a877 808
ganlikun 0:13413ea9a877 809 #endif /* __CMSIS_ARMCC_H */