Gan likun / mbed-dev11

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.c@0:06036f8bee2d, 2022-10-24 (annotated)

Committer:
ganlikun
Date:
Mon Oct 24 15:19:39 2022 +0000
Revision:
0:06036f8bee2d
11

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ganlikun 0:06036f8bee2d 1 /**
ganlikun 0:06036f8bee2d 2 ******************************************************************************
ganlikun 0:06036f8bee2d 3 * @file stm32f4xx_hal_dsi.c
ganlikun 0:06036f8bee2d 4 * @author MCD Application Team
ganlikun 0:06036f8bee2d 5 * @version V1.7.1
ganlikun 0:06036f8bee2d 6 * @date 14-April-2017
ganlikun 0:06036f8bee2d 7 * @brief DSI HAL module driver.
ganlikun 0:06036f8bee2d 8 * This file provides firmware functions to manage the following
ganlikun 0:06036f8bee2d 9 * functionalities of the DSI peripheral:
ganlikun 0:06036f8bee2d 10 * + Initialization and de-initialization functions
ganlikun 0:06036f8bee2d 11 * + IO operation functions
ganlikun 0:06036f8bee2d 12 * + Peripheral Control functions
ganlikun 0:06036f8bee2d 13 * + Peripheral State and Errors functions
ganlikun 0:06036f8bee2d 14 ******************************************************************************
ganlikun 0:06036f8bee2d 15 * @attention
ganlikun 0:06036f8bee2d 16 *
ganlikun 0:06036f8bee2d 17 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
ganlikun 0:06036f8bee2d 18 *
ganlikun 0:06036f8bee2d 19 * Redistribution and use in source and binary forms, with or without modification,
ganlikun 0:06036f8bee2d 20 * are permitted provided that the following conditions are met:
ganlikun 0:06036f8bee2d 21 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:06036f8bee2d 22 * this list of conditions and the following disclaimer.
ganlikun 0:06036f8bee2d 23 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:06036f8bee2d 24 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:06036f8bee2d 25 * and/or other materials provided with the distribution.
ganlikun 0:06036f8bee2d 26 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:06036f8bee2d 27 * may be used to endorse or promote products derived from this software
ganlikun 0:06036f8bee2d 28 * without specific prior written permission.
ganlikun 0:06036f8bee2d 29 *
ganlikun 0:06036f8bee2d 30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:06036f8bee2d 31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:06036f8bee2d 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:06036f8bee2d 33 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:06036f8bee2d 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:06036f8bee2d 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:06036f8bee2d 36 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:06036f8bee2d 37 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:06036f8bee2d 38 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:06036f8bee2d 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:06036f8bee2d 40 *
ganlikun 0:06036f8bee2d 41 ******************************************************************************
ganlikun 0:06036f8bee2d 42 */
ganlikun 0:06036f8bee2d 43
ganlikun 0:06036f8bee2d 44 /* Includes ------------------------------------------------------------------*/
ganlikun 0:06036f8bee2d 45 #include "stm32f4xx_hal.h"
ganlikun 0:06036f8bee2d 46
ganlikun 0:06036f8bee2d 47 /** @addtogroup STM32F4xx_HAL_Driver
ganlikun 0:06036f8bee2d 48 * @{
ganlikun 0:06036f8bee2d 49 */
ganlikun 0:06036f8bee2d 50 /** @addtogroup DSI
ganlikun 0:06036f8bee2d 51 * @{
ganlikun 0:06036f8bee2d 52 */
ganlikun 0:06036f8bee2d 53
ganlikun 0:06036f8bee2d 54 #ifdef HAL_DSI_MODULE_ENABLED
ganlikun 0:06036f8bee2d 55
ganlikun 0:06036f8bee2d 56 #if defined(STM32F469xx) || defined(STM32F479xx)
ganlikun 0:06036f8bee2d 57
ganlikun 0:06036f8bee2d 58 /* Private types -------------------------------------------------------------*/
ganlikun 0:06036f8bee2d 59 /* Private defines -----------------------------------------------------------*/
ganlikun 0:06036f8bee2d 60 /** @addtogroup DSI_Private_Constants
ganlikun 0:06036f8bee2d 61 * @{
ganlikun 0:06036f8bee2d 62 */
ganlikun 0:06036f8bee2d 63 #define DSI_TIMEOUT_VALUE ((uint32_t)1000U) /* 1s */
ganlikun 0:06036f8bee2d 64
ganlikun 0:06036f8bee2d 65 #define DSI_ERROR_ACK_MASK (DSI_ISR0_AE0 | DSI_ISR0_AE1 | DSI_ISR0_AE2 | DSI_ISR0_AE3 | \
ganlikun 0:06036f8bee2d 66 DSI_ISR0_AE4 | DSI_ISR0_AE5 | DSI_ISR0_AE6 | DSI_ISR0_AE7 | \
ganlikun 0:06036f8bee2d 67 DSI_ISR0_AE8 | DSI_ISR0_AE9 | DSI_ISR0_AE10 | DSI_ISR0_AE11 | \
ganlikun 0:06036f8bee2d 68 DSI_ISR0_AE12 | DSI_ISR0_AE13 | DSI_ISR0_AE14 | DSI_ISR0_AE15)
ganlikun 0:06036f8bee2d 69 #define DSI_ERROR_PHY_MASK (DSI_ISR0_PE0 | DSI_ISR0_PE1 | DSI_ISR0_PE2 | DSI_ISR0_PE3 | DSI_ISR0_PE4)
ganlikun 0:06036f8bee2d 70 #define DSI_ERROR_TX_MASK DSI_ISR1_TOHSTX
ganlikun 0:06036f8bee2d 71 #define DSI_ERROR_RX_MASK DSI_ISR1_TOLPRX
ganlikun 0:06036f8bee2d 72 #define DSI_ERROR_ECC_MASK (DSI_ISR1_ECCSE | DSI_ISR1_ECCME)
ganlikun 0:06036f8bee2d 73 #define DSI_ERROR_CRC_MASK DSI_ISR1_CRCE
ganlikun 0:06036f8bee2d 74 #define DSI_ERROR_PSE_MASK DSI_ISR1_PSE
ganlikun 0:06036f8bee2d 75 #define DSI_ERROR_EOT_MASK DSI_ISR1_EOTPE
ganlikun 0:06036f8bee2d 76 #define DSI_ERROR_OVF_MASK DSI_ISR1_LPWRE
ganlikun 0:06036f8bee2d 77 #define DSI_ERROR_GEN_MASK (DSI_ISR1_GCWRE | DSI_ISR1_GPWRE | DSI_ISR1_GPTXE | DSI_ISR1_GPRDE | DSI_ISR1_GPRXE)
ganlikun 0:06036f8bee2d 78 /**
ganlikun 0:06036f8bee2d 79 * @}
ganlikun 0:06036f8bee2d 80 */
ganlikun 0:06036f8bee2d 81
ganlikun 0:06036f8bee2d 82 /* Private variables ---------------------------------------------------------*/
ganlikun 0:06036f8bee2d 83 /* Private constants ---------------------------------------------------------*/
ganlikun 0:06036f8bee2d 84 /* Private macros ------------------------------------------------------------*/
ganlikun 0:06036f8bee2d 85 /* Private function prototypes -----------------------------------------------*/
ganlikun 0:06036f8bee2d 86 static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx, uint32_t ChannelID, uint32_t DataType, uint32_t Data0, uint32_t Data1);
ganlikun 0:06036f8bee2d 87
ganlikun 0:06036f8bee2d 88 /* Private functions ---------------------------------------------------------*/
ganlikun 0:06036f8bee2d 89 /**
ganlikun 0:06036f8bee2d 90 * @brief Generic DSI packet header configuration
ganlikun 0:06036f8bee2d 91 * @param DSIx: Pointer to DSI register base
ganlikun 0:06036f8bee2d 92 * @param ChannelID: Virtual channel ID of the header packet
ganlikun 0:06036f8bee2d 93 * @param DataType: Packet data type of the header packet
ganlikun 0:06036f8bee2d 94 * This parameter can be any value of :
ganlikun 0:06036f8bee2d 95 * @ref DSI_SHORT_WRITE_PKT_Data_Type
ganlikun 0:06036f8bee2d 96 * or @ref DSI_LONG_WRITE_PKT_Data_Type
ganlikun 0:06036f8bee2d 97 * or @ref DSI_SHORT_READ_PKT_Data_Type
ganlikun 0:06036f8bee2d 98 * or DSI_MAX_RETURN_PKT_SIZE
ganlikun 0:06036f8bee2d 99 * @param Data0: Word count LSB
ganlikun 0:06036f8bee2d 100 * @param Data1: Word count MSB
ganlikun 0:06036f8bee2d 101 * @retval None
ganlikun 0:06036f8bee2d 102 */
ganlikun 0:06036f8bee2d 103 static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx,
ganlikun 0:06036f8bee2d 104 uint32_t ChannelID,
ganlikun 0:06036f8bee2d 105 uint32_t DataType,
ganlikun 0:06036f8bee2d 106 uint32_t Data0,
ganlikun 0:06036f8bee2d 107 uint32_t Data1)
ganlikun 0:06036f8bee2d 108 {
ganlikun 0:06036f8bee2d 109 /* Update the DSI packet header with new information */
ganlikun 0:06036f8bee2d 110 DSIx->GHCR = (DataType | (ChannelID<<6U) | (Data0<<8U) | (Data1<<16U));
ganlikun 0:06036f8bee2d 111 }
ganlikun 0:06036f8bee2d 112
ganlikun 0:06036f8bee2d 113 /* Exported functions --------------------------------------------------------*/
ganlikun 0:06036f8bee2d 114 /** @addtogroup DSI_Exported_Functions
ganlikun 0:06036f8bee2d 115 * @{
ganlikun 0:06036f8bee2d 116 */
ganlikun 0:06036f8bee2d 117
ganlikun 0:06036f8bee2d 118 /** @defgroup DSI_Group1 Initialization and Configuration functions
ganlikun 0:06036f8bee2d 119 * @brief Initialization and Configuration functions
ganlikun 0:06036f8bee2d 120 *
ganlikun 0:06036f8bee2d 121 @verbatim
ganlikun 0:06036f8bee2d 122 ===============================================================================
ganlikun 0:06036f8bee2d 123 ##### Initialization and Configuration functions #####
ganlikun 0:06036f8bee2d 124 ===============================================================================
ganlikun 0:06036f8bee2d 125 [..] This section provides functions allowing to:
ganlikun 0:06036f8bee2d 126 (+) Initialize and configure the DSI
ganlikun 0:06036f8bee2d 127 (+) De-initialize the DSI
ganlikun 0:06036f8bee2d 128
ganlikun 0:06036f8bee2d 129 @endverbatim
ganlikun 0:06036f8bee2d 130 * @{
ganlikun 0:06036f8bee2d 131 */
ganlikun 0:06036f8bee2d 132
ganlikun 0:06036f8bee2d 133 /**
ganlikun 0:06036f8bee2d 134 * @brief Initializes the DSI according to the specified
ganlikun 0:06036f8bee2d 135 * parameters in the DSI_InitTypeDef and create the associated handle.
ganlikun 0:06036f8bee2d 136 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 137 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 138 * @param PLLInit: pointer to a DSI_PLLInitTypeDef structure that contains
ganlikun 0:06036f8bee2d 139 * the PLL Clock structure definition for the DSI.
ganlikun 0:06036f8bee2d 140 * @retval HAL status
ganlikun 0:06036f8bee2d 141 */
ganlikun 0:06036f8bee2d 142 HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef *hdsi, DSI_PLLInitTypeDef *PLLInit)
ganlikun 0:06036f8bee2d 143 {
ganlikun 0:06036f8bee2d 144 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 145 uint32_t unitIntervalx4 = 0U;
ganlikun 0:06036f8bee2d 146 uint32_t tempIDF = 0U;
ganlikun 0:06036f8bee2d 147
ganlikun 0:06036f8bee2d 148 /* Check the DSI handle allocation */
ganlikun 0:06036f8bee2d 149 if(hdsi == NULL)
ganlikun 0:06036f8bee2d 150 {
ganlikun 0:06036f8bee2d 151 return HAL_ERROR;
ganlikun 0:06036f8bee2d 152 }
ganlikun 0:06036f8bee2d 153
ganlikun 0:06036f8bee2d 154 /* Check function parameters */
ganlikun 0:06036f8bee2d 155 assert_param(IS_DSI_PLL_NDIV(PLLInit->PLLNDIV));
ganlikun 0:06036f8bee2d 156 assert_param(IS_DSI_PLL_IDF(PLLInit->PLLIDF));
ganlikun 0:06036f8bee2d 157 assert_param(IS_DSI_PLL_ODF(PLLInit->PLLODF));
ganlikun 0:06036f8bee2d 158 assert_param(IS_DSI_AUTO_CLKLANE_CONTROL(hdsi->Init.AutomaticClockLaneControl));
ganlikun 0:06036f8bee2d 159 assert_param(IS_DSI_NUMBER_OF_LANES(hdsi->Init.NumberOfLanes));
ganlikun 0:06036f8bee2d 160
ganlikun 0:06036f8bee2d 161 if(hdsi->State == HAL_DSI_STATE_RESET)
ganlikun 0:06036f8bee2d 162 {
ganlikun 0:06036f8bee2d 163 /* Initialize the low level hardware */
ganlikun 0:06036f8bee2d 164 HAL_DSI_MspInit(hdsi);
ganlikun 0:06036f8bee2d 165 }
ganlikun 0:06036f8bee2d 166
ganlikun 0:06036f8bee2d 167 /* Change DSI peripheral state */
ganlikun 0:06036f8bee2d 168 hdsi->State = HAL_DSI_STATE_BUSY;
ganlikun 0:06036f8bee2d 169
ganlikun 0:06036f8bee2d 170 /**************** Turn on the regulator and enable the DSI PLL ****************/
ganlikun 0:06036f8bee2d 171
ganlikun 0:06036f8bee2d 172 /* Enable the regulator */
ganlikun 0:06036f8bee2d 173 __HAL_DSI_REG_ENABLE(hdsi);
ganlikun 0:06036f8bee2d 174
ganlikun 0:06036f8bee2d 175 /* Get tick */
ganlikun 0:06036f8bee2d 176 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 177
ganlikun 0:06036f8bee2d 178 /* Wait until the regulator is ready */
ganlikun 0:06036f8bee2d 179 while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_RRS) == RESET)
ganlikun 0:06036f8bee2d 180 {
ganlikun 0:06036f8bee2d 181 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 182 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 183 {
ganlikun 0:06036f8bee2d 184 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 185 }
ganlikun 0:06036f8bee2d 186 }
ganlikun 0:06036f8bee2d 187
ganlikun 0:06036f8bee2d 188 /* Set the PLL division factors */
ganlikun 0:06036f8bee2d 189 hdsi->Instance->WRPCR &= ~(DSI_WRPCR_PLL_NDIV | DSI_WRPCR_PLL_IDF | DSI_WRPCR_PLL_ODF);
ganlikun 0:06036f8bee2d 190 hdsi->Instance->WRPCR |= (((PLLInit->PLLNDIV)<<2U) | ((PLLInit->PLLIDF)<<11U) | ((PLLInit->PLLODF)<<16U));
ganlikun 0:06036f8bee2d 191
ganlikun 0:06036f8bee2d 192 /* Enable the DSI PLL */
ganlikun 0:06036f8bee2d 193 __HAL_DSI_PLL_ENABLE(hdsi);
ganlikun 0:06036f8bee2d 194
ganlikun 0:06036f8bee2d 195 /* Get tick */
ganlikun 0:06036f8bee2d 196 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 197
ganlikun 0:06036f8bee2d 198 /* Wait for the lock of the PLL */
ganlikun 0:06036f8bee2d 199 while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == RESET)
ganlikun 0:06036f8bee2d 200 {
ganlikun 0:06036f8bee2d 201 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 202 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 203 {
ganlikun 0:06036f8bee2d 204 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 205 }
ganlikun 0:06036f8bee2d 206 }
ganlikun 0:06036f8bee2d 207
ganlikun 0:06036f8bee2d 208 /*************************** Set the PHY parameters ***************************/
ganlikun 0:06036f8bee2d 209
ganlikun 0:06036f8bee2d 210 /* D-PHY clock and digital enable*/
ganlikun 0:06036f8bee2d 211 hdsi->Instance->PCTLR |= (DSI_PCTLR_CKE | DSI_PCTLR_DEN);
ganlikun 0:06036f8bee2d 212
ganlikun 0:06036f8bee2d 213 /* Clock lane configuration */
ganlikun 0:06036f8bee2d 214 hdsi->Instance->CLCR &= ~(DSI_CLCR_DPCC | DSI_CLCR_ACR);
ganlikun 0:06036f8bee2d 215 hdsi->Instance->CLCR |= (DSI_CLCR_DPCC | hdsi->Init.AutomaticClockLaneControl);
ganlikun 0:06036f8bee2d 216
ganlikun 0:06036f8bee2d 217 /* Configure the number of active data lanes */
ganlikun 0:06036f8bee2d 218 hdsi->Instance->PCONFR &= ~DSI_PCONFR_NL;
ganlikun 0:06036f8bee2d 219 hdsi->Instance->PCONFR |= hdsi->Init.NumberOfLanes;
ganlikun 0:06036f8bee2d 220
ganlikun 0:06036f8bee2d 221 /************************ Set the DSI clock parameters ************************/
ganlikun 0:06036f8bee2d 222
ganlikun 0:06036f8bee2d 223 /* Set the TX escape clock division factor */
ganlikun 0:06036f8bee2d 224 hdsi->Instance->CCR &= ~DSI_CCR_TXECKDIV;
ganlikun 0:06036f8bee2d 225 hdsi->Instance->CCR |= hdsi->Init.TXEscapeCkdiv;
ganlikun 0:06036f8bee2d 226
ganlikun 0:06036f8bee2d 227 /* Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) */
ganlikun 0:06036f8bee2d 228 /* The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 ) */
ganlikun 0:06036f8bee2d 229 /* Where : F_PHY_Mhz = (NDIV * HSE_Mhz) / (IDF * ODF) */
ganlikun 0:06036f8bee2d 230 tempIDF = (PLLInit->PLLIDF > 0U) ? PLLInit->PLLIDF : 1U;
ganlikun 0:06036f8bee2d 231 unitIntervalx4 = (4000000U * tempIDF * (1U << PLLInit->PLLODF)) / ((HSE_VALUE/1000U) * PLLInit->PLLNDIV);
ganlikun 0:06036f8bee2d 232
ganlikun 0:06036f8bee2d 233 /* Set the bit period in high-speed mode */
ganlikun 0:06036f8bee2d 234 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_UIX4;
ganlikun 0:06036f8bee2d 235 hdsi->Instance->WPCR[0U] |= unitIntervalx4;
ganlikun 0:06036f8bee2d 236
ganlikun 0:06036f8bee2d 237 /****************************** Error management *****************************/
ganlikun 0:06036f8bee2d 238
ganlikun 0:06036f8bee2d 239 /* Disable all error interrupts and reset the Error Mask */
ganlikun 0:06036f8bee2d 240 hdsi->Instance->IER[0U] = 0U;
ganlikun 0:06036f8bee2d 241 hdsi->Instance->IER[1U] = 0U;
ganlikun 0:06036f8bee2d 242 hdsi->ErrorMsk = 0U;
ganlikun 0:06036f8bee2d 243
ganlikun 0:06036f8bee2d 244 /* Initialise the error code */
ganlikun 0:06036f8bee2d 245 hdsi->ErrorCode = HAL_DSI_ERROR_NONE;
ganlikun 0:06036f8bee2d 246
ganlikun 0:06036f8bee2d 247 /* Initialize the DSI state*/
ganlikun 0:06036f8bee2d 248 hdsi->State = HAL_DSI_STATE_READY;
ganlikun 0:06036f8bee2d 249
ganlikun 0:06036f8bee2d 250 return HAL_OK;
ganlikun 0:06036f8bee2d 251 }
ganlikun 0:06036f8bee2d 252
ganlikun 0:06036f8bee2d 253 /**
ganlikun 0:06036f8bee2d 254 * @brief De-initializes the DSI peripheral registers to their default reset
ganlikun 0:06036f8bee2d 255 * values.
ganlikun 0:06036f8bee2d 256 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 257 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 258 * @retval HAL status
ganlikun 0:06036f8bee2d 259 */
ganlikun 0:06036f8bee2d 260 HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 261 {
ganlikun 0:06036f8bee2d 262 /* Check the DSI handle allocation */
ganlikun 0:06036f8bee2d 263 if(hdsi == NULL)
ganlikun 0:06036f8bee2d 264 {
ganlikun 0:06036f8bee2d 265 return HAL_ERROR;
ganlikun 0:06036f8bee2d 266 }
ganlikun 0:06036f8bee2d 267
ganlikun 0:06036f8bee2d 268 /* Change DSI peripheral state */
ganlikun 0:06036f8bee2d 269 hdsi->State = HAL_DSI_STATE_BUSY;
ganlikun 0:06036f8bee2d 270
ganlikun 0:06036f8bee2d 271 /* Disable the DSI wrapper */
ganlikun 0:06036f8bee2d 272 __HAL_DSI_WRAPPER_DISABLE(hdsi);
ganlikun 0:06036f8bee2d 273
ganlikun 0:06036f8bee2d 274 /* Disable the DSI host */
ganlikun 0:06036f8bee2d 275 __HAL_DSI_DISABLE(hdsi);
ganlikun 0:06036f8bee2d 276
ganlikun 0:06036f8bee2d 277 /* D-PHY clock and digital disable */
ganlikun 0:06036f8bee2d 278 hdsi->Instance->PCTLR &= ~(DSI_PCTLR_CKE | DSI_PCTLR_DEN);
ganlikun 0:06036f8bee2d 279
ganlikun 0:06036f8bee2d 280 /* Turn off the DSI PLL */
ganlikun 0:06036f8bee2d 281 __HAL_DSI_PLL_DISABLE(hdsi);
ganlikun 0:06036f8bee2d 282
ganlikun 0:06036f8bee2d 283 /* Disable the regulator */
ganlikun 0:06036f8bee2d 284 __HAL_DSI_REG_DISABLE(hdsi);
ganlikun 0:06036f8bee2d 285
ganlikun 0:06036f8bee2d 286 /* DeInit the low level hardware */
ganlikun 0:06036f8bee2d 287 HAL_DSI_MspDeInit(hdsi);
ganlikun 0:06036f8bee2d 288
ganlikun 0:06036f8bee2d 289 /* Initialise the error code */
ganlikun 0:06036f8bee2d 290 hdsi->ErrorCode = HAL_DSI_ERROR_NONE;
ganlikun 0:06036f8bee2d 291
ganlikun 0:06036f8bee2d 292 /* Initialize the DSI state*/
ganlikun 0:06036f8bee2d 293 hdsi->State = HAL_DSI_STATE_RESET;
ganlikun 0:06036f8bee2d 294
ganlikun 0:06036f8bee2d 295 /* Release Lock */
ganlikun 0:06036f8bee2d 296 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 297
ganlikun 0:06036f8bee2d 298 return HAL_OK;
ganlikun 0:06036f8bee2d 299 }
ganlikun 0:06036f8bee2d 300
ganlikun 0:06036f8bee2d 301 /**
ganlikun 0:06036f8bee2d 302 * @brief Return the DSI error code
ganlikun 0:06036f8bee2d 303 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 304 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 305 * @retval DSI Error Code
ganlikun 0:06036f8bee2d 306 */
ganlikun 0:06036f8bee2d 307 uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 308 {
ganlikun 0:06036f8bee2d 309 /* Get the error code */
ganlikun 0:06036f8bee2d 310 return hdsi->ErrorCode;
ganlikun 0:06036f8bee2d 311 }
ganlikun 0:06036f8bee2d 312
ganlikun 0:06036f8bee2d 313 /**
ganlikun 0:06036f8bee2d 314 * @brief Enable the error monitor flags
ganlikun 0:06036f8bee2d 315 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 316 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 317 * @param ActiveErrors: indicates which error interrupts will be enabled.
ganlikun 0:06036f8bee2d 318 * This parameter can be any combination of @ref DSI_Error_Data_Type.
ganlikun 0:06036f8bee2d 319 * @retval HAL status
ganlikun 0:06036f8bee2d 320 */
ganlikun 0:06036f8bee2d 321 HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors)
ganlikun 0:06036f8bee2d 322 {
ganlikun 0:06036f8bee2d 323 /* Process locked */
ganlikun 0:06036f8bee2d 324 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 325
ganlikun 0:06036f8bee2d 326 hdsi->Instance->IER[0U] = 0U;
ganlikun 0:06036f8bee2d 327 hdsi->Instance->IER[1U] = 0U;
ganlikun 0:06036f8bee2d 328
ganlikun 0:06036f8bee2d 329 /* Store active errors to the handle */
ganlikun 0:06036f8bee2d 330 hdsi->ErrorMsk = ActiveErrors;
ganlikun 0:06036f8bee2d 331
ganlikun 0:06036f8bee2d 332 if((ActiveErrors & HAL_DSI_ERROR_ACK) != RESET)
ganlikun 0:06036f8bee2d 333 {
ganlikun 0:06036f8bee2d 334 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 335 hdsi->Instance->IER[0U] |= DSI_ERROR_ACK_MASK;
ganlikun 0:06036f8bee2d 336 }
ganlikun 0:06036f8bee2d 337
ganlikun 0:06036f8bee2d 338 if((ActiveErrors & HAL_DSI_ERROR_PHY) != RESET)
ganlikun 0:06036f8bee2d 339 {
ganlikun 0:06036f8bee2d 340 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 341 hdsi->Instance->IER[0U] |= DSI_ERROR_PHY_MASK;
ganlikun 0:06036f8bee2d 342 }
ganlikun 0:06036f8bee2d 343
ganlikun 0:06036f8bee2d 344 if((ActiveErrors & HAL_DSI_ERROR_TX) != RESET)
ganlikun 0:06036f8bee2d 345 {
ganlikun 0:06036f8bee2d 346 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 347 hdsi->Instance->IER[1U] |= DSI_ERROR_TX_MASK;
ganlikun 0:06036f8bee2d 348 }
ganlikun 0:06036f8bee2d 349
ganlikun 0:06036f8bee2d 350 if((ActiveErrors & HAL_DSI_ERROR_RX) != RESET)
ganlikun 0:06036f8bee2d 351 {
ganlikun 0:06036f8bee2d 352 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 353 hdsi->Instance->IER[1U] |= DSI_ERROR_RX_MASK;
ganlikun 0:06036f8bee2d 354 }
ganlikun 0:06036f8bee2d 355
ganlikun 0:06036f8bee2d 356 if((ActiveErrors & HAL_DSI_ERROR_ECC) != RESET)
ganlikun 0:06036f8bee2d 357 {
ganlikun 0:06036f8bee2d 358 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 359 hdsi->Instance->IER[1U] |= DSI_ERROR_ECC_MASK;
ganlikun 0:06036f8bee2d 360 }
ganlikun 0:06036f8bee2d 361
ganlikun 0:06036f8bee2d 362 if((ActiveErrors & HAL_DSI_ERROR_CRC) != RESET)
ganlikun 0:06036f8bee2d 363 {
ganlikun 0:06036f8bee2d 364 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 365 hdsi->Instance->IER[1U] |= DSI_ERROR_CRC_MASK;
ganlikun 0:06036f8bee2d 366 }
ganlikun 0:06036f8bee2d 367
ganlikun 0:06036f8bee2d 368 if((ActiveErrors & HAL_DSI_ERROR_PSE) != RESET)
ganlikun 0:06036f8bee2d 369 {
ganlikun 0:06036f8bee2d 370 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 371 hdsi->Instance->IER[1U] |= DSI_ERROR_PSE_MASK;
ganlikun 0:06036f8bee2d 372 }
ganlikun 0:06036f8bee2d 373
ganlikun 0:06036f8bee2d 374 if((ActiveErrors & HAL_DSI_ERROR_EOT) != RESET)
ganlikun 0:06036f8bee2d 375 {
ganlikun 0:06036f8bee2d 376 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 377 hdsi->Instance->IER[1U] |= DSI_ERROR_EOT_MASK;
ganlikun 0:06036f8bee2d 378 }
ganlikun 0:06036f8bee2d 379
ganlikun 0:06036f8bee2d 380 if((ActiveErrors & HAL_DSI_ERROR_OVF) != RESET)
ganlikun 0:06036f8bee2d 381 {
ganlikun 0:06036f8bee2d 382 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 383 hdsi->Instance->IER[1U] |= DSI_ERROR_OVF_MASK;
ganlikun 0:06036f8bee2d 384 }
ganlikun 0:06036f8bee2d 385
ganlikun 0:06036f8bee2d 386 if((ActiveErrors & HAL_DSI_ERROR_GEN) != RESET)
ganlikun 0:06036f8bee2d 387 {
ganlikun 0:06036f8bee2d 388 /* Enable the interrupt generation on selected errors */
ganlikun 0:06036f8bee2d 389 hdsi->Instance->IER[1U] |= DSI_ERROR_GEN_MASK;
ganlikun 0:06036f8bee2d 390 }
ganlikun 0:06036f8bee2d 391
ganlikun 0:06036f8bee2d 392 /* Process Unlocked */
ganlikun 0:06036f8bee2d 393 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 394
ganlikun 0:06036f8bee2d 395 return HAL_OK;
ganlikun 0:06036f8bee2d 396 }
ganlikun 0:06036f8bee2d 397
ganlikun 0:06036f8bee2d 398 /**
ganlikun 0:06036f8bee2d 399 * @brief Initializes the DSI MSP.
ganlikun 0:06036f8bee2d 400 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 401 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 402 * @retval None
ganlikun 0:06036f8bee2d 403 */
ganlikun 0:06036f8bee2d 404 __weak void HAL_DSI_MspInit(DSI_HandleTypeDef* hdsi)
ganlikun 0:06036f8bee2d 405 {
ganlikun 0:06036f8bee2d 406 /* Prevent unused argument(s) compilation warning */
ganlikun 0:06036f8bee2d 407 UNUSED(hdsi);
ganlikun 0:06036f8bee2d 408 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:06036f8bee2d 409 the HAL_DSI_MspInit could be implemented in the user file
ganlikun 0:06036f8bee2d 410 */
ganlikun 0:06036f8bee2d 411 }
ganlikun 0:06036f8bee2d 412
ganlikun 0:06036f8bee2d 413 /**
ganlikun 0:06036f8bee2d 414 * @brief De-initializes the DSI MSP.
ganlikun 0:06036f8bee2d 415 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 416 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 417 * @retval None
ganlikun 0:06036f8bee2d 418 */
ganlikun 0:06036f8bee2d 419 __weak void HAL_DSI_MspDeInit(DSI_HandleTypeDef* hdsi)
ganlikun 0:06036f8bee2d 420 {
ganlikun 0:06036f8bee2d 421 /* Prevent unused argument(s) compilation warning */
ganlikun 0:06036f8bee2d 422 UNUSED(hdsi);
ganlikun 0:06036f8bee2d 423 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:06036f8bee2d 424 the HAL_DSI_MspDeInit could be implemented in the user file
ganlikun 0:06036f8bee2d 425 */
ganlikun 0:06036f8bee2d 426 }
ganlikun 0:06036f8bee2d 427
ganlikun 0:06036f8bee2d 428 /**
ganlikun 0:06036f8bee2d 429 * @}
ganlikun 0:06036f8bee2d 430 */
ganlikun 0:06036f8bee2d 431
ganlikun 0:06036f8bee2d 432 /** @defgroup DSI_Group2 IO operation functions
ganlikun 0:06036f8bee2d 433 * @brief IO operation functions
ganlikun 0:06036f8bee2d 434 *
ganlikun 0:06036f8bee2d 435 @verbatim
ganlikun 0:06036f8bee2d 436 ===============================================================================
ganlikun 0:06036f8bee2d 437 ##### IO operation functions #####
ganlikun 0:06036f8bee2d 438 ===============================================================================
ganlikun 0:06036f8bee2d 439 [..] This section provides function allowing to:
ganlikun 0:06036f8bee2d 440 (+) Handle DSI interrupt request
ganlikun 0:06036f8bee2d 441
ganlikun 0:06036f8bee2d 442 @endverbatim
ganlikun 0:06036f8bee2d 443 * @{
ganlikun 0:06036f8bee2d 444 */
ganlikun 0:06036f8bee2d 445 /**
ganlikun 0:06036f8bee2d 446 * @brief Handles DSI interrupt request.
ganlikun 0:06036f8bee2d 447 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 448 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 449 * @retval HAL status
ganlikun 0:06036f8bee2d 450 */
ganlikun 0:06036f8bee2d 451 void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 452 {
ganlikun 0:06036f8bee2d 453 uint32_t ErrorStatus0, ErrorStatus1;
ganlikun 0:06036f8bee2d 454
ganlikun 0:06036f8bee2d 455 /* Tearing Effect Interrupt management ***************************************/
ganlikun 0:06036f8bee2d 456 if(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_TE) != RESET)
ganlikun 0:06036f8bee2d 457 {
ganlikun 0:06036f8bee2d 458 if(__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_TE) != RESET)
ganlikun 0:06036f8bee2d 459 {
ganlikun 0:06036f8bee2d 460 /* Clear the Tearing Effect Interrupt Flag */
ganlikun 0:06036f8bee2d 461 __HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_TE);
ganlikun 0:06036f8bee2d 462
ganlikun 0:06036f8bee2d 463 /* Tearing Effect Callback */
ganlikun 0:06036f8bee2d 464 HAL_DSI_TearingEffectCallback(hdsi);
ganlikun 0:06036f8bee2d 465 }
ganlikun 0:06036f8bee2d 466 }
ganlikun 0:06036f8bee2d 467
ganlikun 0:06036f8bee2d 468 /* End of Refresh Interrupt management ***************************************/
ganlikun 0:06036f8bee2d 469 if(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_ER) != RESET)
ganlikun 0:06036f8bee2d 470 {
ganlikun 0:06036f8bee2d 471 if(__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_ER) != RESET)
ganlikun 0:06036f8bee2d 472 {
ganlikun 0:06036f8bee2d 473 /* Clear the End of Refresh Interrupt Flag */
ganlikun 0:06036f8bee2d 474 __HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_ER);
ganlikun 0:06036f8bee2d 475
ganlikun 0:06036f8bee2d 476 /* End of Refresh Callback */
ganlikun 0:06036f8bee2d 477 HAL_DSI_EndOfRefreshCallback(hdsi);
ganlikun 0:06036f8bee2d 478 }
ganlikun 0:06036f8bee2d 479 }
ganlikun 0:06036f8bee2d 480
ganlikun 0:06036f8bee2d 481 /* Error Interrupts management ***********************************************/
ganlikun 0:06036f8bee2d 482 if(hdsi->ErrorMsk != 0U)
ganlikun 0:06036f8bee2d 483 {
ganlikun 0:06036f8bee2d 484 ErrorStatus0 = hdsi->Instance->ISR[0U];
ganlikun 0:06036f8bee2d 485 ErrorStatus0 &= hdsi->Instance->IER[0U];
ganlikun 0:06036f8bee2d 486 ErrorStatus1 = hdsi->Instance->ISR[1U];
ganlikun 0:06036f8bee2d 487 ErrorStatus1 &= hdsi->Instance->IER[1U];
ganlikun 0:06036f8bee2d 488
ganlikun 0:06036f8bee2d 489 if((ErrorStatus0 & DSI_ERROR_ACK_MASK) != RESET)
ganlikun 0:06036f8bee2d 490 {
ganlikun 0:06036f8bee2d 491 hdsi->ErrorCode |= HAL_DSI_ERROR_ACK;
ganlikun 0:06036f8bee2d 492 }
ganlikun 0:06036f8bee2d 493
ganlikun 0:06036f8bee2d 494 if((ErrorStatus0 & DSI_ERROR_PHY_MASK) != RESET)
ganlikun 0:06036f8bee2d 495 {
ganlikun 0:06036f8bee2d 496 hdsi->ErrorCode |= HAL_DSI_ERROR_PHY;
ganlikun 0:06036f8bee2d 497 }
ganlikun 0:06036f8bee2d 498
ganlikun 0:06036f8bee2d 499 if((ErrorStatus1 & DSI_ERROR_TX_MASK) != RESET)
ganlikun 0:06036f8bee2d 500 {
ganlikun 0:06036f8bee2d 501 hdsi->ErrorCode |= HAL_DSI_ERROR_TX;
ganlikun 0:06036f8bee2d 502 }
ganlikun 0:06036f8bee2d 503
ganlikun 0:06036f8bee2d 504 if((ErrorStatus1 & DSI_ERROR_RX_MASK) != RESET)
ganlikun 0:06036f8bee2d 505 {
ganlikun 0:06036f8bee2d 506 hdsi->ErrorCode |= HAL_DSI_ERROR_RX;
ganlikun 0:06036f8bee2d 507 }
ganlikun 0:06036f8bee2d 508
ganlikun 0:06036f8bee2d 509 if((ErrorStatus1 & DSI_ERROR_ECC_MASK) != RESET)
ganlikun 0:06036f8bee2d 510 {
ganlikun 0:06036f8bee2d 511 hdsi->ErrorCode |= HAL_DSI_ERROR_ECC;
ganlikun 0:06036f8bee2d 512 }
ganlikun 0:06036f8bee2d 513
ganlikun 0:06036f8bee2d 514 if((ErrorStatus1 & DSI_ERROR_CRC_MASK) != RESET)
ganlikun 0:06036f8bee2d 515 {
ganlikun 0:06036f8bee2d 516 hdsi->ErrorCode |= HAL_DSI_ERROR_CRC;
ganlikun 0:06036f8bee2d 517 }
ganlikun 0:06036f8bee2d 518
ganlikun 0:06036f8bee2d 519 if((ErrorStatus1 & DSI_ERROR_PSE_MASK) != RESET)
ganlikun 0:06036f8bee2d 520 {
ganlikun 0:06036f8bee2d 521 hdsi->ErrorCode |= HAL_DSI_ERROR_PSE;
ganlikun 0:06036f8bee2d 522 }
ganlikun 0:06036f8bee2d 523
ganlikun 0:06036f8bee2d 524 if((ErrorStatus1 & DSI_ERROR_EOT_MASK) != RESET)
ganlikun 0:06036f8bee2d 525 {
ganlikun 0:06036f8bee2d 526 hdsi->ErrorCode |= HAL_DSI_ERROR_EOT;
ganlikun 0:06036f8bee2d 527 }
ganlikun 0:06036f8bee2d 528
ganlikun 0:06036f8bee2d 529 if((ErrorStatus1 & DSI_ERROR_OVF_MASK) != RESET)
ganlikun 0:06036f8bee2d 530 {
ganlikun 0:06036f8bee2d 531 hdsi->ErrorCode |= HAL_DSI_ERROR_OVF;
ganlikun 0:06036f8bee2d 532 }
ganlikun 0:06036f8bee2d 533
ganlikun 0:06036f8bee2d 534 if((ErrorStatus1 & DSI_ERROR_GEN_MASK) != RESET)
ganlikun 0:06036f8bee2d 535 {
ganlikun 0:06036f8bee2d 536 hdsi->ErrorCode |= HAL_DSI_ERROR_GEN;
ganlikun 0:06036f8bee2d 537 }
ganlikun 0:06036f8bee2d 538
ganlikun 0:06036f8bee2d 539 /* Check only selected errors */
ganlikun 0:06036f8bee2d 540 if(hdsi->ErrorCode != HAL_DSI_ERROR_NONE)
ganlikun 0:06036f8bee2d 541 {
ganlikun 0:06036f8bee2d 542 /* DSI error interrupt user callback */
ganlikun 0:06036f8bee2d 543 HAL_DSI_ErrorCallback(hdsi);
ganlikun 0:06036f8bee2d 544 }
ganlikun 0:06036f8bee2d 545 }
ganlikun 0:06036f8bee2d 546 }
ganlikun 0:06036f8bee2d 547
ganlikun 0:06036f8bee2d 548 /**
ganlikun 0:06036f8bee2d 549 * @brief Tearing Effect DSI callback.
ganlikun 0:06036f8bee2d 550 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 551 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 552 * @retval None
ganlikun 0:06036f8bee2d 553 */
ganlikun 0:06036f8bee2d 554 __weak void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 555 {
ganlikun 0:06036f8bee2d 556 /* Prevent unused argument(s) compilation warning */
ganlikun 0:06036f8bee2d 557 UNUSED(hdsi);
ganlikun 0:06036f8bee2d 558 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:06036f8bee2d 559 the HAL_DSI_TearingEffectCallback could be implemented in the user file
ganlikun 0:06036f8bee2d 560 */
ganlikun 0:06036f8bee2d 561 }
ganlikun 0:06036f8bee2d 562
ganlikun 0:06036f8bee2d 563 /**
ganlikun 0:06036f8bee2d 564 * @brief End of Refresh DSI callback.
ganlikun 0:06036f8bee2d 565 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 566 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 567 * @retval None
ganlikun 0:06036f8bee2d 568 */
ganlikun 0:06036f8bee2d 569 __weak void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 570 {
ganlikun 0:06036f8bee2d 571 /* Prevent unused argument(s) compilation warning */
ganlikun 0:06036f8bee2d 572 UNUSED(hdsi);
ganlikun 0:06036f8bee2d 573 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:06036f8bee2d 574 the HAL_DSI_EndOfRefreshCallback could be implemented in the user file
ganlikun 0:06036f8bee2d 575 */
ganlikun 0:06036f8bee2d 576 }
ganlikun 0:06036f8bee2d 577
ganlikun 0:06036f8bee2d 578 /**
ganlikun 0:06036f8bee2d 579 * @brief Operation Error DSI callback.
ganlikun 0:06036f8bee2d 580 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 581 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 582 * @retval None
ganlikun 0:06036f8bee2d 583 */
ganlikun 0:06036f8bee2d 584 __weak void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 585 {
ganlikun 0:06036f8bee2d 586 /* Prevent unused argument(s) compilation warning */
ganlikun 0:06036f8bee2d 587 UNUSED(hdsi);
ganlikun 0:06036f8bee2d 588 /* NOTE : This function Should not be modified, when the callback is needed,
ganlikun 0:06036f8bee2d 589 the HAL_DSI_ErrorCallback could be implemented in the user file
ganlikun 0:06036f8bee2d 590 */
ganlikun 0:06036f8bee2d 591 }
ganlikun 0:06036f8bee2d 592
ganlikun 0:06036f8bee2d 593 /**
ganlikun 0:06036f8bee2d 594 * @}
ganlikun 0:06036f8bee2d 595 */
ganlikun 0:06036f8bee2d 596
ganlikun 0:06036f8bee2d 597 /** @defgroup DSI_Group3 Peripheral Control functions
ganlikun 0:06036f8bee2d 598 * @brief Peripheral Control functions
ganlikun 0:06036f8bee2d 599 *
ganlikun 0:06036f8bee2d 600 @verbatim
ganlikun 0:06036f8bee2d 601 ===============================================================================
ganlikun 0:06036f8bee2d 602 ##### Peripheral Control functions #####
ganlikun 0:06036f8bee2d 603 ===============================================================================
ganlikun 0:06036f8bee2d 604
ganlikun 0:06036f8bee2d 605 @endverbatim
ganlikun 0:06036f8bee2d 606 * @{
ganlikun 0:06036f8bee2d 607 */
ganlikun 0:06036f8bee2d 608
ganlikun 0:06036f8bee2d 609 /**
ganlikun 0:06036f8bee2d 610 * @brief Configure the Generic interface read-back Virtual Channel ID.
ganlikun 0:06036f8bee2d 611 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 612 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 613 * @param VirtualChannelID: Virtual channel ID
ganlikun 0:06036f8bee2d 614 * @retval HAL status
ganlikun 0:06036f8bee2d 615 */
ganlikun 0:06036f8bee2d 616 HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID)
ganlikun 0:06036f8bee2d 617 {
ganlikun 0:06036f8bee2d 618 /* Process locked */
ganlikun 0:06036f8bee2d 619 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 620
ganlikun 0:06036f8bee2d 621 /* Update the GVCID register */
ganlikun 0:06036f8bee2d 622 hdsi->Instance->GVCIDR &= ~DSI_GVCIDR_VCID;
ganlikun 0:06036f8bee2d 623 hdsi->Instance->GVCIDR |= VirtualChannelID;
ganlikun 0:06036f8bee2d 624
ganlikun 0:06036f8bee2d 625 /* Process unlocked */
ganlikun 0:06036f8bee2d 626 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 627
ganlikun 0:06036f8bee2d 628 return HAL_OK;
ganlikun 0:06036f8bee2d 629 }
ganlikun 0:06036f8bee2d 630
ganlikun 0:06036f8bee2d 631 /**
ganlikun 0:06036f8bee2d 632 * @brief Select video mode and configure the corresponding parameters
ganlikun 0:06036f8bee2d 633 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 634 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 635 * @param VidCfg: pointer to a DSI_VidCfgTypeDef structure that contains
ganlikun 0:06036f8bee2d 636 * the DSI video mode configuration parameters
ganlikun 0:06036f8bee2d 637 * @retval HAL status
ganlikun 0:06036f8bee2d 638 */
ganlikun 0:06036f8bee2d 639 HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef *hdsi, DSI_VidCfgTypeDef *VidCfg)
ganlikun 0:06036f8bee2d 640 {
ganlikun 0:06036f8bee2d 641 /* Process locked */
ganlikun 0:06036f8bee2d 642 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 643
ganlikun 0:06036f8bee2d 644 /* Check the parameters */
ganlikun 0:06036f8bee2d 645 assert_param(IS_DSI_COLOR_CODING(VidCfg->ColorCoding));
ganlikun 0:06036f8bee2d 646 assert_param(IS_DSI_VIDEO_MODE_TYPE(VidCfg->Mode));
ganlikun 0:06036f8bee2d 647 assert_param(IS_DSI_LP_COMMAND(VidCfg->LPCommandEnable));
ganlikun 0:06036f8bee2d 648 assert_param(IS_DSI_LP_HFP(VidCfg->LPHorizontalFrontPorchEnable));
ganlikun 0:06036f8bee2d 649 assert_param(IS_DSI_LP_HBP(VidCfg->LPHorizontalBackPorchEnable));
ganlikun 0:06036f8bee2d 650 assert_param(IS_DSI_LP_VACTIVE(VidCfg->LPVerticalActiveEnable));
ganlikun 0:06036f8bee2d 651 assert_param(IS_DSI_LP_VFP(VidCfg->LPVerticalFrontPorchEnable));
ganlikun 0:06036f8bee2d 652 assert_param(IS_DSI_LP_VBP(VidCfg->LPVerticalBackPorchEnable));
ganlikun 0:06036f8bee2d 653 assert_param(IS_DSI_LP_VSYNC(VidCfg->LPVerticalSyncActiveEnable));
ganlikun 0:06036f8bee2d 654 assert_param(IS_DSI_FBTAA(VidCfg->FrameBTAAcknowledgeEnable));
ganlikun 0:06036f8bee2d 655 assert_param(IS_DSI_DE_POLARITY(VidCfg->DEPolarity));
ganlikun 0:06036f8bee2d 656 assert_param(IS_DSI_VSYNC_POLARITY(VidCfg->VSPolarity));
ganlikun 0:06036f8bee2d 657 assert_param(IS_DSI_HSYNC_POLARITY(VidCfg->HSPolarity));
ganlikun 0:06036f8bee2d 658 /* Check the LooselyPacked variant only in 18-bit mode */
ganlikun 0:06036f8bee2d 659 if(VidCfg->ColorCoding == DSI_RGB666)
ganlikun 0:06036f8bee2d 660 {
ganlikun 0:06036f8bee2d 661 assert_param(IS_DSI_LOOSELY_PACKED(VidCfg->LooselyPacked));
ganlikun 0:06036f8bee2d 662 }
ganlikun 0:06036f8bee2d 663
ganlikun 0:06036f8bee2d 664 /* Select video mode by resetting CMDM and DSIM bits */
ganlikun 0:06036f8bee2d 665 hdsi->Instance->MCR &= ~DSI_MCR_CMDM;
ganlikun 0:06036f8bee2d 666 hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
ganlikun 0:06036f8bee2d 667
ganlikun 0:06036f8bee2d 668 /* Configure the video mode transmission type */
ganlikun 0:06036f8bee2d 669 hdsi->Instance->VMCR &= ~DSI_VMCR_VMT;
ganlikun 0:06036f8bee2d 670 hdsi->Instance->VMCR |= VidCfg->Mode;
ganlikun 0:06036f8bee2d 671
ganlikun 0:06036f8bee2d 672 /* Configure the video packet size */
ganlikun 0:06036f8bee2d 673 hdsi->Instance->VPCR &= ~DSI_VPCR_VPSIZE;
ganlikun 0:06036f8bee2d 674 hdsi->Instance->VPCR |= VidCfg->PacketSize;
ganlikun 0:06036f8bee2d 675
ganlikun 0:06036f8bee2d 676 /* Set the chunks number to be transmitted through the DSI link */
ganlikun 0:06036f8bee2d 677 hdsi->Instance->VCCR &= ~DSI_VCCR_NUMC;
ganlikun 0:06036f8bee2d 678 hdsi->Instance->VCCR |= VidCfg->NumberOfChunks;
ganlikun 0:06036f8bee2d 679
ganlikun 0:06036f8bee2d 680 /* Set the size of the null packet */
ganlikun 0:06036f8bee2d 681 hdsi->Instance->VNPCR &= ~DSI_VNPCR_NPSIZE;
ganlikun 0:06036f8bee2d 682 hdsi->Instance->VNPCR |= VidCfg->NullPacketSize;
ganlikun 0:06036f8bee2d 683
ganlikun 0:06036f8bee2d 684 /* Select the virtual channel for the LTDC interface traffic */
ganlikun 0:06036f8bee2d 685 hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
ganlikun 0:06036f8bee2d 686 hdsi->Instance->LVCIDR |= VidCfg->VirtualChannelID;
ganlikun 0:06036f8bee2d 687
ganlikun 0:06036f8bee2d 688 /* Configure the polarity of control signals */
ganlikun 0:06036f8bee2d 689 hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP);
ganlikun 0:06036f8bee2d 690 hdsi->Instance->LPCR |= (VidCfg->DEPolarity | VidCfg->VSPolarity | VidCfg->HSPolarity);
ganlikun 0:06036f8bee2d 691
ganlikun 0:06036f8bee2d 692 /* Select the color coding for the host */
ganlikun 0:06036f8bee2d 693 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
ganlikun 0:06036f8bee2d 694 hdsi->Instance->LCOLCR |= VidCfg->ColorCoding;
ganlikun 0:06036f8bee2d 695
ganlikun 0:06036f8bee2d 696 /* Select the color coding for the wrapper */
ganlikun 0:06036f8bee2d 697 hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
ganlikun 0:06036f8bee2d 698 hdsi->Instance->WCFGR |= ((VidCfg->ColorCoding)<<1U);
ganlikun 0:06036f8bee2d 699
ganlikun 0:06036f8bee2d 700 /* Enable/disable the loosely packed variant to 18-bit configuration */
ganlikun 0:06036f8bee2d 701 if(VidCfg->ColorCoding == DSI_RGB666)
ganlikun 0:06036f8bee2d 702 {
ganlikun 0:06036f8bee2d 703 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_LPE;
ganlikun 0:06036f8bee2d 704 hdsi->Instance->LCOLCR |= VidCfg->LooselyPacked;
ganlikun 0:06036f8bee2d 705 }
ganlikun 0:06036f8bee2d 706
ganlikun 0:06036f8bee2d 707 /* Set the Horizontal Synchronization Active (HSA) in lane byte clock cycles */
ganlikun 0:06036f8bee2d 708 hdsi->Instance->VHSACR &= ~DSI_VHSACR_HSA;
ganlikun 0:06036f8bee2d 709 hdsi->Instance->VHSACR |= VidCfg->HorizontalSyncActive;
ganlikun 0:06036f8bee2d 710
ganlikun 0:06036f8bee2d 711 /* Set the Horizontal Back Porch (HBP) in lane byte clock cycles */
ganlikun 0:06036f8bee2d 712 hdsi->Instance->VHBPCR &= ~DSI_VHBPCR_HBP;
ganlikun 0:06036f8bee2d 713 hdsi->Instance->VHBPCR |= VidCfg->HorizontalBackPorch;
ganlikun 0:06036f8bee2d 714
ganlikun 0:06036f8bee2d 715 /* Set the total line time (HLINE=HSA+HBP+HACT+HFP) in lane byte clock cycles */
ganlikun 0:06036f8bee2d 716 hdsi->Instance->VLCR &= ~DSI_VLCR_HLINE;
ganlikun 0:06036f8bee2d 717 hdsi->Instance->VLCR |= VidCfg->HorizontalLine;
ganlikun 0:06036f8bee2d 718
ganlikun 0:06036f8bee2d 719 /* Set the Vertical Synchronization Active (VSA) */
ganlikun 0:06036f8bee2d 720 hdsi->Instance->VVSACR &= ~DSI_VVSACR_VSA;
ganlikun 0:06036f8bee2d 721 hdsi->Instance->VVSACR |= VidCfg->VerticalSyncActive;
ganlikun 0:06036f8bee2d 722
ganlikun 0:06036f8bee2d 723 /* Set the Vertical Back Porch (VBP)*/
ganlikun 0:06036f8bee2d 724 hdsi->Instance->VVBPCR &= ~DSI_VVBPCR_VBP;
ganlikun 0:06036f8bee2d 725 hdsi->Instance->VVBPCR |= VidCfg->VerticalBackPorch;
ganlikun 0:06036f8bee2d 726
ganlikun 0:06036f8bee2d 727 /* Set the Vertical Front Porch (VFP)*/
ganlikun 0:06036f8bee2d 728 hdsi->Instance->VVFPCR &= ~DSI_VVFPCR_VFP;
ganlikun 0:06036f8bee2d 729 hdsi->Instance->VVFPCR |= VidCfg->VerticalFrontPorch;
ganlikun 0:06036f8bee2d 730
ganlikun 0:06036f8bee2d 731 /* Set the Vertical Active period*/
ganlikun 0:06036f8bee2d 732 hdsi->Instance->VVACR &= ~DSI_VVACR_VA;
ganlikun 0:06036f8bee2d 733 hdsi->Instance->VVACR |= VidCfg->VerticalActive;
ganlikun 0:06036f8bee2d 734
ganlikun 0:06036f8bee2d 735 /* Configure the command transmission mode */
ganlikun 0:06036f8bee2d 736 hdsi->Instance->VMCR &= ~DSI_VMCR_LPCE;
ganlikun 0:06036f8bee2d 737 hdsi->Instance->VMCR |= VidCfg->LPCommandEnable;
ganlikun 0:06036f8bee2d 738
ganlikun 0:06036f8bee2d 739 /* Low power largest packet size */
ganlikun 0:06036f8bee2d 740 hdsi->Instance->LPMCR &= ~DSI_LPMCR_LPSIZE;
ganlikun 0:06036f8bee2d 741 hdsi->Instance->LPMCR |= ((VidCfg->LPLargestPacketSize)<<16U);
ganlikun 0:06036f8bee2d 742
ganlikun 0:06036f8bee2d 743 /* Low power VACT largest packet size */
ganlikun 0:06036f8bee2d 744 hdsi->Instance->LPMCR &= ~DSI_LPMCR_VLPSIZE;
ganlikun 0:06036f8bee2d 745 hdsi->Instance->LPMCR |= VidCfg->LPVACTLargestPacketSize;
ganlikun 0:06036f8bee2d 746
ganlikun 0:06036f8bee2d 747 /* Enable LP transition in HFP period */
ganlikun 0:06036f8bee2d 748 hdsi->Instance->VMCR &= ~DSI_VMCR_LPHFPE;
ganlikun 0:06036f8bee2d 749 hdsi->Instance->VMCR |= VidCfg->LPHorizontalFrontPorchEnable;
ganlikun 0:06036f8bee2d 750
ganlikun 0:06036f8bee2d 751 /* Enable LP transition in HBP period */
ganlikun 0:06036f8bee2d 752 hdsi->Instance->VMCR &= ~DSI_VMCR_LPHBPE;
ganlikun 0:06036f8bee2d 753 hdsi->Instance->VMCR |= VidCfg->LPHorizontalBackPorchEnable;
ganlikun 0:06036f8bee2d 754
ganlikun 0:06036f8bee2d 755 /* Enable LP transition in VACT period */
ganlikun 0:06036f8bee2d 756 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVAE;
ganlikun 0:06036f8bee2d 757 hdsi->Instance->VMCR |= VidCfg->LPVerticalActiveEnable;
ganlikun 0:06036f8bee2d 758
ganlikun 0:06036f8bee2d 759 /* Enable LP transition in VFP period */
ganlikun 0:06036f8bee2d 760 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVFPE;
ganlikun 0:06036f8bee2d 761 hdsi->Instance->VMCR |= VidCfg->LPVerticalFrontPorchEnable;
ganlikun 0:06036f8bee2d 762
ganlikun 0:06036f8bee2d 763 /* Enable LP transition in VBP period */
ganlikun 0:06036f8bee2d 764 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVBPE;
ganlikun 0:06036f8bee2d 765 hdsi->Instance->VMCR |= VidCfg->LPVerticalBackPorchEnable;
ganlikun 0:06036f8bee2d 766
ganlikun 0:06036f8bee2d 767 /* Enable LP transition in vertical sync period */
ganlikun 0:06036f8bee2d 768 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVSAE;
ganlikun 0:06036f8bee2d 769 hdsi->Instance->VMCR |= VidCfg->LPVerticalSyncActiveEnable;
ganlikun 0:06036f8bee2d 770
ganlikun 0:06036f8bee2d 771 /* Enable the request for an acknowledge response at the end of a frame */
ganlikun 0:06036f8bee2d 772 hdsi->Instance->VMCR &= ~DSI_VMCR_FBTAAE;
ganlikun 0:06036f8bee2d 773 hdsi->Instance->VMCR |= VidCfg->FrameBTAAcknowledgeEnable;
ganlikun 0:06036f8bee2d 774
ganlikun 0:06036f8bee2d 775 /* Process unlocked */
ganlikun 0:06036f8bee2d 776 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 777
ganlikun 0:06036f8bee2d 778 return HAL_OK;
ganlikun 0:06036f8bee2d 779 }
ganlikun 0:06036f8bee2d 780
ganlikun 0:06036f8bee2d 781 /**
ganlikun 0:06036f8bee2d 782 * @brief Select adapted command mode and configure the corresponding parameters
ganlikun 0:06036f8bee2d 783 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 784 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 785 * @param CmdCfg: pointer to a DSI_CmdCfgTypeDef structure that contains
ganlikun 0:06036f8bee2d 786 * the DSI command mode configuration parameters
ganlikun 0:06036f8bee2d 787 * @retval HAL status
ganlikun 0:06036f8bee2d 788 */
ganlikun 0:06036f8bee2d 789 HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef *hdsi, DSI_CmdCfgTypeDef *CmdCfg)
ganlikun 0:06036f8bee2d 790 {
ganlikun 0:06036f8bee2d 791 /* Process locked */
ganlikun 0:06036f8bee2d 792 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 793
ganlikun 0:06036f8bee2d 794 /* Check the parameters */
ganlikun 0:06036f8bee2d 795 assert_param(IS_DSI_COLOR_CODING(CmdCfg->ColorCoding));
ganlikun 0:06036f8bee2d 796 assert_param(IS_DSI_TE_SOURCE(CmdCfg->TearingEffectSource));
ganlikun 0:06036f8bee2d 797 assert_param(IS_DSI_TE_POLARITY(CmdCfg->TearingEffectPolarity));
ganlikun 0:06036f8bee2d 798 assert_param(IS_DSI_AUTOMATIC_REFRESH(CmdCfg->AutomaticRefresh));
ganlikun 0:06036f8bee2d 799 assert_param(IS_DSI_VS_POLARITY(CmdCfg->VSyncPol));
ganlikun 0:06036f8bee2d 800 assert_param(IS_DSI_TE_ACK_REQUEST(CmdCfg->TEAcknowledgeRequest));
ganlikun 0:06036f8bee2d 801 assert_param(IS_DSI_DE_POLARITY(CmdCfg->DEPolarity));
ganlikun 0:06036f8bee2d 802 assert_param(IS_DSI_VSYNC_POLARITY(CmdCfg->VSPolarity));
ganlikun 0:06036f8bee2d 803 assert_param(IS_DSI_HSYNC_POLARITY(CmdCfg->HSPolarity));
ganlikun 0:06036f8bee2d 804
ganlikun 0:06036f8bee2d 805 /* Select command mode by setting CMDM and DSIM bits */
ganlikun 0:06036f8bee2d 806 hdsi->Instance->MCR |= DSI_MCR_CMDM;
ganlikun 0:06036f8bee2d 807 hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
ganlikun 0:06036f8bee2d 808 hdsi->Instance->WCFGR |= DSI_WCFGR_DSIM;
ganlikun 0:06036f8bee2d 809
ganlikun 0:06036f8bee2d 810 /* Select the virtual channel for the LTDC interface traffic */
ganlikun 0:06036f8bee2d 811 hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
ganlikun 0:06036f8bee2d 812 hdsi->Instance->LVCIDR |= CmdCfg->VirtualChannelID;
ganlikun 0:06036f8bee2d 813
ganlikun 0:06036f8bee2d 814 /* Configure the polarity of control signals */
ganlikun 0:06036f8bee2d 815 hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP);
ganlikun 0:06036f8bee2d 816 hdsi->Instance->LPCR |= (CmdCfg->DEPolarity | CmdCfg->VSPolarity | CmdCfg->HSPolarity);
ganlikun 0:06036f8bee2d 817
ganlikun 0:06036f8bee2d 818 /* Select the color coding for the host */
ganlikun 0:06036f8bee2d 819 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
ganlikun 0:06036f8bee2d 820 hdsi->Instance->LCOLCR |= CmdCfg->ColorCoding;
ganlikun 0:06036f8bee2d 821
ganlikun 0:06036f8bee2d 822 /* Select the color coding for the wrapper */
ganlikun 0:06036f8bee2d 823 hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
ganlikun 0:06036f8bee2d 824 hdsi->Instance->WCFGR |= ((CmdCfg->ColorCoding)<<1U);
ganlikun 0:06036f8bee2d 825
ganlikun 0:06036f8bee2d 826 /* Configure the maximum allowed size for write memory command */
ganlikun 0:06036f8bee2d 827 hdsi->Instance->LCCR &= ~DSI_LCCR_CMDSIZE;
ganlikun 0:06036f8bee2d 828 hdsi->Instance->LCCR |= CmdCfg->CommandSize;
ganlikun 0:06036f8bee2d 829
ganlikun 0:06036f8bee2d 830 /* Configure the tearing effect source and polarity and select the refresh mode */
ganlikun 0:06036f8bee2d 831 hdsi->Instance->WCFGR &= ~(DSI_WCFGR_TESRC | DSI_WCFGR_TEPOL | DSI_WCFGR_AR | DSI_WCFGR_VSPOL);
ganlikun 0:06036f8bee2d 832 hdsi->Instance->WCFGR |= (CmdCfg->TearingEffectSource | CmdCfg->TearingEffectPolarity | CmdCfg->AutomaticRefresh | CmdCfg->VSyncPol);
ganlikun 0:06036f8bee2d 833
ganlikun 0:06036f8bee2d 834 /* Configure the tearing effect acknowledge request */
ganlikun 0:06036f8bee2d 835 hdsi->Instance->CMCR &= ~DSI_CMCR_TEARE;
ganlikun 0:06036f8bee2d 836 hdsi->Instance->CMCR |= CmdCfg->TEAcknowledgeRequest;
ganlikun 0:06036f8bee2d 837
ganlikun 0:06036f8bee2d 838 /* Enable the Tearing Effect interrupt */
ganlikun 0:06036f8bee2d 839 __HAL_DSI_ENABLE_IT(hdsi, DSI_IT_TE);
ganlikun 0:06036f8bee2d 840
ganlikun 0:06036f8bee2d 841 /* Enable the End of Refresh interrupt */
ganlikun 0:06036f8bee2d 842 __HAL_DSI_ENABLE_IT(hdsi, DSI_IT_ER);
ganlikun 0:06036f8bee2d 843
ganlikun 0:06036f8bee2d 844 /* Process unlocked */
ganlikun 0:06036f8bee2d 845 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 846
ganlikun 0:06036f8bee2d 847 return HAL_OK;
ganlikun 0:06036f8bee2d 848 }
ganlikun 0:06036f8bee2d 849
ganlikun 0:06036f8bee2d 850 /**
ganlikun 0:06036f8bee2d 851 * @brief Configure command transmission mode: High-speed or Low-power
ganlikun 0:06036f8bee2d 852 * and enable/disable acknowledge request after packet transmission
ganlikun 0:06036f8bee2d 853 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 854 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 855 * @param LPCmd: pointer to a DSI_LPCmdTypeDef structure that contains
ganlikun 0:06036f8bee2d 856 * the DSI command transmission mode configuration parameters
ganlikun 0:06036f8bee2d 857 * @retval HAL status
ganlikun 0:06036f8bee2d 858 */
ganlikun 0:06036f8bee2d 859 HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef *hdsi, DSI_LPCmdTypeDef *LPCmd)
ganlikun 0:06036f8bee2d 860 {
ganlikun 0:06036f8bee2d 861 /* Process locked */
ganlikun 0:06036f8bee2d 862 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 863
ganlikun 0:06036f8bee2d 864 assert_param(IS_DSI_LP_GSW0P(LPCmd->LPGenShortWriteNoP));
ganlikun 0:06036f8bee2d 865 assert_param(IS_DSI_LP_GSW1P(LPCmd->LPGenShortWriteOneP));
ganlikun 0:06036f8bee2d 866 assert_param(IS_DSI_LP_GSW2P(LPCmd->LPGenShortWriteTwoP));
ganlikun 0:06036f8bee2d 867 assert_param(IS_DSI_LP_GSR0P(LPCmd->LPGenShortReadNoP));
ganlikun 0:06036f8bee2d 868 assert_param(IS_DSI_LP_GSR1P(LPCmd->LPGenShortReadOneP));
ganlikun 0:06036f8bee2d 869 assert_param(IS_DSI_LP_GSR2P(LPCmd->LPGenShortReadTwoP));
ganlikun 0:06036f8bee2d 870 assert_param(IS_DSI_LP_GLW(LPCmd->LPGenLongWrite));
ganlikun 0:06036f8bee2d 871 assert_param(IS_DSI_LP_DSW0P(LPCmd->LPDcsShortWriteNoP));
ganlikun 0:06036f8bee2d 872 assert_param(IS_DSI_LP_DSW1P(LPCmd->LPDcsShortWriteOneP));
ganlikun 0:06036f8bee2d 873 assert_param(IS_DSI_LP_DSR0P(LPCmd->LPDcsShortReadNoP));
ganlikun 0:06036f8bee2d 874 assert_param(IS_DSI_LP_DLW(LPCmd->LPDcsLongWrite));
ganlikun 0:06036f8bee2d 875 assert_param(IS_DSI_LP_MRDP(LPCmd->LPMaxReadPacket));
ganlikun 0:06036f8bee2d 876 assert_param(IS_DSI_ACK_REQUEST(LPCmd->AcknowledgeRequest));
ganlikun 0:06036f8bee2d 877
ganlikun 0:06036f8bee2d 878 /* Select High-speed or Low-power for command transmission */
ganlikun 0:06036f8bee2d 879 hdsi->Instance->CMCR &= ~(DSI_CMCR_GSW0TX |\
ganlikun 0:06036f8bee2d 880 DSI_CMCR_GSW1TX |\
ganlikun 0:06036f8bee2d 881 DSI_CMCR_GSW2TX |\
ganlikun 0:06036f8bee2d 882 DSI_CMCR_GSR0TX |\
ganlikun 0:06036f8bee2d 883 DSI_CMCR_GSR1TX |\
ganlikun 0:06036f8bee2d 884 DSI_CMCR_GSR2TX |\
ganlikun 0:06036f8bee2d 885 DSI_CMCR_GLWTX |\
ganlikun 0:06036f8bee2d 886 DSI_CMCR_DSW0TX |\
ganlikun 0:06036f8bee2d 887 DSI_CMCR_DSW1TX |\
ganlikun 0:06036f8bee2d 888 DSI_CMCR_DSR0TX |\
ganlikun 0:06036f8bee2d 889 DSI_CMCR_DLWTX |\
ganlikun 0:06036f8bee2d 890 DSI_CMCR_MRDPS);
ganlikun 0:06036f8bee2d 891 hdsi->Instance->CMCR |= (LPCmd->LPGenShortWriteNoP |\
ganlikun 0:06036f8bee2d 892 LPCmd->LPGenShortWriteOneP |\
ganlikun 0:06036f8bee2d 893 LPCmd->LPGenShortWriteTwoP |\
ganlikun 0:06036f8bee2d 894 LPCmd->LPGenShortReadNoP |\
ganlikun 0:06036f8bee2d 895 LPCmd->LPGenShortReadOneP |\
ganlikun 0:06036f8bee2d 896 LPCmd->LPGenShortReadTwoP |\
ganlikun 0:06036f8bee2d 897 LPCmd->LPGenLongWrite |\
ganlikun 0:06036f8bee2d 898 LPCmd->LPDcsShortWriteNoP |\
ganlikun 0:06036f8bee2d 899 LPCmd->LPDcsShortWriteOneP |\
ganlikun 0:06036f8bee2d 900 LPCmd->LPDcsShortReadNoP |\
ganlikun 0:06036f8bee2d 901 LPCmd->LPDcsLongWrite |\
ganlikun 0:06036f8bee2d 902 LPCmd->LPMaxReadPacket);
ganlikun 0:06036f8bee2d 903
ganlikun 0:06036f8bee2d 904 /* Configure the acknowledge request after each packet transmission */
ganlikun 0:06036f8bee2d 905 hdsi->Instance->CMCR &= ~DSI_CMCR_ARE;
ganlikun 0:06036f8bee2d 906 hdsi->Instance->CMCR |= LPCmd->AcknowledgeRequest;
ganlikun 0:06036f8bee2d 907
ganlikun 0:06036f8bee2d 908 /* Process unlocked */
ganlikun 0:06036f8bee2d 909 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 910
ganlikun 0:06036f8bee2d 911 return HAL_OK;
ganlikun 0:06036f8bee2d 912 }
ganlikun 0:06036f8bee2d 913
ganlikun 0:06036f8bee2d 914 /**
ganlikun 0:06036f8bee2d 915 * @brief Configure the flow control parameters
ganlikun 0:06036f8bee2d 916 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 917 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 918 * @param FlowControl: flow control feature(s) to be enabled.
ganlikun 0:06036f8bee2d 919 * This parameter can be any combination of @ref DSI_FlowControl.
ganlikun 0:06036f8bee2d 920 * @retval HAL status
ganlikun 0:06036f8bee2d 921 */
ganlikun 0:06036f8bee2d 922 HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl)
ganlikun 0:06036f8bee2d 923 {
ganlikun 0:06036f8bee2d 924 /* Process locked */
ganlikun 0:06036f8bee2d 925 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 926
ganlikun 0:06036f8bee2d 927 /* Check the parameters */
ganlikun 0:06036f8bee2d 928 assert_param(IS_DSI_FLOW_CONTROL(FlowControl));
ganlikun 0:06036f8bee2d 929
ganlikun 0:06036f8bee2d 930 /* Set the DSI Host Protocol Configuration Register */
ganlikun 0:06036f8bee2d 931 hdsi->Instance->PCR &= ~DSI_FLOW_CONTROL_ALL;
ganlikun 0:06036f8bee2d 932 hdsi->Instance->PCR |= FlowControl;
ganlikun 0:06036f8bee2d 933
ganlikun 0:06036f8bee2d 934 /* Process unlocked */
ganlikun 0:06036f8bee2d 935 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 936
ganlikun 0:06036f8bee2d 937 return HAL_OK;
ganlikun 0:06036f8bee2d 938 }
ganlikun 0:06036f8bee2d 939
ganlikun 0:06036f8bee2d 940 /**
ganlikun 0:06036f8bee2d 941 * @brief Configure the DSI PHY timer parameters
ganlikun 0:06036f8bee2d 942 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 943 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 944 * @param PhyTimers: DSI_PHY_TimerTypeDef structure that contains
ganlikun 0:06036f8bee2d 945 * the DSI PHY timing parameters
ganlikun 0:06036f8bee2d 946 * @retval HAL status
ganlikun 0:06036f8bee2d 947 */
ganlikun 0:06036f8bee2d 948 HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef *hdsi, DSI_PHY_TimerTypeDef *PhyTimers)
ganlikun 0:06036f8bee2d 949 {
ganlikun 0:06036f8bee2d 950 uint32_t maxTime;
ganlikun 0:06036f8bee2d 951 /* Process locked */
ganlikun 0:06036f8bee2d 952 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 953
ganlikun 0:06036f8bee2d 954 maxTime = (PhyTimers->ClockLaneLP2HSTime > PhyTimers->ClockLaneHS2LPTime)? PhyTimers->ClockLaneLP2HSTime: PhyTimers->ClockLaneHS2LPTime;
ganlikun 0:06036f8bee2d 955
ganlikun 0:06036f8bee2d 956 /* Clock lane timer configuration */
ganlikun 0:06036f8bee2d 957
ganlikun 0:06036f8bee2d 958 /* In Automatic Clock Lane control mode, the DSI Host can turn off the clock lane between two
ganlikun 0:06036f8bee2d 959 High-Speed transmission.
ganlikun 0:06036f8bee2d 960 To do so, the DSI Host calculates the time required for the clock lane to change from HighSpeed
ganlikun 0:06036f8bee2d 961 to Low-Power and from Low-Power to High-Speed.
ganlikun 0:06036f8bee2d 962 This timings are configured by the HS2LP_TIME and LP2HS_TIME in the DSI Host Clock Lane Timer Configuration Register (DSI_CLTCR).
ganlikun 0:06036f8bee2d 963 But the DSI Host is not calculating LP2HS_TIME + HS2LP_TIME but 2 x HS2LP_TIME.
ganlikun 0:06036f8bee2d 964
ganlikun 0:06036f8bee2d 965 Workaround : Configure HS2LP_TIME and LP2HS_TIME with the same value being the max of HS2LP_TIME or LP2HS_TIME.
ganlikun 0:06036f8bee2d 966 */
ganlikun 0:06036f8bee2d 967 hdsi->Instance->CLTCR &= ~(DSI_CLTCR_LP2HS_TIME | DSI_CLTCR_HS2LP_TIME);
ganlikun 0:06036f8bee2d 968 hdsi->Instance->CLTCR |= (maxTime | ((maxTime)<<16U));
ganlikun 0:06036f8bee2d 969
ganlikun 0:06036f8bee2d 970 /* Data lane timer configuration */
ganlikun 0:06036f8bee2d 971 hdsi->Instance->DLTCR &= ~(DSI_DLTCR_MRD_TIME | DSI_DLTCR_LP2HS_TIME | DSI_DLTCR_HS2LP_TIME);
ganlikun 0:06036f8bee2d 972 hdsi->Instance->DLTCR |= (PhyTimers->DataLaneMaxReadTime | ((PhyTimers->DataLaneLP2HSTime)<<16U) | ((PhyTimers->DataLaneHS2LPTime)<<24U));
ganlikun 0:06036f8bee2d 973
ganlikun 0:06036f8bee2d 974 /* Configure the wait period to request HS transmission after a stop state */
ganlikun 0:06036f8bee2d 975 hdsi->Instance->PCONFR &= ~DSI_PCONFR_SW_TIME;
ganlikun 0:06036f8bee2d 976 hdsi->Instance->PCONFR |= ((PhyTimers->StopWaitTime)<<8U);
ganlikun 0:06036f8bee2d 977
ganlikun 0:06036f8bee2d 978 /* Process unlocked */
ganlikun 0:06036f8bee2d 979 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 980
ganlikun 0:06036f8bee2d 981 return HAL_OK;
ganlikun 0:06036f8bee2d 982 }
ganlikun 0:06036f8bee2d 983
ganlikun 0:06036f8bee2d 984 /**
ganlikun 0:06036f8bee2d 985 * @brief Configure the DSI HOST timeout parameters
ganlikun 0:06036f8bee2d 986 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 987 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 988 * @param HostTimeouts: DSI_HOST_TimeoutTypeDef structure that contains
ganlikun 0:06036f8bee2d 989 * the DSI host timeout parameters
ganlikun 0:06036f8bee2d 990 * @retval HAL status
ganlikun 0:06036f8bee2d 991 */
ganlikun 0:06036f8bee2d 992 HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef *hdsi, DSI_HOST_TimeoutTypeDef *HostTimeouts)
ganlikun 0:06036f8bee2d 993 {
ganlikun 0:06036f8bee2d 994 /* Process locked */
ganlikun 0:06036f8bee2d 995 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 996
ganlikun 0:06036f8bee2d 997 /* Set the timeout clock division factor */
ganlikun 0:06036f8bee2d 998 hdsi->Instance->CCR &= ~DSI_CCR_TOCKDIV;
ganlikun 0:06036f8bee2d 999 hdsi->Instance->CCR |= ((HostTimeouts->TimeoutCkdiv)<<8U);
ganlikun 0:06036f8bee2d 1000
ganlikun 0:06036f8bee2d 1001 /* High-speed transmission timeout */
ganlikun 0:06036f8bee2d 1002 hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_HSTX_TOCNT;
ganlikun 0:06036f8bee2d 1003 hdsi->Instance->TCCR[0U] |= ((HostTimeouts->HighSpeedTransmissionTimeout)<<16U);
ganlikun 0:06036f8bee2d 1004
ganlikun 0:06036f8bee2d 1005 /* Low-power reception timeout */
ganlikun 0:06036f8bee2d 1006 hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_LPRX_TOCNT;
ganlikun 0:06036f8bee2d 1007 hdsi->Instance->TCCR[0U] |= HostTimeouts->LowPowerReceptionTimeout;
ganlikun 0:06036f8bee2d 1008
ganlikun 0:06036f8bee2d 1009 /* High-speed read timeout */
ganlikun 0:06036f8bee2d 1010 hdsi->Instance->TCCR[1U] &= ~DSI_TCCR1_HSRD_TOCNT;
ganlikun 0:06036f8bee2d 1011 hdsi->Instance->TCCR[1U] |= HostTimeouts->HighSpeedReadTimeout;
ganlikun 0:06036f8bee2d 1012
ganlikun 0:06036f8bee2d 1013 /* Low-power read timeout */
ganlikun 0:06036f8bee2d 1014 hdsi->Instance->TCCR[2U] &= ~DSI_TCCR2_LPRD_TOCNT;
ganlikun 0:06036f8bee2d 1015 hdsi->Instance->TCCR[2U] |= HostTimeouts->LowPowerReadTimeout;
ganlikun 0:06036f8bee2d 1016
ganlikun 0:06036f8bee2d 1017 /* High-speed write timeout */
ganlikun 0:06036f8bee2d 1018 hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_HSWR_TOCNT;
ganlikun 0:06036f8bee2d 1019 hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWriteTimeout;
ganlikun 0:06036f8bee2d 1020
ganlikun 0:06036f8bee2d 1021 /* High-speed write presp mode */
ganlikun 0:06036f8bee2d 1022 hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_PM;
ganlikun 0:06036f8bee2d 1023 hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWritePrespMode;
ganlikun 0:06036f8bee2d 1024
ganlikun 0:06036f8bee2d 1025 /* Low-speed write timeout */
ganlikun 0:06036f8bee2d 1026 hdsi->Instance->TCCR[4U] &= ~DSI_TCCR4_LPWR_TOCNT;
ganlikun 0:06036f8bee2d 1027 hdsi->Instance->TCCR[4U] |= HostTimeouts->LowPowerWriteTimeout;
ganlikun 0:06036f8bee2d 1028
ganlikun 0:06036f8bee2d 1029 /* BTA timeout */
ganlikun 0:06036f8bee2d 1030 hdsi->Instance->TCCR[5U] &= ~DSI_TCCR5_BTA_TOCNT;
ganlikun 0:06036f8bee2d 1031 hdsi->Instance->TCCR[5U] |= HostTimeouts->BTATimeout;
ganlikun 0:06036f8bee2d 1032
ganlikun 0:06036f8bee2d 1033 /* Process unlocked */
ganlikun 0:06036f8bee2d 1034 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1035
ganlikun 0:06036f8bee2d 1036 return HAL_OK;
ganlikun 0:06036f8bee2d 1037 }
ganlikun 0:06036f8bee2d 1038
ganlikun 0:06036f8bee2d 1039 /**
ganlikun 0:06036f8bee2d 1040 * @brief Start the DSI module
ganlikun 0:06036f8bee2d 1041 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1042 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1043 * @retval HAL status
ganlikun 0:06036f8bee2d 1044 */
ganlikun 0:06036f8bee2d 1045 HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1046 {
ganlikun 0:06036f8bee2d 1047 /* Process locked */
ganlikun 0:06036f8bee2d 1048 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1049
ganlikun 0:06036f8bee2d 1050 /* Enable the DSI host */
ganlikun 0:06036f8bee2d 1051 __HAL_DSI_ENABLE(hdsi);
ganlikun 0:06036f8bee2d 1052
ganlikun 0:06036f8bee2d 1053 /* Enable the DSI wrapper */
ganlikun 0:06036f8bee2d 1054 __HAL_DSI_WRAPPER_ENABLE(hdsi);
ganlikun 0:06036f8bee2d 1055
ganlikun 0:06036f8bee2d 1056 /* Process unlocked */
ganlikun 0:06036f8bee2d 1057 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1058
ganlikun 0:06036f8bee2d 1059 return HAL_OK;
ganlikun 0:06036f8bee2d 1060 }
ganlikun 0:06036f8bee2d 1061
ganlikun 0:06036f8bee2d 1062 /**
ganlikun 0:06036f8bee2d 1063 * @brief Stop the DSI module
ganlikun 0:06036f8bee2d 1064 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1065 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1066 * @retval HAL status
ganlikun 0:06036f8bee2d 1067 */
ganlikun 0:06036f8bee2d 1068 HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1069 {
ganlikun 0:06036f8bee2d 1070 /* Process locked */
ganlikun 0:06036f8bee2d 1071 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1072
ganlikun 0:06036f8bee2d 1073 /* Disable the DSI host */
ganlikun 0:06036f8bee2d 1074 __HAL_DSI_DISABLE(hdsi);
ganlikun 0:06036f8bee2d 1075
ganlikun 0:06036f8bee2d 1076 /* Disable the DSI wrapper */
ganlikun 0:06036f8bee2d 1077 __HAL_DSI_WRAPPER_DISABLE(hdsi);
ganlikun 0:06036f8bee2d 1078
ganlikun 0:06036f8bee2d 1079 /* Process unlocked */
ganlikun 0:06036f8bee2d 1080 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1081
ganlikun 0:06036f8bee2d 1082 return HAL_OK;
ganlikun 0:06036f8bee2d 1083 }
ganlikun 0:06036f8bee2d 1084
ganlikun 0:06036f8bee2d 1085 /**
ganlikun 0:06036f8bee2d 1086 * @brief Refresh the display in command mode
ganlikun 0:06036f8bee2d 1087 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1088 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1089 * @retval HAL status
ganlikun 0:06036f8bee2d 1090 */
ganlikun 0:06036f8bee2d 1091 HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1092 {
ganlikun 0:06036f8bee2d 1093 /* Process locked */
ganlikun 0:06036f8bee2d 1094 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1095
ganlikun 0:06036f8bee2d 1096 /* Update the display */
ganlikun 0:06036f8bee2d 1097 hdsi->Instance->WCR |= DSI_WCR_LTDCEN;
ganlikun 0:06036f8bee2d 1098
ganlikun 0:06036f8bee2d 1099 /* Process unlocked */
ganlikun 0:06036f8bee2d 1100 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1101
ganlikun 0:06036f8bee2d 1102 return HAL_OK;
ganlikun 0:06036f8bee2d 1103 }
ganlikun 0:06036f8bee2d 1104
ganlikun 0:06036f8bee2d 1105 /**
ganlikun 0:06036f8bee2d 1106 * @brief Controls the display color mode in Video mode
ganlikun 0:06036f8bee2d 1107 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1108 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1109 * @param ColorMode: Color mode (full or 8-colors).
ganlikun 0:06036f8bee2d 1110 * This parameter can be any value of @ref DSI_Color_Mode
ganlikun 0:06036f8bee2d 1111 * @retval HAL status
ganlikun 0:06036f8bee2d 1112 */
ganlikun 0:06036f8bee2d 1113 HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode)
ganlikun 0:06036f8bee2d 1114 {
ganlikun 0:06036f8bee2d 1115 /* Process locked */
ganlikun 0:06036f8bee2d 1116 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1117
ganlikun 0:06036f8bee2d 1118 /* Check the parameters */
ganlikun 0:06036f8bee2d 1119 assert_param(IS_DSI_COLOR_MODE(ColorMode));
ganlikun 0:06036f8bee2d 1120
ganlikun 0:06036f8bee2d 1121 /* Update the display color mode */
ganlikun 0:06036f8bee2d 1122 hdsi->Instance->WCR &= ~DSI_WCR_COLM;
ganlikun 0:06036f8bee2d 1123 hdsi->Instance->WCR |= ColorMode;
ganlikun 0:06036f8bee2d 1124
ganlikun 0:06036f8bee2d 1125 /* Process unlocked */
ganlikun 0:06036f8bee2d 1126 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1127
ganlikun 0:06036f8bee2d 1128 return HAL_OK;
ganlikun 0:06036f8bee2d 1129 }
ganlikun 0:06036f8bee2d 1130
ganlikun 0:06036f8bee2d 1131 /**
ganlikun 0:06036f8bee2d 1132 * @brief Control the display shutdown in Video mode
ganlikun 0:06036f8bee2d 1133 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1134 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1135 * @param Shutdown: Shut-down (Display-ON or Display-OFF).
ganlikun 0:06036f8bee2d 1136 * This parameter can be any value of @ref DSI_ShutDown
ganlikun 0:06036f8bee2d 1137 * @retval HAL status
ganlikun 0:06036f8bee2d 1138 */
ganlikun 0:06036f8bee2d 1139 HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown)
ganlikun 0:06036f8bee2d 1140 {
ganlikun 0:06036f8bee2d 1141 /* Process locked */
ganlikun 0:06036f8bee2d 1142 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1143
ganlikun 0:06036f8bee2d 1144 /* Check the parameters */
ganlikun 0:06036f8bee2d 1145 assert_param(IS_DSI_SHUT_DOWN(Shutdown));
ganlikun 0:06036f8bee2d 1146
ganlikun 0:06036f8bee2d 1147 /* Update the display Shutdown */
ganlikun 0:06036f8bee2d 1148 hdsi->Instance->WCR &= ~DSI_WCR_SHTDN;
ganlikun 0:06036f8bee2d 1149 hdsi->Instance->WCR |= Shutdown;
ganlikun 0:06036f8bee2d 1150
ganlikun 0:06036f8bee2d 1151 /* Process unlocked */
ganlikun 0:06036f8bee2d 1152 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1153
ganlikun 0:06036f8bee2d 1154 return HAL_OK;
ganlikun 0:06036f8bee2d 1155 }
ganlikun 0:06036f8bee2d 1156
ganlikun 0:06036f8bee2d 1157 /**
ganlikun 0:06036f8bee2d 1158 * @brief DCS or Generic short write command
ganlikun 0:06036f8bee2d 1159 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1160 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1161 * @param ChannelID: Virtual channel ID.
ganlikun 0:06036f8bee2d 1162 * @param Mode: DSI short packet data type.
ganlikun 0:06036f8bee2d 1163 * This parameter can be any value of @ref DSI_SHORT_WRITE_PKT_Data_Type.
ganlikun 0:06036f8bee2d 1164 * @param Param1: DSC command or first generic parameter.
ganlikun 0:06036f8bee2d 1165 * This parameter can be any value of @ref DSI_DCS_Command or a
ganlikun 0:06036f8bee2d 1166 * generic command code.
ganlikun 0:06036f8bee2d 1167 * @param Param2: DSC parameter or second generic parameter.
ganlikun 0:06036f8bee2d 1168 * @retval HAL status
ganlikun 0:06036f8bee2d 1169 */
ganlikun 0:06036f8bee2d 1170 HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
ganlikun 0:06036f8bee2d 1171 uint32_t ChannelID,
ganlikun 0:06036f8bee2d 1172 uint32_t Mode,
ganlikun 0:06036f8bee2d 1173 uint32_t Param1,
ganlikun 0:06036f8bee2d 1174 uint32_t Param2)
ganlikun 0:06036f8bee2d 1175 {
ganlikun 0:06036f8bee2d 1176 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 1177
ganlikun 0:06036f8bee2d 1178 /* Process locked */
ganlikun 0:06036f8bee2d 1179 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1180
ganlikun 0:06036f8bee2d 1181 /* Check the parameters */
ganlikun 0:06036f8bee2d 1182 assert_param(IS_DSI_SHORT_WRITE_PACKET_TYPE(Mode));
ganlikun 0:06036f8bee2d 1183
ganlikun 0:06036f8bee2d 1184 /* Get tick */
ganlikun 0:06036f8bee2d 1185 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1186
ganlikun 0:06036f8bee2d 1187 /* Wait for Command FIFO Empty */
ganlikun 0:06036f8bee2d 1188 while((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == 0U)
ganlikun 0:06036f8bee2d 1189 {
ganlikun 0:06036f8bee2d 1190 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1191 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1192 {
ganlikun 0:06036f8bee2d 1193 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1194 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1195
ganlikun 0:06036f8bee2d 1196 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1197 }
ganlikun 0:06036f8bee2d 1198 }
ganlikun 0:06036f8bee2d 1199
ganlikun 0:06036f8bee2d 1200 /* Configure the packet to send a short DCS command with 0 or 1 parameter */
ganlikun 0:06036f8bee2d 1201 DSI_ConfigPacketHeader(hdsi->Instance,
ganlikun 0:06036f8bee2d 1202 ChannelID,
ganlikun 0:06036f8bee2d 1203 Mode,
ganlikun 0:06036f8bee2d 1204 Param1,
ganlikun 0:06036f8bee2d 1205 Param2);
ganlikun 0:06036f8bee2d 1206
ganlikun 0:06036f8bee2d 1207 /* Process unlocked */
ganlikun 0:06036f8bee2d 1208 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1209
ganlikun 0:06036f8bee2d 1210 return HAL_OK;
ganlikun 0:06036f8bee2d 1211 }
ganlikun 0:06036f8bee2d 1212
ganlikun 0:06036f8bee2d 1213 /**
ganlikun 0:06036f8bee2d 1214 * @brief DCS or Generic long write command
ganlikun 0:06036f8bee2d 1215 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1216 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1217 * @param ChannelID: Virtual channel ID.
ganlikun 0:06036f8bee2d 1218 * @param Mode: DSI long packet data type.
ganlikun 0:06036f8bee2d 1219 * This parameter can be any value of @ref DSI_LONG_WRITE_PKT_Data_Type.
ganlikun 0:06036f8bee2d 1220 * @param NbParams: Number of parameters.
ganlikun 0:06036f8bee2d 1221 * @param Param1: DSC command or first generic parameter.
ganlikun 0:06036f8bee2d 1222 * This parameter can be any value of @ref DSI_DCS_Command or a
ganlikun 0:06036f8bee2d 1223 * generic command code
ganlikun 0:06036f8bee2d 1224 * @param ParametersTable: Pointer to parameter values table.
ganlikun 0:06036f8bee2d 1225 * @retval HAL status
ganlikun 0:06036f8bee2d 1226 */
ganlikun 0:06036f8bee2d 1227 HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
ganlikun 0:06036f8bee2d 1228 uint32_t ChannelID,
ganlikun 0:06036f8bee2d 1229 uint32_t Mode,
ganlikun 0:06036f8bee2d 1230 uint32_t NbParams,
ganlikun 0:06036f8bee2d 1231 uint32_t Param1,
ganlikun 0:06036f8bee2d 1232 uint8_t* ParametersTable)
ganlikun 0:06036f8bee2d 1233 {
ganlikun 0:06036f8bee2d 1234 uint32_t uicounter = 0U, nbBytes = 0U, count = 0U;
ganlikun 0:06036f8bee2d 1235 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 1236 uint32_t fifoword = 0U;
ganlikun 0:06036f8bee2d 1237
ganlikun 0:06036f8bee2d 1238 /* Process locked */
ganlikun 0:06036f8bee2d 1239 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1240
ganlikun 0:06036f8bee2d 1241 /* Check the parameters */
ganlikun 0:06036f8bee2d 1242 assert_param(IS_DSI_LONG_WRITE_PACKET_TYPE(Mode));
ganlikun 0:06036f8bee2d 1243
ganlikun 0:06036f8bee2d 1244 /* Get tick */
ganlikun 0:06036f8bee2d 1245 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1246
ganlikun 0:06036f8bee2d 1247 /* Wait for Command FIFO Empty */
ganlikun 0:06036f8bee2d 1248 while((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == RESET)
ganlikun 0:06036f8bee2d 1249 {
ganlikun 0:06036f8bee2d 1250 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1251 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1252 {
ganlikun 0:06036f8bee2d 1253 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1254 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1255
ganlikun 0:06036f8bee2d 1256 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1257 }
ganlikun 0:06036f8bee2d 1258 }
ganlikun 0:06036f8bee2d 1259
ganlikun 0:06036f8bee2d 1260 /* Set the DCS code on payload byte 1, and the other parameters on the write FIFO command*/
ganlikun 0:06036f8bee2d 1261 fifoword = Param1;
ganlikun 0:06036f8bee2d 1262 nbBytes = (NbParams < 3U) ? NbParams : 3U;
ganlikun 0:06036f8bee2d 1263
ganlikun 0:06036f8bee2d 1264 for(count = 0U; count < nbBytes; count++)
ganlikun 0:06036f8bee2d 1265 {
ganlikun 0:06036f8bee2d 1266 fifoword |= (((uint32_t)(*(ParametersTable + count))) << (8U + (8U*count)));
ganlikun 0:06036f8bee2d 1267 }
ganlikun 0:06036f8bee2d 1268 hdsi->Instance->GPDR = fifoword;
ganlikun 0:06036f8bee2d 1269
ganlikun 0:06036f8bee2d 1270 uicounter = NbParams - nbBytes;
ganlikun 0:06036f8bee2d 1271 ParametersTable += nbBytes;
ganlikun 0:06036f8bee2d 1272 /* Set the Next parameters on the write FIFO command*/
ganlikun 0:06036f8bee2d 1273 while(uicounter != 0U)
ganlikun 0:06036f8bee2d 1274 {
ganlikun 0:06036f8bee2d 1275 nbBytes = (uicounter < 4U) ? uicounter : 4U;
ganlikun 0:06036f8bee2d 1276 fifoword = 0U;
ganlikun 0:06036f8bee2d 1277 for(count = 0U; count < nbBytes; count++)
ganlikun 0:06036f8bee2d 1278 {
ganlikun 0:06036f8bee2d 1279 fifoword |= (((uint32_t)(*(ParametersTable + count))) << (8U*count));
ganlikun 0:06036f8bee2d 1280 }
ganlikun 0:06036f8bee2d 1281 hdsi->Instance->GPDR = fifoword;
ganlikun 0:06036f8bee2d 1282
ganlikun 0:06036f8bee2d 1283 uicounter -= nbBytes;
ganlikun 0:06036f8bee2d 1284 ParametersTable += nbBytes;
ganlikun 0:06036f8bee2d 1285 }
ganlikun 0:06036f8bee2d 1286
ganlikun 0:06036f8bee2d 1287 /* Configure the packet to send a long DCS command */
ganlikun 0:06036f8bee2d 1288 DSI_ConfigPacketHeader(hdsi->Instance,
ganlikun 0:06036f8bee2d 1289 ChannelID,
ganlikun 0:06036f8bee2d 1290 Mode,
ganlikun 0:06036f8bee2d 1291 ((NbParams+1U)&0x00FFU),
ganlikun 0:06036f8bee2d 1292 (((NbParams+1U)&0xFF00U)>>8U));
ganlikun 0:06036f8bee2d 1293
ganlikun 0:06036f8bee2d 1294 /* Process unlocked */
ganlikun 0:06036f8bee2d 1295 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1296
ganlikun 0:06036f8bee2d 1297 return HAL_OK;
ganlikun 0:06036f8bee2d 1298 }
ganlikun 0:06036f8bee2d 1299
ganlikun 0:06036f8bee2d 1300 /**
ganlikun 0:06036f8bee2d 1301 * @brief Read command (DCS or generic)
ganlikun 0:06036f8bee2d 1302 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1303 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1304 * @param ChannelNbr: Virtual channel ID
ganlikun 0:06036f8bee2d 1305 * @param Array: pointer to a buffer to store the payload of a read back operation.
ganlikun 0:06036f8bee2d 1306 * @param Size: Data size to be read (in byte).
ganlikun 0:06036f8bee2d 1307 * @param Mode: DSI read packet data type.
ganlikun 0:06036f8bee2d 1308 * This parameter can be any value of @ref DSI_SHORT_READ_PKT_Data_Type.
ganlikun 0:06036f8bee2d 1309 * @param DCSCmd: DCS get/read command.
ganlikun 0:06036f8bee2d 1310 * @param ParametersTable: Pointer to parameter values table.
ganlikun 0:06036f8bee2d 1311 * @retval HAL status
ganlikun 0:06036f8bee2d 1312 */
ganlikun 0:06036f8bee2d 1313 HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
ganlikun 0:06036f8bee2d 1314 uint32_t ChannelNbr,
ganlikun 0:06036f8bee2d 1315 uint8_t* Array,
ganlikun 0:06036f8bee2d 1316 uint32_t Size,
ganlikun 0:06036f8bee2d 1317 uint32_t Mode,
ganlikun 0:06036f8bee2d 1318 uint32_t DCSCmd,
ganlikun 0:06036f8bee2d 1319 uint8_t* ParametersTable)
ganlikun 0:06036f8bee2d 1320 {
ganlikun 0:06036f8bee2d 1321 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 1322
ganlikun 0:06036f8bee2d 1323 /* Process locked */
ganlikun 0:06036f8bee2d 1324 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1325
ganlikun 0:06036f8bee2d 1326 /* Check the parameters */
ganlikun 0:06036f8bee2d 1327 assert_param(IS_DSI_READ_PACKET_TYPE(Mode));
ganlikun 0:06036f8bee2d 1328
ganlikun 0:06036f8bee2d 1329 if(Size > 2U)
ganlikun 0:06036f8bee2d 1330 {
ganlikun 0:06036f8bee2d 1331 /* set max return packet size */
ganlikun 0:06036f8bee2d 1332 HAL_DSI_ShortWrite(hdsi, ChannelNbr, DSI_MAX_RETURN_PKT_SIZE, ((Size)&0xFFU), (((Size)>>8U)&0xFFU));
ganlikun 0:06036f8bee2d 1333 }
ganlikun 0:06036f8bee2d 1334
ganlikun 0:06036f8bee2d 1335 /* Configure the packet to read command */
ganlikun 0:06036f8bee2d 1336 if (Mode == DSI_DCS_SHORT_PKT_READ)
ganlikun 0:06036f8bee2d 1337 {
ganlikun 0:06036f8bee2d 1338 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, DCSCmd, 0U);
ganlikun 0:06036f8bee2d 1339 }
ganlikun 0:06036f8bee2d 1340 else if (Mode == DSI_GEN_SHORT_PKT_READ_P0)
ganlikun 0:06036f8bee2d 1341 {
ganlikun 0:06036f8bee2d 1342 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, 0U, 0U);
ganlikun 0:06036f8bee2d 1343 }
ganlikun 0:06036f8bee2d 1344 else if (Mode == DSI_GEN_SHORT_PKT_READ_P1)
ganlikun 0:06036f8bee2d 1345 {
ganlikun 0:06036f8bee2d 1346 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], 0U);
ganlikun 0:06036f8bee2d 1347 }
ganlikun 0:06036f8bee2d 1348 else if (Mode == DSI_GEN_SHORT_PKT_READ_P2)
ganlikun 0:06036f8bee2d 1349 {
ganlikun 0:06036f8bee2d 1350 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], ParametersTable[1U]);
ganlikun 0:06036f8bee2d 1351 }
ganlikun 0:06036f8bee2d 1352 else
ganlikun 0:06036f8bee2d 1353 {
ganlikun 0:06036f8bee2d 1354 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1355 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1356
ganlikun 0:06036f8bee2d 1357 return HAL_ERROR;
ganlikun 0:06036f8bee2d 1358 }
ganlikun 0:06036f8bee2d 1359
ganlikun 0:06036f8bee2d 1360 /* Get tick */
ganlikun 0:06036f8bee2d 1361 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1362
ganlikun 0:06036f8bee2d 1363 /* Check that the payload read FIFO is not empty */
ganlikun 0:06036f8bee2d 1364 while((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == DSI_GPSR_PRDFE)
ganlikun 0:06036f8bee2d 1365 {
ganlikun 0:06036f8bee2d 1366 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1367 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1368 {
ganlikun 0:06036f8bee2d 1369 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1370 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1371
ganlikun 0:06036f8bee2d 1372 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1373 }
ganlikun 0:06036f8bee2d 1374 }
ganlikun 0:06036f8bee2d 1375
ganlikun 0:06036f8bee2d 1376 /* Get the first byte */
ganlikun 0:06036f8bee2d 1377 *((uint32_t *)Array) = (hdsi->Instance->GPDR);
ganlikun 0:06036f8bee2d 1378 if (Size > 4U)
ganlikun 0:06036f8bee2d 1379 {
ganlikun 0:06036f8bee2d 1380 Size -= 4U;
ganlikun 0:06036f8bee2d 1381 Array += 4U;
ganlikun 0:06036f8bee2d 1382 }
ganlikun 0:06036f8bee2d 1383 else
ganlikun 0:06036f8bee2d 1384 {
ganlikun 0:06036f8bee2d 1385 /* Process unlocked */
ganlikun 0:06036f8bee2d 1386 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1387
ganlikun 0:06036f8bee2d 1388 return HAL_OK;
ganlikun 0:06036f8bee2d 1389 }
ganlikun 0:06036f8bee2d 1390
ganlikun 0:06036f8bee2d 1391 /* Get tick */
ganlikun 0:06036f8bee2d 1392 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1393
ganlikun 0:06036f8bee2d 1394 /* Get the remaining bytes if any */
ganlikun 0:06036f8bee2d 1395 while(((int)(Size)) > 0U)
ganlikun 0:06036f8bee2d 1396 {
ganlikun 0:06036f8bee2d 1397 if((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == 0U)
ganlikun 0:06036f8bee2d 1398 {
ganlikun 0:06036f8bee2d 1399 *((uint32_t *)Array) = (hdsi->Instance->GPDR);
ganlikun 0:06036f8bee2d 1400 Size -= 4U;
ganlikun 0:06036f8bee2d 1401 Array += 4U;
ganlikun 0:06036f8bee2d 1402 }
ganlikun 0:06036f8bee2d 1403
ganlikun 0:06036f8bee2d 1404 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1405 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1406 {
ganlikun 0:06036f8bee2d 1407 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1408 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1409
ganlikun 0:06036f8bee2d 1410 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1411 }
ganlikun 0:06036f8bee2d 1412 }
ganlikun 0:06036f8bee2d 1413
ganlikun 0:06036f8bee2d 1414 /* Process unlocked */
ganlikun 0:06036f8bee2d 1415 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1416
ganlikun 0:06036f8bee2d 1417 return HAL_OK;
ganlikun 0:06036f8bee2d 1418 }
ganlikun 0:06036f8bee2d 1419
ganlikun 0:06036f8bee2d 1420 /**
ganlikun 0:06036f8bee2d 1421 * @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
ganlikun 0:06036f8bee2d 1422 * (only data lanes are in ULPM)
ganlikun 0:06036f8bee2d 1423 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1424 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1425 * @retval HAL status
ganlikun 0:06036f8bee2d 1426 */
ganlikun 0:06036f8bee2d 1427 HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1428 {
ganlikun 0:06036f8bee2d 1429 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 1430
ganlikun 0:06036f8bee2d 1431 /* Process locked */
ganlikun 0:06036f8bee2d 1432 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1433
ganlikun 0:06036f8bee2d 1434 /* ULPS Request on Data Lanes */
ganlikun 0:06036f8bee2d 1435 hdsi->Instance->PUCR |= DSI_PUCR_URDL;
ganlikun 0:06036f8bee2d 1436
ganlikun 0:06036f8bee2d 1437 /* Get tick */
ganlikun 0:06036f8bee2d 1438 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1439
ganlikun 0:06036f8bee2d 1440 /* Wait until the D-PHY active lanes enter into ULPM */
ganlikun 0:06036f8bee2d 1441 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun 0:06036f8bee2d 1442 {
ganlikun 0:06036f8bee2d 1443 while((hdsi->Instance->PSR & DSI_PSR_UAN0) != RESET)
ganlikun 0:06036f8bee2d 1444 {
ganlikun 0:06036f8bee2d 1445 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1446 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1447 {
ganlikun 0:06036f8bee2d 1448 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1449 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1450
ganlikun 0:06036f8bee2d 1451 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1452 }
ganlikun 0:06036f8bee2d 1453 }
ganlikun 0:06036f8bee2d 1454 }
ganlikun 0:06036f8bee2d 1455 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun 0:06036f8bee2d 1456 {
ganlikun 0:06036f8bee2d 1457 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != RESET)
ganlikun 0:06036f8bee2d 1458 {
ganlikun 0:06036f8bee2d 1459 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1460 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1461 {
ganlikun 0:06036f8bee2d 1462 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1463 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1464
ganlikun 0:06036f8bee2d 1465 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1466 }
ganlikun 0:06036f8bee2d 1467 }
ganlikun 0:06036f8bee2d 1468 }
ganlikun 0:06036f8bee2d 1469
ganlikun 0:06036f8bee2d 1470 /* Process unlocked */
ganlikun 0:06036f8bee2d 1471 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1472
ganlikun 0:06036f8bee2d 1473 return HAL_OK;
ganlikun 0:06036f8bee2d 1474 }
ganlikun 0:06036f8bee2d 1475
ganlikun 0:06036f8bee2d 1476 /**
ganlikun 0:06036f8bee2d 1477 * @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
ganlikun 0:06036f8bee2d 1478 * (only data lanes are in ULPM)
ganlikun 0:06036f8bee2d 1479 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1480 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1481 * @retval HAL status
ganlikun 0:06036f8bee2d 1482 */
ganlikun 0:06036f8bee2d 1483 HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1484 {
ganlikun 0:06036f8bee2d 1485 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 1486
ganlikun 0:06036f8bee2d 1487 /* Process locked */
ganlikun 0:06036f8bee2d 1488 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1489
ganlikun 0:06036f8bee2d 1490 /* Exit ULPS on Data Lanes */
ganlikun 0:06036f8bee2d 1491 hdsi->Instance->PUCR |= DSI_PUCR_UEDL;
ganlikun 0:06036f8bee2d 1492
ganlikun 0:06036f8bee2d 1493 /* Get tick */
ganlikun 0:06036f8bee2d 1494 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1495
ganlikun 0:06036f8bee2d 1496 /* Wait until all active lanes exit ULPM */
ganlikun 0:06036f8bee2d 1497 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun 0:06036f8bee2d 1498 {
ganlikun 0:06036f8bee2d 1499 while((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0)
ganlikun 0:06036f8bee2d 1500 {
ganlikun 0:06036f8bee2d 1501 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1502 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1503 {
ganlikun 0:06036f8bee2d 1504 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1505 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1506
ganlikun 0:06036f8bee2d 1507 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1508 }
ganlikun 0:06036f8bee2d 1509 }
ganlikun 0:06036f8bee2d 1510 }
ganlikun 0:06036f8bee2d 1511 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun 0:06036f8bee2d 1512 {
ganlikun 0:06036f8bee2d 1513 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1))
ganlikun 0:06036f8bee2d 1514 {
ganlikun 0:06036f8bee2d 1515 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1516 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1517 {
ganlikun 0:06036f8bee2d 1518 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1519 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1520
ganlikun 0:06036f8bee2d 1521 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1522 }
ganlikun 0:06036f8bee2d 1523 }
ganlikun 0:06036f8bee2d 1524 }
ganlikun 0:06036f8bee2d 1525
ganlikun 0:06036f8bee2d 1526 /* wait for 1 ms*/
ganlikun 0:06036f8bee2d 1527 HAL_Delay(1U);
ganlikun 0:06036f8bee2d 1528
ganlikun 0:06036f8bee2d 1529 /* De-assert the ULPM requests and the ULPM exit bits */
ganlikun 0:06036f8bee2d 1530 hdsi->Instance->PUCR = 0U;
ganlikun 0:06036f8bee2d 1531
ganlikun 0:06036f8bee2d 1532 /* Process unlocked */
ganlikun 0:06036f8bee2d 1533 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1534
ganlikun 0:06036f8bee2d 1535 return HAL_OK;
ganlikun 0:06036f8bee2d 1536 }
ganlikun 0:06036f8bee2d 1537
ganlikun 0:06036f8bee2d 1538 /**
ganlikun 0:06036f8bee2d 1539 * @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
ganlikun 0:06036f8bee2d 1540 * (both data and clock lanes are in ULPM)
ganlikun 0:06036f8bee2d 1541 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1542 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1543 * @retval HAL status
ganlikun 0:06036f8bee2d 1544 */
ganlikun 0:06036f8bee2d 1545 HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1546 {
ganlikun 0:06036f8bee2d 1547 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 1548
ganlikun 0:06036f8bee2d 1549 /* Process locked */
ganlikun 0:06036f8bee2d 1550 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1551
ganlikun 0:06036f8bee2d 1552 /* Clock lane configuration: no more HS request */
ganlikun 0:06036f8bee2d 1553 hdsi->Instance->CLCR &= ~DSI_CLCR_DPCC;
ganlikun 0:06036f8bee2d 1554
ganlikun 0:06036f8bee2d 1555 /* Use system PLL as byte lane clock source before stopping DSIPHY clock source */
ganlikun 0:06036f8bee2d 1556 __HAL_RCC_DSI_CONFIG(RCC_DSICLKSOURCE_PLLR);
ganlikun 0:06036f8bee2d 1557
ganlikun 0:06036f8bee2d 1558 /* ULPS Request on Clock and Data Lanes */
ganlikun 0:06036f8bee2d 1559 hdsi->Instance->PUCR |= (DSI_PUCR_URCL | DSI_PUCR_URDL);
ganlikun 0:06036f8bee2d 1560
ganlikun 0:06036f8bee2d 1561 /* Get tick */
ganlikun 0:06036f8bee2d 1562 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1563
ganlikun 0:06036f8bee2d 1564 /* Wait until all active lanes exit ULPM */
ganlikun 0:06036f8bee2d 1565 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun 0:06036f8bee2d 1566 {
ganlikun 0:06036f8bee2d 1567 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != RESET)
ganlikun 0:06036f8bee2d 1568 {
ganlikun 0:06036f8bee2d 1569 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1570 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1571 {
ganlikun 0:06036f8bee2d 1572 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1573 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1574
ganlikun 0:06036f8bee2d 1575 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1576 }
ganlikun 0:06036f8bee2d 1577 }
ganlikun 0:06036f8bee2d 1578 }
ganlikun 0:06036f8bee2d 1579 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun 0:06036f8bee2d 1580 {
ganlikun 0:06036f8bee2d 1581 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != RESET)
ganlikun 0:06036f8bee2d 1582 {
ganlikun 0:06036f8bee2d 1583 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1584 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1585 {
ganlikun 0:06036f8bee2d 1586 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1587 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1588
ganlikun 0:06036f8bee2d 1589 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1590 }
ganlikun 0:06036f8bee2d 1591 }
ganlikun 0:06036f8bee2d 1592 }
ganlikun 0:06036f8bee2d 1593
ganlikun 0:06036f8bee2d 1594 /* Turn off the DSI PLL */
ganlikun 0:06036f8bee2d 1595 __HAL_DSI_PLL_DISABLE(hdsi);
ganlikun 0:06036f8bee2d 1596
ganlikun 0:06036f8bee2d 1597 /* Process unlocked */
ganlikun 0:06036f8bee2d 1598 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1599
ganlikun 0:06036f8bee2d 1600 return HAL_OK;
ganlikun 0:06036f8bee2d 1601 }
ganlikun 0:06036f8bee2d 1602
ganlikun 0:06036f8bee2d 1603 /**
ganlikun 0:06036f8bee2d 1604 * @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
ganlikun 0:06036f8bee2d 1605 * (both data and clock lanes are in ULPM)
ganlikun 0:06036f8bee2d 1606 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1607 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1608 * @retval HAL status
ganlikun 0:06036f8bee2d 1609 */
ganlikun 0:06036f8bee2d 1610 HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1611 {
ganlikun 0:06036f8bee2d 1612 uint32_t tickstart = 0U;
ganlikun 0:06036f8bee2d 1613
ganlikun 0:06036f8bee2d 1614 /* Process locked */
ganlikun 0:06036f8bee2d 1615 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1616
ganlikun 0:06036f8bee2d 1617 /* Turn on the DSI PLL */
ganlikun 0:06036f8bee2d 1618 __HAL_DSI_PLL_ENABLE(hdsi);
ganlikun 0:06036f8bee2d 1619
ganlikun 0:06036f8bee2d 1620 /* Get tick */
ganlikun 0:06036f8bee2d 1621 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1622
ganlikun 0:06036f8bee2d 1623 /* Wait for the lock of the PLL */
ganlikun 0:06036f8bee2d 1624 while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == RESET)
ganlikun 0:06036f8bee2d 1625 {
ganlikun 0:06036f8bee2d 1626 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1627 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1628 {
ganlikun 0:06036f8bee2d 1629 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1630 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1631
ganlikun 0:06036f8bee2d 1632 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1633 }
ganlikun 0:06036f8bee2d 1634 }
ganlikun 0:06036f8bee2d 1635
ganlikun 0:06036f8bee2d 1636 /* Exit ULPS on Clock and Data Lanes */
ganlikun 0:06036f8bee2d 1637 hdsi->Instance->PUCR |= (DSI_PUCR_UECL | DSI_PUCR_UEDL);
ganlikun 0:06036f8bee2d 1638
ganlikun 0:06036f8bee2d 1639 /* Get tick */
ganlikun 0:06036f8bee2d 1640 tickstart = HAL_GetTick();
ganlikun 0:06036f8bee2d 1641
ganlikun 0:06036f8bee2d 1642 /* Wait until all active lanes exit ULPM */
ganlikun 0:06036f8bee2d 1643 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
ganlikun 0:06036f8bee2d 1644 {
ganlikun 0:06036f8bee2d 1645 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI_PSR_UANC))
ganlikun 0:06036f8bee2d 1646 {
ganlikun 0:06036f8bee2d 1647 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1648 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1649 {
ganlikun 0:06036f8bee2d 1650 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1651 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1652
ganlikun 0:06036f8bee2d 1653 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1654 }
ganlikun 0:06036f8bee2d 1655 }
ganlikun 0:06036f8bee2d 1656 }
ganlikun 0:06036f8bee2d 1657 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
ganlikun 0:06036f8bee2d 1658 {
ganlikun 0:06036f8bee2d 1659 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC))
ganlikun 0:06036f8bee2d 1660 {
ganlikun 0:06036f8bee2d 1661 /* Check for the Timeout */
ganlikun 0:06036f8bee2d 1662 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
ganlikun 0:06036f8bee2d 1663 {
ganlikun 0:06036f8bee2d 1664 /* Process Unlocked */
ganlikun 0:06036f8bee2d 1665 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1666
ganlikun 0:06036f8bee2d 1667 return HAL_TIMEOUT;
ganlikun 0:06036f8bee2d 1668 }
ganlikun 0:06036f8bee2d 1669 }
ganlikun 0:06036f8bee2d 1670 }
ganlikun 0:06036f8bee2d 1671
ganlikun 0:06036f8bee2d 1672 /* wait for 1 ms*/
ganlikun 0:06036f8bee2d 1673 HAL_Delay(1U);
ganlikun 0:06036f8bee2d 1674
ganlikun 0:06036f8bee2d 1675 /* De-assert the ULPM requests and the ULPM exit bits */
ganlikun 0:06036f8bee2d 1676 hdsi->Instance->PUCR = 0U;
ganlikun 0:06036f8bee2d 1677
ganlikun 0:06036f8bee2d 1678 /* Switch the lanbyteclock source in the RCC from system PLL to D-PHY */
ganlikun 0:06036f8bee2d 1679 __HAL_RCC_DSI_CONFIG(RCC_DSICLKSOURCE_DSIPHY);
ganlikun 0:06036f8bee2d 1680
ganlikun 0:06036f8bee2d 1681 /* Restore clock lane configuration to HS */
ganlikun 0:06036f8bee2d 1682 hdsi->Instance->CLCR |= DSI_CLCR_DPCC;
ganlikun 0:06036f8bee2d 1683
ganlikun 0:06036f8bee2d 1684 /* Process unlocked */
ganlikun 0:06036f8bee2d 1685 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1686
ganlikun 0:06036f8bee2d 1687 return HAL_OK;
ganlikun 0:06036f8bee2d 1688 }
ganlikun 0:06036f8bee2d 1689
ganlikun 0:06036f8bee2d 1690 /**
ganlikun 0:06036f8bee2d 1691 * @brief Start test pattern generation
ganlikun 0:06036f8bee2d 1692 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1693 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1694 * @param Mode: Pattern generator mode
ganlikun 0:06036f8bee2d 1695 * This parameter can be one of the following values:
ganlikun 0:06036f8bee2d 1696 * 0 : Color bars (horizontal or vertical)
ganlikun 0:06036f8bee2d 1697 * 1 : BER pattern (vertical only)
ganlikun 0:06036f8bee2d 1698 * @param Orientation: Pattern generator orientation
ganlikun 0:06036f8bee2d 1699 * This parameter can be one of the following values:
ganlikun 0:06036f8bee2d 1700 * 0 : Vertical color bars
ganlikun 0:06036f8bee2d 1701 * 1 : Horizontal color bars
ganlikun 0:06036f8bee2d 1702 * @retval HAL status
ganlikun 0:06036f8bee2d 1703 */
ganlikun 0:06036f8bee2d 1704 HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation)
ganlikun 0:06036f8bee2d 1705 {
ganlikun 0:06036f8bee2d 1706 /* Process locked */
ganlikun 0:06036f8bee2d 1707 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1708
ganlikun 0:06036f8bee2d 1709 /* Configure pattern generator mode and orientation */
ganlikun 0:06036f8bee2d 1710 hdsi->Instance->VMCR &= ~(DSI_VMCR_PGM | DSI_VMCR_PGO);
ganlikun 0:06036f8bee2d 1711 hdsi->Instance->VMCR |= ((Mode<<20U) | (Orientation<<24U));
ganlikun 0:06036f8bee2d 1712
ganlikun 0:06036f8bee2d 1713 /* Enable pattern generator by setting PGE bit */
ganlikun 0:06036f8bee2d 1714 hdsi->Instance->VMCR |= DSI_VMCR_PGE;
ganlikun 0:06036f8bee2d 1715
ganlikun 0:06036f8bee2d 1716 /* Process unlocked */
ganlikun 0:06036f8bee2d 1717 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1718
ganlikun 0:06036f8bee2d 1719 return HAL_OK;
ganlikun 0:06036f8bee2d 1720 }
ganlikun 0:06036f8bee2d 1721
ganlikun 0:06036f8bee2d 1722 /**
ganlikun 0:06036f8bee2d 1723 * @brief Stop test pattern generation
ganlikun 0:06036f8bee2d 1724 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1725 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1726 * @retval HAL status
ganlikun 0:06036f8bee2d 1727 */
ganlikun 0:06036f8bee2d 1728 HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 1729 {
ganlikun 0:06036f8bee2d 1730 /* Process locked */
ganlikun 0:06036f8bee2d 1731 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1732
ganlikun 0:06036f8bee2d 1733 /* Disable pattern generator by clearing PGE bit */
ganlikun 0:06036f8bee2d 1734 hdsi->Instance->VMCR &= ~DSI_VMCR_PGE;
ganlikun 0:06036f8bee2d 1735
ganlikun 0:06036f8bee2d 1736 /* Process unlocked */
ganlikun 0:06036f8bee2d 1737 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1738
ganlikun 0:06036f8bee2d 1739 return HAL_OK;
ganlikun 0:06036f8bee2d 1740 }
ganlikun 0:06036f8bee2d 1741
ganlikun 0:06036f8bee2d 1742 /**
ganlikun 0:06036f8bee2d 1743 * @brief Set Slew-Rate And Delay Tuning
ganlikun 0:06036f8bee2d 1744 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1745 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1746 * @param CommDelay: Communication delay to be adjusted.
ganlikun 0:06036f8bee2d 1747 * This parameter can be any value of @ref DSI_Communication_Delay
ganlikun 0:06036f8bee2d 1748 * @param Lane: select between clock or data lanes.
ganlikun 0:06036f8bee2d 1749 * This parameter can be any value of @ref DSI_Lane_Group
ganlikun 0:06036f8bee2d 1750 * @param Value: Custom value of the slew-rate or delay
ganlikun 0:06036f8bee2d 1751 * @retval HAL status
ganlikun 0:06036f8bee2d 1752 */
ganlikun 0:06036f8bee2d 1753 HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value)
ganlikun 0:06036f8bee2d 1754 {
ganlikun 0:06036f8bee2d 1755 /* Process locked */
ganlikun 0:06036f8bee2d 1756 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1757
ganlikun 0:06036f8bee2d 1758 /* Check function parameters */
ganlikun 0:06036f8bee2d 1759 assert_param(IS_DSI_COMMUNICATION_DELAY(CommDelay));
ganlikun 0:06036f8bee2d 1760 assert_param(IS_DSI_LANE_GROUP(Lane));
ganlikun 0:06036f8bee2d 1761
ganlikun 0:06036f8bee2d 1762 switch(CommDelay)
ganlikun 0:06036f8bee2d 1763 {
ganlikun 0:06036f8bee2d 1764 case DSI_SLEW_RATE_HSTX:
ganlikun 0:06036f8bee2d 1765 if(Lane == DSI_CLOCK_LANE)
ganlikun 0:06036f8bee2d 1766 {
ganlikun 0:06036f8bee2d 1767 /* High-Speed Transmission Slew Rate Control on Clock Lane */
ganlikun 0:06036f8bee2d 1768 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCCL;
ganlikun 0:06036f8bee2d 1769 hdsi->Instance->WPCR[1U] |= Value<<16U;
ganlikun 0:06036f8bee2d 1770 }
ganlikun 0:06036f8bee2d 1771 else if(Lane == DSI_DATA_LANES)
ganlikun 0:06036f8bee2d 1772 {
ganlikun 0:06036f8bee2d 1773 /* High-Speed Transmission Slew Rate Control on Data Lanes */
ganlikun 0:06036f8bee2d 1774 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCDL;
ganlikun 0:06036f8bee2d 1775 hdsi->Instance->WPCR[1U] |= Value<<18U;
ganlikun 0:06036f8bee2d 1776 }
ganlikun 0:06036f8bee2d 1777 break;
ganlikun 0:06036f8bee2d 1778 case DSI_SLEW_RATE_LPTX:
ganlikun 0:06036f8bee2d 1779 if(Lane == DSI_CLOCK_LANE)
ganlikun 0:06036f8bee2d 1780 {
ganlikun 0:06036f8bee2d 1781 /* Low-Power transmission Slew Rate Compensation on Clock Lane */
ganlikun 0:06036f8bee2d 1782 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCCL;
ganlikun 0:06036f8bee2d 1783 hdsi->Instance->WPCR[1U] |= Value<<6U;
ganlikun 0:06036f8bee2d 1784 }
ganlikun 0:06036f8bee2d 1785 else if(Lane == DSI_DATA_LANES)
ganlikun 0:06036f8bee2d 1786 {
ganlikun 0:06036f8bee2d 1787 /* Low-Power transmission Slew Rate Compensation on Data Lanes */
ganlikun 0:06036f8bee2d 1788 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCDL;
ganlikun 0:06036f8bee2d 1789 hdsi->Instance->WPCR[1U] |= Value<<8U;
ganlikun 0:06036f8bee2d 1790 }
ganlikun 0:06036f8bee2d 1791 break;
ganlikun 0:06036f8bee2d 1792 case DSI_HS_DELAY:
ganlikun 0:06036f8bee2d 1793 if(Lane == DSI_CLOCK_LANE)
ganlikun 0:06036f8bee2d 1794 {
ganlikun 0:06036f8bee2d 1795 /* High-Speed Transmission Delay on Clock Lane */
ganlikun 0:06036f8bee2d 1796 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDCL;
ganlikun 0:06036f8bee2d 1797 hdsi->Instance->WPCR[1U] |= Value;
ganlikun 0:06036f8bee2d 1798 }
ganlikun 0:06036f8bee2d 1799 else if(Lane == DSI_DATA_LANES)
ganlikun 0:06036f8bee2d 1800 {
ganlikun 0:06036f8bee2d 1801 /* High-Speed Transmission Delay on Data Lanes */
ganlikun 0:06036f8bee2d 1802 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDDL;
ganlikun 0:06036f8bee2d 1803 hdsi->Instance->WPCR[1U] |= Value<<2U;
ganlikun 0:06036f8bee2d 1804 }
ganlikun 0:06036f8bee2d 1805 break;
ganlikun 0:06036f8bee2d 1806 default:
ganlikun 0:06036f8bee2d 1807 break;
ganlikun 0:06036f8bee2d 1808 }
ganlikun 0:06036f8bee2d 1809
ganlikun 0:06036f8bee2d 1810 /* Process unlocked */
ganlikun 0:06036f8bee2d 1811 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1812
ganlikun 0:06036f8bee2d 1813 return HAL_OK;
ganlikun 0:06036f8bee2d 1814 }
ganlikun 0:06036f8bee2d 1815
ganlikun 0:06036f8bee2d 1816 /**
ganlikun 0:06036f8bee2d 1817 * @brief Low-Power Reception Filter Tuning
ganlikun 0:06036f8bee2d 1818 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1819 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1820 * @param Frequency: cutoff frequency of low-pass filter at the input of LPRX
ganlikun 0:06036f8bee2d 1821 * @retval HAL status
ganlikun 0:06036f8bee2d 1822 */
ganlikun 0:06036f8bee2d 1823 HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency)
ganlikun 0:06036f8bee2d 1824 {
ganlikun 0:06036f8bee2d 1825 /* Process locked */
ganlikun 0:06036f8bee2d 1826 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1827
ganlikun 0:06036f8bee2d 1828 /* Low-Power RX low-pass Filtering Tuning */
ganlikun 0:06036f8bee2d 1829 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPRXFT;
ganlikun 0:06036f8bee2d 1830 hdsi->Instance->WPCR[1U] |= Frequency<<25U;
ganlikun 0:06036f8bee2d 1831
ganlikun 0:06036f8bee2d 1832 /* Process unlocked */
ganlikun 0:06036f8bee2d 1833 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1834
ganlikun 0:06036f8bee2d 1835 return HAL_OK;
ganlikun 0:06036f8bee2d 1836 }
ganlikun 0:06036f8bee2d 1837
ganlikun 0:06036f8bee2d 1838 /**
ganlikun 0:06036f8bee2d 1839 * @brief Activate an additional current path on all lanes to meet the SDDTx parameter
ganlikun 0:06036f8bee2d 1840 * defined in the MIPI D-PHY specification
ganlikun 0:06036f8bee2d 1841 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1842 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1843 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 1844 * @retval HAL status
ganlikun 0:06036f8bee2d 1845 */
ganlikun 0:06036f8bee2d 1846 HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun 0:06036f8bee2d 1847 {
ganlikun 0:06036f8bee2d 1848 /* Process locked */
ganlikun 0:06036f8bee2d 1849 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1850
ganlikun 0:06036f8bee2d 1851 /* Check function parameters */
ganlikun 0:06036f8bee2d 1852 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 1853
ganlikun 0:06036f8bee2d 1854 /* Activate/Disactivate additional current path on all lanes */
ganlikun 0:06036f8bee2d 1855 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_SDDC;
ganlikun 0:06036f8bee2d 1856 hdsi->Instance->WPCR[1U] |= ((uint32_t)State << 12U);
ganlikun 0:06036f8bee2d 1857
ganlikun 0:06036f8bee2d 1858 /* Process unlocked */
ganlikun 0:06036f8bee2d 1859 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1860
ganlikun 0:06036f8bee2d 1861 return HAL_OK;
ganlikun 0:06036f8bee2d 1862 }
ganlikun 0:06036f8bee2d 1863
ganlikun 0:06036f8bee2d 1864 /**
ganlikun 0:06036f8bee2d 1865 * @brief Custom lane pins configuration
ganlikun 0:06036f8bee2d 1866 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1867 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1868 * @param CustomLane: Function to be applyed on selected lane.
ganlikun 0:06036f8bee2d 1869 * This parameter can be any value of @ref DSI_CustomLane
ganlikun 0:06036f8bee2d 1870 * @param Lane: select between clock or data lane 0 or data lane 1.
ganlikun 0:06036f8bee2d 1871 * This parameter can be any value of @ref DSI_Lane_Select
ganlikun 0:06036f8bee2d 1872 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 1873 * @retval HAL status
ganlikun 0:06036f8bee2d 1874 */
ganlikun 0:06036f8bee2d 1875 HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State)
ganlikun 0:06036f8bee2d 1876 {
ganlikun 0:06036f8bee2d 1877 /* Process locked */
ganlikun 0:06036f8bee2d 1878 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1879
ganlikun 0:06036f8bee2d 1880 /* Check function parameters */
ganlikun 0:06036f8bee2d 1881 assert_param(IS_DSI_CUSTOM_LANE(CustomLane));
ganlikun 0:06036f8bee2d 1882 assert_param(IS_DSI_LANE(Lane));
ganlikun 0:06036f8bee2d 1883 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 1884
ganlikun 0:06036f8bee2d 1885 switch(CustomLane)
ganlikun 0:06036f8bee2d 1886 {
ganlikun 0:06036f8bee2d 1887 case DSI_SWAP_LANE_PINS:
ganlikun 0:06036f8bee2d 1888 if(Lane == DSI_CLOCK_LANE)
ganlikun 0:06036f8bee2d 1889 {
ganlikun 0:06036f8bee2d 1890 /* Swap pins on clock lane */
ganlikun 0:06036f8bee2d 1891 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWCL;
ganlikun 0:06036f8bee2d 1892 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 6U);
ganlikun 0:06036f8bee2d 1893 }
ganlikun 0:06036f8bee2d 1894 else if(Lane == DSI_DATA_LANE0)
ganlikun 0:06036f8bee2d 1895 {
ganlikun 0:06036f8bee2d 1896 /* Swap pins on data lane 0 */
ganlikun 0:06036f8bee2d 1897 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL0;
ganlikun 0:06036f8bee2d 1898 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 7U);
ganlikun 0:06036f8bee2d 1899 }
ganlikun 0:06036f8bee2d 1900 else if(Lane == DSI_DATA_LANE1)
ganlikun 0:06036f8bee2d 1901 {
ganlikun 0:06036f8bee2d 1902 /* Swap pins on data lane 1 */
ganlikun 0:06036f8bee2d 1903 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL1;
ganlikun 0:06036f8bee2d 1904 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 8U);
ganlikun 0:06036f8bee2d 1905 }
ganlikun 0:06036f8bee2d 1906 break;
ganlikun 0:06036f8bee2d 1907 case DSI_INVERT_HS_SIGNAL:
ganlikun 0:06036f8bee2d 1908 if(Lane == DSI_CLOCK_LANE)
ganlikun 0:06036f8bee2d 1909 {
ganlikun 0:06036f8bee2d 1910 /* Invert HS signal on clock lane */
ganlikun 0:06036f8bee2d 1911 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSICL;
ganlikun 0:06036f8bee2d 1912 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 9U);
ganlikun 0:06036f8bee2d 1913 }
ganlikun 0:06036f8bee2d 1914 else if(Lane == DSI_DATA_LANE0)
ganlikun 0:06036f8bee2d 1915 {
ganlikun 0:06036f8bee2d 1916 /* Invert HS signal on data lane 0 */
ganlikun 0:06036f8bee2d 1917 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL0;
ganlikun 0:06036f8bee2d 1918 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 10U);
ganlikun 0:06036f8bee2d 1919 }
ganlikun 0:06036f8bee2d 1920 else if(Lane == DSI_DATA_LANE1)
ganlikun 0:06036f8bee2d 1921 {
ganlikun 0:06036f8bee2d 1922 /* Invert HS signal on data lane 1 */
ganlikun 0:06036f8bee2d 1923 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL1;
ganlikun 0:06036f8bee2d 1924 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 11U);
ganlikun 0:06036f8bee2d 1925 }
ganlikun 0:06036f8bee2d 1926 break;
ganlikun 0:06036f8bee2d 1927 default:
ganlikun 0:06036f8bee2d 1928 break;
ganlikun 0:06036f8bee2d 1929 }
ganlikun 0:06036f8bee2d 1930
ganlikun 0:06036f8bee2d 1931 /* Process unlocked */
ganlikun 0:06036f8bee2d 1932 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 1933
ganlikun 0:06036f8bee2d 1934 return HAL_OK;
ganlikun 0:06036f8bee2d 1935 }
ganlikun 0:06036f8bee2d 1936
ganlikun 0:06036f8bee2d 1937 /**
ganlikun 0:06036f8bee2d 1938 * @brief Set custom timing for the PHY
ganlikun 0:06036f8bee2d 1939 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 1940 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 1941 * @param Timing: PHY timing to be adjusted.
ganlikun 0:06036f8bee2d 1942 * This parameter can be any value of @ref DSI_PHY_Timing
ganlikun 0:06036f8bee2d 1943 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 1944 * @param Value: Custom value of the timing
ganlikun 0:06036f8bee2d 1945 * @retval HAL status
ganlikun 0:06036f8bee2d 1946 */
ganlikun 0:06036f8bee2d 1947 HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value)
ganlikun 0:06036f8bee2d 1948 {
ganlikun 0:06036f8bee2d 1949 /* Process locked */
ganlikun 0:06036f8bee2d 1950 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 1951
ganlikun 0:06036f8bee2d 1952 /* Check function parameters */
ganlikun 0:06036f8bee2d 1953 assert_param(IS_DSI_PHY_TIMING(Timing));
ganlikun 0:06036f8bee2d 1954 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 1955
ganlikun 0:06036f8bee2d 1956 switch(Timing)
ganlikun 0:06036f8bee2d 1957 {
ganlikun 0:06036f8bee2d 1958 case DSI_TCLK_POST:
ganlikun 0:06036f8bee2d 1959 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 1960 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPOSTEN;
ganlikun 0:06036f8bee2d 1961 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 27U);
ganlikun 0:06036f8bee2d 1962
ganlikun 0:06036f8bee2d 1963 if(State)
ganlikun 0:06036f8bee2d 1964 {
ganlikun 0:06036f8bee2d 1965 /* Set custom value */
ganlikun 0:06036f8bee2d 1966 hdsi->Instance->WPCR[4U] &= ~DSI_WPCR4_TCLKPOST;
ganlikun 0:06036f8bee2d 1967 hdsi->Instance->WPCR[4U] |= Value & DSI_WPCR4_TCLKPOST;
ganlikun 0:06036f8bee2d 1968 }
ganlikun 0:06036f8bee2d 1969
ganlikun 0:06036f8bee2d 1970 break;
ganlikun 0:06036f8bee2d 1971 case DSI_TLPX_CLK:
ganlikun 0:06036f8bee2d 1972 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 1973 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXCEN;
ganlikun 0:06036f8bee2d 1974 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 26U);
ganlikun 0:06036f8bee2d 1975
ganlikun 0:06036f8bee2d 1976 if(State)
ganlikun 0:06036f8bee2d 1977 {
ganlikun 0:06036f8bee2d 1978 /* Set custom value */
ganlikun 0:06036f8bee2d 1979 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXC;
ganlikun 0:06036f8bee2d 1980 hdsi->Instance->WPCR[3U] |= (Value << 24U) & DSI_WPCR3_TLPXC;
ganlikun 0:06036f8bee2d 1981 }
ganlikun 0:06036f8bee2d 1982
ganlikun 0:06036f8bee2d 1983 break;
ganlikun 0:06036f8bee2d 1984 case DSI_THS_EXIT:
ganlikun 0:06036f8bee2d 1985 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 1986 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSEXITEN;
ganlikun 0:06036f8bee2d 1987 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 25U);
ganlikun 0:06036f8bee2d 1988
ganlikun 0:06036f8bee2d 1989 if(State)
ganlikun 0:06036f8bee2d 1990 {
ganlikun 0:06036f8bee2d 1991 /* Set custom value */
ganlikun 0:06036f8bee2d 1992 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSEXIT;
ganlikun 0:06036f8bee2d 1993 hdsi->Instance->WPCR[3U] |= (Value << 16U) & DSI_WPCR3_THSEXIT;
ganlikun 0:06036f8bee2d 1994 }
ganlikun 0:06036f8bee2d 1995
ganlikun 0:06036f8bee2d 1996 break;
ganlikun 0:06036f8bee2d 1997 case DSI_TLPX_DATA:
ganlikun 0:06036f8bee2d 1998 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 1999 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXDEN;
ganlikun 0:06036f8bee2d 2000 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 24U);
ganlikun 0:06036f8bee2d 2001
ganlikun 0:06036f8bee2d 2002 if(State)
ganlikun 0:06036f8bee2d 2003 {
ganlikun 0:06036f8bee2d 2004 /* Set custom value */
ganlikun 0:06036f8bee2d 2005 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXD;
ganlikun 0:06036f8bee2d 2006 hdsi->Instance->WPCR[3U] |= (Value << 8U) & DSI_WPCR3_TLPXD;
ganlikun 0:06036f8bee2d 2007 }
ganlikun 0:06036f8bee2d 2008
ganlikun 0:06036f8bee2d 2009 break;
ganlikun 0:06036f8bee2d 2010 case DSI_THS_ZERO:
ganlikun 0:06036f8bee2d 2011 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 2012 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSZEROEN;
ganlikun 0:06036f8bee2d 2013 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 23U);
ganlikun 0:06036f8bee2d 2014
ganlikun 0:06036f8bee2d 2015 if(State)
ganlikun 0:06036f8bee2d 2016 {
ganlikun 0:06036f8bee2d 2017 /* Set custom value */
ganlikun 0:06036f8bee2d 2018 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSZERO;
ganlikun 0:06036f8bee2d 2019 hdsi->Instance->WPCR[3U] |= Value & DSI_WPCR3_THSZERO;
ganlikun 0:06036f8bee2d 2020 }
ganlikun 0:06036f8bee2d 2021
ganlikun 0:06036f8bee2d 2022 break;
ganlikun 0:06036f8bee2d 2023 case DSI_THS_TRAIL:
ganlikun 0:06036f8bee2d 2024 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 2025 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSTRAILEN;
ganlikun 0:06036f8bee2d 2026 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 22U);
ganlikun 0:06036f8bee2d 2027
ganlikun 0:06036f8bee2d 2028 if(State)
ganlikun 0:06036f8bee2d 2029 {
ganlikun 0:06036f8bee2d 2030 /* Set custom value */
ganlikun 0:06036f8bee2d 2031 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSTRAIL;
ganlikun 0:06036f8bee2d 2032 hdsi->Instance->WPCR[2U] |= (Value << 24U) & DSI_WPCR2_THSTRAIL;
ganlikun 0:06036f8bee2d 2033 }
ganlikun 0:06036f8bee2d 2034
ganlikun 0:06036f8bee2d 2035 break;
ganlikun 0:06036f8bee2d 2036 case DSI_THS_PREPARE:
ganlikun 0:06036f8bee2d 2037 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 2038 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSPREPEN;
ganlikun 0:06036f8bee2d 2039 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 21U);
ganlikun 0:06036f8bee2d 2040
ganlikun 0:06036f8bee2d 2041 if(State)
ganlikun 0:06036f8bee2d 2042 {
ganlikun 0:06036f8bee2d 2043 /* Set custom value */
ganlikun 0:06036f8bee2d 2044 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSPREP;
ganlikun 0:06036f8bee2d 2045 hdsi->Instance->WPCR[2U] |= (Value << 16U) & DSI_WPCR2_THSPREP;
ganlikun 0:06036f8bee2d 2046 }
ganlikun 0:06036f8bee2d 2047
ganlikun 0:06036f8bee2d 2048 break;
ganlikun 0:06036f8bee2d 2049 case DSI_TCLK_ZERO:
ganlikun 0:06036f8bee2d 2050 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 2051 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKZEROEN;
ganlikun 0:06036f8bee2d 2052 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 20U);
ganlikun 0:06036f8bee2d 2053
ganlikun 0:06036f8bee2d 2054 if(State)
ganlikun 0:06036f8bee2d 2055 {
ganlikun 0:06036f8bee2d 2056 /* Set custom value */
ganlikun 0:06036f8bee2d 2057 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKZERO;
ganlikun 0:06036f8bee2d 2058 hdsi->Instance->WPCR[2U] |= (Value << 8U) & DSI_WPCR2_TCLKZERO;
ganlikun 0:06036f8bee2d 2059 }
ganlikun 0:06036f8bee2d 2060
ganlikun 0:06036f8bee2d 2061 break;
ganlikun 0:06036f8bee2d 2062 case DSI_TCLK_PREPARE:
ganlikun 0:06036f8bee2d 2063 /* Enable/Disable custom timing setting */
ganlikun 0:06036f8bee2d 2064 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPREPEN;
ganlikun 0:06036f8bee2d 2065 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 19U);
ganlikun 0:06036f8bee2d 2066
ganlikun 0:06036f8bee2d 2067 if(State)
ganlikun 0:06036f8bee2d 2068 {
ganlikun 0:06036f8bee2d 2069 /* Set custom value */
ganlikun 0:06036f8bee2d 2070 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKPREP;
ganlikun 0:06036f8bee2d 2071 hdsi->Instance->WPCR[2U] |= Value & DSI_WPCR2_TCLKPREP;
ganlikun 0:06036f8bee2d 2072 }
ganlikun 0:06036f8bee2d 2073
ganlikun 0:06036f8bee2d 2074 break;
ganlikun 0:06036f8bee2d 2075 default:
ganlikun 0:06036f8bee2d 2076 break;
ganlikun 0:06036f8bee2d 2077 }
ganlikun 0:06036f8bee2d 2078
ganlikun 0:06036f8bee2d 2079 /* Process unlocked */
ganlikun 0:06036f8bee2d 2080 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 2081
ganlikun 0:06036f8bee2d 2082 return HAL_OK;
ganlikun 0:06036f8bee2d 2083 }
ganlikun 0:06036f8bee2d 2084
ganlikun 0:06036f8bee2d 2085 /**
ganlikun 0:06036f8bee2d 2086 * @brief Force the Clock/Data Lane in TX Stop Mode
ganlikun 0:06036f8bee2d 2087 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 2088 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 2089 * @param Lane: select between clock or data lanes.
ganlikun 0:06036f8bee2d 2090 * This parameter can be any value of @ref DSI_Lane_Group
ganlikun 0:06036f8bee2d 2091 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 2092 * @retval HAL status
ganlikun 0:06036f8bee2d 2093 */
ganlikun 0:06036f8bee2d 2094 HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State)
ganlikun 0:06036f8bee2d 2095 {
ganlikun 0:06036f8bee2d 2096 /* Process locked */
ganlikun 0:06036f8bee2d 2097 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 2098
ganlikun 0:06036f8bee2d 2099 /* Check function parameters */
ganlikun 0:06036f8bee2d 2100 assert_param(IS_DSI_LANE_GROUP(Lane));
ganlikun 0:06036f8bee2d 2101 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 2102
ganlikun 0:06036f8bee2d 2103 if(Lane == DSI_CLOCK_LANE)
ganlikun 0:06036f8bee2d 2104 {
ganlikun 0:06036f8bee2d 2105 /* Force/Unforce the Clock Lane in TX Stop Mode */
ganlikun 0:06036f8bee2d 2106 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMCL;
ganlikun 0:06036f8bee2d 2107 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 12U);
ganlikun 0:06036f8bee2d 2108 }
ganlikun 0:06036f8bee2d 2109 else if(Lane == DSI_DATA_LANES)
ganlikun 0:06036f8bee2d 2110 {
ganlikun 0:06036f8bee2d 2111 /* Force/Unforce the Data Lanes in TX Stop Mode */
ganlikun 0:06036f8bee2d 2112 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMDL;
ganlikun 0:06036f8bee2d 2113 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 13U);
ganlikun 0:06036f8bee2d 2114 }
ganlikun 0:06036f8bee2d 2115
ganlikun 0:06036f8bee2d 2116 /* Process unlocked */
ganlikun 0:06036f8bee2d 2117 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 2118
ganlikun 0:06036f8bee2d 2119 return HAL_OK;
ganlikun 0:06036f8bee2d 2120 }
ganlikun 0:06036f8bee2d 2121
ganlikun 0:06036f8bee2d 2122 /**
ganlikun 0:06036f8bee2d 2123 * @brief Forces LP Receiver in Low-Power Mode
ganlikun 0:06036f8bee2d 2124 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 2125 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 2126 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 2127 * @retval HAL status
ganlikun 0:06036f8bee2d 2128 */
ganlikun 0:06036f8bee2d 2129 HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun 0:06036f8bee2d 2130 {
ganlikun 0:06036f8bee2d 2131 /* Process locked */
ganlikun 0:06036f8bee2d 2132 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 2133
ganlikun 0:06036f8bee2d 2134 /* Check function parameters */
ganlikun 0:06036f8bee2d 2135 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 2136
ganlikun 0:06036f8bee2d 2137 /* Force/Unforce LP Receiver in Low-Power Mode */
ganlikun 0:06036f8bee2d 2138 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_FLPRXLPM;
ganlikun 0:06036f8bee2d 2139 hdsi->Instance->WPCR[1U] |= ((uint32_t)State << 22U);
ganlikun 0:06036f8bee2d 2140
ganlikun 0:06036f8bee2d 2141 /* Process unlocked */
ganlikun 0:06036f8bee2d 2142 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 2143
ganlikun 0:06036f8bee2d 2144 return HAL_OK;
ganlikun 0:06036f8bee2d 2145 }
ganlikun 0:06036f8bee2d 2146
ganlikun 0:06036f8bee2d 2147 /**
ganlikun 0:06036f8bee2d 2148 * @brief Force Data Lanes in RX Mode after a BTA
ganlikun 0:06036f8bee2d 2149 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 2150 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 2151 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 2152 * @retval HAL status
ganlikun 0:06036f8bee2d 2153 */
ganlikun 0:06036f8bee2d 2154 HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun 0:06036f8bee2d 2155 {
ganlikun 0:06036f8bee2d 2156 /* Process locked */
ganlikun 0:06036f8bee2d 2157 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 2158
ganlikun 0:06036f8bee2d 2159 /* Check function parameters */
ganlikun 0:06036f8bee2d 2160 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 2161
ganlikun 0:06036f8bee2d 2162 /* Force Data Lanes in RX Mode */
ganlikun 0:06036f8bee2d 2163 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TDDL;
ganlikun 0:06036f8bee2d 2164 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 16U);
ganlikun 0:06036f8bee2d 2165
ganlikun 0:06036f8bee2d 2166 /* Process unlocked */
ganlikun 0:06036f8bee2d 2167 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 2168
ganlikun 0:06036f8bee2d 2169 return HAL_OK;
ganlikun 0:06036f8bee2d 2170 }
ganlikun 0:06036f8bee2d 2171
ganlikun 0:06036f8bee2d 2172 /**
ganlikun 0:06036f8bee2d 2173 * @brief Enable a pull-down on the lanes to prevent from floating states when unused
ganlikun 0:06036f8bee2d 2174 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 2175 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 2176 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 2177 * @retval HAL status
ganlikun 0:06036f8bee2d 2178 */
ganlikun 0:06036f8bee2d 2179 HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun 0:06036f8bee2d 2180 {
ganlikun 0:06036f8bee2d 2181 /* Process locked */
ganlikun 0:06036f8bee2d 2182 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 2183
ganlikun 0:06036f8bee2d 2184 /* Check function parameters */
ganlikun 0:06036f8bee2d 2185 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 2186
ganlikun 0:06036f8bee2d 2187 /* Enable/Disable pull-down on lanes */
ganlikun 0:06036f8bee2d 2188 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_PDEN;
ganlikun 0:06036f8bee2d 2189 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 18U);
ganlikun 0:06036f8bee2d 2190
ganlikun 0:06036f8bee2d 2191 /* Process unlocked */
ganlikun 0:06036f8bee2d 2192 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 2193
ganlikun 0:06036f8bee2d 2194 return HAL_OK;
ganlikun 0:06036f8bee2d 2195 }
ganlikun 0:06036f8bee2d 2196
ganlikun 0:06036f8bee2d 2197 /**
ganlikun 0:06036f8bee2d 2198 * @brief Switch off the contention detection on data lanes
ganlikun 0:06036f8bee2d 2199 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 2200 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 2201 * @param State: ENABLE or DISABLE
ganlikun 0:06036f8bee2d 2202 * @retval HAL status
ganlikun 0:06036f8bee2d 2203 */
ganlikun 0:06036f8bee2d 2204 HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State)
ganlikun 0:06036f8bee2d 2205 {
ganlikun 0:06036f8bee2d 2206 /* Process locked */
ganlikun 0:06036f8bee2d 2207 __HAL_LOCK(hdsi);
ganlikun 0:06036f8bee2d 2208
ganlikun 0:06036f8bee2d 2209 /* Check function parameters */
ganlikun 0:06036f8bee2d 2210 assert_param(IS_FUNCTIONAL_STATE(State));
ganlikun 0:06036f8bee2d 2211
ganlikun 0:06036f8bee2d 2212 /* Contention Detection on Data Lanes OFF */
ganlikun 0:06036f8bee2d 2213 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_CDOFFDL;
ganlikun 0:06036f8bee2d 2214 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 14U);
ganlikun 0:06036f8bee2d 2215
ganlikun 0:06036f8bee2d 2216 /* Process unlocked */
ganlikun 0:06036f8bee2d 2217 __HAL_UNLOCK(hdsi);
ganlikun 0:06036f8bee2d 2218
ganlikun 0:06036f8bee2d 2219 return HAL_OK;
ganlikun 0:06036f8bee2d 2220 }
ganlikun 0:06036f8bee2d 2221
ganlikun 0:06036f8bee2d 2222 /**
ganlikun 0:06036f8bee2d 2223 * @}
ganlikun 0:06036f8bee2d 2224 */
ganlikun 0:06036f8bee2d 2225
ganlikun 0:06036f8bee2d 2226 /** @defgroup DSI_Group4 Peripheral State and Errors functions
ganlikun 0:06036f8bee2d 2227 * @brief Peripheral State and Errors functions
ganlikun 0:06036f8bee2d 2228 *
ganlikun 0:06036f8bee2d 2229 @verbatim
ganlikun 0:06036f8bee2d 2230 ===============================================================================
ganlikun 0:06036f8bee2d 2231 ##### Peripheral State and Errors functions #####
ganlikun 0:06036f8bee2d 2232 ===============================================================================
ganlikun 0:06036f8bee2d 2233 [..]
ganlikun 0:06036f8bee2d 2234 This subsection provides functions allowing to
ganlikun 0:06036f8bee2d 2235 (+) Check the DSI state.
ganlikun 0:06036f8bee2d 2236 (+) Get error code.
ganlikun 0:06036f8bee2d 2237
ganlikun 0:06036f8bee2d 2238 @endverbatim
ganlikun 0:06036f8bee2d 2239 * @{
ganlikun 0:06036f8bee2d 2240 */
ganlikun 0:06036f8bee2d 2241
ganlikun 0:06036f8bee2d 2242 /**
ganlikun 0:06036f8bee2d 2243 * @brief Return the DSI state
ganlikun 0:06036f8bee2d 2244 * @param hdsi: pointer to a DSI_HandleTypeDef structure that contains
ganlikun 0:06036f8bee2d 2245 * the configuration information for the DSI.
ganlikun 0:06036f8bee2d 2246 * @retval HAL state
ganlikun 0:06036f8bee2d 2247 */
ganlikun 0:06036f8bee2d 2248 HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi)
ganlikun 0:06036f8bee2d 2249 {
ganlikun 0:06036f8bee2d 2250 return hdsi->State;
ganlikun 0:06036f8bee2d 2251 }
ganlikun 0:06036f8bee2d 2252
ganlikun 0:06036f8bee2d 2253 /**
ganlikun 0:06036f8bee2d 2254 * @}
ganlikun 0:06036f8bee2d 2255 */
ganlikun 0:06036f8bee2d 2256
ganlikun 0:06036f8bee2d 2257 /**
ganlikun 0:06036f8bee2d 2258 * @}
ganlikun 0:06036f8bee2d 2259 */
ganlikun 0:06036f8bee2d 2260 #endif /* STM32F469xx || STM32F479xx */
ganlikun 0:06036f8bee2d 2261 #endif /* HAL_DSI_MODULE_ENABLED */
ganlikun 0:06036f8bee2d 2262 /**
ganlikun 0:06036f8bee2d 2263 * @}
ganlikun 0:06036f8bee2d 2264 */
ganlikun 0:06036f8bee2d 2265
ganlikun 0:06036f8bee2d 2266 /**
ganlikun 0:06036f8bee2d 2267 * @}
ganlikun 0:06036f8bee2d 2268 */
ganlikun 0:06036f8bee2d 2269
ganlikun 0:06036f8bee2d 2270 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
ganlikun 0:06036f8bee2d 2271