Gan likun / The prosthetic control

The prosthetic control（MIT）

targets/TARGET_STM/stm_spi_api.c@0:20e0c61e0684, 2022-06-23 (annotated)

Committer:
ganlikun
Date:
Thu Jun 23 05:23:34 2022 +0000
Revision:
0:20e0c61e0684
01

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ganlikun 0:20e0c61e0684 1 /* mbed Microcontroller Library
ganlikun 0:20e0c61e0684 2 *******************************************************************************
ganlikun 0:20e0c61e0684 3 * Copyright (c) 2015, STMicroelectronics
ganlikun 0:20e0c61e0684 4 * All rights reserved.
ganlikun 0:20e0c61e0684 5 *
ganlikun 0:20e0c61e0684 6 * Redistribution and use in source and binary forms, with or without
ganlikun 0:20e0c61e0684 7 * modification, are permitted provided that the following conditions are met:
ganlikun 0:20e0c61e0684 8 *
ganlikun 0:20e0c61e0684 9 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:20e0c61e0684 10 * this list of conditions and the following disclaimer.
ganlikun 0:20e0c61e0684 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:20e0c61e0684 12 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:20e0c61e0684 13 * and/or other materials provided with the distribution.
ganlikun 0:20e0c61e0684 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:20e0c61e0684 15 * may be used to endorse or promote products derived from this software
ganlikun 0:20e0c61e0684 16 * without specific prior written permission.
ganlikun 0:20e0c61e0684 17 *
ganlikun 0:20e0c61e0684 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:20e0c61e0684 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:20e0c61e0684 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:20e0c61e0684 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:20e0c61e0684 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:20e0c61e0684 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:20e0c61e0684 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:20e0c61e0684 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:20e0c61e0684 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:20e0c61e0684 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:20e0c61e0684 28 *******************************************************************************
ganlikun 0:20e0c61e0684 29 */
ganlikun 0:20e0c61e0684 30 #include "mbed_assert.h"
ganlikun 0:20e0c61e0684 31 #include "mbed_error.h"
ganlikun 0:20e0c61e0684 32 #include "spi_api.h"
ganlikun 0:20e0c61e0684 33
ganlikun 0:20e0c61e0684 34 #if DEVICE_SPI
ganlikun 0:20e0c61e0684 35 #include <stdbool.h>
ganlikun 0:20e0c61e0684 36 #include <math.h>
ganlikun 0:20e0c61e0684 37 #include <string.h>
ganlikun 0:20e0c61e0684 38 #include "cmsis.h"
ganlikun 0:20e0c61e0684 39 #include "pinmap.h"
ganlikun 0:20e0c61e0684 40 #include "PeripheralPins.h"
ganlikun 0:20e0c61e0684 41 #include "spi_device.h"
ganlikun 0:20e0c61e0684 42
ganlikun 0:20e0c61e0684 43 #if DEVICE_SPI_ASYNCH
ganlikun 0:20e0c61e0684 44 #define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi.spi))
ganlikun 0:20e0c61e0684 45 #else
ganlikun 0:20e0c61e0684 46 #define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi))
ganlikun 0:20e0c61e0684 47 #endif
ganlikun 0:20e0c61e0684 48
ganlikun 0:20e0c61e0684 49 #if DEVICE_SPI_ASYNCH
ganlikun 0:20e0c61e0684 50 #define SPI_S(obj) (( struct spi_s *)(&(obj->spi)))
ganlikun 0:20e0c61e0684 51 #else
ganlikun 0:20e0c61e0684 52 #define SPI_S(obj) (( struct spi_s *)(obj))
ganlikun 0:20e0c61e0684 53 #endif
ganlikun 0:20e0c61e0684 54
ganlikun 0:20e0c61e0684 55 #ifndef DEBUG_STDIO
ganlikun 0:20e0c61e0684 56 # define DEBUG_STDIO 0
ganlikun 0:20e0c61e0684 57 #endif
ganlikun 0:20e0c61e0684 58
ganlikun 0:20e0c61e0684 59 #if DEBUG_STDIO
ganlikun 0:20e0c61e0684 60 # include <stdio.h>
ganlikun 0:20e0c61e0684 61 # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0)
ganlikun 0:20e0c61e0684 62 #else
ganlikun 0:20e0c61e0684 63 # define DEBUG_PRINTF(...) {}
ganlikun 0:20e0c61e0684 64 #endif
ganlikun 0:20e0c61e0684 65
ganlikun 0:20e0c61e0684 66 /* Consider 10ms as the default timeout for sending/receving 1 byte */
ganlikun 0:20e0c61e0684 67 #define TIMEOUT_1_BYTE 10
ganlikun 0:20e0c61e0684 68
ganlikun 0:20e0c61e0684 69 void init_spi(spi_t *obj)
ganlikun 0:20e0c61e0684 70 {
ganlikun 0:20e0c61e0684 71 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 72 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 73
ganlikun 0:20e0c61e0684 74 __HAL_SPI_DISABLE(handle);
ganlikun 0:20e0c61e0684 75
ganlikun 0:20e0c61e0684 76 DEBUG_PRINTF("init_spi: instance=0x%8X\r\n", (int)handle->Instance);
ganlikun 0:20e0c61e0684 77 if (HAL_SPI_Init(handle) != HAL_OK) {
ganlikun 0:20e0c61e0684 78 error("Cannot initialize SPI");
ganlikun 0:20e0c61e0684 79 }
ganlikun 0:20e0c61e0684 80
ganlikun 0:20e0c61e0684 81 /* In case of standard 4 wires SPI,PI can be kept enabled all time
ganlikun 0:20e0c61e0684 82 * and SCK will only be generated during the write operations. But in case
ganlikun 0:20e0c61e0684 83 * of 3 wires, it should be only enabled during rd/wr unitary operations,
ganlikun 0:20e0c61e0684 84 * which is handled inside STM32 HAL layer.
ganlikun 0:20e0c61e0684 85 */
ganlikun 0:20e0c61e0684 86 if (handle->Init.Direction == SPI_DIRECTION_2LINES) {
ganlikun 0:20e0c61e0684 87 __HAL_SPI_ENABLE(handle);
ganlikun 0:20e0c61e0684 88 }
ganlikun 0:20e0c61e0684 89 }
ganlikun 0:20e0c61e0684 90
ganlikun 0:20e0c61e0684 91 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
ganlikun 0:20e0c61e0684 92 {
ganlikun 0:20e0c61e0684 93 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 94 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 95
ganlikun 0:20e0c61e0684 96 // Determine the SPI to use
ganlikun 0:20e0c61e0684 97 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
ganlikun 0:20e0c61e0684 98 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
ganlikun 0:20e0c61e0684 99 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
ganlikun 0:20e0c61e0684 100 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
ganlikun 0:20e0c61e0684 101
ganlikun 0:20e0c61e0684 102 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
ganlikun 0:20e0c61e0684 103 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
ganlikun 0:20e0c61e0684 104
ganlikun 0:20e0c61e0684 105 spiobj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
ganlikun 0:20e0c61e0684 106 MBED_ASSERT(spiobj->spi != (SPIName)NC);
ganlikun 0:20e0c61e0684 107
ganlikun 0:20e0c61e0684 108 #if defined SPI1_BASE
ganlikun 0:20e0c61e0684 109 // Enable SPI clock
ganlikun 0:20e0c61e0684 110 if (spiobj->spi == SPI_1) {
ganlikun 0:20e0c61e0684 111 __HAL_RCC_SPI1_CLK_ENABLE();
ganlikun 0:20e0c61e0684 112 spiobj->spiIRQ = SPI1_IRQn;
ganlikun 0:20e0c61e0684 113 }
ganlikun 0:20e0c61e0684 114 #endif
ganlikun 0:20e0c61e0684 115
ganlikun 0:20e0c61e0684 116 #if defined SPI2_BASE
ganlikun 0:20e0c61e0684 117 if (spiobj->spi == SPI_2) {
ganlikun 0:20e0c61e0684 118 __HAL_RCC_SPI2_CLK_ENABLE();
ganlikun 0:20e0c61e0684 119 spiobj->spiIRQ = SPI2_IRQn;
ganlikun 0:20e0c61e0684 120 }
ganlikun 0:20e0c61e0684 121 #endif
ganlikun 0:20e0c61e0684 122
ganlikun 0:20e0c61e0684 123 #if defined SPI3_BASE
ganlikun 0:20e0c61e0684 124 if (spiobj->spi == SPI_3) {
ganlikun 0:20e0c61e0684 125 __HAL_RCC_SPI3_CLK_ENABLE();
ganlikun 0:20e0c61e0684 126 spiobj->spiIRQ = SPI3_IRQn;
ganlikun 0:20e0c61e0684 127 }
ganlikun 0:20e0c61e0684 128 #endif
ganlikun 0:20e0c61e0684 129
ganlikun 0:20e0c61e0684 130 #if defined SPI4_BASE
ganlikun 0:20e0c61e0684 131 if (spiobj->spi == SPI_4) {
ganlikun 0:20e0c61e0684 132 __HAL_RCC_SPI4_CLK_ENABLE();
ganlikun 0:20e0c61e0684 133 spiobj->spiIRQ = SPI4_IRQn;
ganlikun 0:20e0c61e0684 134 }
ganlikun 0:20e0c61e0684 135 #endif
ganlikun 0:20e0c61e0684 136
ganlikun 0:20e0c61e0684 137 #if defined SPI5_BASE
ganlikun 0:20e0c61e0684 138 if (spiobj->spi == SPI_5) {
ganlikun 0:20e0c61e0684 139 __HAL_RCC_SPI5_CLK_ENABLE();
ganlikun 0:20e0c61e0684 140 spiobj->spiIRQ = SPI5_IRQn;
ganlikun 0:20e0c61e0684 141 }
ganlikun 0:20e0c61e0684 142 #endif
ganlikun 0:20e0c61e0684 143
ganlikun 0:20e0c61e0684 144 #if defined SPI6_BASE
ganlikun 0:20e0c61e0684 145 if (spiobj->spi == SPI_6) {
ganlikun 0:20e0c61e0684 146 __HAL_RCC_SPI6_CLK_ENABLE();
ganlikun 0:20e0c61e0684 147 spiobj->spiIRQ = SPI6_IRQn;
ganlikun 0:20e0c61e0684 148 }
ganlikun 0:20e0c61e0684 149 #endif
ganlikun 0:20e0c61e0684 150
ganlikun 0:20e0c61e0684 151 // Configure the SPI pins
ganlikun 0:20e0c61e0684 152 pinmap_pinout(mosi, PinMap_SPI_MOSI);
ganlikun 0:20e0c61e0684 153 pinmap_pinout(miso, PinMap_SPI_MISO);
ganlikun 0:20e0c61e0684 154 pinmap_pinout(sclk, PinMap_SPI_SCLK);
ganlikun 0:20e0c61e0684 155 spiobj->pin_miso = miso;
ganlikun 0:20e0c61e0684 156 spiobj->pin_mosi = mosi;
ganlikun 0:20e0c61e0684 157 spiobj->pin_sclk = sclk;
ganlikun 0:20e0c61e0684 158 spiobj->pin_ssel = ssel;
ganlikun 0:20e0c61e0684 159 if (ssel != NC) {
ganlikun 0:20e0c61e0684 160 pinmap_pinout(ssel, PinMap_SPI_SSEL);
ganlikun 0:20e0c61e0684 161 } else {
ganlikun 0:20e0c61e0684 162 handle->Init.NSS = SPI_NSS_SOFT;
ganlikun 0:20e0c61e0684 163 }
ganlikun 0:20e0c61e0684 164
ganlikun 0:20e0c61e0684 165 /* Fill default value */
ganlikun 0:20e0c61e0684 166 handle->Instance = SPI_INST(obj);
ganlikun 0:20e0c61e0684 167 handle->Init.Mode = SPI_MODE_MASTER;
ganlikun 0:20e0c61e0684 168 handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
ganlikun 0:20e0c61e0684 169
ganlikun 0:20e0c61e0684 170 if (miso != NC) {
ganlikun 0:20e0c61e0684 171 handle->Init.Direction = SPI_DIRECTION_2LINES;
ganlikun 0:20e0c61e0684 172 } else {
ganlikun 0:20e0c61e0684 173 handle->Init.Direction = SPI_DIRECTION_1LINE;
ganlikun 0:20e0c61e0684 174 }
ganlikun 0:20e0c61e0684 175
ganlikun 0:20e0c61e0684 176 handle->Init.CLKPhase = SPI_PHASE_1EDGE;
ganlikun 0:20e0c61e0684 177 handle->Init.CLKPolarity = SPI_POLARITY_LOW;
ganlikun 0:20e0c61e0684 178 handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
ganlikun 0:20e0c61e0684 179 handle->Init.CRCPolynomial = 7;
ganlikun 0:20e0c61e0684 180 handle->Init.DataSize = SPI_DATASIZE_8BIT;
ganlikun 0:20e0c61e0684 181 handle->Init.FirstBit = SPI_FIRSTBIT_MSB;
ganlikun 0:20e0c61e0684 182 handle->Init.TIMode = SPI_TIMODE_DISABLE;
ganlikun 0:20e0c61e0684 183
ganlikun 0:20e0c61e0684 184 init_spi(obj);
ganlikun 0:20e0c61e0684 185 }
ganlikun 0:20e0c61e0684 186
ganlikun 0:20e0c61e0684 187 void spi_free(spi_t *obj)
ganlikun 0:20e0c61e0684 188 {
ganlikun 0:20e0c61e0684 189 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 190 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 191
ganlikun 0:20e0c61e0684 192 DEBUG_PRINTF("spi_free\r\n");
ganlikun 0:20e0c61e0684 193
ganlikun 0:20e0c61e0684 194 __HAL_SPI_DISABLE(handle);
ganlikun 0:20e0c61e0684 195 HAL_SPI_DeInit(handle);
ganlikun 0:20e0c61e0684 196
ganlikun 0:20e0c61e0684 197 #if defined SPI1_BASE
ganlikun 0:20e0c61e0684 198 // Reset SPI and disable clock
ganlikun 0:20e0c61e0684 199 if (spiobj->spi == SPI_1) {
ganlikun 0:20e0c61e0684 200 __HAL_RCC_SPI1_FORCE_RESET();
ganlikun 0:20e0c61e0684 201 __HAL_RCC_SPI1_RELEASE_RESET();
ganlikun 0:20e0c61e0684 202 __HAL_RCC_SPI1_CLK_DISABLE();
ganlikun 0:20e0c61e0684 203 }
ganlikun 0:20e0c61e0684 204 #endif
ganlikun 0:20e0c61e0684 205 #if defined SPI2_BASE
ganlikun 0:20e0c61e0684 206 if (spiobj->spi == SPI_2) {
ganlikun 0:20e0c61e0684 207 __HAL_RCC_SPI2_FORCE_RESET();
ganlikun 0:20e0c61e0684 208 __HAL_RCC_SPI2_RELEASE_RESET();
ganlikun 0:20e0c61e0684 209 __HAL_RCC_SPI2_CLK_DISABLE();
ganlikun 0:20e0c61e0684 210 }
ganlikun 0:20e0c61e0684 211 #endif
ganlikun 0:20e0c61e0684 212
ganlikun 0:20e0c61e0684 213 #if defined SPI3_BASE
ganlikun 0:20e0c61e0684 214 if (spiobj->spi == SPI_3) {
ganlikun 0:20e0c61e0684 215 __HAL_RCC_SPI3_FORCE_RESET();
ganlikun 0:20e0c61e0684 216 __HAL_RCC_SPI3_RELEASE_RESET();
ganlikun 0:20e0c61e0684 217 __HAL_RCC_SPI3_CLK_DISABLE();
ganlikun 0:20e0c61e0684 218 }
ganlikun 0:20e0c61e0684 219 #endif
ganlikun 0:20e0c61e0684 220
ganlikun 0:20e0c61e0684 221 #if defined SPI4_BASE
ganlikun 0:20e0c61e0684 222 if (spiobj->spi == SPI_4) {
ganlikun 0:20e0c61e0684 223 __HAL_RCC_SPI4_FORCE_RESET();
ganlikun 0:20e0c61e0684 224 __HAL_RCC_SPI4_RELEASE_RESET();
ganlikun 0:20e0c61e0684 225 __HAL_RCC_SPI4_CLK_DISABLE();
ganlikun 0:20e0c61e0684 226 }
ganlikun 0:20e0c61e0684 227 #endif
ganlikun 0:20e0c61e0684 228
ganlikun 0:20e0c61e0684 229 #if defined SPI5_BASE
ganlikun 0:20e0c61e0684 230 if (spiobj->spi == SPI_5) {
ganlikun 0:20e0c61e0684 231 __HAL_RCC_SPI5_FORCE_RESET();
ganlikun 0:20e0c61e0684 232 __HAL_RCC_SPI5_RELEASE_RESET();
ganlikun 0:20e0c61e0684 233 __HAL_RCC_SPI5_CLK_DISABLE();
ganlikun 0:20e0c61e0684 234 }
ganlikun 0:20e0c61e0684 235 #endif
ganlikun 0:20e0c61e0684 236
ganlikun 0:20e0c61e0684 237 #if defined SPI6_BASE
ganlikun 0:20e0c61e0684 238 if (spiobj->spi == SPI_6) {
ganlikun 0:20e0c61e0684 239 __HAL_RCC_SPI6_FORCE_RESET();
ganlikun 0:20e0c61e0684 240 __HAL_RCC_SPI6_RELEASE_RESET();
ganlikun 0:20e0c61e0684 241 __HAL_RCC_SPI6_CLK_DISABLE();
ganlikun 0:20e0c61e0684 242 }
ganlikun 0:20e0c61e0684 243 #endif
ganlikun 0:20e0c61e0684 244
ganlikun 0:20e0c61e0684 245 // Configure GPIOs
ganlikun 0:20e0c61e0684 246 pin_function(spiobj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ganlikun 0:20e0c61e0684 247 pin_function(spiobj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ganlikun 0:20e0c61e0684 248 pin_function(spiobj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ganlikun 0:20e0c61e0684 249 if (handle->Init.NSS != SPI_NSS_SOFT) {
ganlikun 0:20e0c61e0684 250 pin_function(spiobj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
ganlikun 0:20e0c61e0684 251 }
ganlikun 0:20e0c61e0684 252 }
ganlikun 0:20e0c61e0684 253
ganlikun 0:20e0c61e0684 254 void spi_format(spi_t *obj, int bits, int mode, int slave)
ganlikun 0:20e0c61e0684 255 {
ganlikun 0:20e0c61e0684 256 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 257 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 258
ganlikun 0:20e0c61e0684 259 DEBUG_PRINTF("spi_format, bits:%d, mode:%d, slave?:%d\r\n", bits, mode, slave);
ganlikun 0:20e0c61e0684 260
ganlikun 0:20e0c61e0684 261 // Save new values
ganlikun 0:20e0c61e0684 262 handle->Init.DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
ganlikun 0:20e0c61e0684 263
ganlikun 0:20e0c61e0684 264 switch (mode) {
ganlikun 0:20e0c61e0684 265 case 0:
ganlikun 0:20e0c61e0684 266 handle->Init.CLKPolarity = SPI_POLARITY_LOW;
ganlikun 0:20e0c61e0684 267 handle->Init.CLKPhase = SPI_PHASE_1EDGE;
ganlikun 0:20e0c61e0684 268 break;
ganlikun 0:20e0c61e0684 269 case 1:
ganlikun 0:20e0c61e0684 270 handle->Init.CLKPolarity = SPI_POLARITY_LOW;
ganlikun 0:20e0c61e0684 271 handle->Init.CLKPhase = SPI_PHASE_2EDGE;
ganlikun 0:20e0c61e0684 272 break;
ganlikun 0:20e0c61e0684 273 case 2:
ganlikun 0:20e0c61e0684 274 handle->Init.CLKPolarity = SPI_POLARITY_HIGH;
ganlikun 0:20e0c61e0684 275 handle->Init.CLKPhase = SPI_PHASE_1EDGE;
ganlikun 0:20e0c61e0684 276 break;
ganlikun 0:20e0c61e0684 277 default:
ganlikun 0:20e0c61e0684 278 handle->Init.CLKPolarity = SPI_POLARITY_HIGH;
ganlikun 0:20e0c61e0684 279 handle->Init.CLKPhase = SPI_PHASE_2EDGE;
ganlikun 0:20e0c61e0684 280 break;
ganlikun 0:20e0c61e0684 281 }
ganlikun 0:20e0c61e0684 282
ganlikun 0:20e0c61e0684 283 if (handle->Init.NSS != SPI_NSS_SOFT) {
ganlikun 0:20e0c61e0684 284 handle->Init.NSS = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
ganlikun 0:20e0c61e0684 285 }
ganlikun 0:20e0c61e0684 286
ganlikun 0:20e0c61e0684 287 handle->Init.Mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
ganlikun 0:20e0c61e0684 288
ganlikun 0:20e0c61e0684 289 init_spi(obj);
ganlikun 0:20e0c61e0684 290 }
ganlikun 0:20e0c61e0684 291
ganlikun 0:20e0c61e0684 292 /*
ganlikun 0:20e0c61e0684 293 * Only the IP clock input is family dependant so it computed
ganlikun 0:20e0c61e0684 294 * separately in spi_get_clock_freq
ganlikun 0:20e0c61e0684 295 */
ganlikun 0:20e0c61e0684 296 extern int spi_get_clock_freq(spi_t *obj);
ganlikun 0:20e0c61e0684 297
ganlikun 0:20e0c61e0684 298 static const uint16_t baudrate_prescaler_table[] = {SPI_BAUDRATEPRESCALER_2,
ganlikun 0:20e0c61e0684 299 SPI_BAUDRATEPRESCALER_4,
ganlikun 0:20e0c61e0684 300 SPI_BAUDRATEPRESCALER_8,
ganlikun 0:20e0c61e0684 301 SPI_BAUDRATEPRESCALER_16,
ganlikun 0:20e0c61e0684 302 SPI_BAUDRATEPRESCALER_32,
ganlikun 0:20e0c61e0684 303 SPI_BAUDRATEPRESCALER_64,
ganlikun 0:20e0c61e0684 304 SPI_BAUDRATEPRESCALER_128,
ganlikun 0:20e0c61e0684 305 SPI_BAUDRATEPRESCALER_256};
ganlikun 0:20e0c61e0684 306
ganlikun 0:20e0c61e0684 307 void spi_frequency(spi_t *obj, int hz) {
ganlikun 0:20e0c61e0684 308 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 309 int spi_hz = 0;
ganlikun 0:20e0c61e0684 310 uint8_t prescaler_rank = 0;
ganlikun 0:20e0c61e0684 311 uint8_t last_index = (sizeof(baudrate_prescaler_table)/sizeof(baudrate_prescaler_table[0])) - 1;
ganlikun 0:20e0c61e0684 312 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 313
ganlikun 0:20e0c61e0684 314 /* Calculate the spi clock for prescaler_rank 0: SPI_BAUDRATEPRESCALER_2 */
ganlikun 0:20e0c61e0684 315 spi_hz = spi_get_clock_freq(obj) / 2;
ganlikun 0:20e0c61e0684 316
ganlikun 0:20e0c61e0684 317 /* Define pre-scaler in order to get highest available frequency below requested frequency */
ganlikun 0:20e0c61e0684 318 while ((spi_hz > hz) && (prescaler_rank < last_index)) {
ganlikun 0:20e0c61e0684 319 spi_hz = spi_hz / 2;
ganlikun 0:20e0c61e0684 320 prescaler_rank++;
ganlikun 0:20e0c61e0684 321 }
ganlikun 0:20e0c61e0684 322
ganlikun 0:20e0c61e0684 323 /* Use the best fit pre-scaler */
ganlikun 0:20e0c61e0684 324 handle->Init.BaudRatePrescaler = baudrate_prescaler_table[prescaler_rank];
ganlikun 0:20e0c61e0684 325
ganlikun 0:20e0c61e0684 326 /* In case maximum pre-scaler still gives too high freq, raise an error */
ganlikun 0:20e0c61e0684 327 if (spi_hz > hz) {
ganlikun 0:20e0c61e0684 328 DEBUG_PRINTF("WARNING: lowest SPI freq (%d) higher than requested (%d)\r\n", spi_hz, hz);
ganlikun 0:20e0c61e0684 329 }
ganlikun 0:20e0c61e0684 330
ganlikun 0:20e0c61e0684 331 DEBUG_PRINTF("spi_frequency, request:%d, select:%d\r\n", hz, spi_hz);
ganlikun 0:20e0c61e0684 332
ganlikun 0:20e0c61e0684 333 init_spi(obj);
ganlikun 0:20e0c61e0684 334 }
ganlikun 0:20e0c61e0684 335
ganlikun 0:20e0c61e0684 336 static inline int ssp_readable(spi_t *obj)
ganlikun 0:20e0c61e0684 337 {
ganlikun 0:20e0c61e0684 338 int status;
ganlikun 0:20e0c61e0684 339 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 340 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 341
ganlikun 0:20e0c61e0684 342 // Check if data is received
ganlikun 0:20e0c61e0684 343 status = ((__HAL_SPI_GET_FLAG(handle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
ganlikun 0:20e0c61e0684 344 return status;
ganlikun 0:20e0c61e0684 345 }
ganlikun 0:20e0c61e0684 346
ganlikun 0:20e0c61e0684 347 static inline int ssp_writeable(spi_t *obj)
ganlikun 0:20e0c61e0684 348 {
ganlikun 0:20e0c61e0684 349 int status;
ganlikun 0:20e0c61e0684 350 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 351 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 352
ganlikun 0:20e0c61e0684 353 // Check if data is transmitted
ganlikun 0:20e0c61e0684 354 status = ((__HAL_SPI_GET_FLAG(handle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
ganlikun 0:20e0c61e0684 355 return status;
ganlikun 0:20e0c61e0684 356 }
ganlikun 0:20e0c61e0684 357
ganlikun 0:20e0c61e0684 358 static inline int ssp_busy(spi_t *obj)
ganlikun 0:20e0c61e0684 359 {
ganlikun 0:20e0c61e0684 360 int status;
ganlikun 0:20e0c61e0684 361 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 362 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 363 status = ((__HAL_SPI_GET_FLAG(handle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
ganlikun 0:20e0c61e0684 364 return status;
ganlikun 0:20e0c61e0684 365 }
ganlikun 0:20e0c61e0684 366
ganlikun 0:20e0c61e0684 367 int spi_master_write(spi_t *obj, int value)
ganlikun 0:20e0c61e0684 368 {
ganlikun 0:20e0c61e0684 369 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 370 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 371
ganlikun 0:20e0c61e0684 372 if (handle->Init.Direction == SPI_DIRECTION_1LINE) {
ganlikun 0:20e0c61e0684 373 return HAL_SPI_Transmit(handle, (uint8_t*)&value, 1, TIMEOUT_1_BYTE);
ganlikun 0:20e0c61e0684 374 }
ganlikun 0:20e0c61e0684 375
ganlikun 0:20e0c61e0684 376 #if defined(LL_SPI_RX_FIFO_TH_HALF)
ganlikun 0:20e0c61e0684 377 /* Configure the default data size */
ganlikun 0:20e0c61e0684 378 if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
ganlikun 0:20e0c61e0684 379 LL_SPI_SetRxFIFOThreshold(SPI_INST(obj), LL_SPI_RX_FIFO_TH_HALF);
ganlikun 0:20e0c61e0684 380 } else {
ganlikun 0:20e0c61e0684 381 LL_SPI_SetRxFIFOThreshold(SPI_INST(obj), LL_SPI_RX_FIFO_TH_QUARTER);
ganlikun 0:20e0c61e0684 382 }
ganlikun 0:20e0c61e0684 383 #endif
ganlikun 0:20e0c61e0684 384
ganlikun 0:20e0c61e0684 385 /* Here we're using LL which means direct registers access
ganlikun 0:20e0c61e0684 386 * There is no error management, so we may end up looping
ganlikun 0:20e0c61e0684 387 * infinitely here in case of faulty device for insatnce,
ganlikun 0:20e0c61e0684 388 * but this will increase performances significantly
ganlikun 0:20e0c61e0684 389 */
ganlikun 0:20e0c61e0684 390
ganlikun 0:20e0c61e0684 391 /* Wait TXE flag to transmit data */
ganlikun 0:20e0c61e0684 392 while (!LL_SPI_IsActiveFlag_TXE(SPI_INST(obj)));
ganlikun 0:20e0c61e0684 393
ganlikun 0:20e0c61e0684 394 if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
ganlikun 0:20e0c61e0684 395 LL_SPI_TransmitData16(SPI_INST(obj), value);
ganlikun 0:20e0c61e0684 396 } else {
ganlikun 0:20e0c61e0684 397 LL_SPI_TransmitData8(SPI_INST(obj), (uint8_t) value);
ganlikun 0:20e0c61e0684 398 }
ganlikun 0:20e0c61e0684 399
ganlikun 0:20e0c61e0684 400 /* Then wait RXE flag before reading */
ganlikun 0:20e0c61e0684 401 while (!LL_SPI_IsActiveFlag_RXNE(SPI_INST(obj)));
ganlikun 0:20e0c61e0684 402
ganlikun 0:20e0c61e0684 403 if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
ganlikun 0:20e0c61e0684 404 return LL_SPI_ReceiveData16(SPI_INST(obj));
ganlikun 0:20e0c61e0684 405 } else {
ganlikun 0:20e0c61e0684 406 return LL_SPI_ReceiveData8(SPI_INST(obj));
ganlikun 0:20e0c61e0684 407 }
ganlikun 0:20e0c61e0684 408 }
ganlikun 0:20e0c61e0684 409
ganlikun 0:20e0c61e0684 410 int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
ganlikun 0:20e0c61e0684 411 char *rx_buffer, int rx_length, char write_fill)
ganlikun 0:20e0c61e0684 412 {
ganlikun 0:20e0c61e0684 413 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 414 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 415 int total = (tx_length > rx_length) ? tx_length : rx_length;
ganlikun 0:20e0c61e0684 416 int i = 0;
ganlikun 0:20e0c61e0684 417 if (handle->Init.Direction == SPI_DIRECTION_2LINES) {
ganlikun 0:20e0c61e0684 418 for (i = 0; i < total; i++) {
ganlikun 0:20e0c61e0684 419 char out = (i < tx_length) ? tx_buffer[i] : write_fill;
ganlikun 0:20e0c61e0684 420 char in = spi_master_write(obj, out);
ganlikun 0:20e0c61e0684 421 if (i < rx_length) {
ganlikun 0:20e0c61e0684 422 rx_buffer[i] = in;
ganlikun 0:20e0c61e0684 423 }
ganlikun 0:20e0c61e0684 424 }
ganlikun 0:20e0c61e0684 425 } else {
ganlikun 0:20e0c61e0684 426 /* In case of 1 WIRE only, first handle TX, then Rx */
ganlikun 0:20e0c61e0684 427 if (tx_length != 0) {
ganlikun 0:20e0c61e0684 428 if (HAL_OK != HAL_SPI_Transmit(handle, (uint8_t*)tx_buffer, tx_length, tx_length*TIMEOUT_1_BYTE)) {
ganlikun 0:20e0c61e0684 429 /* report an error */
ganlikun 0:20e0c61e0684 430 total = 0;
ganlikun 0:20e0c61e0684 431 }
ganlikun 0:20e0c61e0684 432 }
ganlikun 0:20e0c61e0684 433 if (rx_length != 0) {
ganlikun 0:20e0c61e0684 434 if (HAL_OK != HAL_SPI_Receive(handle, (uint8_t*)rx_buffer, rx_length, rx_length*TIMEOUT_1_BYTE)) {
ganlikun 0:20e0c61e0684 435 /* report an error */
ganlikun 0:20e0c61e0684 436 total = 0;
ganlikun 0:20e0c61e0684 437 }
ganlikun 0:20e0c61e0684 438 }
ganlikun 0:20e0c61e0684 439 }
ganlikun 0:20e0c61e0684 440
ganlikun 0:20e0c61e0684 441 return total;
ganlikun 0:20e0c61e0684 442 }
ganlikun 0:20e0c61e0684 443
ganlikun 0:20e0c61e0684 444 int spi_slave_receive(spi_t *obj)
ganlikun 0:20e0c61e0684 445 {
ganlikun 0:20e0c61e0684 446 return ((ssp_readable(obj) && !ssp_busy(obj)) ? 1 : 0);
ganlikun 0:20e0c61e0684 447 };
ganlikun 0:20e0c61e0684 448
ganlikun 0:20e0c61e0684 449 int spi_slave_read(spi_t *obj)
ganlikun 0:20e0c61e0684 450 {
ganlikun 0:20e0c61e0684 451 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 452 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 453 while (!ssp_readable(obj));
ganlikun 0:20e0c61e0684 454 if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
ganlikun 0:20e0c61e0684 455 return LL_SPI_ReceiveData16(SPI_INST(obj));
ganlikun 0:20e0c61e0684 456 } else {
ganlikun 0:20e0c61e0684 457 return LL_SPI_ReceiveData8(SPI_INST(obj));
ganlikun 0:20e0c61e0684 458 }
ganlikun 0:20e0c61e0684 459 }
ganlikun 0:20e0c61e0684 460
ganlikun 0:20e0c61e0684 461 void spi_slave_write(spi_t *obj, int value)
ganlikun 0:20e0c61e0684 462 {
ganlikun 0:20e0c61e0684 463 SPI_TypeDef *spi = SPI_INST(obj);
ganlikun 0:20e0c61e0684 464 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 465 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 466 while (!ssp_writeable(obj));
ganlikun 0:20e0c61e0684 467 if (handle->Init.DataSize == SPI_DATASIZE_8BIT) {
ganlikun 0:20e0c61e0684 468 // Force 8-bit access to the data register
ganlikun 0:20e0c61e0684 469 uint8_t *p_spi_dr = 0;
ganlikun 0:20e0c61e0684 470 p_spi_dr = (uint8_t *) & (spi->DR);
ganlikun 0:20e0c61e0684 471 *p_spi_dr = (uint8_t)value;
ganlikun 0:20e0c61e0684 472 } else { // SPI_DATASIZE_16BIT
ganlikun 0:20e0c61e0684 473 spi->DR = (uint16_t)value;
ganlikun 0:20e0c61e0684 474 }
ganlikun 0:20e0c61e0684 475 }
ganlikun 0:20e0c61e0684 476
ganlikun 0:20e0c61e0684 477 int spi_busy(spi_t *obj)
ganlikun 0:20e0c61e0684 478 {
ganlikun 0:20e0c61e0684 479 return ssp_busy(obj);
ganlikun 0:20e0c61e0684 480 }
ganlikun 0:20e0c61e0684 481
ganlikun 0:20e0c61e0684 482 #ifdef DEVICE_SPI_ASYNCH
ganlikun 0:20e0c61e0684 483 typedef enum {
ganlikun 0:20e0c61e0684 484 SPI_TRANSFER_TYPE_NONE = 0,
ganlikun 0:20e0c61e0684 485 SPI_TRANSFER_TYPE_TX = 1,
ganlikun 0:20e0c61e0684 486 SPI_TRANSFER_TYPE_RX = 2,
ganlikun 0:20e0c61e0684 487 SPI_TRANSFER_TYPE_TXRX = 3,
ganlikun 0:20e0c61e0684 488 } transfer_type_t;
ganlikun 0:20e0c61e0684 489
ganlikun 0:20e0c61e0684 490
ganlikun 0:20e0c61e0684 491 /// @returns the number of bytes transferred, or `0` if nothing transferred
ganlikun 0:20e0c61e0684 492 static int spi_master_start_asynch_transfer(spi_t *obj, transfer_type_t transfer_type, const void *tx, void *rx, size_t length)
ganlikun 0:20e0c61e0684 493 {
ganlikun 0:20e0c61e0684 494 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 495 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 496 bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT);
ganlikun 0:20e0c61e0684 497 // the HAL expects number of transfers instead of number of bytes
ganlikun 0:20e0c61e0684 498 // so for 16 bit transfer width the count needs to be halved
ganlikun 0:20e0c61e0684 499 size_t words;
ganlikun 0:20e0c61e0684 500
ganlikun 0:20e0c61e0684 501 DEBUG_PRINTF("SPI inst=0x%8X Start: %u, %u\r\n", (int)handle->Instance, transfer_type, length);
ganlikun 0:20e0c61e0684 502
ganlikun 0:20e0c61e0684 503 obj->spi.transfer_type = transfer_type;
ganlikun 0:20e0c61e0684 504
ganlikun 0:20e0c61e0684 505 if (is16bit) {
ganlikun 0:20e0c61e0684 506 words = length / 2;
ganlikun 0:20e0c61e0684 507 } else {
ganlikun 0:20e0c61e0684 508 words = length;
ganlikun 0:20e0c61e0684 509 }
ganlikun 0:20e0c61e0684 510
ganlikun 0:20e0c61e0684 511 // enable the interrupt
ganlikun 0:20e0c61e0684 512 IRQn_Type irq_n = spiobj->spiIRQ;
ganlikun 0:20e0c61e0684 513 NVIC_DisableIRQ(irq_n);
ganlikun 0:20e0c61e0684 514 NVIC_ClearPendingIRQ(irq_n);
ganlikun 0:20e0c61e0684 515 NVIC_SetPriority(irq_n, 1);
ganlikun 0:20e0c61e0684 516 NVIC_EnableIRQ(irq_n);
ganlikun 0:20e0c61e0684 517
ganlikun 0:20e0c61e0684 518 // enable the right hal transfer
ganlikun 0:20e0c61e0684 519 int rc = 0;
ganlikun 0:20e0c61e0684 520 switch(transfer_type) {
ganlikun 0:20e0c61e0684 521 case SPI_TRANSFER_TYPE_TXRX:
ganlikun 0:20e0c61e0684 522 rc = HAL_SPI_TransmitReceive_IT(handle, (uint8_t*)tx, (uint8_t*)rx, words);
ganlikun 0:20e0c61e0684 523 break;
ganlikun 0:20e0c61e0684 524 case SPI_TRANSFER_TYPE_TX:
ganlikun 0:20e0c61e0684 525 rc = HAL_SPI_Transmit_IT(handle, (uint8_t*)tx, words);
ganlikun 0:20e0c61e0684 526 break;
ganlikun 0:20e0c61e0684 527 case SPI_TRANSFER_TYPE_RX:
ganlikun 0:20e0c61e0684 528 // the receive function also "transmits" the receive buffer so in order
ganlikun 0:20e0c61e0684 529 // to guarantee that 0xff is on the line, we explicitly memset it here
ganlikun 0:20e0c61e0684 530 memset(rx, SPI_FILL_WORD, length);
ganlikun 0:20e0c61e0684 531 rc = HAL_SPI_Receive_IT(handle, (uint8_t*)rx, words);
ganlikun 0:20e0c61e0684 532 break;
ganlikun 0:20e0c61e0684 533 default:
ganlikun 0:20e0c61e0684 534 length = 0;
ganlikun 0:20e0c61e0684 535 }
ganlikun 0:20e0c61e0684 536
ganlikun 0:20e0c61e0684 537 if (rc) {
ganlikun 0:20e0c61e0684 538 DEBUG_PRINTF("SPI: RC=%u\n", rc);
ganlikun 0:20e0c61e0684 539 length = 0;
ganlikun 0:20e0c61e0684 540 }
ganlikun 0:20e0c61e0684 541
ganlikun 0:20e0c61e0684 542 return length;
ganlikun 0:20e0c61e0684 543 }
ganlikun 0:20e0c61e0684 544
ganlikun 0:20e0c61e0684 545 // asynchronous API
ganlikun 0:20e0c61e0684 546 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
ganlikun 0:20e0c61e0684 547 {
ganlikun 0:20e0c61e0684 548 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 549 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 550
ganlikun 0:20e0c61e0684 551 // TODO: DMA usage is currently ignored
ganlikun 0:20e0c61e0684 552 (void) hint;
ganlikun 0:20e0c61e0684 553
ganlikun 0:20e0c61e0684 554 // check which use-case we have
ganlikun 0:20e0c61e0684 555 bool use_tx = (tx != NULL && tx_length > 0);
ganlikun 0:20e0c61e0684 556 bool use_rx = (rx != NULL && rx_length > 0);
ganlikun 0:20e0c61e0684 557 bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT);
ganlikun 0:20e0c61e0684 558
ganlikun 0:20e0c61e0684 559 // don't do anything, if the buffers aren't valid
ganlikun 0:20e0c61e0684 560 if (!use_tx && !use_rx)
ganlikun 0:20e0c61e0684 561 return;
ganlikun 0:20e0c61e0684 562
ganlikun 0:20e0c61e0684 563 // copy the buffers to the SPI object
ganlikun 0:20e0c61e0684 564 obj->tx_buff.buffer = (void *) tx;
ganlikun 0:20e0c61e0684 565 obj->tx_buff.length = tx_length;
ganlikun 0:20e0c61e0684 566 obj->tx_buff.pos = 0;
ganlikun 0:20e0c61e0684 567 obj->tx_buff.width = is16bit ? 16 : 8;
ganlikun 0:20e0c61e0684 568
ganlikun 0:20e0c61e0684 569 obj->rx_buff.buffer = rx;
ganlikun 0:20e0c61e0684 570 obj->rx_buff.length = rx_length;
ganlikun 0:20e0c61e0684 571 obj->rx_buff.pos = 0;
ganlikun 0:20e0c61e0684 572 obj->rx_buff.width = obj->tx_buff.width;
ganlikun 0:20e0c61e0684 573
ganlikun 0:20e0c61e0684 574 obj->spi.event = event;
ganlikun 0:20e0c61e0684 575
ganlikun 0:20e0c61e0684 576 DEBUG_PRINTF("SPI: Transfer: %u, %u\n", tx_length, rx_length);
ganlikun 0:20e0c61e0684 577
ganlikun 0:20e0c61e0684 578 // register the thunking handler
ganlikun 0:20e0c61e0684 579 IRQn_Type irq_n = spiobj->spiIRQ;
ganlikun 0:20e0c61e0684 580 NVIC_SetVector(irq_n, (uint32_t)handler);
ganlikun 0:20e0c61e0684 581
ganlikun 0:20e0c61e0684 582 // enable the right hal transfer
ganlikun 0:20e0c61e0684 583 if (use_tx && use_rx) {
ganlikun 0:20e0c61e0684 584 // we cannot manage different rx / tx sizes, let's use smaller one
ganlikun 0:20e0c61e0684 585 size_t size = (tx_length < rx_length)? tx_length : rx_length;
ganlikun 0:20e0c61e0684 586 if(tx_length != rx_length) {
ganlikun 0:20e0c61e0684 587 DEBUG_PRINTF("SPI: Full duplex transfer only 1 size: %d\n", size);
ganlikun 0:20e0c61e0684 588 obj->tx_buff.length = size;
ganlikun 0:20e0c61e0684 589 obj->rx_buff.length = size;
ganlikun 0:20e0c61e0684 590 }
ganlikun 0:20e0c61e0684 591 spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_TXRX, tx, rx, size);
ganlikun 0:20e0c61e0684 592 } else if (use_tx) {
ganlikun 0:20e0c61e0684 593 spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_TX, tx, NULL, tx_length);
ganlikun 0:20e0c61e0684 594 } else if (use_rx) {
ganlikun 0:20e0c61e0684 595 spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_RX, NULL, rx, rx_length);
ganlikun 0:20e0c61e0684 596 }
ganlikun 0:20e0c61e0684 597 }
ganlikun 0:20e0c61e0684 598
ganlikun 0:20e0c61e0684 599 inline uint32_t spi_irq_handler_asynch(spi_t *obj)
ganlikun 0:20e0c61e0684 600 {
ganlikun 0:20e0c61e0684 601 int event = 0;
ganlikun 0:20e0c61e0684 602
ganlikun 0:20e0c61e0684 603 // call the CubeF4 handler, this will update the handle
ganlikun 0:20e0c61e0684 604 HAL_SPI_IRQHandler(&obj->spi.handle);
ganlikun 0:20e0c61e0684 605
ganlikun 0:20e0c61e0684 606 if (obj->spi.handle.State == HAL_SPI_STATE_READY) {
ganlikun 0:20e0c61e0684 607 // When HAL SPI is back to READY state, check if there was an error
ganlikun 0:20e0c61e0684 608 int error = obj->spi.handle.ErrorCode;
ganlikun 0:20e0c61e0684 609 if(error != HAL_SPI_ERROR_NONE) {
ganlikun 0:20e0c61e0684 610 // something went wrong and the transfer has definitely completed
ganlikun 0:20e0c61e0684 611 event = SPI_EVENT_ERROR | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE;
ganlikun 0:20e0c61e0684 612
ganlikun 0:20e0c61e0684 613 if (error & HAL_SPI_ERROR_OVR) {
ganlikun 0:20e0c61e0684 614 // buffer overrun
ganlikun 0:20e0c61e0684 615 event |= SPI_EVENT_RX_OVERFLOW;
ganlikun 0:20e0c61e0684 616 }
ganlikun 0:20e0c61e0684 617 } else {
ganlikun 0:20e0c61e0684 618 // else we're done
ganlikun 0:20e0c61e0684 619 event = SPI_EVENT_COMPLETE | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE;
ganlikun 0:20e0c61e0684 620 }
ganlikun 0:20e0c61e0684 621 // enable the interrupt
ganlikun 0:20e0c61e0684 622 NVIC_DisableIRQ(obj->spi.spiIRQ);
ganlikun 0:20e0c61e0684 623 NVIC_ClearPendingIRQ(obj->spi.spiIRQ);
ganlikun 0:20e0c61e0684 624 }
ganlikun 0:20e0c61e0684 625
ganlikun 0:20e0c61e0684 626
ganlikun 0:20e0c61e0684 627 return (event & (obj->spi.event | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE));
ganlikun 0:20e0c61e0684 628 }
ganlikun 0:20e0c61e0684 629
ganlikun 0:20e0c61e0684 630 uint8_t spi_active(spi_t *obj)
ganlikun 0:20e0c61e0684 631 {
ganlikun 0:20e0c61e0684 632 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 633 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 634 HAL_SPI_StateTypeDef state = HAL_SPI_GetState(handle);
ganlikun 0:20e0c61e0684 635
ganlikun 0:20e0c61e0684 636 switch(state) {
ganlikun 0:20e0c61e0684 637 case HAL_SPI_STATE_RESET:
ganlikun 0:20e0c61e0684 638 case HAL_SPI_STATE_READY:
ganlikun 0:20e0c61e0684 639 case HAL_SPI_STATE_ERROR:
ganlikun 0:20e0c61e0684 640 return 0;
ganlikun 0:20e0c61e0684 641 default:
ganlikun 0:20e0c61e0684 642 return 1;
ganlikun 0:20e0c61e0684 643 }
ganlikun 0:20e0c61e0684 644 }
ganlikun 0:20e0c61e0684 645
ganlikun 0:20e0c61e0684 646 void spi_abort_asynch(spi_t *obj)
ganlikun 0:20e0c61e0684 647 {
ganlikun 0:20e0c61e0684 648 struct spi_s *spiobj = SPI_S(obj);
ganlikun 0:20e0c61e0684 649 SPI_HandleTypeDef *handle = &(spiobj->handle);
ganlikun 0:20e0c61e0684 650
ganlikun 0:20e0c61e0684 651 // disable interrupt
ganlikun 0:20e0c61e0684 652 IRQn_Type irq_n = spiobj->spiIRQ;
ganlikun 0:20e0c61e0684 653 NVIC_ClearPendingIRQ(irq_n);
ganlikun 0:20e0c61e0684 654 NVIC_DisableIRQ(irq_n);
ganlikun 0:20e0c61e0684 655
ganlikun 0:20e0c61e0684 656 // clean-up
ganlikun 0:20e0c61e0684 657 __HAL_SPI_DISABLE(handle);
ganlikun 0:20e0c61e0684 658 HAL_SPI_DeInit(handle);
ganlikun 0:20e0c61e0684 659 HAL_SPI_Init(handle);
ganlikun 0:20e0c61e0684 660 __HAL_SPI_ENABLE(handle);
ganlikun 0:20e0c61e0684 661 }
ganlikun 0:20e0c61e0684 662
ganlikun 0:20e0c61e0684 663 #endif //DEVICE_SPI_ASYNCH
ganlikun 0:20e0c61e0684 664
ganlikun 0:20e0c61e0684 665 #endif
ganlikun 0:20e0c61e0684 666