The prosthetic control(MIT)

Committer:
ganlikun
Date:
Thu Jun 23 05:23:34 2022 +0000
Revision:
0:20e0c61e0684
01

Who changed what in which revision?

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ganlikun 0:20e0c61e0684 1 /* mbed Microcontroller Library
ganlikun 0:20e0c61e0684 2 *******************************************************************************
ganlikun 0:20e0c61e0684 3 * Copyright (c) 2014, STMicroelectronics
ganlikun 0:20e0c61e0684 4 * All rights reserved.
ganlikun 0:20e0c61e0684 5 *
ganlikun 0:20e0c61e0684 6 * Redistribution and use in source and binary forms, with or without
ganlikun 0:20e0c61e0684 7 * modification, are permitted provided that the following conditions are met:
ganlikun 0:20e0c61e0684 8 *
ganlikun 0:20e0c61e0684 9 * 1. Redistributions of source code must retain the above copyright notice,
ganlikun 0:20e0c61e0684 10 * this list of conditions and the following disclaimer.
ganlikun 0:20e0c61e0684 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
ganlikun 0:20e0c61e0684 12 * this list of conditions and the following disclaimer in the documentation
ganlikun 0:20e0c61e0684 13 * and/or other materials provided with the distribution.
ganlikun 0:20e0c61e0684 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ganlikun 0:20e0c61e0684 15 * may be used to endorse or promote products derived from this software
ganlikun 0:20e0c61e0684 16 * without specific prior written permission.
ganlikun 0:20e0c61e0684 17 *
ganlikun 0:20e0c61e0684 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ganlikun 0:20e0c61e0684 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ganlikun 0:20e0c61e0684 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ganlikun 0:20e0c61e0684 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ganlikun 0:20e0c61e0684 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ganlikun 0:20e0c61e0684 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ganlikun 0:20e0c61e0684 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ganlikun 0:20e0c61e0684 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ganlikun 0:20e0c61e0684 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ganlikun 0:20e0c61e0684 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ganlikun 0:20e0c61e0684 28 *******************************************************************************
ganlikun 0:20e0c61e0684 29 */
ganlikun 0:20e0c61e0684 30 #include <stddef.h>
ganlikun 0:20e0c61e0684 31 #include "cmsis.h"
ganlikun 0:20e0c61e0684 32 #include "gpio_irq_api.h"
ganlikun 0:20e0c61e0684 33 #include "pinmap.h"
ganlikun 0:20e0c61e0684 34 #include "mbed_error.h"
ganlikun 0:20e0c61e0684 35 #include "gpio_irq_device.h"
ganlikun 0:20e0c61e0684 36
ganlikun 0:20e0c61e0684 37 #define EDGE_NONE (0)
ganlikun 0:20e0c61e0684 38 #define EDGE_RISE (1)
ganlikun 0:20e0c61e0684 39 #define EDGE_FALL (2)
ganlikun 0:20e0c61e0684 40 #define EDGE_BOTH (3)
ganlikun 0:20e0c61e0684 41
ganlikun 0:20e0c61e0684 42
ganlikun 0:20e0c61e0684 43 typedef struct gpio_channel {
ganlikun 0:20e0c61e0684 44 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
ganlikun 0:20e0c61e0684 45 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
ganlikun 0:20e0c61e0684 46 GPIO_TypeDef* channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
ganlikun 0:20e0c61e0684 47 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
ganlikun 0:20e0c61e0684 48 } gpio_channel_t;
ganlikun 0:20e0c61e0684 49
ganlikun 0:20e0c61e0684 50 static gpio_irq_handler irq_handler;
ganlikun 0:20e0c61e0684 51
ganlikun 0:20e0c61e0684 52 static gpio_channel_t channels[CHANNEL_NUM] = {
ganlikun 0:20e0c61e0684 53 #ifdef EXTI_IRQ0_NUM_LINES
ganlikun 0:20e0c61e0684 54 {.pin_mask = 0},
ganlikun 0:20e0c61e0684 55 #endif
ganlikun 0:20e0c61e0684 56 #ifdef EXTI_IRQ1_NUM_LINES
ganlikun 0:20e0c61e0684 57 {.pin_mask = 0},
ganlikun 0:20e0c61e0684 58 #endif
ganlikun 0:20e0c61e0684 59 #ifdef EXTI_IRQ2_NUM_LINES
ganlikun 0:20e0c61e0684 60 {.pin_mask = 0},
ganlikun 0:20e0c61e0684 61 #endif
ganlikun 0:20e0c61e0684 62 #ifdef EXTI_IRQ3_NUM_LINES
ganlikun 0:20e0c61e0684 63 {.pin_mask = 0},
ganlikun 0:20e0c61e0684 64 #endif
ganlikun 0:20e0c61e0684 65 #ifdef EXTI_IRQ4_NUM_LINES
ganlikun 0:20e0c61e0684 66 {.pin_mask = 0},
ganlikun 0:20e0c61e0684 67 #endif
ganlikun 0:20e0c61e0684 68 #ifdef EXTI_IRQ5_NUM_LINES
ganlikun 0:20e0c61e0684 69 {.pin_mask = 0},
ganlikun 0:20e0c61e0684 70 #endif
ganlikun 0:20e0c61e0684 71 #ifdef EXTI_IRQ6_NUM_LINES
ganlikun 0:20e0c61e0684 72 {.pin_mask = 0}
ganlikun 0:20e0c61e0684 73 #endif
ganlikun 0:20e0c61e0684 74 };
ganlikun 0:20e0c61e0684 75
ganlikun 0:20e0c61e0684 76 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
ganlikun 0:20e0c61e0684 77 {
ganlikun 0:20e0c61e0684 78 gpio_channel_t *gpio_channel = &channels[irq_index];
ganlikun 0:20e0c61e0684 79 uint32_t gpio_idx;
ganlikun 0:20e0c61e0684 80
ganlikun 0:20e0c61e0684 81 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
ganlikun 0:20e0c61e0684 82 uint32_t current_mask = (1 << gpio_idx);
ganlikun 0:20e0c61e0684 83
ganlikun 0:20e0c61e0684 84 if (gpio_channel->pin_mask & current_mask) {
ganlikun 0:20e0c61e0684 85 // Retrieve the gpio and pin that generate the irq
ganlikun 0:20e0c61e0684 86 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
ganlikun 0:20e0c61e0684 87 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
ganlikun 0:20e0c61e0684 88
ganlikun 0:20e0c61e0684 89 // Clear interrupt flag
ganlikun 0:20e0c61e0684 90 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
ganlikun 0:20e0c61e0684 91 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
ganlikun 0:20e0c61e0684 92
ganlikun 0:20e0c61e0684 93 if (gpio_channel->channel_ids[gpio_idx] == 0) {
ganlikun 0:20e0c61e0684 94 continue;
ganlikun 0:20e0c61e0684 95 }
ganlikun 0:20e0c61e0684 96
ganlikun 0:20e0c61e0684 97 // Check which edge has generated the irq
ganlikun 0:20e0c61e0684 98 if ((gpio->IDR & pin) == 0) {
ganlikun 0:20e0c61e0684 99 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
ganlikun 0:20e0c61e0684 100 } else {
ganlikun 0:20e0c61e0684 101 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
ganlikun 0:20e0c61e0684 102 }
ganlikun 0:20e0c61e0684 103 return;
ganlikun 0:20e0c61e0684 104 }
ganlikun 0:20e0c61e0684 105 }
ganlikun 0:20e0c61e0684 106 }
ganlikun 0:20e0c61e0684 107 error("Unexpected Spurious interrupt, index %d\r\n", irq_index);
ganlikun 0:20e0c61e0684 108 }
ganlikun 0:20e0c61e0684 109
ganlikun 0:20e0c61e0684 110
ganlikun 0:20e0c61e0684 111 #ifdef EXTI_IRQ0_NUM_LINES
ganlikun 0:20e0c61e0684 112 // EXTI line 0
ganlikun 0:20e0c61e0684 113 static void gpio_irq0(void)
ganlikun 0:20e0c61e0684 114 {
ganlikun 0:20e0c61e0684 115 handle_interrupt_in(0, EXTI_IRQ0_NUM_LINES);
ganlikun 0:20e0c61e0684 116 }
ganlikun 0:20e0c61e0684 117 #endif
ganlikun 0:20e0c61e0684 118 #ifdef EXTI_IRQ1_NUM_LINES
ganlikun 0:20e0c61e0684 119 // EXTI line 1
ganlikun 0:20e0c61e0684 120 static void gpio_irq1(void)
ganlikun 0:20e0c61e0684 121 {
ganlikun 0:20e0c61e0684 122 handle_interrupt_in(1, EXTI_IRQ1_NUM_LINES);
ganlikun 0:20e0c61e0684 123 }
ganlikun 0:20e0c61e0684 124 #endif
ganlikun 0:20e0c61e0684 125 #ifdef EXTI_IRQ2_NUM_LINES
ganlikun 0:20e0c61e0684 126 // EXTI line 2
ganlikun 0:20e0c61e0684 127 static void gpio_irq2(void)
ganlikun 0:20e0c61e0684 128 {
ganlikun 0:20e0c61e0684 129 handle_interrupt_in(2, EXTI_IRQ2_NUM_LINES);
ganlikun 0:20e0c61e0684 130 }
ganlikun 0:20e0c61e0684 131 #endif
ganlikun 0:20e0c61e0684 132 #ifdef EXTI_IRQ3_NUM_LINES
ganlikun 0:20e0c61e0684 133 // EXTI line 3
ganlikun 0:20e0c61e0684 134 static void gpio_irq3(void)
ganlikun 0:20e0c61e0684 135 {
ganlikun 0:20e0c61e0684 136 handle_interrupt_in(3, EXTI_IRQ3_NUM_LINES);
ganlikun 0:20e0c61e0684 137 }
ganlikun 0:20e0c61e0684 138 #endif
ganlikun 0:20e0c61e0684 139 #ifdef EXTI_IRQ4_NUM_LINES
ganlikun 0:20e0c61e0684 140 // EXTI line 4
ganlikun 0:20e0c61e0684 141 static void gpio_irq4(void)
ganlikun 0:20e0c61e0684 142 {
ganlikun 0:20e0c61e0684 143 handle_interrupt_in(4, EXTI_IRQ4_NUM_LINES);
ganlikun 0:20e0c61e0684 144 }
ganlikun 0:20e0c61e0684 145 #endif
ganlikun 0:20e0c61e0684 146 #ifdef EXTI_IRQ5_NUM_LINES
ganlikun 0:20e0c61e0684 147 // EXTI lines 5 to 9
ganlikun 0:20e0c61e0684 148 static void gpio_irq5(void)
ganlikun 0:20e0c61e0684 149 {
ganlikun 0:20e0c61e0684 150 handle_interrupt_in(5, EXTI_IRQ5_NUM_LINES);
ganlikun 0:20e0c61e0684 151 }
ganlikun 0:20e0c61e0684 152 #endif
ganlikun 0:20e0c61e0684 153 #ifdef EXTI_IRQ6_NUM_LINES
ganlikun 0:20e0c61e0684 154 // EXTI lines 10 to 15
ganlikun 0:20e0c61e0684 155 static void gpio_irq6(void)
ganlikun 0:20e0c61e0684 156 {
ganlikun 0:20e0c61e0684 157 handle_interrupt_in(6, EXTI_IRQ6_NUM_LINES);
ganlikun 0:20e0c61e0684 158 }
ganlikun 0:20e0c61e0684 159 #endif
ganlikun 0:20e0c61e0684 160
ganlikun 0:20e0c61e0684 161 extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx);
ganlikun 0:20e0c61e0684 162 extern void pin_function_gpiomode(PinName pin, uint32_t gpiomode);
ganlikun 0:20e0c61e0684 163
ganlikun 0:20e0c61e0684 164 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
ganlikun 0:20e0c61e0684 165 {
ganlikun 0:20e0c61e0684 166 uint32_t vector = 0;
ganlikun 0:20e0c61e0684 167 uint32_t irq_index;
ganlikun 0:20e0c61e0684 168 gpio_channel_t *gpio_channel;
ganlikun 0:20e0c61e0684 169 uint32_t gpio_idx;
ganlikun 0:20e0c61e0684 170
ganlikun 0:20e0c61e0684 171 if (pin == NC) return -1;
ganlikun 0:20e0c61e0684 172
ganlikun 0:20e0c61e0684 173 /* Enable SYSCFG Clock */
ganlikun 0:20e0c61e0684 174 __HAL_RCC_SYSCFG_CLK_ENABLE();
ganlikun 0:20e0c61e0684 175
ganlikun 0:20e0c61e0684 176 uint32_t port_index = STM_PORT(pin);
ganlikun 0:20e0c61e0684 177 uint32_t pin_index = STM_PIN(pin);
ganlikun 0:20e0c61e0684 178 irq_index = pin_lines_desc[pin_index].irq_index;
ganlikun 0:20e0c61e0684 179
ganlikun 0:20e0c61e0684 180 switch (irq_index) {
ganlikun 0:20e0c61e0684 181 #ifdef EXTI_IRQ0_NUM_LINES
ganlikun 0:20e0c61e0684 182 case 0:
ganlikun 0:20e0c61e0684 183 vector = (uint32_t)&gpio_irq0;
ganlikun 0:20e0c61e0684 184 break;
ganlikun 0:20e0c61e0684 185 #endif
ganlikun 0:20e0c61e0684 186 #ifdef EXTI_IRQ1_NUM_LINES
ganlikun 0:20e0c61e0684 187 case 1:
ganlikun 0:20e0c61e0684 188 vector = (uint32_t)&gpio_irq1;
ganlikun 0:20e0c61e0684 189 break;
ganlikun 0:20e0c61e0684 190 #endif
ganlikun 0:20e0c61e0684 191 #ifdef EXTI_IRQ2_NUM_LINES
ganlikun 0:20e0c61e0684 192 case 2:
ganlikun 0:20e0c61e0684 193 vector = (uint32_t)&gpio_irq2;
ganlikun 0:20e0c61e0684 194 break;
ganlikun 0:20e0c61e0684 195 #endif
ganlikun 0:20e0c61e0684 196 #ifdef EXTI_IRQ3_NUM_LINES
ganlikun 0:20e0c61e0684 197 case 3:
ganlikun 0:20e0c61e0684 198 vector = (uint32_t)&gpio_irq3;
ganlikun 0:20e0c61e0684 199 break;
ganlikun 0:20e0c61e0684 200 #endif
ganlikun 0:20e0c61e0684 201 #ifdef EXTI_IRQ4_NUM_LINES
ganlikun 0:20e0c61e0684 202 case 4:
ganlikun 0:20e0c61e0684 203 vector = (uint32_t)&gpio_irq4;
ganlikun 0:20e0c61e0684 204 break;
ganlikun 0:20e0c61e0684 205 #endif
ganlikun 0:20e0c61e0684 206 #ifdef EXTI_IRQ5_NUM_LINES
ganlikun 0:20e0c61e0684 207 case 5:
ganlikun 0:20e0c61e0684 208 vector = (uint32_t)&gpio_irq5;
ganlikun 0:20e0c61e0684 209 break;
ganlikun 0:20e0c61e0684 210 #endif
ganlikun 0:20e0c61e0684 211 #ifdef EXTI_IRQ6_NUM_LINES
ganlikun 0:20e0c61e0684 212 case 6:
ganlikun 0:20e0c61e0684 213 vector = (uint32_t)&gpio_irq6;
ganlikun 0:20e0c61e0684 214 break;
ganlikun 0:20e0c61e0684 215 #endif
ganlikun 0:20e0c61e0684 216 default:
ganlikun 0:20e0c61e0684 217 error("InterruptIn error: pin not supported.\n");
ganlikun 0:20e0c61e0684 218 return -1;
ganlikun 0:20e0c61e0684 219 }
ganlikun 0:20e0c61e0684 220
ganlikun 0:20e0c61e0684 221 // Enable GPIO clock
ganlikun 0:20e0c61e0684 222 GPIO_TypeDef *gpio_add = Set_GPIO_Clock(port_index);
ganlikun 0:20e0c61e0684 223
ganlikun 0:20e0c61e0684 224 // Save informations for future use
ganlikun 0:20e0c61e0684 225 obj->irq_n = pin_lines_desc[pin_index].irq_n;
ganlikun 0:20e0c61e0684 226 obj->irq_index = pin_lines_desc[pin_index].irq_index;
ganlikun 0:20e0c61e0684 227 obj->event = EDGE_NONE;
ganlikun 0:20e0c61e0684 228 obj->pin = pin;
ganlikun 0:20e0c61e0684 229
ganlikun 0:20e0c61e0684 230 gpio_channel = &channels[irq_index];
ganlikun 0:20e0c61e0684 231 gpio_idx = pin_lines_desc[pin_index].gpio_idx;
ganlikun 0:20e0c61e0684 232 gpio_channel->pin_mask |= (1 << gpio_idx);
ganlikun 0:20e0c61e0684 233 gpio_channel->channel_ids[gpio_idx] = id;
ganlikun 0:20e0c61e0684 234 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
ganlikun 0:20e0c61e0684 235 gpio_channel->channel_pin[gpio_idx] = pin_index;
ganlikun 0:20e0c61e0684 236
ganlikun 0:20e0c61e0684 237 irq_handler = handler;
ganlikun 0:20e0c61e0684 238
ganlikun 0:20e0c61e0684 239 // Enable EXTI interrupt
ganlikun 0:20e0c61e0684 240 NVIC_SetVector(obj->irq_n, vector);
ganlikun 0:20e0c61e0684 241 gpio_irq_enable(obj);
ganlikun 0:20e0c61e0684 242
ganlikun 0:20e0c61e0684 243 return 0;
ganlikun 0:20e0c61e0684 244 }
ganlikun 0:20e0c61e0684 245
ganlikun 0:20e0c61e0684 246 void gpio_irq_free(gpio_irq_t *obj)
ganlikun 0:20e0c61e0684 247 {
ganlikun 0:20e0c61e0684 248 uint32_t gpio_idx = pin_lines_desc[STM_PIN(obj->pin)].gpio_idx;
ganlikun 0:20e0c61e0684 249 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
ganlikun 0:20e0c61e0684 250
ganlikun 0:20e0c61e0684 251 gpio_irq_disable(obj);
ganlikun 0:20e0c61e0684 252 gpio_channel->pin_mask &= ~(1 << gpio_idx);
ganlikun 0:20e0c61e0684 253 gpio_channel->channel_ids[gpio_idx] = 0;
ganlikun 0:20e0c61e0684 254 gpio_channel->channel_gpio[gpio_idx] = 0;
ganlikun 0:20e0c61e0684 255 gpio_channel->channel_pin[gpio_idx] = 0;
ganlikun 0:20e0c61e0684 256 }
ganlikun 0:20e0c61e0684 257
ganlikun 0:20e0c61e0684 258 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
ganlikun 0:20e0c61e0684 259 {
ganlikun 0:20e0c61e0684 260 /* Enable / Disable Edge triggered interrupt and store event */
ganlikun 0:20e0c61e0684 261 if (event == IRQ_RISE) {
ganlikun 0:20e0c61e0684 262 if (enable) {
ganlikun 0:20e0c61e0684 263 LL_EXTI_EnableRisingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 264 obj->event |= IRQ_RISE;
ganlikun 0:20e0c61e0684 265 } else {
ganlikun 0:20e0c61e0684 266 LL_EXTI_DisableRisingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 267 obj->event &= ~IRQ_RISE;
ganlikun 0:20e0c61e0684 268 }
ganlikun 0:20e0c61e0684 269 }
ganlikun 0:20e0c61e0684 270 if (event == IRQ_FALL) {
ganlikun 0:20e0c61e0684 271 if (enable) {
ganlikun 0:20e0c61e0684 272 LL_EXTI_EnableFallingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 273 obj->event |= IRQ_FALL;
ganlikun 0:20e0c61e0684 274 } else {
ganlikun 0:20e0c61e0684 275 LL_EXTI_DisableFallingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 276 obj->event &= ~IRQ_FALL;
ganlikun 0:20e0c61e0684 277 }
ganlikun 0:20e0c61e0684 278 }
ganlikun 0:20e0c61e0684 279 }
ganlikun 0:20e0c61e0684 280
ganlikun 0:20e0c61e0684 281 void gpio_irq_enable(gpio_irq_t *obj)
ganlikun 0:20e0c61e0684 282 {
ganlikun 0:20e0c61e0684 283 uint32_t temp = 0;
ganlikun 0:20e0c61e0684 284 uint32_t port_index = STM_PORT(obj->pin);
ganlikun 0:20e0c61e0684 285 uint32_t pin_index = STM_PIN(obj->pin);
ganlikun 0:20e0c61e0684 286
ganlikun 0:20e0c61e0684 287 /* Select Source */
ganlikun 0:20e0c61e0684 288 temp = SYSCFG->EXTICR[pin_index >> 2];
ganlikun 0:20e0c61e0684 289 CLEAR_BIT(temp, (0x0FU) << (4U * (pin_index & 0x03U)));
ganlikun 0:20e0c61e0684 290 SET_BIT(temp, port_index << (4U * (pin_index & 0x03U)));
ganlikun 0:20e0c61e0684 291 SYSCFG->EXTICR[pin_index >> 2] = temp;
ganlikun 0:20e0c61e0684 292
ganlikun 0:20e0c61e0684 293 LL_EXTI_EnableIT_0_31(1 << pin_index);
ganlikun 0:20e0c61e0684 294
ganlikun 0:20e0c61e0684 295 /* Restore previous edge interrupt configuration if applicable */
ganlikun 0:20e0c61e0684 296 if (obj->event & IRQ_RISE) {
ganlikun 0:20e0c61e0684 297 LL_EXTI_EnableRisingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 298 }
ganlikun 0:20e0c61e0684 299 if (obj->event & IRQ_FALL) {
ganlikun 0:20e0c61e0684 300 LL_EXTI_EnableFallingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 301 }
ganlikun 0:20e0c61e0684 302
ganlikun 0:20e0c61e0684 303 NVIC_EnableIRQ(obj->irq_n);
ganlikun 0:20e0c61e0684 304 }
ganlikun 0:20e0c61e0684 305
ganlikun 0:20e0c61e0684 306 void gpio_irq_disable(gpio_irq_t *obj)
ganlikun 0:20e0c61e0684 307 {
ganlikun 0:20e0c61e0684 308 /* Clear EXTI line configuration */
ganlikun 0:20e0c61e0684 309 LL_EXTI_DisableRisingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 310 LL_EXTI_DisableFallingTrig_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 311 LL_EXTI_DisableIT_0_31(1 << STM_PIN(obj->pin));
ganlikun 0:20e0c61e0684 312 NVIC_DisableIRQ(obj->irq_n);
ganlikun 0:20e0c61e0684 313 NVIC_ClearPendingIRQ(obj->irq_n);
ganlikun 0:20e0c61e0684 314 }
ganlikun 0:20e0c61e0684 315